CN1826534A - Capacitance determining circuit and capacitance determining method - Google Patents
Capacitance determining circuit and capacitance determining method Download PDFInfo
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- CN1826534A CN1826534A CNA2004800213623A CN200480021362A CN1826534A CN 1826534 A CN1826534 A CN 1826534A CN A2004800213623 A CNA2004800213623 A CN A2004800213623A CN 200480021362 A CN200480021362 A CN 200480021362A CN 1826534 A CN1826534 A CN 1826534A
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- H04—ELECTRIC COMMUNICATION TECHNIQUE
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Abstract
A capacitance detection circuit containing an input protection circuit and having high sensitivity is provided. A capacitance detection circuit (20) for detecting the capacitance of a capacitive sensor (Cs), comprising a buffer amplifier (12) connected to the capacitive sensor (Cs) via a signal wire (13) and having a voltage gain of 1; diodes (Dp1, Dp2) connected in series between the signal wire (13) and a positive power supply (+Vdd); diodes (Dm1, Dm2) connected in series between the signal wire (13) and a negative power supply (-Vdd), wherein an output terminal of the buffer amplifier (12) is connected to a junction point (21a) of the diodes (Dp1 and Dp2) and to a junction point (21b) of the diodes (Dm1 and Dm2).
Description
Technical field
The present invention relates to detect the circuit of electrostatic capacitance, particularly the circuit of output and the corresponding signal of variation of small electrostatic capacitance.
Background technology
In the prior art, the testing circuit of the capacitance type transducers that changes according to the variation of physical quantity as electrostatic capacitance (being designated hereinafter simply as " electric capacity ") has capacitive detection circuit shown in Figure 1 10.
This capacitive detection circuit 10 is circuit of the electric capacity corresponding voltage signal of output and capacitance type transducers Cs; constitute (, for example opening flat 5-335493 communique) by capacitance type transducers Cs, input protection circuit 11, resistance R h, buffer amplifier 12, the signal wire 13 etc. that connects capacitance type transducers Cs and buffering amplifier 12 with reference to the Japanese documentation spy as input protection circuit.
Apply voltage Vb on the electrode of capacitance type transducers Cs, another electrode is connected by the input terminal of signal wire 13 with buffer amplifier 12.Input protection circuit 11 is the circuit of the contour voltage clamp of static charge on supply voltage that will flow into signal wire 13, by signal wire 13 and be connected positive supply (+Vdd) and negative supply (diode Dp Vdd) and Dm formation.
This capacitive detection circuit 10 in the past is following to carry out work.
Here, represent the stray capacitance of signal wire 13 with Ci, then since the voltage Vb that is applied on the capacitance type transducers Cs determine by capacitance type transducers Cs and stray capacitance Ci, so the input voltage vin of buffer amplifier 12 becomes:
Vin＝Vb·(1/jωCi)/(1/jωCs+1/jωCi)。But, because the voltage amplification degree of buffer amplifier 12 is 1, so Vout=Vin sets up.Therefore, cancellation Vin from above-mentioned two formulas, then output voltage V out is:
Vout＝Vb·Cs/(Cs+Ci)。Here, if the electric capacity of capacitance type transducers Cs is represented with component relevant with the variation of physical quantity (changing electric capacity Δ C) and component incoherent with it (reference capacitance Cd) sum, then be: Cs=Cd+ Δ C, then above-mentioned output voltage V out is:
Vout＝Vb·(Cd+ΔC)/(Cd+ΔC+Ci)。, when Vb is DC voltage, in output voltage V out, become final signal here owing to have only with the corresponding AC compounent Vo of the variation of physical quantity, so this AC compounent Vo becomes:
Vo=Vb Δ C/ (Cd+ Δ C+Ci)--(formula 1) (we can say that also Vo is determined by the component relevant with the variation (for example Δ C) of the timeliness of physical quantity here).
By following formula 1 as can be known, in such capacitive detection circuit,,,, perhaps be zero so stray capacitance Ci is reduced owing to Δ C, Cd, Vb fix in order to improve sensitivity.
But, stray capacitance Ci reduced and be not easy.
Fig. 2 is the capacitive detection circuit shown in Figure 1 10 equivalent circuit figure of (when making diode Dp and Dm be reverse bias) during work usually.Here, the electric capacity of diode Dp and Dm (the vague and general layer capacitance during reverse bias) is expressed as capacitor Cdp and Cdm in the drawings respectively, and the input capacitance of buffer amplifier 12 is expressed as capacitor Cg.Stray capacitance Ci is the electric capacity sum of these capacitors Cdp, Cdm, Cg, that is:
Ci=Cdp+Cdm+Cg is the stray capacitance that is produced by indispensable circuit.
If can on integrated circuit (IC), form capacitive detection circuit 10 integral body, then, can significantly cut down stray capacitance Ci here, by input protection circuit 11 is not set.But; under the situation that multiple unit construction need be got up manufacture a product; or capacitance type transducers Cs must be installed under the locational situation of separating with testing circuit; just must in capacitance type transducers Cs and testing circuit separated structures, capacitive detection circuit be installed, on the input section of buffer amplifier 12, inevitably input protection circuit 11 will be set.Therefore, the stray capacitance that is caused by input protection circuit 11 is added to come in, thereby produces the problem of the sensitivity decline of capacitive detection circuit.
Summary of the invention
Therefore, the present invention finishes in view of above problem, and its purpose is to provide a kind of to be had input protection circuit and have highly sensitive capacitive detection circuit.
In order to reach described purpose, capacitive detection circuit of the present invention is improving aspect the electric capacity of eliminating the diode that constitutes input protection circuit.
Promptly, capacitive detection circuit of the present invention is used to detect the electric capacity of measured capacitance device, it is characterized in that, comprise: the first buffer amplifier portion that links to each other with described measured capacitance device via signal wire, be connected first and second diodes between the described signal wire and first power supply, and be connected third and fourth diode between described signal wire and the second source, and the lead-out terminal of the described first buffer amplifier portion is connected first tie point of described first diode and described second diode, and on second tie point of described the 3rd diode and described the 4th diode.Thus, owing to be connected first diode on the signal wire and the two ends of the 3rd diode become same potential, so the electric capacity of diode is eliminated, stray capacitance diminishes, and it is big that the sensitivity of capacitive detection circuit becomes.
Here, first power supply is preferably positive potential, uses the positive supply in the circuit usually.In addition, second source is preferably negative potential, uses negative supply or ground connection in the circuit usually.As long as the first buffer amplifier portion has the function of buffering.The voltage amplification degree of the first buffer amplifier portion is preferably " 1 ", also can be the value beyond this.And the bias voltage that is applied on the measured capacitance device can or be loaded with the interchange of direct current for interchange, direct current.
In addition, also can followingly connect: the lead-out terminal and described first and second tie points of the described first buffer amplifier portion are exchanged connection via first and second capacitors respectively, for described first tie point, be connected via first resistance on the current potential between the current potential of the current potential of described first power supply and described signal wire, for described second tie point, be connected via second resistance on the current potential between the current potential of described second current potential and described signal wire.At this moment, as the resistance value of described first and second resistance and the capacitance of described first and second capacitors, be preferably following resistance value and capacitance: in the output signal of the described first buffer amplifier portion, make with the variation electric capacity of described measured capacitance device and the corresponding frequency component of AC compounent that is applied to the bias voltage on this measured capacitance device and pass through.Thus, the lead-out terminal of the first buffer amplifier portion and described first and second tie points are exchanged connection, be connected first diode on the signal wire and the two ends of the 3rd diode and become same potential with exchanging, therefore the electric capacity of these diodes is eliminated, stray capacitance diminishes, and increases as the sensitivity of the circuit of the variation electric capacity that detects the measured capacitance device.
In addition, also can between the tie point of described first resistance and described first capacitor and described first tie point, connect the second buffer amplifier portion, and between the tie point of described second resistance and described second capacitor and described second tie point, connect the 3rd buffer amplifier portion.Preferably, make the current potential of described first tie point and the current potential of described second tie point become the voltage amplification degree separately that described first to the 3rd buffer amplifier portion is set in the same manner with the current potential of described signal wire here.More preferably, making the voltage amplification degree of first to the 3rd buffer amplifier portion all is 1.Thus, the two ends of having guaranteed first diode and the 3rd diode more reliably are same potential.
In addition, in the described first buffer amplifier portion, the circuit as input stage comprises MOSFET, when the grid of described MOSFET is connected on the input terminal of the described first buffer amplifier portion, the substrate of described MOSFET and the lead-out terminal of the described first buffer amplifier portion are connected.Thus, the input capacitance of the first buffer amplifier portion is eliminated, and the sensitivity of capacitive detection circuit improves.
In addition, in described capacitive detection circuit, can also be provided for the calibrating terminal of input test signal in addition, and input terminal and the test between the described calibrating terminal capacitor and the switch that is connected the described first buffer amplifier portion is set.Thus, be implemented as at capacitive detection circuit under the situation of the circuit that separates with the measured capacitance device, even also identical, so can carry out the work test with capacitive detection circuit separately with the connected state of measured capacitance device owing to not having under the connected state at the measured capacitance device.
And the present invention not only can be used as such capacitive detection circuit and realizes, the electric capacity that also can be used as the diode by eliminating input protection circuit improves the capacitance determining method of sensitivity to be realized.
According to capacitive detection circuit of the present invention, be eliminated owing in the diode that constitutes input protection circuit, be connected the electric capacity of the diode on the signal wire, so the stray capacitance of signal wire diminishes, the sensitivity of capacitive detection circuit significantly improves.
In addition; in the output signal of the buffer amplifier portion that constitutes capacitive detection circuit; be applied on the diode of input protection circuit with the corresponding frequency component of AC compounent that is applied to the bias voltage on this measured capacitance device with the capacitance variations of capacitance type transducers; thus in the diode that constitutes input protection circuit; the current potential that is connected the two ends of the diode on the signal wire becomes identical with exchanging; electric capacity is eliminated; therefore the stray capacitance of signal wire diminishes, and capacitance type transducers significantly improves as the sensitivity of the capacitive detection circuit that detects capacitance variations.
In addition, the lead-out terminal of the substrate of the MOSFET of the input section by connecting buffer amplifier in advance and buffering amplifier, the input capacitance of buffer amplifier is eliminated, so the stray capacitance of signal wire reduces, and the sensitivity of capacitive detection circuit improves.
And, go into to test the capacitor and the switch of usefulness by group in capacitive detection circuit, even under the not connected state of capacitance type transducers, also can produce with capacitance type transducers and be connected the state that equates in the capacitive detection circuit, and can carry out the work test of circuit.On the other hand, when not carrying out the work test, the capacitor of test usefulness can be connected between the input terminal and lead-out terminal of buffer amplifier portion.
Description of drawings
Fig. 1 is the circuit diagram of the capacitive detection circuit of prior art;
Fig. 2 is the circuit diagram of the equivalent circuit of capacitive detection circuit shown in Figure 1;
Fig. 3 is the circuit diagram of the capacitive detection circuit of first embodiment of the present invention;
Fig. 4 is the circuit diagram of the equivalent circuit of capacitive detection circuit shown in Figure 3;
Fig. 5 is the circuit diagram of the capacitive detection circuit of second embodiment of the present invention;
Fig. 6 is the circuit diagram of the equivalent circuit of capacitive detection circuit shown in Figure 5;
Fig. 7 be in equivalent circuit shown in Figure 6 mark the circuit diagram of signal voltage, wherein (a) is that circuit is the circuit diagram under the situation of steady state (SS), (b) is that circuit is the circuit diagram under the situation of variable condition;
Fig. 8 is the circuit diagram that has added the capacitive detection circuit of two buffer amplifiers in capacitive detection circuit shown in Figure 5;
Fig. 9 connects and composes the substrate of MOSFET of input stage of buffer amplifier and the circuit diagram of lead-out terminal of buffering amplifier;
Figure 10 has added the circuit diagram of test with capacitor in capacitive detection circuit;
(a) among Figure 11 and (b) be the circuit diagram of an example of buffer amplifier.
Embodiment
Below, use accompanying drawing to describe embodiments of the present invention in detail.
(first embodiment)
Fig. 3 is the example as the circuit diagram of the capacitive detection circuit 20 in first embodiment of an example of the present invention.
This capacitive detection circuit 20 is output and the circuit of the electric capacity corresponding voltage signal of capacitance type transducers Cs, is made of capacitance type transducers Cs, input protection circuit 21, resistance R h, buffer amplifier 12, the signal wire 13 etc. that connects capacitance type transducers Cs and buffering amplifier 12.Signal wire 13 is connected on the power supply Vh by pull-up resistor Rh, and DC potential is fixed.Buffer amplifier 12 is that the low voltage amplification degree of input impedance height and output impedance is 1 impedance transformer.Compare with existing capacitive detection circuit 10 shown in Figure 1, its difference is: the output of the structure of input protection circuit 21 and buffer amplifier 12 and being connected of input protection circuit 21 etc.Below, to the identical label of the structural detail identical mark and omit explanation, only difference is illustrated it with existing capacitive detection circuit.
And diode Dp1 in the lead-out terminal of buffer amplifier 12 and the input protection circuit 21 and the tie point 21a of diode Dp2 link to each other, and link to each other with the tie point 21b of diode Dm1 and diode Dm2 simultaneously.
The capacitive detection circuit 20 of Gou Chenging following carries out work as described above.
Fig. 4 is the equivalent circuit of capacitive detection circuit 20 shown in Figure 3.Here, the electric capacity of diode Dp2 and Dm1 is expressed as capacitor Cdp and Cdm in the drawings respectively, and the input capacitance of buffer amplifier 12 is expressed as capacitor Cg.
Be conceived to capacitor Cdp, because its two ends are connected on the input terminal and lead-out terminal of buffer amplifier 12, so become same potential.Equally, the two ends of capacitor Cdm also become same potential.That is, the two ends of these capacitors Cdp and Cdm all become same potential, the store charge vanishing, outwardly, capacitor C dp and Cdm vanishing.Can easily understand this point by following: the relation of the voltage V between capacitor C, store charge Q and the two-terminal of capacitor:
Among the Q=CV, when V=0, Q=0, that is, store charge becomes 0, outwardly, is that 0 situation equates with capacitor C.
Thus; owing to can ignore two diode Dp2 being connected on the signal wire 13 and the electric capacity (capacitor Cdp and Cdm) of Dm1; so the stray capacitance Ci of signal wire 13 only is capacitor Cg; that is, become Ci=Cg, therefore; with the stray capacitance Ci of signal wire 13 in the capacitive detection circuit 10 of prior art (=Cdp+Cdm+Cg) compare; deducted the capacitive component that input protection circuit causes, so the sensitivity of capacitive detection circuit 20 is improved.That is, the Ci that comprises in the denominator of following formula 1 significantly reduces, and circuit gain Δ C/ (Cd+ Δ C+Ci) has compared with prior art had significantly raising.
(second embodiment)
Fig. 5 is the example as the circuit diagram of the capacitive detection circuit 30 of second embodiment of an example of the present invention.
This capacitive detection circuit 30 is output and the circuit of the electric capacity corresponding voltage signal of capacitance type transducers Cs, by capacitance type transducers Cs, input protection circuit 31, resistance R h, buffer amplifier 12, capacitor Cp, capacitor Cm and connect capacitance type transducers Cs and the signal wire 13 of buffering amplifier 12 constitutes.Compare with the capacitive detection circuit 20 of first embodiment shown in Figure 3, difference is to have appended two capacitor Cp and Cm and two resistance R p and Rm.Below, to the same label of the structural detail mark identical and omit explanation, only difference is illustrated it with the capacitive detection circuit 20 of first embodiment.
For the tie point 31a of diode Dp1 in the input protection circuit 31 and diode Dp2, between itself and fixed voltage Vp, be connected with resistance R p, and between the lead-out terminal of itself and buffer amplifier 12, be connected with capacitor Cp.Equally,, between itself and fixed voltage Vm, be connected with resistance R m, and between the lead-out terminal of itself and buffer amplifier 12, be connected with capacitor Cm for the tie point 31b of diode Dm1 in the input protection circuit 31 and diode Dm2.
Capacitor Cp and resistance R p constitute output voltage with buffer amplifier 12 to be served as input and is the Hi-pass filter of output with their tie point, set its capacitance and resistance value, make it to become the time constant that the signal that makes with the corresponding frequency range of voltage Vb (AC compounent) of the variation electric capacity Δ C of capacitance type transducers Cs and bias supply passes through.Equally,, also set its capacitance and resistance value, make it to become the time constant that the signal that makes same frequency range passes through for capacitor Cm and resistance R m.Therefore, the AC compounent of the output voltage of buffer amplifier 12 is by capacitor Cm and be applied on the tie point 31b of input protection circuit 31.
Fixed voltage Vp is that (+value between Vdd) is the DC potential that is used for being provided with according to the mode that diode Dp1 and Dp2 all become reverse bias in work usually bias voltage for the current potential Vh of signal wire 13 and positive supply.Equally, fixed voltage Vm is that (value Vdd) is the DC potential that is used for being provided with according to the mode that diode Dm1 and Dm2 all become reverse bias in work usually bias voltage for the current potential Vh of signal wire 13 and negative supply.
The capacitive detection circuit 30 of Gou Chenging following carries out work as described above.
Fig. 6 is the equivalent circuit of capacitive detection circuit 30 shown in Figure 5.Here, the electric capacity of diode Dp2 and Dm1 is expressed as capacitor Cdp and Cdm respectively in the drawings, and the input capacitance of buffer amplifier 12 is expressed as capacitor Cg in the drawings.
The AC compounent of the voltage in the signal wire 13 is from the output of buffering amplifier 12, by capacitor Cp and Cm and be applied on the tie point 31a and 31b of input protection circuit 31.That is, be conceived to AC compounent, then capacitor Cdp is identical with the current potential at Cdm two ends separately, and the same with first embodiment, comes electric capacity Cdp and Cdm vanishing outwardly.
Thus, owing to can ignore two diode Dp2 being connected on the signal wire 13 and the electric capacity (capacitor Cdp and Cdm) of Dm1,, play the effect identical with first embodiment so the stray capacitance Ci of signal wire 13 is capacitor Cg only.
As using analytic expression that above work is described, it is as follows.
(a) among Fig. 7 is the circuit diagram of having charged to following magnitude of voltage, and this magnitude of voltage is to be steady state (SS) when capacitive detection circuit 30, the magnitude of voltage everywhere when promptly the electric capacity of capacitance type transducers Cs equals steady-state value Cd (changing electric capacity Δ C=0).Making voltage Vb here is direct current.That is, the voltage of signal wire 13 is Vh, and the output voltage of buffer amplifier 12 is Vh, and the voltage of the tie point 31a of input protection circuit 31 is Vp, and the voltage of the tie point 31b of input protection circuit 31 is Vm.
On the other hand, (b) among Fig. 7 is the circuit diagram of the magnitude of voltage everywhere when having charged to the capacitance variations of capacitance type transducers Cs of capacitive detection circuit 30.That is, the voltage of signal wire 13 is (Vsig+Vh), and the output voltage of buffer amplifier 12 is (Vsig+Vh), and the voltage of the tie point 31a of input protection circuit 31 is (Vsig+Vp), and the voltage of the tie point 31b of input protection circuit 31 is (Vsig+Vm).
Here, if the input resistance of resistance R h and buffering amplifier 12 is high, the quantity of electric charge of signal wire 13 is preserved, and the quantity of electric charge Q2 of the signal wire 13 under the variable condition shown in the quantity of electric charge Q1 of the signal wire 13 under the steady state (SS) shown in Fig. 7 (a) and (b) of Fig. 7 equates.
Here, the quantity of electric charge Q1 of the signal wire 13 under the steady state (SS) shown in Fig. 7 (a) is:
Q1＝Cd·(Vh-Vb)+Cdp·(Vh-Vp)+Cdm(Vh-Vm)+Cg·Vh。On the other hand, the quantity of electric charge Q2 of the signal wire 13 under the variable condition shown in Fig. 7 (b) is:
Q2＝(Cd+ΔC)·(Vsig+Vh-Vb)+Cdp·(Vsig+Vh-Vsig-Vp)+Cdm(Vsig+Vh-Vsig-Vm)+Cg·(Vsig+Vh)。So,
Q1=Q2 sets up.According to these formulas, corresponding component of signal Vsig can be expressed as with the capacitance variations of capacitance type transducers Cs:
Vsig＝(ΔC/(Cd+ΛC+Cg))·(Vb-Vh)。According to this formula as can be known, the AC compounent of the output signal of buffer amplifier 12 is not subjected to the influence of the electric capacity (capacitor Cdp and Cdm) of two diode Dp2 of input protection circuit 31 and Dm1.That is, the stray capacitance Ci of signal wire 13 only is capacitor Cg apparently, and the remolding sensitivity prior art increases.
More than capacitive detection circuit of the present invention is illustrated, but the invention is not restricted to these embodiments with two embodiments.
For example, also can make the voltage Vb of bias supply for exchanging or loaded the interchange of direct current.In addition, the capacitive detection circuit 40 shown in also can image pattern 8 is the same, and cushion the lead-out terminal of amplifier 12 and is connected buffer amplifier 42 and 43 by capacitor Cp or Cm from the tie point of two diodes.This capacitive detection circuit 40 is equivalent to following circuit: between the tie point 31a of the capacitive detection circuit 30 of second embodiment and resistance R p and to insert input impedance height and the low voltage amplification degree of output impedance between tie point 31b and resistance R m be 1 impedance transformer (being respectively buffer amplifier 42 and 43).Thus; disconnect input protection circuit 41 from the output load of buffering amplifier 12; and provide voltage by buffer amplifier 42 and 43 tie point 41a and 41b simultaneously, so the current potential at the two ends of capacitor Cdp and Cdm can remain same potential more reliably to input protection circuit 41.
In addition, shown in the circuit diagram of Fig. 9, in the internal circuit of buffer amplifier 12, when input terminal is connected on the grid of MOSFET, the input capacitance of buffer amplifier 12 (capacitor Cg) is the grid capacitance of this MOSFET, and its major part is the electric capacity between grid substrate.Therefore, in this case, also the substrate of MOSFET and the lead-out terminal of buffering amplifier 12 can be coupled together.Thus, the electric capacity between grid substrate is eliminated, and stray capacitance Ci diminishes, and the sensitivity of capacitive detection circuit improves.
In addition, wait when realizing by single-chip IC or breadboard, shown in the circuit diagram of Figure 10, also can add the circuit that is used for the testing capacitor testing circuit when removing capacitance type transducers Cs and capacitive detection circuit.In the circuit diagram of Figure 10, the input terminal of buffer amplifier 12 is connected test with on the PAD (electrode terminal of IC) 52 by test with capacitor 50 and switch 51, and the control terminal of switch 51 is connected and switches with on the PAD 53 (or Switch Control circuit).By such structure, when test, apply the first predetermined voltage and switch 51 is connected test with on the PAD 52 from switching with PAD 53, thereby make it become test mode, become capacitance type transducers (test with capacitor 50) thus and be connected the state in the capacitive detection circuit, by just can the testing capacitor testing circuit to test usefulness PAD 52 input test signals etc.On the other hand, also can apply the second predetermined voltage from switching with PAD 53 after end of test (EOT), switch 51 is connected on the lead-out terminal of buffer amplifier 12, making test is same potential with the two ends of capacitor 50, thereby can not cause that sensitivity descends.
In addition, buffer amplifier 12,42,43 in first embodiment and second embodiment also can use the voltage follower that is made of the amplifier (operational amplifier) shown in Figure 11 (a) to constitute, and also can be made of the circuit of MOSFET shown in (b) that use Figure 11.
In addition, when the voltage at the two ends of capacitor Cdp and Cdm produced phase differential, the loop that also can begin at the end from capacitor Cdp and Cdm till the other end inserted phase compensating circuit, thereby adjusts not produce phase differential.Perhaps, also can make the resistance R p of the capacitive detection circuit 30 in second embodiment and Rm is variable resistor, and making capacitor Cp and Cm is variable capacitance, can carry out the adjustment of phase compensation and passband simultaneously thus.
Industrial applicibility
The present invention can be used as capacitive detection circuit, particularly as output and small electrostatic capacitance Change the circuit of corresponding signal and use, for example, can be used as electric capacity according to Electret Condencer Microphone Deng the variation of physical quantity and the testing circuit of the capacitance type transducers that changes and using.
Claims (12)
1. capacitive detection circuit is used to detect the electric capacity of measured capacitance device, it is characterized in that, comprising:
Via signal wire be connected the first buffer amplifier portion on the described measured capacitance device,
Be connected first and second diode between the described signal wire and first power supply,
And be connected the 3rd and the 4th diode between described signal wire and the second source,
And the lead-out terminal of the described first buffer amplifier portion is connected on second tie point of first tie point of described first diode and described second diode and described the 3rd diode and described the 4th diode.
2. capacitive detection circuit as claimed in claim 1 is characterized in that, the voltage amplification degree of the described first buffer amplifier portion is 1.
3. capacitive detection circuit as claimed in claim 1 is characterized in that,
The lead-out terminal of the described first buffer amplifier portion exchanges with described first and second tie points via first and second capacitors respectively and is connected,
Described first tie point is connected via first resistance on the current potential between the current potential of the current potential of described first power supply and described signal wire,
Described second tie point is connected via second resistance on the current potential between the current potential of the current potential of described second source and described signal wire.
4. capacitive detection circuit as claimed in claim 3 is characterized in that,
Described first resistance and described first capacitor are following resistance value and capacitance: in the output signal of the described first buffer amplifier portion, make with the variation electric capacity of described measured capacitance device and the corresponding frequency component of AC compounent that is applied to the bias voltage on this measured capacitance device and pass through
Described second resistance and described second capacitor are following resistance value and capacitance: in the output signal of the described first buffer amplifier portion, make with the variation electric capacity of described measured capacitance device and the corresponding frequency component of AC compounent that is applied to the bias voltage on this measured capacitance device and pass through.
5. capacitive detection circuit as claimed in claim 3 is characterized in that,
The second buffer amplifier portion is connected between the tie point and described first tie point of described first resistance and described first capacitor,
The 3rd buffer amplifier portion is connected between the tie point and described second tie point of described second resistance and described second capacitor.
6. capacitive detection circuit as claimed in claim 5, it is characterized in that, set described first to the 3rd buffer amplifier portion voltage amplification degree separately, so that the current potential of the current potential of described first tie point and described second tie point is identical with the current potential of described signal wire.
7. capacitive detection circuit as claimed in claim 1 is characterized in that,
The described first buffer amplifier portion comprises the MOSFET as input stage circuit,
The grid of described MOSFET is connected on the input terminal of the described first buffer amplifier portion,
The substrate of described MOSFET is connected on the lead-out terminal of the described first buffer amplifier portion.
8. capacitive detection circuit as claimed in claim 1 is characterized in that, described capacitive detection circuit also comprises:
Be used to import the calibrating terminal of detection signal; And
Be connected input terminal and the test between the described calibrating terminal capacitor and the switch of the described first buffer amplifier portion.
9. capacitive detection circuit is used to detect the electric capacity of measured capacitance device, it is characterized in that, comprising:
Via signal wire be connected voltage amplification degree on the described measured capacitance device be 1 buffer amplifier portion,
The direction that flows to first power supply from described signal wire with electric current be connected first and second diodes between described signal wire and described first power supply,
The direction that flows to described signal wire from second source with electric current be connected third and fourth diode between described signal wire and the described second source,
It is following and be resistance between the above current potential of the current potential of described second source to be connected the current potential of described signal wire and described first power supply,
And the lead-out terminal of described buffer amplifier portion is connected on the tie point of the tie point of described first diode and described second diode and described the 3rd diode and described the 4th diode.
10. capacitive detection circuit is used to detect the electric capacity of measured capacitance device, it is characterized in that, comprising:
Via signal wire be connected voltage amplification degree on the described measured capacitance device be 1 buffer amplifier portion,
The direction that flows to first power supply from described signal wire with electric current be connected first and second diodes between described signal wire and described first power supply,
The direction that flows to described signal wire from second source with electric current be connected third and fourth diode between described signal wire and described two power supplys,
Be connected the current potential of described signal wire and described first power supply following and be between the above current potential of the current potential of described second source resistance,
Be connected capacitor between first tie point of the lead-out terminal of described buffer amplifier portion and described first diode and described second diode,
Be connected resistance on the current potential between the current potential of the current potential of described first tie point and described first power supply and described signal wire,
Be connected capacitor between second tie point of the lead-out terminal of described buffer amplifier portion and described the 3rd diode and described the 4th diode,
Be connected the resistance on the current potential between the current potential of the current potential of described second tie point and described second source and described signal wire.
11. a capacitive detection circuit is used to detect the electric capacity of measured capacitance device, it is characterized in that, comprising:
Via signal wire be connected voltage amplification degree on the described measured capacitance device be 1 the first buffer amplifier portion,
The direction that flows to first power supply from described signal wire with electric current be connected first and second diodes between described signal wire and described first power supply,
The direction that flows to described signal wire from second source with electric current be connected third and fourth diode between described signal wire and the described second source,
Be connected first capacitor between first tie point of the lead-out terminal of the described first buffer amplifier portion and described first diode and described second diode and the second buffer amplifier portion,
Be connected first resistance on the current potential between the current potential of the current potential of the tie point of described first capacitor and the described second buffer amplifier portion and described first power supply and described signal wire,
Be connected second capacitor between second tie point of the lead-out terminal of the described first buffer amplifier portion and described the 3rd diode and described the 4th diode and the 3rd buffer amplifier portion,
Be connected second resistance on the current potential between the current potential of the current potential of the tie point of described second capacitor and described the 3rd buffer amplifier portion and described second source and described signal wire,
It is following and be the 3rd resistance between the above current potential of the current potential of described second source to be connected the current potential of described signal wire and described first power supply.
12. a capacitance determining method is used to detect the electric capacity of measured capacitance device, it is characterized in that,
Connecting described measured capacitance device and voltage amplification degree by signal wire is 1 buffer amplifier portion,
Polyphone connects first and second diodes between the described signal wire and first power supply, and polyphone connects third and fourth diode between described signal wire and second source,
The lead-out terminal of described buffer amplifier portion is connected on the tie point of the tie point of described first diode and described second diode and described the 3rd diode and described the 4th diode, eliminates described first diode that is connected on the described signal wire and the electric capacity of described the 3rd diode thus.
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2003287991A JP3693665B2 (en) | 2003-08-06 | 2003-08-06 | Capacitance detection circuit and capacitance detection method |
| JP287991/2003 | 2003-08-06 | ||
| PCT/JP2004/011577 WO2005015246A1 (en) | 2003-08-06 | 2004-08-05 | Capacitance determining circuit and capacitance determining method |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN1826534A true CN1826534A (en) | 2006-08-30 |
| CN100478691C CN100478691C (en) | 2009-04-15 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CNB2004800213623A Expired - Fee Related CN100478691C (en) | 2003-08-06 | 2004-08-05 | Capacitance determining circuit and capacitance determining method |
Country Status (8)
| Country | Link |
|---|---|
| US (1) | US7557590B2 (en) |
| EP (1) | EP1686383A4 (en) |
| JP (1) | JP3693665B2 (en) |
| KR (1) | KR100655258B1 (en) |
| CN (1) | CN100478691C (en) |
| NO (1) | NO20061073L (en) |
| TW (1) | TWI266061B (en) |
| WO (1) | WO2005015246A1 (en) |
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Also Published As
| Publication number | Publication date |
|---|---|
| JP2005055362A (en) | 2005-03-03 |
| TWI266061B (en) | 2006-11-11 |
| JP3693665B2 (en) | 2005-09-07 |
| CN100478691C (en) | 2009-04-15 |
| KR100655258B1 (en) | 2006-12-11 |
| EP1686383A1 (en) | 2006-08-02 |
| NO20061073L (en) | 2006-05-05 |
| EP1686383A4 (en) | 2007-09-26 |
| TW200508619A (en) | 2005-03-01 |
| US20080150553A1 (en) | 2008-06-26 |
| KR20060024345A (en) | 2006-03-16 |
| US7557590B2 (en) | 2009-07-07 |
| WO2005015246A1 (en) | 2005-02-17 |
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