CN219456209U

CN219456209U - Capacitive MEMS accelerometer

Info

Publication number: CN219456209U
Application number: CN202320212774.5U
Authority: CN
Inventors: 马瑞菲·哈桑; 黄莉
Original assignee: Meixin Semiconductor Tianjin Co ltd
Current assignee: Meixin Semiconductor Tianjin Co ltd
Priority date: 2022-12-30
Filing date: 2023-02-14
Publication date: 2023-08-01
Anticipated expiration: 2033-02-14
Also published as: CN116047113A

Abstract

The utility model provides a capacitive MEMS accelerometer, comprising: a MEMS device comprising a first differential capacitance, a first pad, a second differential capacitance, a second pad, a second end of the first differential capacitance and a second end of the second differential capacitance coupled to a first node to which a first ac signal is applied; the processing circuit comprises a third bonding pad, a third bonding pad isolation component, a fourth bonding pad, a third bonding pad isolation component, a first compensation capacitor coupled to the third bonding pad, a second compensation capacitor coupled to the fourth bonding pad, and a detection circuit coupled to the third bonding pad and the fourth bonding pad, wherein the first bonding pad is coupled with the third bonding pad, the second bonding pad is coupled with the fourth bonding pad, the third bonding pad isolation component, the fourth bonding pad isolation component, a second end of the first compensation capacitor and a second end of the second compensation capacitor are coupled with a second node, and the second node is applied with a second alternating current signal which is in the same-frequency phase and opposite-phase with the first alternating current signal. In this way, the parasitic capacitance at the input of the detection circuit is reduced, thereby improving the sensitivity of the accelerometer.

Description

Capacitive MEMS accelerometer

[ field of technology ]

The utility model relates to the field of MEMS (Micro-Electro-Mechanical System, micro-electromechanical system) devices, in particular to a capacitive MEMS accelerometer.

[ background Art ]

Due to manufacturing process and the like, parasitic capacitance is unavoidable at the output end of the capacitive MEMS device. This parasitic capacitance increases circuit noise and reduces the sensitivity of the capacitive accelerometer.

Therefore, a new solution is needed to solve the above problems.

[ utility model ]

It is an object of the present utility model to provide a capacitive MEMS accelerometer that reduces parasitic capacitance at the input of the detection circuit, thereby improving the sensitivity of the accelerometer.

To solve the above-mentioned problems, according to one aspect of the present utility model, there is provided a capacitive MEMS accelerometer comprising: a MEMS device including a first differential capacitor, a first pad coupled to a first end of the first differential capacitor, a first pad isolation member spaced apart from the first pad, a second differential capacitor, a second pad coupled to a first end of the second differential capacitor, a second pad isolation member spaced apart from the second pad, the second end of the first differential capacitor and the second end of the second differential capacitor being coupled to a first node to which a first ac signal is applied; the processing circuit comprises a third bonding pad, a third bonding pad isolation part, a fourth bonding pad, a third bonding pad isolation part, a first compensation capacitor and a second compensation capacitor, wherein the third bonding pad isolation part is arranged at intervals with the third bonding pad, the third bonding pad isolation part is arranged at intervals with the fourth bonding pad, the first end of the first compensation capacitor is coupled with the third bonding pad, the first end of the first compensation capacitor is coupled with the fourth bonding pad, the detection circuit is coupled with the third bonding pad and the fourth bonding pad, the first bonding pad is coupled with the third bonding pad, the second bonding pad isolation part is coupled with the fourth bonding pad, the second end of the third compensation capacitor, the second end of the first compensation capacitor and the second end of the second compensation capacitor are coupled with a second node, and a second alternating current signal which is in common-frequency phase opposition with the first alternating current signal is applied to the second node.

Compared with the prior art, the utility model has the following technical effects:

the utility model compensates the common mode capacitance by using the parasitic capacitance of the third bonding pad and the fourth bonding pad, thus not only reducing the capacitance of the first compensation capacitance and the second compensation capacitance, but also reducing the parasitic capacitance of the input end of the detection circuit, thereby improving the sensitivity of the accelerometer.

[ description of the drawings ]

In order to more clearly illustrate the technical solutions of the embodiments of the present utility model, the drawings that are needed in the description of the embodiments will be briefly described below, it being obvious that the drawings in the following description are only some embodiments of the present utility model, and that other drawings may be obtained according to these drawings without inventive effort for a person skilled in the art. Wherein:

FIG. 1 is a schematic circuit diagram of a capacitive MEMS accelerometer;

FIG. 2 is a single-sided equivalent circuit of the differential capacitance of the capacitive MEMS accelerometer of FIG. 1 and an input stage in an analog-to-digital converter;

FIG. 3 is a schematic circuit diagram of a common mode current introduced by a common mode capacitance of the capacitive MEMS accelerometer of FIG. 1 flowing into an input stage in an analog-to-digital converter;

FIG. 4 is a schematic diagram of a circuit for canceling the common mode current of a capacitive MEMS accelerometer by a compensation capacitor tied off at the input stage of an analog-to-digital converter;

FIG. 5 is a schematic circuit diagram of an input stage in which only differential small signal currents representing acceleration signals flow into an analog-to-digital converter;

FIG. 6 is a schematic circuit diagram of a capacitive MEMS accelerometer of the utility model in one embodiment;

fig. 7 is a schematic circuit diagram of a capacitive MEMS accelerometer of the utility model in another embodiment.

[ detailed description ] of the utility model

In order that the above-recited objects, features and advantages of the present utility model will become more readily apparent, a more particular description of the utility model will be rendered by reference to the appended drawings and appended detailed description.

Reference herein to "one embodiment" or "an embodiment" means that a particular feature, structure, or characteristic may be included in at least one implementation of the utility model. The appearances of the phrase "in one embodiment" in various places in the specification are not necessarily all referring to the same embodiment, nor are separate or alternative embodiments mutually exclusive of other embodiments. Unless specifically stated otherwise, the terms connected, or connected herein denote an electrical connection, either directly or indirectly.

In the present utility model, unless specifically stated otherwise, the terms connected, coupled, and the like, herein, mean either directly or indirectly electrically connected. For example, a is connected to B, which may be a direct connection or an indirect connection through an intermediate medium, where the intermediate medium may be a basic electrical element (resistor, capacitor, inductor, switch, transistor, etc.), or may be a resistor having a certain function, such as a filter, an amplifier, etc. The specific meaning of the above terms in the present utility model can be understood by those of ordinary skill in the art according to the specific circumstances.

FIG. 1 is a schematic circuit diagram of a capacitive MEMS accelerometer. As shown in fig. 1, the capacitive MEMS accelerometer includes a MEMS device 110 and a processing circuit 120.

The MEMS device 110 includes a first differential capacitor C0p, a first pad 111 coupled to a first end of the first differential capacitor C0p, a first pad isolation member 113 spaced apart from the first pad 111, a second differential capacitor C0n, a second pad 112 coupled to a first end of the second differential capacitor C0n, and a second pad isolation member 114 spaced apart from the second pad 112. The second terminal of the first differential capacitor C0p and the second terminal of the second differential capacitor C0n are coupled to the first node a. The first node a is applied with a first ac signal. The first pad 111 and the first pad isolation part 113 form a parasitic capacitance Cpadp of the first pad 111, and the second pad 112 and the second pad isolation part 114 form a parasitic capacitance Cpadn of the second pad 112. In fig. 1, parasitic capacitances Cpadp and Cpadn are also shown in the circuit.

The processing circuit 120 is an ASIC (Application Specific Integrated Circuit, i.e., application specific integrated circuit) circuit, which includes a third pad 121, a third pad isolation device 123 disposed at a distance from the third pad 121, a fourth pad 122, a fourth pad isolation device 124 disposed at a distance from the fourth pad 122, a first compensation capacitor Cofsp having a first end coupled to the third pad 121, a second compensation capacitor Cofsn having a first end coupled to the fourth pad 122, and a detection circuit 125 coupled to the third pad 121 and the fourth pad 122. The third pad 121 and the third pad isolation part 123 form a parasitic capacitance of the third pad 121, and the fourth pad 122 and the fourth pad isolation part 124 form a parasitic capacitance of the fourth pad 122.

The first pad 111 is coupled to the third pad 121 through the wire 130, and the second pad 112 is coupled to the fourth pad 122 through the wire 130. The first pad isolation member 113, the second pad isolation member 114, the third pad isolation member 123, and the fourth pad isolation member 124 are grounded. The second terminal of the first compensation capacitor Cofsp and the second terminal of the second compensation capacitor Cofsn are coupled to a second node B to which a second ac signal having the same frequency and opposite phase to the first ac signal is applied. The MEMS device 110 is disposed on a first chip, and the processing circuit 120 is disposed on a second chip. The PADs herein may also be referred to as PADs, PADs.

The detection circuit 125 includes an analog-to-digital converter ADC including a signal amplifier as an input stage. The signal amplifier may also be arranged in front of the analog-to-digital converter ADC.

The MEMS device 110 includes a movable mass, and a first differential capacitor C0p and a second differential capacitor C0n are formed based on the mass, where the first differential capacitor C0p and the second differential capacitor C0n form a differential capacitor pair. After the mass block moves, the capacitances of the first differential capacitor C0p and the second differential capacitor C0n are inversely changed, and the capacitance of the differential capacitor pair is determined based on the capacitance difference between the first differential capacitor C0p and the second differential capacitor C0 n. When acceleration acts on the mass block, the capacitances of the first differential capacitor C0p and the second differential capacitor C0n are changed inversely, and then the capacitance of the differential capacitor group is changed. The analog-to-digital converter ADC can detect the change of the capacitance of the differential capacitance pair, and thus can obtain the value of the acceleration.

Fig. 2 is a single-sided equivalent circuit of the differential capacitance of the capacitive MEMS accelerometer of fig. 1 and an input stage in an analog-to-digital converter, the input stage being a signal amplifier. As shown in fig. 2, the input parasitic capacitance Cp of the signal amplifier includes an output parasitic capacitance of the MEMS device 110, an equivalent parasitic capacitance introduced by the third pad, the fourth pad, and a parasitic capacitance of the processing circuit 120, and the like.

The first node a is applied with a first ac signal as a carrier wave, and when a low frequency acceleration signal acts on the mass block of the MEMS device 110, the capacitance value of the differential capacitor pair will change, so that a differential current will flow into the input stage of the analog-to-digital converter ADC, which can obtain the value of the acceleration signal.

However, as shown in fig. 3, which is a schematic circuit diagram of the common mode current introduced by the common mode capacitance of the capacitive MEMS accelerometer in fig. 1 flowing into the input stage of the analog-to-digital converter, the differential capacitance pair always has a portion of the common mode capacitance (C0) with a constant capacitance value, and the common mode capacitance introduces a common mode current signal into the analog-to-digital converter ADC even when there is no acceleration signal. This common mode current is typically large and may cause saturation of the input stage of the analog to digital converter ADC, resulting in an inability to detect the acceleration signal.

To cancel the common-mode current, a set of compensation capacitor pairs with capacitance values being nearly equal to the capacitance value (C0) of the common-mode capacitor are hung at the input end of the analog-to-digital converter ADC, that is, a first compensation capacitor Cofsp and a second compensation capacitor Cofsn are coupled at the input end of the analog-to-digital converter ADC, capacitance values of the first compensation capacitor Cofsp and the second compensation capacitor Cofsn are determined based on the capacitance value of the common-mode capacitor C0, and a second alternating current signal (Anti phase pulses) which is the same frequency as the first alternating current signal and is opposite to the first alternating current signal is applied to one end of the first compensation capacitor Cofsp and one end of the second compensation capacitor Cofsn so as to cancel the common-mode input current. Fig. 4 is a schematic circuit diagram of canceling the common mode current of a capacitive MEMS accelerometer by a compensation capacitor external to the input stage of the analog-to-digital converter.

After the common mode current is eliminated, only differential small signal current containing acceleration information flows into the analog-to-digital converter ADC, and saturation of an input stage of the analog-to-digital converter ADC is avoided. Fig. 5 is a schematic circuit diagram of an input stage in an analog-to-digital converter with only a differential small signal current representing an acceleration signal flowing into the input stage.

However, for the differential small signal in fig. 5, the single-side equivalent circuit diagram of the input stage of the analog-to-digital converter ADC is the same as that of fig. 2, i.e., the first compensation capacitor Cofsp or the second compensation capacitor Cofsn is equivalent to a portion of the parasitic capacitor Cp (the capacitance value of which is equal to the capacitance value C0 of the common mode capacitor) input to the signal amplifier in fig. 2, and another portion of the parasitic capacitor Cp is the parasitic capacitor from each PAD (PAD) to the ground in fig. 1, i.e., cp=c0+cpad, cpad includes the parasitic capacitances of the first PAD, the second PAD, the third PAD, and the fourth PAD. The presence of the parasitic capacitance Cp increases noise of the signal amplifier output of the input stage, and the capacitance value of the compensation capacitance Cofsp or Cofsn for compensating the common mode capacitance also needs to be set large, increasing the size of the processing circuit.

In order to overcome the technical problems, the utility model further provides an improved capacitive MEMS accelerometer. As shown in fig. 6, which is a schematic circuit diagram of a capacitive MEMS accelerometer of the present utility model in one embodiment.

The capacitive MEMS accelerometer in fig. 6 is substantially the same as the capacitive MEMS accelerometer shown in fig. 1, and the same points are not described here, and the difference between them is that: the first pad isolation part 113, the second pad isolation part 114 in fig. 6 are grounded, and the third pad isolation part 123, the fourth pad isolation part 124, the second end of the first compensation capacitor Cofsp and the second end of the second compensation capacitor Cofsn are coupled to a second node B to which a second ac signal having the same frequency as the first ac signal in opposite phase is applied. In this way, the common-mode capacitance C0 can be compensated by the parasitic capacitance of the third pad 121 and the first differential capacitance Cofsp, and the common-mode capacitance C0 can be compensated by the parasitic capacitance of the fourth pad 122 and the second differential capacitance Cofsn, that is, the parasitic capacitance of the third pad 121 becomes a part of the first differential capacitance Cofsp, and the parasitic capacitance of the fourth pad 122 becomes a part of the second differential capacitance Cofsn. Compared with the scheme in fig. 1, since the parasitic capacitance of the third pad 121 and the parasitic capacitance of the fourth pad 122 are utilized to cancel the common mode capacitance C0, the first differential capacitance Cofsp and the second differential capacitance Cofsn can be reduced, thereby saving the area of the processing circuit 120, and furthermore, the input parasitic capacitance Cp of the signal amplifier is reduced as a whole, so that the output noise of the signal amplifier due to the parasitic capacitance Cp is also reduced, thereby improving the sensitivity of the accelerometer.

In another embodiment, to overcome the above technical problems, the present utility model also proposes an improved capacitive MEMS accelerometer. As shown in fig. 7, which is a schematic circuit diagram of a capacitive MEMS accelerometer of the present utility model in another embodiment.

The capacitive MEMS accelerometer in fig. 7 is substantially the same as the capacitive MEMS accelerometer shown in fig. 1, and the same points are not described here, and the difference between them is that: the first pad isolation part 113, the second pad isolation part 114, the third pad isolation part 123, the fourth pad isolation part 124, the second end of the first compensation capacitor Cofsp, and the second end of the second compensation capacitor Cofsn in fig. 7 are coupled to a second node B to which a second ac signal having the same frequency as the first ac signal in phase opposition is applied. This makes it possible to compensate the common mode capacitance C0 with the parasitic capacitance of the first pad 111, the parasitic capacitance of the third pad 121, and the first differential capacitance Cofsp, and compensate the common mode capacitance C0 with the parasitic capacitance of the second pad 112, the parasitic capacitance of the fourth pad 122, and the second differential capacitance Cofsn, that is, the parasitic capacitance of the first pad 111 and the parasitic capacitance of the third pad 121 become a part of the first differential capacitance Cofsp, and the parasitic capacitance of the second pad 112 and the parasitic capacitance of the fourth pad 122 become a part of the second differential capacitance Cofsn. Compared with the scheme in fig. 1, since the parasitic capacitance of the first pad 111, the parasitic capacitance of the third pad 121, the parasitic capacitance of the second pad 112, and the parasitic capacitance of the fourth pad 122 are utilized to cancel the common mode capacitance C0, the first differential capacitance Cofsp and the second differential capacitance Cofsn can be further reduced, thereby saving the area of the processing circuit 120, and in addition, the input parasitic capacitance Cp of the signal amplifier is further reduced as a whole, so that the output noise of the signal amplifier due to the parasitic capacitance Cp is also reduced, thereby improving the sensitivity of the accelerometer.

In the description of the present specification, a description referring to terms "one embodiment," "some embodiments," "examples," "specific examples," or "some examples," etc., means that a particular feature, structure, material, or characteristic described in connection with the embodiment or example is included in at least one embodiment or example of the present utility model. In this specification, schematic representations of the above terms are not necessarily directed to the same embodiment or example. Furthermore, the particular features, structures, materials, or characteristics described may be combined in any suitable manner in any one or more embodiments or examples. Further, one skilled in the art may combine and combine the different embodiments or examples described in this specification.

While embodiments of the present utility model have been shown and described above, it will be understood that the above embodiments are illustrative and not to be construed as limiting the utility model, and that variations, modifications and alternatives to the above embodiments may be made by those skilled in the art within the scope of the utility model.

Claims

1. A capacitive MEMS accelerometer, comprising:

a MEMS device including a first differential capacitor, a first pad coupled to a first end of the first differential capacitor, a first pad isolation member spaced apart from the first pad, a second differential capacitor, a second pad coupled to a first end of the second differential capacitor, a second pad isolation member spaced apart from the second pad, the second end of the first differential capacitor and the second end of the second differential capacitor being coupled to a first node to which a first ac signal is applied;

a processing circuit including a third pad, a third pad isolation member spaced apart from the third pad, a fourth pad isolation member spaced apart from the fourth pad, a first compensation capacitor having a first end coupled to the third pad, a second compensation capacitor having a first end coupled to the fourth pad, a detection circuit coupled to the third pad and the fourth pad,

wherein the first pad is coupled to the third pad, the second pad is coupled to the fourth pad,

the third pad isolation component, the fourth pad isolation component, the second end of the first compensation capacitor, and the second end of the second compensation capacitor are coupled to a second node to which a second alternating signal co-frequency-inverted with the first alternating signal is applied.

2. The capacitive MEMS accelerometer of claim 1, wherein the first pad isolation feature and the second pad isolation feature are coupled to ground or to a second node.

3. The capacitive MEMS accelerometer of claim 1, wherein the capacitive MEMS accelerometer comprises,

the MEMS device is arranged on a first chip, the processing circuit is arranged on a second chip, the first compensation capacitor and the second compensation capacitor are arranged in the second chip,

the first pad is coupled to the third pad by a wire, and the second pad is coupled to the fourth pad by a wire.

4. The capacitive MEMS accelerometer of claim 1, wherein the differential capacitance pair comprises a constant value common mode capacitance, the capacitance values of the first and second compensation capacitances being determined based on the capacitance value of the common mode capacitance.

5. The capacitive MEMS accelerometer of claim 4, wherein the capacitive MEMS accelerometer comprises,

the parasitic capacitance of the first compensation capacitor and the third bonding pad is used for compensating the common mode capacitance, and the parasitic capacitance of the second compensation capacitor and the fourth bonding pad is used for compensating the common mode capacitance; or alternatively, the process may be performed,

the first compensation capacitor, the parasitic capacitor of the first bonding pad and the parasitic capacitor of the third bonding pad are used for compensating the common mode capacitance, and the second compensation capacitor, the parasitic capacitor of the second bonding pad and the parasitic capacitor of the fourth bonding pad are used for compensating the common mode capacitance.

6. The capacitive MEMS accelerometer of claim 1, wherein the detection circuit comprises an analog-to-digital converter comprising a signal amplifier as an input stage.

7. The capacitive MEMS accelerometer of claim 1, wherein the capacitive MEMS accelerometer comprises,

the MEMS device comprises a movable mass block, a first differential capacitor and a second differential capacitor are formed based on the mass block, the first differential capacitor and the second differential capacitor form a differential capacitor pair,

after the mass block moves, the capacitance of the first differential capacitor and the capacitance of the second differential capacitor are inversely changed, the capacitance of the differential capacitor pair is determined based on the capacitance difference of the first differential capacitor and the second differential capacitor,

when acceleration acts on the mass block, the mass block moves, so that the capacitance of the first differential capacitor and the capacitance of the second differential capacitor are changed inversely, and the capacitance of the differential capacitor group is changed.