CN1807539A - Resin composition for encapsulating semiconductor - Google Patents
Resin composition for encapsulating semiconductor Download PDFInfo
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- CN1807539A CN1807539A CNA2005100055378A CN200510005537A CN1807539A CN 1807539 A CN1807539 A CN 1807539A CN A2005100055378 A CNA2005100055378 A CN A2005100055378A CN 200510005537 A CN200510005537 A CN 200510005537A CN 1807539 A CN1807539 A CN 1807539A
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73201—Location after the connecting process on the same surface
- H01L2224/73203—Bump and layer connectors
- H01L2224/73204—Bump and layer connectors the bump connector being embedded into the layer connector
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/8319—Arrangement of the layer connectors prior to mounting
- H01L2224/83192—Arrangement of the layer connectors prior to mounting wherein the layer connectors are disposed only on another item or body to be connected to the semiconductor or solid-state body
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01019—Potassium [K]
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- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
- Wire Bonding (AREA)
- Compositions Of Macromolecular Compounds (AREA)
- Epoxy Resins (AREA)
Abstract
The invention provides a resin mixture for sealing a semiconductor, a semiconductor sealed with the resin mixture, which is installed on a flip-chip and is of good solder joint, operability as well as good electric connection reliability after being sealed, a sheet resin mixture used to seal a semiconductor which is installed on a flip-chip and can maintain the identifiable luminousness of the images and is of good operability as well as good electric connection reliability after being sealed, and a semiconductor device which applies the sheet resin mixture. According to tests, the resin mixture and the sheet resin mixture which are used to seal semiconductors are of viscosity coefficients of respectively below 5000Pa*s and below 10 000Pa*s under the temperature of 80 DEG C, and the resin mixture and the sheet resin mixture contain (A)epoxide resin which contains more than two epoxy groups in one molecule, (B) firming agent, and (C) silica particles with average diameter(dmax) of 3-50nm and semi-amplitude(dmax) of being less than 1.5 times of the average diameter.
Description
[technical field]
The present invention relates in semiconductor device, be used to seal the resin composition for encapsulating semiconductor (the following resin combination that simply is called sometimes) in the space between wired circuit board and semiconductor element and the semiconductor device that seals with this resin composition for encapsulating semiconductor.
[background technology]
Recently,, carrying out the installation of flip-chip along with the multifunction of semiconductor device, frivolous miniaturization always, promptly with face down configuration with mounting semiconductor element on wired circuit board.In general, in flip-chip is installed, in order to protect semiconductor element, with the space of compositions of thermosetting resin sealing semiconductor element and wired circuit board.
In the flip-chip mounting means, directly that the coefficient of expansion of mutual top-stitching is different semiconductor elements and wired circuit board are electrically connected, so the reliability of connection portion has become problem.
As its solution, adopt such method, promptly between the space of semiconductor element and wired circuit board, fill aqueous resin material and make it to solidify, form resin cured matter, the stress that concentrates on electrical connections also is dispersed on the above-mentioned resin cured matter, improves connection reliability.In method in the past with the filling liquid material of the reversing sheet mounting means of solder bump, semiconductor element at first is installed on wired circuit board, after being formed on the metallic joint of carrying out in the pattern fusion operation, between the space of semi-conductor and wired circuit board, utilize capillary phenomenon to inject aqueous resin material (for example, referring to patent documentation 1).
And in recent years, compare with the method for implanting of the liquid material that utilizes capillary phenomenon, attempted the operation of more simplifying, proposed to use hot curing resin composition with scolding tin connectivity, make above-mentioned semiconductor device (for example, referring to patent documentation 2).Using this to have the hot curing resin composition of scolding tin connectivity, make in the semiconductor device, on semiconductor element or wired circuit board, be coated with this hot curing resin composition earlier, when being installed, chip carries out the sealing at interface, carry out scolding tin afterwards and reflux, form metallic bond, therefore compare with using above-mentioned aqueous resin material manufacturing semiconductor device, operations such as solder flux and its washing, the aqueous resin of injection can be cut down, the productive rate of semiconductor device can be improved.
In addition, flip-chip following the carrying out of manufacture of installing in the past, i.e. pattern-making on wafer, form projection after, cut into semiconductor element one by one, with mounting semiconductor element on wired circuit board and carry out resin-sealed.In contrast, raising for the productive rate of seeking semiconductor device, requirement is pattern-making on wafer, after forming projection, after tackiness agent (resin combination) offered pattern plane, be cut to semiconductor element one by one, with face down configuration, with mounting semiconductor element (hereinafter referred to as wafer-level flip-chip mounting means) (for example, referring to patent documentation 3) on wired circuit board.In this wafer-level flip-chip mounting means, after hot curing resin composition offered pattern plane, cut into semiconductor element one by one, on wired circuit board, so hot curing resin composition is necessary to keep the discernible transmittance of pattern with mounting semiconductor element.On the other hand, in the hot curing resin composition of the connection portion that seals the flip-chip assembly, generally with respect to organic resin composition, owing to contain inorganic filler, thermal expansivity or water-intake rate descend, can satisfy the cold-resistant thermal cycling characteristic and the soldering resistance (for example, referring to patent documentation 4) of semiconductor device.
[patent documentation 1] spy opens the 2001-279058 communique
[patent documentation 2] spy opens the 2000-120360 communique
[patent documentation 3] spy opens flat 2001-144120 communique
[patent documentation 4] spy opens flat 2003-138100 communique
[summary of the invention]
But, in above-mentioned manufacture method, after earlier being coated on hot curing resin composition on semiconductor element or the wired circuit board, engage in order to carry out scolding tin, when in hot curing resin composition, containing inorganic fillers such as silicon-dioxide, this inorganic filler becomes steric barrier on solder bonding faces, therefore can not obtain sufficient scolding tin connectivity.In addition, in order not become the obstacle that scolding tin engages, only contain the little inorganic filler of granularity in resin combination, the volume density of inorganic filler is too high, thereby the problem that the intermiscibility of generation and resin combination is poor, viscosity increases, can not provide on wafer.
In addition, in order to obtain sufficient scolding tin connectivity, when containing inorganic filler in hot curing resin composition, the thermal expansivity of resin combination increases, and the various loads such as stress that the thermal expansion contraction of semiconductor element and sealing resin layer produces are added to and are connected with on the electrode.The repeated deformations that cause because of this load etc. exist to make to connect and use lead rupture, until the problem that connects usefulness electrode partial disconnection.
On the other hand, in wafer-level flip-chip mounting means, the granular size of the inorganic filler of Shi Yonging was bigger than the light wavelength in the visible-range in the past, in containing the resin combination of inorganic filler, was difficult to keep the discernible transmittance of pattern.In addition, in order to keep the discernible transmittance of pattern, only in resin combination, contain the little inorganic filler of granularity, with above-mentioned the same, the volume density of inorganic filler is too high, thereby the problem that the intermiscibility of generation and resin combination is poor, viscosity increases, can not provide on wafer.
Perhaps, in order to keep the discernible transmittance of pattern, the content of the inorganic filler in the resin combination is reduced, then the thermal expansivity of resin combination or water-intake rate rise, for semiconductor device, generation can not obtain the problem of sufficient cold-resistant thermal cycling characteristic and soldering resistance.
Thereby, the object of the present invention is to provide to be applicable to that flip-chip is installed, as can to obtain to bring after excellent scolding tin connectivity and operability, the sealing excellent reliability of electrical connection semiconductor sealing resin, and the semiconductor device that uses the said composition sealing.
The present invention also aims to provide be applicable to flaky semiconductor resin composition for encapsulating that the chip-type flip-chip is installed, that keep the discernible transmittance of pattern, can obtain excellent operation, bring after the sealing excellent reliability of electrical connection, and the semiconductor device that uses the said composition sealing.
That is, the present invention relates to
(1) a kind of resin composition for encapsulating semiconductor, its viscosity 80 ℃ of mensuration is below the 5000Pas, to contain
(A) Resins, epoxy of 2 above epoxy group(ing) is arranged in 1 molecule
(B) solidifying agent and
(C) median size dmax is that 3～50nm and half range value are the silicon dioxide granule below 1.5 times of median size dmax,
(2) above-mentioned (1) described resin composition for encapsulating semiconductor is characterized in that above-mentioned silicon dioxide granule is dispersed in the above-mentioned Resins, epoxy,
(3) above-mentioned (1) or (2) described resin composition for encapsulating semiconductor is characterized in that the thermal expansivity that the cured article of resin composition for encapsulating semiconductor is measured is 70 * 10 under the Tg temperature
-6Below/the K,
(4) a kind of flaky semiconductor resin composition for encapsulating, its viscosity 80 ℃ of mensuration is below the 10000Pas, to contain
(A) Resins, epoxy of 2 above epoxy group(ing) is arranged in 1 molecule
(B) solidifying agent and
(C) median size dmax is that 3～50nm and half range value are the silicon dioxide granule below 1.5 times of median size dmax,
(5) above-mentioned (4) described resin composition for encapsulating semiconductor is characterized in that above-mentioned silicon dioxide granule is dispersed in the above-mentioned Resins, epoxy,
(6) above-mentioned (4) or (5) described resin composition for encapsulating semiconductor at wavelength 650nm place, have the transmittance more than 30%,
(7) each described resin composition for encapsulating semiconductor of above-mentioned (4)～(6) is characterized in that the thermal expansivity that the cured article of resin composition for encapsulating semiconductor is measured is 70 * 10 under the Tg temperature
-6Below/the K and
(8) semiconductor device that seals by each described resin composition for encapsulating semiconductor of above-mentioned (1)～(7).
The invention provides the resin composition for encapsulating semiconductor of scolding tin connectivity and operability excellence.Further use said composition, can produce semiconductor device effectively with excellent connection reliability.
The present invention also provides and keeps the discernible transmittance of pattern, the flaky semiconductor resin composition for encapsulating of operability excellence.Further use this resin combination, can produce semiconductor device effectively with excellent connection reliability.
[simple declaration of accompanying drawing]
Fig. 1 represents an example of semiconductor device of the present invention.
Fig. 2 represents the example of specification figure of the manufacture method of semiconductor device of the present invention.
Fig. 3 represents the example of specification figure of the manufacture method of semiconductor device of the present invention.
Fig. 4 represents to contain an example of the resin sheet of resin combination of the present invention.
Fig. 5 represents to have the example of sectional view of the wafer of projection.
Fig. 6 represents the example of specification figure of the manufacture method of semiconductor device of the present invention.
Fig. 7 represents the example of specification figure of the manufacture method of semiconductor device of the present invention.
Fig. 8 represents the example of specification figure of the manufacture method of semiconductor device of the present invention.
Fig. 9 represents the example of specification figure of the manufacture method of semiconductor device of the present invention.
[explanation of symbol]
11 wired circuit boards
12 connection electrodes
13 semiconductor elements
14 sealing resin layers
15 resin composition for encapsulating semiconductor
21 resin composition for encapsulating semiconductor
22 releasing sheets
23 wafers
24 projectioies
25 cutting belt
26 individual chips
27 wired circuit boards
[embodiment]
" mode 1 "
1 maximum of resin composition for encapsulating semiconductor of the present invention is characterised in that the viscosity 80 ℃ of mensuration is below the 5000Pas, to contain
(A) Resins, epoxy of 2 above epoxy group(ing) is arranged in 1 molecule
(B) solidifying agent and
(C) median size dmax is that 3～50nm and half range value are the silicon dioxide granule below 1.5 times of median size dmax.
Usually,, satisfy the thermal stresses reliability and the soldering resistance of semiconductor device, add inorganic fillers such as silicon dioxide granule in the resin combination that uses as sealing resin in the semiconductor device in order to reduce the thermal expansivity of resin combination.But as mentioned above, existence can not obtain the problem of sufficient scolding tin connectivity.
In contrast, the resin combination of the manner contains the silicon dioxide granule with specified particle diameter, therefore, and when the space that seals between wired circuit board and semiconductor element, can show the steric barrier of avoiding solder bonding faces, alleviate and be added to the effect of connection with the stress on the electrode.And the semiconductor device that the resin combination of use the manner is sealed to form has the characteristic of the excellence that shows excellent connection reliability.
In this manual, " semi-conductor electricity road surface " and " pattern plane "; " cut-out " and " cutting "; " connect and use electrode " and " projection "; And " chip ", " semi-conductor chip " and " semiconductor element " use under the same meaning respectively mutually.In addition, in this manual, the composition of the resin combination thermofixation that makes the manner is called cured article.
The Resins, epoxy that has 2 above epoxy group(ing) in contained 1 molecule in the resin combination as the manner, preferred as long as be aqueous below 50 ℃ at least, just there is no particular limitation to this, can enumerate bisphenol A type epoxy resin, bisphenol f type epoxy resin, naphthalene type Resins, epoxy, cycloaliphatic epoxy resin etc., the viewpoint of flowability is preferably used dihydroxyphenyl propane epoxy resin and bisphenol f type epoxy resin when guaranteeing fusion.These can use separately, also can merge use more than 2 kinds.
The epoxy equivalent (weight) of Resins, epoxy is preferably 90～1000g/eq, more preferably 100～500g/eq.Epoxy equivalent (weight) is when 90g/eq is above, and cured article is difficult to become fragile, and when 1000g/eq was following, it is too low that the glass transition temp of solids (Tg) can not become, thereby be preferred.The content of the Resins, epoxy in the resin combination in composition, is preferably 5～90 weight %, more preferably 10～80 weight % from the viewpoint of thermotolerance and wet fastness.
Contained solidifying agent in the resin combination as the manner, as long as above-mentioned Resins, epoxy plays solidifying agent, just there is no particular limitation to this, can use various solidifying agent.The moisture-proof reliability excellent aspect, generally use phenols curing agent, but also can use various acid anhydride type curing agents, aromatic amine, Dyhard RU 100, hydrazides, benzoxazine cyclic cpds etc.These can use separately, also can merge use more than 2 kinds.
As phenols curing agent, can enumerate the novolac of cresols linear phenolic resin, phenol linear phenolic resin, the ring-like phenol resins of dicyclopentadiene, phenol aralkyl resin, naphthols, silicon modification etc.These can use separately, also can merge use more than 2 kinds.
The blending ratio of above-mentioned Resins, epoxy and solidifying agent, when using phenols curing agent as solidifying agent, from guaranteeing the viewpoint of solidified nature, thermotolerance, moisture-proof reliability, with respect to the epoxy equivalent (weight) 1g/eq in the Resins, epoxy, the reactive hydroxyl equivalent of phenols curing agent is preferably 0.5～1.5g/eq, more preferably the ratio of 0.7～1.2g/eq.In addition, in the occasion of using the solidifying agent beyond the phenols curing agent, its blending ratio also can the blending ratio (equivalence ratio) when using phenols curing agent decide.
The median size dmax of the silicon dioxide granule that the resin combination of the manner is contained is 3～50nm, from guaranteeing the viewpoint of the scolding tin connectivity and the transparency, preferred 8～30nm.And the half range value is below 1.5 times of median size dmax.The further preferred high silicon dioxide granule of degree of sphericity.
Wherein, when median size dmax is meant with neutron small-angle diffraction method mensuration, in the size distribution curve that the capacity ratio of this particle is drawn particle dia, has the diameter of the particle of maximum capacity.In addition, the half range value is meant half the width of distribution curve of height of the maximum dmax that is positioned at size distribution curve.This half range value means for a short time and has sharp grain size distribution.Addition in the resin combination of the manner, uses silicon dioxide granule, even than higher, also can obtain low viscous resin combination with this feature.
The content of the silicon dioxide granule in the resin combination in composition, is preferably 10～65 weight %, more preferably 20～60 weight % from guaranteeing viewpoint mobile and the raising connection reliability.
In addition, in the resin combination of the manner, as required, also can contain other following composition.
For example, in the resin combination of the manner, as required, can add curing catalyst.As curing catalyst, as long as above-mentioned Resins, epoxy plays curing catalyst, just there is no particular limitation to this, can use various solidifying agent, for example can use amine, Phosphorus, boron class, phosphorus-curing catalysts such as boron class.In addition, more preferably use the microcapsule-type curing catalyst (for example, opening the 2000-309682 communique) that to constitute in these curing catalyst inclosure microcapsule referring to the spy.These can use separately, also can merge use more than 2 kinds.The content of curing catalyst can suitably be set according to obtaining required curing speed and can not reducing the ratio of giving solderability and adaptation.As establishing method, can enumerate the time (index of curing speed) of for example measuring resin combination gelation on hot plate of the curing catalyst that contains various amounts, the method for the amount that obtains at required gelation time as its content.In general, with respect to solidifying agent 100 weight parts, be preferably 0.01～20 weight part, more preferably 0.05～10 weight part.
And, in the resin combination of the manner, as required, can add the scolding tin jointing aid.As the scolding tin jointing aid, so long as used in the past, just there is no particular limitation to it, can use organic carboxyl acid classes such as acetic acid, hexanodioic acid, toxilic acid, fumaric acid, methylene-succinic acid, phthalic acid, trimellitic acid, pyromellitic acid, vinylformic acid, isocyanic acid, carboxylic acrylonitrile butadiene rubber etc.As the scolding tin jointing aid,, can also use the ester combination of this organic carboxyl acid class and Vinyl Ether compound from the viewpoint of the intermiscibility of scolding tin connectivity and raising and Resins, epoxy.As this Vinyl Ether compound, can enumerate ethene ethers with butyl, ethyl, propyl group, sec.-propyl, cyclohexyl etc.Use this ester combination as the scolding tin jointing aid, after the scolding tin function is given in performance in the semi-conductor installation procedure, can react, therefore preferred the use as the material that has the characteristic of scolding tin jointing aid and solidifying agent concurrently with Resins, epoxy.
The content of the scolding tin jointing aid in the resin combination in composition, is preferably 0.1～20 weight % from guaranteeing the viewpoint of scolding tin connectivity and solids intensity, more preferably 0.3～10 weight %, further preferred 0.5～5 weight %.
And, in the resin combination of the manner,, can also add coupling agents such as silicane, titanium class in order to improve cohesiveness; Elasticity such as synthetic rubber, silicon compound imparting agent and antioxidant, defoamer etc.
The resin combination of the manner can be prepared as follows.Promptly, at first, viewpoint from dispersing uniformity and the rising of inhibition viscosity, after making the silicon dioxide granule of specified amount be dispersed in the Resins, epoxy of specified amount, drying under reduced pressure, obtain the mixture (in this manual, being sometimes referred to as silicon-dioxide dispersive Resins, epoxy) of Resins, epoxy and silicon dioxide granule.At this moment, for dehydration fully, also can mix the solvent that forms azeotropic compound with water.As this solvent, can enumerate methyl alcohol, ethanol, acetone, methylethylketone, ethyl acetate etc.In addition, disperse to be meant the state that in medium, does not have the spawn of solid substance particles aggregate origin basically.
As this silicon-dioxide dispersive Resins, epoxy, can enumerate NANOPPX XP22/0543, the NANOPOX XP22/0540 etc. of Hanse society system.
Quantitative silicon-dioxide dispersive Resins, epoxy and the solidifying agent that as above obtains of hybrid regulatory also can suitably add composition in addition as required, in the kneaders such as the omnipotent stirring tank of packing into, mediates and melting mixing under heated condition.Then, use filter that it is filtered, then, vacuum deaerator can prepare required resin combination.
In addition, during the preparation resin combination,, can add organic solvent in order to adjust the flowability of said composition.As above-mentioned organic solvent, can enumerate toluene, dimethylbenzene, methylethylketone (MEK), acetone, diacetone alcohol etc.These can use separately, also can merge use more than 2 kinds.
As above the resin combination of Zhi Bei the manner is below the 5000Pas in the viscosity of 80 ℃ of mensuration, from guaranteeing the viewpoint of scolding tin connectivity and coating operability, is preferably 0.1～5000Pas, more preferably 0.1～3000Pas, further preferred 1～1000Pas.
In addition, the viscosity of above-mentioned resin combination use E type viscometer (Thermoelectron society system: RS-1), to resin combination 1g 80 ℃ of mensuration.
And as above the thermal expansivity of the resin combination of Zhi Bei the manner mensuration under the glass transition temp (Tg) of cured article is preferably 70 * 10 from guaranteeing the viewpoint of scolding tin joint reliability
-6Below/the K, more preferably 60 * 10
-6Below/the K.
In addition, the thermal expansivity of above-mentioned resin combination is with resin combination metal die injection moulding, is cured in 2 hours 170 ℃ of heating, the testing plate of preparation 5mm φ * 20mm, with the MJ800GM of Rigaku society system,, under the Tg temperature, measure its thermal expansivity with the heat-up rate of 5 ℃/min.
The structure of the semiconductor device that is sealed to form with the resin combination of the manner promptly on a face of wired circuit board 11, connects with electrode 12 semiconductor element mounted thereon 13 as shown in Figure 1 by several.And, form sealing resin layer 14 at wired circuit board 11 and 13 of semiconductor elements.
As wired circuit board 11, there is no particular limitation to it, roughly comprise ceramic substrate, plastic base,, for example can enumerate epoxy resin base plate, Bismaleimide Triazine substrate, polyimide substrates etc. such as glass epoxy resin substrate as plastic base.
Several that are electrically connected wired circuit board 11 and semiconductor element 13 are connected with electrode 12 and can be pre-configured on the surface of wired circuit board 11, also can be configured on the surface of semiconductor element 13.And be provided with also passable respectively on the surface of wired circuit board 11 and these two surfaces, surface of semiconductor element 13 in advance.
Connect the material of using electrode 12 as several, there is no particular limitation to it, can enumerate low melting point and dystectic scolding tin, tin, Yin-Xi etc., the electrode on the wired circuit board also can be gold, copper etc. with respect to the connection electrode that above-mentioned material constitutes in addition.
There is no particular limitation to semiconductor element 13, can use normally used semiconductor element.Can use for example semiconductor element such as silicon, germanium, various semi-conductors such as compound semiconductor such as gallium arsenide, indium phosphide.The size of semiconductor element 13 is set at wide 2～20mm * length 2～20mm * thick 0.1～0.6mm usually.In addition, the size of the wired circuit board 11 of the wired circuit of formation semiconductor element mounted thereon 13 size of contrast semiconductor element 3 usually decides, and sets in the scope of wide 10～70mm * length 10～70mm * thick 0.05～3.0mm.In addition, under the situation of reflection type (map type) substrate (at the substrate that a plurality of semiconductor elements are installed on 1 wired circuit board), width and length can all be set at more than the 40mm.In addition, the semiconductor element 13 and the distance between the wired circuit board 11 of having filled the dissolved resin combination is generally 5～100 μ m.
As mentioned above, by making resin combination between wired circuit board and semiconductor element, form sealing resin layer, make the semiconductor device that the resin combination that uses the manner is sealed to form.Wherein, the coating of resin combination can be carried out on wired circuit board, also can carry out on semiconductor element.On semiconductor element, during the coating resin composition, can carry out on the wafer before cutting into individual chips, also can on the individual chips after the cutting, carry out.Therefore because can once finish resin-coatedly on wafer-level, from improving the viewpoint of productive rate, preferably coating resin composition on wafer cuts into the method for after the individual chips chip being installed then.As resin-coated method, mode of printing and rotary coating mode all can, in mode of printing, utilize the printing and sealing method of vacuum differential pressure power to be difficult to make bubble to enter resin-sealed layer, thereby be preferred.According to accompanying drawing, the example of manufacture method mode of the semiconductor device of the manner is described successively.
The mode of coating resin composition on wired circuit board 11, for example, is poured into a mould the resin combination 15 of the manner that encapsulates the molten state that is heated to 60 ℃ at first as shown in Figure 2 on wired circuit board.Then, as shown in Figure 3, prescribed position on resin combination, installation is provided with several globular and connects the semiconductor element 13 of using electrode (connection ball) 12, on warm table, further make resin combination 15 become molten state, the resin combination 15 of molten state is pushed in the connection of semiconductor element 13 open with electrode 12, make it to contact with being connected with electrode 12 with wired circuit board 11, and after filling the resin combination of molten state in the space between semiconductor element 13 and wired circuit board 11, the metallic joint of utilizing scolding tin to reflux, resin combination is solidified, form sealing resin layer 14, the space is sealed.As the solidification value of resin combination, be generally 130～200 ℃ proper.This moment, the scolding tin reflux type can be to use the juncture of reflow ovens, also can be heater section to be heated to more than the scolding tin fusing point when carrying with chip, carried out scolding tin fused juncture.Like this, can make semiconductor device shown in Figure 1.
In addition, method for making for semiconductor device, just use and be provided with several spherical connections and be described with the situation of the semiconductor element 13 of electrode (connection ball) 12, there is no particular limitation to it, also can use the semiconductor element of several spherical connections with electrode 12 is set on wired circuit board 11 in advance.
The thickness of resin combination 15 and weight can according to the size of the semiconductor element 13 that carries and on semiconductor element 13, be provided be connected size with electrode 12, the space that is to say filling semiconductor element 13 and wired circuit board 11 seals the sealing resin layer 14 shared volumes of formation and suitably sets.
In the manufacture method of semiconductor device, Heating temperature when making it into molten state as heating and melting resin combination 15, can consider semiconductor element 13 and wired circuit board 11 thermotolerance, be connected softening temperature with the fusing point of electrode 12 and resin combination 15, thermotolerance etc., suitably set.
" mode 2 "
Composition of the present invention can use with sheet, in wafer-level flip-chip mounting means, also can use composition of the present invention.At this moment, said composition is to get final product below the 10000Pas in the viscosity of 80 ℃ of mensuration.Thereby the present invention can also provide the flaky semiconductor resin composition for encapsulating, is below the 10000Pas, to contain in the viscosity of 80 ℃ of mensuration
(A) Resins, epoxy of 2 above epoxy group(ing) is arranged in 1 molecule
(B) solidifying agent and
(C) median size dmax is that 3～50nm and half range value are the silicon dioxide granule below 1.5 times of median size dmax.
In wafer-level flip-chip mounting means, sealing resin is offered the pattern plane of wafer after, cut into semiconductor element one by one, semiconductor element mounted thereon on circuit substrate.The size of particles ratio of flaky semiconductor resin composition for encapsulating contained silicon dioxide granule in this resin combination of the manner is little in the light wavelength of visible-range, but therefore can keep the transmittance of pattern recognition.For this reason, this resin combination is offered pattern plane, can easily wafer be cut into individual chips, after the sealing, can make semiconductor device with excellent electrical connectivity.
In the manner, Resins, epoxy, solidifying agent and silicon dioxide granule are the same with mode 1.
In this manual, transmittance is meant with spectrophotometer (society of Shimadzu Seisakusho Ltd. system: UV3101), the transmittance of measuring at wavelength 650nm place, the transmittance of the composition of the manner is so long as the discernible degree of pattern, just there is no particular limitation to it, be preferably more than 30%, more preferably more than 50%.
In the resin combination of the manner, can add thermoplastic resin as required.As thermoplastic resin, can enumerate alkyl acrylate copolymer, acrylonitrile butadiene copolymer, hydrogenated acrylonitrile-butadienecopolymer, styrene-butadiene-styrene multipolymer, epoxide modified styrene-butadiene-styrene multipolymer etc.As long as the content of thermoplastic resin can make the resin combination sheetization, just there is no particular limitation to it, from the stickiness of guaranteeing wafer, the viewpoint of cutting off processibility, chip installation property, in composition, be preferably 1～50 weight %, more preferably 3～30 weight %.These can use separately, also can merge use more than 2 kinds.
And, the same with mode 1 as required in the resin combination of the manner, can add curing catalyst and/or scolding tin jointing aid.Curing catalyst is the same with mode 1 with the scolding tin jointing aid.
In addition, in the resin combination of the manner, viewpoint from low-stress, can add silane coupling agent, titanium coupling agent, surface conditioner, antioxidant, adhesion imparting agent, silicone oil and silicon rubber, synthetic rubber reactive diluent etc., from improving the viewpoint of moisture-proof reliability, can also add the ion-trapping agent of hydrotalcite, bismuth hydroxide etc.These can use separately, also can merge use more than 2 kinds.These content of additive can suitably be adjusted in the scope of the effect that can obtain desirable each additive.
The resin combination of the manner can followingly be made.Usually consider the convenience of use, said composition can (for example, polyester film) form as sheet-like composition on releasing sheet.That is to say, at first the same with mode 1, obtain silicon-dioxide dispersive Resins, epoxy.
Then, quantitative mixed silica dispersive Resins, epoxy, solidifying agent and other composition as required, mixed dissolution in organic solvents such as toluene, methylethylketone, ethyl acetate is coated on this mixing solutions on the releasing sheet (for example, polyester film) of regulation.Then,, remove organic solvent, on releasing sheet, make the flaky resin composition at about about 80～160 ℃ down dry these sheet materials.In addition, quantitative mixed silica dispersive Resins, epoxy, solidifying agent and other composition as required, mixed dissolution in organic solvents such as toluene, methylethylketone, ethyl acetate is coated on this mixed solution on the base material films such as polyester film of demoulding processing (for example, silicon is handled).Then, at about about 80～160 ℃ down dry these base material films, after making the flaky resin composition on this base material film, use the roll laminating machine, fit with the releasing sheet of regulation, only remove base material film, can on releasing sheet, make the flaky resin composition thus from this sheet material.In addition, preferably with above-mentioned solution coat on releasing sheet or substrate sheet, so that the thickness of gained film reaches 10～200 μ m.
As above the resin combination of Zhi Bei the manner is below the 10000Pas in the viscosity of 80 ℃ of mensuration, the viewpoint of the flowability when guaranteeing scolding tin connectivity and fusion, be preferably 1～10000Pas, more preferably 0.1～5000Pas, further preferred 1～3000Pas.
In addition, can with the mode 1 the same viscosity of measuring above-mentioned resin combination.
And as above the resin combination of Zhi Bei the manner from guaranteeing the viewpoint of joint reliability, is preferably 70 * 10 at the thermal expansivity of glass transition temp (Tg) mensuration of cured article
-6Below/the K, more preferably 60 * 10
-6Below/the K.
In addition, also can with the mode 1 the same thermal expansivity of measuring above-mentioned resin combination.
An example of the resin sheet that is made of the resin combination and the releasing sheet of the manner is shown among Fig. 4.In the figure, be pressed with resin combination 21 on releasing sheet 22 upper stratas.
Secondly, the manufacture method with regard to the semiconductor device of the manner describes.The manufacture method of the semiconductor device of the manner comprises: make the resin sheet of the resin combination that contains the manner and the operation that this semi-conductor electricity road surface card closes, randomly the grinding card has the operation of crystal wafer back face of the band projection of resin sheet, remove (peeling off) releasing sheet and on wafer the operation of remaining resin combination and be cut into the operation of individual wafers only.In Fig. 5～9, demonstrate the example of each operation of manufacture method of the semiconductor device of the manner.Describe below with reference to this figure.
An example of the wafer of band projection is shown among Fig. 5.In the figure, on wafer 23, form projection 24.
As the material of the wafer 23 that uses in the manner, there is no particular limitation, can enumerate silicon, gallium arsenide etc.
As projection 24, there is no particular limitation, can enumerate the low melting point of scolding tin and dystectic projection, tin projection, Yin-Xi projection, Yin-Xi-copper projection, gold bump, copper projection etc.
The example that the semi-conductor electricity road surface card of resin sheet (sheet material that Fig. 4 is cited) and above-mentioned wafer 23 is closed is shown among Fig. 6.In the figure, the semi-conductor electricity road surface of wafer 23 is connected with resin combination 21, in the protruding 24 embedded resin compositions 21.
For above-mentioned wafer 23 and resin sheet card are closed, use the roll-type card to attach together to put or the vacuum type card attaches together and puts.The viewpoint of binding temperature warpage after reduce the space, improve the adaptation of wafer and prevent grinding wafer is preferably 25 ℃～100 ℃, more preferably 40 ℃～80 ℃.Laminate pressure can suitably be set according to laminating type and applying time etc. in addition.
Can be with the thickness of grinding wafer to obtain to stipulate of the above-mentioned resin sheet of having fitted.For the grinding wafer, there is no particular limitation to grinding attachment with grinding platform, can use.As this device, can enumerate the known devices such as " DFG-840 " of Disco (strain) system.In addition, also there is no particular limitation to grinding condition.
An example of reverse side (perhaps grinding surface) applying of cutting belt and wafer is shown among Fig. 7.In the figure, only remove releasing sheet 22 from resin sheet, cutting belt 25 is fitted with the reverse side of wafer 23.
Removing releasing sheet 22 can use day Dong Diangongshe system a: HR-8500-II to carry out.
As the cutting belt of using in the manner, so long as use usually in this area, there is no particular limitation to this.
As the laminating apparatus and the condition of cutting belt 25, there is no particular limitation, can use known device and condition.
An example after the cut-out of wafer (cutting) is shown among Fig. 8.In the figure, the wafer 23 that posts resin combination 21 is cut to individual chips 26 under the situation of fitting with cutting belt 25.
There is no particular limitation to the cutting of wafer, can use conventional cutting unit to carry out.
The example that chip carries is shown among Fig. 9.In the figure, take off individual chips 26, carry on wired circuit board 27 from cutting belt.Seal with resin combination between wafer 23 and the wired circuit board 27.
As the method for individual chips 26 lift-launchs at wired circuit board 27, can enumerate following method: at first, extract and take off individual chips 26 out from cutting belt 25, be accommodated in the chip disk, after the chip that perhaps is transported to flip-chip bonder carries in the interface,, individual chips 26 is heated simultaneously and pressurizes by the bump bonds mode, when carrying wired circuit board 27, the method that obtains being electrically connected; Use heating and pressurization and ultrasonic wave, obtain the method that is electrically connected when carrying wired circuit board; Individual chips 26 is carried after on the wired circuit board 27, by the scolding tin method that obtains being electrically connected etc. that refluxes.
Above-mentioned Heating temperature is preferably below 500 ℃, more preferably below 400 ℃ from the viewpoint of the deterioration that prevents individual chips 26 and wired circuit board 27.As lower limit, be about 100 ℃.Above-mentioned pressurized conditions also depends on the connection number of electrode part etc., is preferably 9.8 * 10
-3～1.96N/, more preferably 1.96 * 10
-2～9.8 * 10
-1N/.
Can obtain the semiconductor device of reliability of electrical connection excellence effectively by above method.The gained semiconductor device is also included within the manner.
[embodiment]
Below, enumerate embodiment and further specify the present invention, but the present invention is not subjected to any qualification of these embodiment.
Conclude and demonstrate the raw material that in embodiment 1-1～1-4 and Comparative Examples 1-1～1-4, uses below.
(1) Resins, epoxy
As Resins, epoxy, use
(a) bisphenol A type epoxy resin (epoxy equivalent (weight): 185g/eq), perhaps
(b) bisphenol f type epoxy resin (epoxy equivalent (weight): 158g/eq).
(2) solidifying agent
As solidifying agent, use xylylene type phenol resins (hydroxyl equivalent: 174g/eq).
(3) curing catalyst
As curing catalyst, and the triphenylphosphine of use micro encapsulation (shell: polyureas, core/shell is than=20/80 weight %).
(4) scolding tin jointing aid
As the scolding tin jointing aid, (mooney viscosity: 45ML (1+4), acrylonitrile content: 27 weight %, carboxyl-content: 0.027ephr (is equivalent to carboxyl equivalent: 3700g/eq) to use carboxy-modified acrylonitrile butadiene copolymer.
(6) silicon-dioxide dispersive Resins, epoxy
As silicon-dioxide dispersive Resins, epoxy, use
(a) silicon-dioxide dispersive Resins, epoxy (Resins, epoxy: bisphenol A type epoxy resin; Silicon-dioxide particle diameter: median size dmax=15nm, maximum particle diameter=40nm, half range value=10nm; Silica concentration=50 weight %; Epoxy equivalent (weight)=380g/eq; Hahse society system: NANOPOX XP22/0543), perhaps
(b) silicon-dioxide dispersive Resins, epoxy (Resins, epoxy: bisphenol f type epoxy resin; Silicon-dioxide particle diameter: median size dmax=15nm, maximum particle diameter=40nm, half range value=10nm; Silica concentration=60 weight %; Epoxy equivalent (weight)=425g/eq; Hahse society system: NANOPOX XP22/0540)
(7) silicon dioxide granule
As the silicon-dioxide example, use
(a) silicon-dioxide dispersion soln (median size dmax=12nm, maximum particle diameter=40nm, half range value=20nm; Solvent: methylethylketone, dioxide-containing silica: 12 weight %, Japan chemical industry society system: PL-1), perhaps
(b) silica dispersions (use Asada ironworker society system: sand mill (pearl material=zirconium white, particle diameter=1mm) is with revolution=3000rpm, with silicon dioxide granule (median size dmax=300nm, maximum particle diameter=350nm, half range value=50nm; Japan catalysis society system: KE-S30) be dispersed in the methyl ethyl ketone solvent 60 minutes, dioxide-containing silica: 50 weight %).
Conclude and demonstrate evaluation method below at embodiment 1-1～1-4 and Comparative Examples 1-1～1-4.
(1) viscosity
Using board diameter to be set at 35mm, space is set at 100 μ m, revolution and is set in the E type viscometer of 10 (1/s) (Thermoelectron society system: RS-1), at 80 ℃, 1g measures to resin combination.In addition, the determination limit of E type viscometer is 10000Pas, and therefore can not measure viscosity is the above resin combination of determination limit.
(2) thermal expansivity
Use the metal die injection molded, resin combination is cured 2 hours, make the testing plate of 5mm φ * 20mm, use the MJ800GM of Rigaku society system,, measure its thermal expansivity below Tg with 5 ℃/minute heat-up rate at 170 ℃.
(3) initial stage energizing test
(ADVANTEST society system: the resistivity of mensuration semiconductor device digital multimeter TR6847) does not demonstrate the substandard products that are of resistivity, and counts with the daisy chain.
(4) thermal shock test
Keep semiconductor device after 5 minutes at-55 ℃, to carry out 50 times (TST500 circulation) and 1000 times (TST1000 circulation) 125 ℃ of operations of keeping 5 minutes, afterwards, (ADVANTEST society system: the resistivity of mensuration semiconductor device digital multimeter TR6847) compares this resistivity and initial value (carrying out the resistivity of aforesaid operations semiconductor device in the past) with the daisy chain.This resistivity is that the semi-conductor more than 2 times of initial value is substandard products, and counting.
Embodiment 1-1～1-4 and Comparative Examples 1-1～1-4
The resin combination of following manufacturing embodiment 1-1～1-4 and Comparative Examples 1-1～1-4.
With the ratio of table 1 and described each raw material of table 2, with homodisperse machine (special machine chemical industry society system: T.K.Robomix type B), at room temperature mixed 30 minutes with 1000rpm.Then, with 400 order filters (A/F: 0.038mm) at room temperature filter the gained mixture.Afterwards, in order to remove solvent and the bubble in the filtrate, at 90 ℃, concentrating under reduced pressure is 60 minutes under 0.0026Mpa, and the preparation resin combination is measured its rerum natura.Its value is shown in Table 2.
[table 1]
(weight part)
| | |||||
| 1 | 2 | 3 | 4 | ||
| Silicon-dioxide dispersive Resins, epoxy | (a) | 31.55 | - | 31.55 | - |
| (b) | - | 32.64 | - | 32.64 | |
| Solidifying agent | 14.55 | 13.36 | 14.55 | 10.69 | |
| Curing catalyst | 0.31 | 0.27 | 0.31 | 0.29 | |
| The scolding tin jointing aid | 0.95 | 0.83 | 0.95 | 0.88 | |
| Methylethylketone | 20.3 | 20.2 | 19.9 | 19 | |
| Viscosity (Pas) | 800 | 2800 | 190 | 4600 | |
| Thermal expansivity (* 10 -6/K) | 59 | 55 | 50 | 46 | |
[table 2]
(weight part)
| Comparative Examples | |||||
| 1 | 2 | 3 | 4 | ||
| Resins, epoxy | (a) | 20 | 20 | 20 | - |
| (b) | - | - | - | 20 | |
| Silica dispersions | (a) | - | 168 | - | 196.3 |
| (b) | - | - | 40.32 | - | |
| Solidifying agent | 18.81 | 18.81 | 18.81 | 22.75 | |
| Curing catalyst | 0.39 | 0.39 | 0.39 | 0.43 | |
| The scolding tin jointing aid | 1.21 | 1.21 | 1.21 | 1.34 | |
| Viscosity (Pas) | 12 | * | 21 | * | |
| Thermal expansivity (* 10 -6/K) | 72 | 60 | 58 | 54 | |
* viscosity is too high, therefore can not use E type viscometer determining.
Use the above resin combination of making,, make semiconductor device (being equivalent to semiconductor device shown in Figure 1) according to the manufacture method of above-mentioned semiconductor device.That is to say, resin combination is heated to 80 ℃, be encapsulated in wired circuit board (glass epoxy resin substrate thickness: 0.8mm) with the molten state cast.Place it on the estrade that is heated to 100 ℃, the position of on resin combination, stipulating, (PanasonicFactory Solutions corporate system: FB30T-M) chip installs that (temperature=100 ℃, pressure 1g/ (9.8 * 10 with the flip-chip junctor
-3N/), time=1 second) is provided with the semiconductor element that connects with electrode (SnPb63: 183 ℃ of fusing points, electrode height: 80 μ m, 2000 of number of electrodes) (thickness: 600 μ m, big or small 10mm * 10mm).Thus, filled the resin of molten state in the space between wired circuit board and semiconductor element.Afterwards, use scolding tin reflow ovens (Jard society system: MJ-R4000), carry out scolding tin according to following JEDEC standard and engage, obtain being electrically connected.Use IPC/JEDEC J-STD-20C, tin-lead welding tin reflux conditions.The temperature overview is as follows: elevated temperature 60 seconds is to carry out the heating of giving by 25 ℃ to 100 ℃, 100 ℃～150 ℃ keep down temperature 90 seconds with the activation solder flux, be warming up to 240 ℃ with 2 ℃/second V-bar then, in than 240 ℃ high scopes of 5 ℃ of current peak temperature, kept 15 seconds, reduce temperature with speed at last less than 6 ℃/second.The time that is kept above 183 ℃ (scolding tin melt temperatures) is 90 seconds.Afterwards, use drying oven (Espec corporate system: PHH-100), carry out 120 minutes resin solidifications, make required semiconductor device at 170 ℃.Carry out above-mentioned evaluation with regard to the gained semiconductor device.It the results are shown in table 3 and the table 4.
[table 3]
| | ||||
| 1 | 2 | 3 | 4 | |
| The initial stage conduction test | 0/10 | 0/10 | 0/10 | 0/10 |
| TST500 | 0/10 | 0/10 | 0/10 | 0/10 |
| TST1000 | 0/10 | 0/10 | 0/10 | 0/10 |
[table 4]
| Comparative Examples | ||||
| 1 | 2 | 3 | 4 | |
| The initial stage conduction test | 0/10 | 10/10 | 10/10 | 10/10 |
| | 1/10 | * | * | * |
| | 4/10 | * | * | * |
* behind the semiconductor fabrication, do not demonstrate resistivity, therefore can not estimate.
Can confirm from the result of table 3 and table 4, the goods of embodiment contain the silicon dioxide granule with specified particle diameter, and as resin combination, use viscosity to be the resin combination below the 5000Pas 80 ℃ of mensuration, compare with the goods of Comparative Examples, guaranteed excellent scolding tin connectivity, operability and connection reliability.
Conclude and demonstrate raw material and the parts that in embodiment 2-1～2-5 and Comparative Examples 2-1～2-6, use below.
(1) Resins, epoxy
Use the Resins, epoxy identical with Comparative Examples 1-1～1-4 with embodiment 1-1～1-4.
(2) solidifying agent
As solidifying agent, use
(a) xylylene type bisphenol resin (hydroxyl equivalent: 174g/eq), perhaps
(b) the phenol novolac resin (hydroxyl equivalent: 137g/eq) of silicon modification.
(3) curing catalyst
As curing catalyst, use
(a) triphenylphosphine of micro encapsulation (shell: polyureas, core/shell is than=50/50 weight %), perhaps
(b) use the triphenylphosphine (shell: polyureas, core/shell is than=20/80 weight %) of micro encapsulation.
(4) thermoplastic resin
As thermoplastic resin, use acrylonitrile butadiene (mooney viscosity: 50ML (1+4), bonded vinyl cyanide amount=30 weight %).
(5) scolding tin jointing aid
As the scolding tin jointing aid, use hexanodioic acid-cyclohexanedimethanol divinyl ether polymkeric substance (acid equivalent: 269g/mol, molecular weight (Mn=1100)).
(6) silicon-dioxide dispersive Resins, epoxy
Use the silicon-dioxide dispersive Resins, epoxy identical with Comparative Examples 1-1～1-4 with embodiment 1-1～1-4.
(7) silicon dioxide granule
Use the silicon dioxide granule identical with Comparative Examples 1-1～1-4 with embodiment 1-1～1-4.
(8) wafer
As wafer, use
(a) have golden terminal stud projection wafer (material: silicon, 8 inches, die size: 10mm2, protruding number: 250 pins/chip), perhaps
(b) have the protruding wafer (material: silicon, 8 inches, die size 10mm of eutectic solder (183 ℃ of Sn-37Pb, fusing points)
2, protruding number: 2000 pins/chip).
Conclude and demonstrate the evaluation method of embodiment 2-1～2-5 and Comparative Examples 2-1～2-6 below.
(1) transmittance
Use spectrophotometer (society of Shimadzu Seisakusho Ltd. system: UV3101), measure the transmittance of resin combination at wavelength 650nm place.In addition, transmittance is the occasion more than 30%, and being evaluated as pattern can discern.
(2) viscosity
Similarly estimate with embodiment 1-1～1-4 and Comparative Examples 1-1～1-4.
(3) thermal expansivity
Similarly estimate with embodiment 1-1～1-4 and Comparative Examples 1-1～1-4.
(4) wafer process
Can evaluation make the individual chips of laminating resin composition.
Metewand
Can make: zero
Can not make: *
(5) initial stage energizing test
Similarly estimate with embodiment 1-1～1-4 and Comparative Examples 1-1～1-4.
(6) thermal shock test
Keep semiconductor device after 10 minutes at-55 ℃, to carry out 50 times (TST500 circulation) or 1000 times (TST1000 circulation) 125 ℃ of operations of keeping 10 minutes, afterwards, (ADVANTEST society system: the resistivity of mensuration semiconductor device digital multimeter TR6847) compares this resistivity and initial value (carrying out the resistivity of aforesaid operations semiconductor device in the past) with the daisy chain.This resistivity is that the semi-conductor more than 2 times of initial value is substandard products, and counting.
Embodiment 2-1～2-5 and Comparative Examples 2-1～2-6
The resin combination of following manufacturing embodiment 2-1～2-5 and Comparative Examples 2-1～2-6
With the ratio of table 5 and described each raw material of table 6, mixed dissolution is coated with this mixed solution on the polyester film of handling through the demoulding in methylethylketone.This solution on 120 ℃ of dry polyester films is 5 minutes then, removes methylethylketone, and making desired thickness on above-mentioned polyester film is the resin combination of 50 μ m, measures its rerum natura.
[table 5]
(weight part)
| | ||||||
| 1 | 2 | 3 | 4 | 5 | ||
| Silicon-dioxide dispersive resin | (a) | 28.8 | - | 59.2 | 59.2 | - |
| (b) | - | 29.8 | - | - | 62 | |
| Solidifying agent | (a) | 13.2 | 12.2 | - | - | - |
| (b) | - | - | 20 | 20 | 20 | |
| Curing catalyst | (a) | 2 | 2 | - | - | - |
| (b) | - | - | 0.67 | 0.67 | 0.67 | |
| | 6 | 6 | 1.55 | 1.64 | 1.48 | |
| The scolding tin joint compound | - | - | - | 2.65 | 2.39 | |
| Methylethylketone | 50 | 50 | 35 | 36 | 37 | |
| Viscosity (Pas) | 2500 | 4000 | 1100 | 1300 | 4600 | |
| Transmittance (%) | 64 | 66 | 60 | 60 | 57 | |
| Thermal expansivity (* 10 -6/K) | 69 | 66 | 59 | 60 | 57 | |
[table 6]
(weight part)
| Comparative Examples | |||||||
| 1 | 2 | 3 | 4 | 5 | 6 | ||
| Resins, epoxy | (a) | 20 | 20 | 20 | - | 20 | 20 |
| (b) | - | - | - | 20 | - | - | |
| The silicon-dioxide dispersion soln | (a) | - | 154.8 | - | 230.6 | 185.9 | - |
| (b) | - | - | 37.2 | - | - | 44.6 | |
| Solidifying agent | (a) | 18.8 | 18.8 | 18.8 | 22 | - | - |
| (b) | - | - | - | - | 17.4 | 17.4 | |
| Curing catalyst | (a) | 1.62 | 1.62 | 1.62 | 1.75 | - | - |
| (b) | - | - | - | - | 0.5 | 0.5 | |
| Thermoplastic resin | 5.51 | 5.51 | 5.51 | 5.97 | 1.23 | 1.23 | |
| The scolding tin joint compound | - | - | - | - | 2 | 2 | |
| Methylethylketone | 31 | - | 25 | - | - | 20 | |
| Viscosity (Pas) | 90 | * | 800 | * | * | 950 | |
| Transmittance (%) | 91 | 66 | 8 | 66 | 60 | 6 | |
| Thermal expansivity (* 10 -6/K) | 78 | 68 | 68 | 61 | 55 | 55 | |
* viscosity is too high, therefore can not use E type viscometer determining.
At 80 ℃ the resin combination of above-mentioned manufacturing and ethyl vinyl acetate (ethylviayl acetate releasing sheet, 135 μ m) are fitted, form resin sheet.With roller rigging machine (day Dong Diangongshe system: DR-8500-II), fitted in this resin sheet and the semi-conductor electricity road surface of the wafer that has projection at 70 ℃.Make cutting belt (day Dong Diangongshe system: DU-300) fit with the gained wafer.Then, remove releasing sheet after, use cutting unit (DISCO society system: DFD-651), this wafer is cut into individual chips, make the chip that has resin combination.
Afterwards, with the method for record in following (1) or (2), make required semiconductor device, with regard to the gained semiconductor device, carry out above-mentioned evaluation, it the results are shown in table 7 and the table 8.
(1) use the flip-chip junctor (nine divisions of China in remote antiquity Panasonic system: FB30T-M), by the thermo-compressed mounting means (when chip carries: 120 ℃ of temperature, pressure=9.8 * 10
-2N/, time=3 second are during crimping: 240 ℃ of temperature, pressure 4.9 * 10
-1N/, time=10 second), the chip that will have a resin combination carries wired circuit board (glass epoxy resin substrate thickness: 1mm) go up and resin-sealed, make semiconductor device.To the gained semiconductor device, use drying oven (Espec society system: PHH-100), resin combination is carried out 60 minutes secondary hardening, obtain required semiconductor device at 150 ℃.
(2) (Panasonic Factory Solutions system: FB30T-M), the chip that will have resin combination carries (when chip carries: 120 ℃ of temperature, pressure=9.8 * 10 temporarily to use the flip-chip junctor
-3N/, time=3 second) to wired circuit board (glass epoxy resin substrate thickness: 1mm), simultaneously resin-sealed.Afterwards, use FB30T-M, 220 ℃ of 10 seconds of heating assembling part down, so that semiconductor device is made in the scolding tin fusion.To the gained semiconductor device, use drying oven (Espec society system: PHH-100), resin combination is carried out 120 minutes secondary hardening, obtain required semiconductor device at 170 ℃.
[table 7]
| | |||||
| 1 | 2 | 3 | 4 | 5 | |
| Wafer | (a) | (a) | (b) | (b) | (b) |
| Manufacture method | (1) | (1) | (2) | (2) | (2) |
| Wafer process | ○ | ○ | ○ | ○ | ○ |
| Initial stage energising property | 0/10 | 0/10 | 0/10 | 0/10 | 0/10 |
| TST500 | 0/10 | 0/10 | 0/10 | 0/10 | 0/10 |
| TST1000 | 0/10 | 0/10 | 0/10 | 0/10 | 0/10 |
[table 8]
| Comparative Examples | ||||||
| 1 | 2 | 3 | 4 | 5 | 6 | |
| Wafer | (a) | (a) | (a) | (a) | (b) | (b) |
| Manufacture method | (1) | (1) | (1) | (1) | (2) | (2) |
| Wafer process | ○ | × | × | × | × | × |
| Initial stage energising property | 0/10 | * | * | * | * | * |
| | 4/10 | * | * | * | * | * |
| TST1000 | 7/10 | * | * | * | * | * |
* owing to can not obtain having the chip of regulation resin combination, therefore can not estimate.
From the result of table 5 and table 7 as can be seen, the resin combination of making among embodiment 2-1～2-5 can keep the discernible transmittance of pattern, and viscosity is also low, can make the chip that has required resin combination.In addition, for the semiconductor device of making in embodiment 2-1～2-5, energising property, TST500 and TST1000 aspect do not produce bad result in the early stage.
In contrast, the transmittance height of the resin combination of in Comparative Examples 2-1, making, viscosity is low, therefore can obtain having the chip of resin combination.But because the thermal expansivity height, for the semiconductor device of making, energising property, TST500 and TST1000 aspect produce bad result in the early stage.In addition, the viscosity height of the resin combination of making among Comparative Examples 2-2,2-4 and the 2-5 does not have flowability, can not fit on the wafer under the temperature of regulation, therefore can not obtain having the chip of resin combination.In addition, the transmittance of the resin combination of making in Comparative Examples 2-3 and 2-5 is low, therefore can not pattern recognition, can not obtain having the chip of resin combination.
Thereby, in an embodiment the semiconductor device of Zhi Zaoing with compare at the semiconductor device of Comparative Examples manufacturing, as can be seen, can keep the discernible transmittance of pattern, and can keep the flowability that wafer can be fitted, also can guarantee stable resistivity for thermal shock test, that is to say the reliability of electrical connection excellence.
[industrial applicibility]
Resin composition for encapsulating semiconductor of the present invention can be used for the space between sealing semiconductor industry wired circuit board and semiconductor element.
Claims (8)
1. a resin composition for encapsulating semiconductor is below the 5000Pas 80 ℃ of viscosity of measuring down, contains
(A) Resins, epoxy of 2 above epoxy group(ing) is arranged in 1 molecule
(B) solidifying agent and
(C) median size dmax is that 3～50nm and half range value are the silicon dioxide granule below 1.5 times of median size dmax.
2. the described resin composition for encapsulating semiconductor of claim 1 is characterized in that above-mentioned silicon dioxide granule is dispersed in the above-mentioned Resins, epoxy.
3. the described resin composition for encapsulating semiconductor of claim 1 is characterized in that the thermal expansivity that the cured article of resin composition for encapsulating semiconductor is measured is 70 * 10 under the Tg temperature
-6Below/the K.
4. a flaky semiconductor resin composition for encapsulating is below the 10000Pas 80 ℃ of viscosity of measuring down, contains
(A) Resins, epoxy of 2 above epoxy group(ing) is arranged in 1 molecule
(B) solidifying agent and
(C) median size dmax is that 3～50nm and half range value are the silicon dioxide granule below 1.5 times of median size dmax.
5. the described resin composition for encapsulating semiconductor of claim 4 is characterized in that above-mentioned silicon dioxide granule is dispersed in the above-mentioned Resins, epoxy.
6. the described resin composition for encapsulating semiconductor of claim 4 at wavelength 650nm place, has the transmittance more than 30%.
7. the described resin composition for encapsulating semiconductor of claim 4 is characterized in that the thermal expansivity that the cured article of resin composition for encapsulating semiconductor is measured is 70 * 10 under the Tg temperature
-6Below/the K.
8. seal the semiconductor device that forms by each described resin composition for encapsulating semiconductor of claim 1～7.
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2004013396A JP2005206664A (en) | 2004-01-21 | 2004-01-21 | Semiconductor sealing resin composition |
| JP13405/04 | 2004-01-21 | ||
| JP13396/04 | 2004-01-21 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN1807539A true CN1807539A (en) | 2006-07-26 |
| CN100543099C CN100543099C (en) | 2009-09-23 |
Family
ID=34899468
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CNB2005100055378A Expired - Fee Related CN100543099C (en) | 2004-01-21 | 2005-01-20 | Resin composition for encapsulating semiconductor |
Country Status (2)
| Country | Link |
|---|---|
| JP (1) | JP2005206664A (en) |
| CN (1) | CN100543099C (en) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US8461940B2 (en) | 2008-02-18 | 2013-06-11 | Murata Manufacturing Co., Ltd. | Elastic wave device and method for manufacturing the same |
| CN104108063A (en) * | 2013-04-18 | 2014-10-22 | 株式会社迪思科 | Sheet |
| CN109749362A (en) * | 2017-11-07 | 2019-05-14 | 味之素株式会社 | Resin combination |
Families Citing this family (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2009008509A1 (en) | 2007-07-11 | 2009-01-15 | Nissan Chemical Industries, Ltd. | Epoxy resin-forming liquid preparation containing inorganic particle |
| JP5471188B2 (en) * | 2009-09-02 | 2014-04-16 | 住友ベークライト株式会社 | Resin composition, transparent substrate and solar cell substrate |
| DE102012205650A1 (en) | 2012-04-05 | 2013-10-10 | Siemens Aktiengesellschaft | Insulating material for rotating machines |
| JP6265673B2 (en) * | 2013-10-04 | 2018-01-24 | 株式会社アドマテックス | Method for producing inorganic particle material-containing composition |
Family Cites Families (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0563240A (en) * | 1991-05-08 | 1993-03-12 | Nitto Denko Corp | Optical semiconductor device |
| JPH08337680A (en) * | 1995-06-09 | 1996-12-24 | Hitachi Ltd | Thermosetting resin and semiconductor device using the same |
| JP3294803B2 (en) * | 1997-08-18 | 2002-06-24 | 株式会社日本触媒 | Thermosetting resin sealing material |
| JP2000336247A (en) * | 1999-05-27 | 2000-12-05 | C I Kasei Co Ltd | Liquid epoxy resin sealing material |
| EP1236765A1 (en) * | 2001-02-28 | 2002-09-04 | hanse chemie GmbH | Silica dispersion |
| JP2005120230A (en) * | 2003-10-16 | 2005-05-12 | Nitto Denko Corp | Epoxy resin composition for optical semiconductor element sealing and optical semiconductor device using the composition |
| JP4417122B2 (en) * | 2004-01-21 | 2010-02-17 | 日東電工株式会社 | Resin composition for sheet-like semiconductor encapsulation |
-
2004
- 2004-01-21 JP JP2004013396A patent/JP2005206664A/en active Pending
-
2005
- 2005-01-20 CN CNB2005100055378A patent/CN100543099C/en not_active Expired - Fee Related
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US8461940B2 (en) | 2008-02-18 | 2013-06-11 | Murata Manufacturing Co., Ltd. | Elastic wave device and method for manufacturing the same |
| CN104108063A (en) * | 2013-04-18 | 2014-10-22 | 株式会社迪思科 | Sheet |
| CN104108063B (en) * | 2013-04-18 | 2019-01-01 | 株式会社迪思科 | Sheet material |
| CN109749362A (en) * | 2017-11-07 | 2019-05-14 | 味之素株式会社 | Resin combination |
| CN109749362B (en) * | 2017-11-07 | 2023-10-20 | 味之素株式会社 | Resin composition |
Also Published As
| Publication number | Publication date |
|---|---|
| CN100543099C (en) | 2009-09-23 |
| JP2005206664A (en) | 2005-08-04 |
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