CN1795668A - Signal processing - Google Patents
Signal processing Download PDFInfo
- Publication number
- CN1795668A CN1795668A CNA2004800143635A CN200480014363A CN1795668A CN 1795668 A CN1795668 A CN 1795668A CN A2004800143635 A CNA2004800143635 A CN A2004800143635A CN 200480014363 A CN200480014363 A CN 200480014363A CN 1795668 A CN1795668 A CN 1795668A
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- CN
- China
- Prior art keywords
- signal
- level
- circuit
- composite
- processing circuit
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- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N3/00—Scanning details of television systems; Combination thereof with generation of supply voltages
- H04N3/10—Scanning details of television systems; Combination thereof with generation of supply voltages by means not exclusively optical-mechanical
- H04N3/16—Scanning details of television systems; Combination thereof with generation of supply voltages by means not exclusively optical-mechanical by deflecting electron beam in cathode-ray tube, e.g. scanning corrections
- H04N3/22—Circuits for controlling dimensions, shape or centering of picture on screen
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N3/00—Scanning details of television systems; Combination thereof with generation of supply voltages
- H04N3/10—Scanning details of television systems; Combination thereof with generation of supply voltages by means not exclusively optical-mechanical
- H04N3/30—Scanning details of television systems; Combination thereof with generation of supply voltages by means not exclusively optical-mechanical otherwise than with constant velocity or otherwise than in pattern formed by unidirectional, straight, substantially horizontal or vertical lines
- H04N3/32—Velocity varied in dependence upon picture information
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- Engineering & Computer Science (AREA)
- Multimedia (AREA)
- Signal Processing (AREA)
- Amplifiers (AREA)
- Details Of Television Scanning (AREA)
- Video Image Reproduction Devices For Color Tv Systems (AREA)
Abstract
A signal processing circuit (1) comprises a first signal generator (10) which generates a DC-level (DL). A second signal generator (11) generates an AC-signal (AS) which is not related to the DC-level (DL). A combining circuit (12) combines the DC-level (DL) and the AC-signal (AS) into a combined signal (CS). And a common processing circuit (13) processes the combined signal (CS).
Description
Technical field
The present invention relates to a kind of signal processing circuit, a kind of integrated circuit and a kind of display unit that comprises the sort signal treatment circuit that comprises as the signal generator of this signal processing circuit part.
Background technology
Both scan velocity modulation (also being called SVM) and slant correction all are to have well-known feature in the cathode ray tube display unit of (also being called CRT).
US 5,528, and 312 disclose a kind of SVM circuit, and this SVM circuit improves image resolution ratio according to the derivative (derivative) of vision signal by the sweep speed of the electron beam of modulation CRT.
US 5,825, and 131 disclose a kind of tilt compensation circuit and degaussing circuit that is used for picture tube.Well-known anti-magnetized coil is used to produce degaussing field and inclined field.Switch is provided to tilt compensation circuit or degaussing circuit are connected to anti-magnetized coil.At the demagnetization duration of work, switch will be connected to anti-magnetized coil by the AC electric current that degaussing circuit produces.After demagnetization is finished, switch will be connected to anti-magnetized coil by the DC electric current that tilt compensation circuit produces, and rotate with corrected image.
Need a kind of complicated circuit so that can produce SVM signal and slope compensation signal.
Summary of the invention
The purpose of this invention is to provide a kind of better simply signal processing circuit.
It is a kind of as in the signal processing circuit described in the claim 1 that a first aspect of the present invention provides.It is a kind of as at the integrated circuit described in the claim 6 that a second aspect of the present invention provides.It is a kind of as in the display unit described in the claim 7 that a third aspect of the present invention provides.
According to a first aspect of the present invention, signal processing circuit comprises first signal generator and the secondary signal generator that DC level and AC signal are provided respectively.This DC level and AC signal are incoherent mutually.Incoherent signal for example is the signal that is used for difference in functionality in video display devices.For example, the DC level is the input signal that is used for tilt function, and the AC signal is the input signal that is used for scan velocity modulation function.Combiner circuit synthesizes a composite signal with DC level and AC signal.The signal that the common process processing of circuit is synthetic.
This advantage that has is that described two incoherent signals can be handled by same common process circuit after synthesizing composite signal.Use the common process circuit of handling composite signal to reduce the cost and the number of elements of signal processing circuit.The common process circuit can be carried out any signal processing operations, for instance such as filtering and/or amplification.
In according to the embodiments of the invention as qualification in the claim 2, the common signal generator comprises the public preamplifier that amplifies composite signal.In output place of public preamplifier, low pass filter separates this two incoherent signals with high pass filter.Separate output amplifier (substantially) the DC level roughly that provided by low pass filter and AC signal roughly are provided, this DC level and AC signal roughly roughly is separated from composite signal by low pass filter and high pass filter respectively.Output amplifier offers different loads with the DC level of amplification and the AC signal of amplification.
In according to the embodiments of the invention as qualification in the claim 3, first load is a tilt coil, and second load is scan velocity modulation coil or electrode.Therefore, the DC electric current that offers tilt coil is incoherent signal with the AC signal that offers SVM coil or electrode, and only being synthesized is a composite signal so that can use same preamplifier to amplify DC signal and AC signal.In the prior art, the AC signal that is used for the DC electric current of tilt coil and is used for SVM is handled independently of one another, because tilt and SVM is the independently function of separate processes of being considered.Be based on following viewpoint according to the embodiments of the invention that limit in the claim 3, promptly two irrelevant signals can be synthesized a composite signal and this composite signal is handled jointly, rather than to these two signal separate processes.
In according to the embodiments of the invention as qualification in the claim 4, the DC signal generator receives the signalization (set-signal) of the level of determining the DC level.By this way, in factory between erecting stage or between the normal operating period, but the tilt quantity Be Controlled so that image by best located.
According to as the embodiments of the invention of qualification in the claim 5 in, the AC signal be should be on CRT the derivative of video signal displayed.
According to a second aspect of the present invention, in integrated circuit, only need a signal pins to export composite signal.Need on the pin that separates, not export the AC signal of DC level.
With reference to the embodiments described below, these and other aspect of the present invention is significantly, and will illustrate it with reference to described embodiment.
Description of drawings
Fig. 1 illustrates a display unit with signal processing circuit, and this signal processing circuit to small part is integrated in the integrated circuit, and
Fig. 2 illustrates a foundation specific embodiment of the present invention.
Embodiment
Fig. 1 illustrates a display unit, and it comprises cathode ray tube 18 (also being called CRT) and drives the circuit of tilt coil L1 and both scan velocity modulation (also being called SVM) coil L 2.Tilt coil L1 and SVM coil L2 are arrived CRT 18 by magnetic coupling.In the prior art, produce DC electric current ODL by tilt coil L1 and be well-known by the split circuit that SVM coil L2 produces AC electric current OAS.Can also use SVM electrode (not shown) to replace SVM coil L2.AC voltage OAS is provided for the SVM electrode.
Signal generator 10 receives signalization DCS and the DC level DL that is determined by signalization DCS is provided.Signal generator 11 receiver, video input signal VI also provide AC signal AS.Usually, AC signal AS is single order or the second dervative of vision signal VI.Combiner circuit 12 synthetic incoherent DC level DL and AC signal AS are to provide a composite signal CS.For example, composite signal CS comprises the DC level that limited by DC level DL and the stack of the AC signal that limited by AC signal AS.Common process circuit 13 is handled the composite signal PCS of composite signal CS to obtain to handle.Common process circuit 13 is put big composite signal CS before can comprising public preamplifier 130.But in using, other can carry out other common process.
Low pass filter 14 leaches DC component among the composite signal PCS of processing with the DC level SDL of the separation that obtains to represent DC level DL.High pass filter 15 leaches AC component among the composite signal PCS of processing with the AC signal SAS of the separation that obtains to represent AC signal AS.If DC level and AC signal synthesize in another way, then can use other suitable circuit to separate DC level and AC signal.
Output amplifier 16 amplifies the DC level SDL that separates and obtains suitable DC electric current ODL to pass through tilt coil L1.Output amplifier 17 amplifies the AC signal SAS that separates and obtains suitable AC electric current OAS to pass through SVM coil L2.
If signal generator 10 and 11 and combiner circuit 12 be integrated in the integrated circuit (IC), then only need an output pin P1.Under the situation that does not have synthetic two uncorrelated signal DL and AS, will need two output pins.Integrated circuit (IC) also can comprise common signal treatment circuit 13, now only needs a pin to export the composite signal PCS of processing again.In order to keep alap packaging cost, the pin of required low quantity is important in the IC encapsulation.
Fig. 2 illustrates a foundation specific embodiment of the present invention.
SVM input signal AS is high-frequency signal inherently, and inclination input signal DL is the DC level.SVM input signal AS is provided for the emitter of NPN transistor Q1 via the cascaded structure of capacitor C5 and resistor R 15.Inclination input signal DL is provided for the base stage of transistor Q1 via resistor R 10.The parallel-connection structure of resistor R 11 and capacitor C2 is disposed between the base stage and ground of transistor Q1.Resistor R 9 is disposed between the emitter and ground of transistor Q1.Emitter by SVM input signal AS being injected transistor Q1 and the base stage that DC level DL offers transistor Q1 synthesized SVM input signal AS and inclination input signal DL.Composite signal CS shows as the electric current by the collector electrode of transistor Q1.Replacedly, these two signal AS and DL can synthesize by synthetic two electric current (not shown).
Transistor Q1, Q2 and Q3 form common process circuit 13, and this common process circuit 13 amplifies and cushions composite signal CS so that the composite signal PCS of processing to be provided.The PNP transistor has the collector electrode that is connected to ground, the base stage of collector electrode that is connected to transistor Q1 and the emitter that is connected to the emitter of transistor Q2 via resistor R 3.NPN transistor Q2 has the base stage of the base stage that cascaded structure via diode D2 and D4 is connected to transistor Q3 and the collector electrode that is connected to the power supply 15 that voltage V1 is provided.Diode D2 and D4 are access in (pole) with conduction current on the collector electrode direction of transistor Q1.Resistor R 1 is disposed between the base stage and collector electrode of transistor Q2.The electric current of transistor Q1 collector electrode is by the cascaded structure of two diode D2 and D4 and resistor R 1, providing driving voltage, thereby on the emitter of transistor Q3, produce the voltage of the composite signal PCS that expression handled to the base stage of transistor Q2 and the base stage of transistor Q3.
Coil L and capacitor C1 form low pass filter 14, and transistor Q4 and Q 5 formation output amplifiers 16, and this output amplifier 16 produces DC electric current ODL by tilt coil L1, and this tilt coil L1 is described to resistance.Shown output amplifier 16 comprises unspecified known inverter stages.Also can use other output stage.
Capacitor C4 and C6 form high pass filter 15, and transistor Q6 and Q7 formation output amplifier 17, and this output amplifier 17 produces AC electric current OAS by SVM coil L2.Shown output amplifier 17 comprises the transducer of unspecified known voltage to electric current.Also can use other output stage.
Should be noted that the foregoing description is explanation and do not limit the present invention, and under the situation of the scope that does not deviate from appended claims, those skilled in the art can design many alternative embodiments.For example, also can make field-effect transistors replace bipolar transistor.
In claims, place any reference symbol of bracket not to be appreciated that restriction to claim.Verb " comprises " and the existence that is different from element described in the claim or step is not got rid of in the use that changes.The existence that article " a () " before the element or " an (one) " do not get rid of a plurality of this elements.In enumerating the equipment claim of several means, some can the realization in these devices by same hardware branch.Some measure only is documented in that this fact does not show that the combination of these measures can not advantageously be used in the mutually different dependent claims.
Claims (7)
1. a signal processing circuit (1) comprising:
First signal generator (10) is used to produce DC level (DL),
Secondary signal generator (11) is used for producing and the incoherent AC signal of DC level (DL) (AS),
Combiner circuit (12) is used for DC level (DL) and AC signal (AS) are synthesized a composite signal (CS), and
Common process circuit (13) is used to handle this composite signal (CS).
2. signal processing circuit as claimed in claim 1 (1), wherein common process circuit (13) comprises and is used to amplify the preamplifier (130) of composite signal (CS) with the composite signal (PCS) that obtains to amplify, and wherein signal generator (1) further comprises:
Low pass filter (14) is used for separating the DC level (SDL) of DC level (DL) to obtain to separate from the composite signal (PCS) that amplifies,
High pass filter (15) is used for separating the AC signal (SAS) of AC signal (AS) to obtain to separate from the composite signal (PCS) that amplifies,
First output amplifier (16), the DC level (SDL) that is used to amplify separation to be providing output DC level (ODL) to first load (L1), and
Second output amplifier (17) is used to amplify the AC signal (SAS) of separation so that output AC signal (OAS) to be provided to second load (L2).
3. signal processing circuit as claimed in claim 2 (1), wherein first load (L1) is a tilt coil, and wherein second load (L2) is a scan velocity modulation coil.
4. signal processing circuit as claimed in claim 1 (1), wherein first signal generator (10) comprises the input that is used to receive the signalization (DCS) of determining DC level (DL).
5. signal processing circuit as claimed in claim 3 (1), wherein secondary signal generator (11) comprises and is used for receiving video signals (VI) so that the input as the AC signal (AS) of the derivative of vision signal (VI) to be provided.
6. an integrated circuit (IC) comprising:
First signal generator (10) is used to produce DC level (DL),
Secondary signal generator (11) is used for producing and the incoherent AC signal of DC level (DL) (AS),
Combiner circuit (12) is used for DC level (DL) and AC signal (AS) are synthesized a composite signal (CS), and
Output pin (P1) is used to provide this composite signal (CS).
7. display unit that comprises cathode ray tube (CRT) and signal processing circuit as claimed in claim 3 (1), described tilt coil (L1) and scan velocity modulation coil (L2) are carried out magnetic coupling with cathode ray tube (CRT).
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
SG0300130 | 2003-05-26 | ||
SGPCT/SG03/00130 | 2003-05-26 |
Publications (1)
Publication Number | Publication Date |
---|---|
CN1795668A true CN1795668A (en) | 2006-06-28 |
Family
ID=33476160
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CNA2004800143635A Pending CN1795668A (en) | 2003-05-26 | 2004-05-17 | Signal processing |
Country Status (4)
Country | Link |
---|---|
EP (1) | EP1632086A1 (en) |
JP (1) | JP2007502084A (en) |
CN (1) | CN1795668A (en) |
WO (1) | WO2004105382A1 (en) |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN109637121A (en) * | 2018-06-05 | 2019-04-16 | 南京理工大学 | A kind of road traffic congestion prediction technique in short-term based on CS-SVR algorithm |
Family Cites Families (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR950004960A (en) * | 1993-07-20 | 1995-02-18 | 배순훈 | Video signal interference cancellation circuit of large TV |
KR970010216B1 (en) * | 1994-12-02 | 1997-06-23 | Samsung Electronics Co Ltd | Tilt control circuit for crt |
US6816797B2 (en) * | 2000-09-29 | 2004-11-09 | Hydrogenics Corporation | System and method for measuring fuel cell voltage and high frequency resistance |
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2004
- 2004-05-17 EP EP04733416A patent/EP1632086A1/en not_active Withdrawn
- 2004-05-17 CN CNA2004800143635A patent/CN1795668A/en active Pending
- 2004-05-17 WO PCT/IB2004/050711 patent/WO2004105382A1/en not_active Application Discontinuation
- 2004-05-17 JP JP2006530863A patent/JP2007502084A/en not_active Withdrawn
Also Published As
Publication number | Publication date |
---|---|
JP2007502084A (en) | 2007-02-01 |
WO2004105382A1 (en) | 2004-12-02 |
EP1632086A1 (en) | 2006-03-08 |
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C06 | Publication | ||
PB01 | Publication | ||
C02 | Deemed withdrawal of patent application after publication (patent law 2001) | ||
WD01 | Invention patent application deemed withdrawn after publication |