CN1791033A - System for realizing SDH logic test and its method - Google Patents
System for realizing SDH logic test and its method Download PDFInfo
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- CN1791033A CN1791033A CN 200410098743 CN200410098743A CN1791033A CN 1791033 A CN1791033 A CN 1791033A CN 200410098743 CN200410098743 CN 200410098743 CN 200410098743 A CN200410098743 A CN 200410098743A CN 1791033 A CN1791033 A CN 1791033A
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Abstract
The invention relates to a system to realize SDH logic test, which comprises: a test controller, a framing device, and an analyzer. Wherein, the said controller notifies the framing device to generate SDH data frame as activation data and send to tested SDH logic, the tested SDH logic outputs SDH data frame to the analyzer to obtain test result. This invention simplifies greatly process fro SDH logic test, and uses feature adaptation parameter management method for maintenance.
Description
Technical field
The present invention relates to the network test technical field, relate in particular to a kind of system and method thereof of the SDH of realization logic testing.
Background technology
SDH (synchronous digital hierarchy, Synchronous Digital Hierarchy) is made up of a whole set of graduate standardized digital transfer structure, and the net load that is suitable for various paths adaptation processing transmits on physical medium.SDH is that a kind of optical fiber that both had been applicable to also is applicable to the current techique system of microwave and sts satellite transmission system.
The important feature of SDH is to adopt synchronous multiplexing mode and multiplexing flexibly mapping structure, thereby only need utilize software high speed signal once directly can be divided and insert out the low speed tributary signal, and the realization of digital crossover linkage function is simplified greatly.Also arrange abundant overhead-bits in the frame structure of SDH, comprised section overhead and path overhead, strengthened the network operation greatly, the ability of maintenance and management.
The basic module of SDH signal is that speed is STM-1 (the synchronous transmission piece grade 1 of 155.520Mbit/s, Synchronous Transport Module level-1), the synchronous digital hierarchy signal of higher rate, as STM-4 (622.080Mbit/s), STM-16 (2488.320Mbit/s) and STM-64 (9953.280Mbit/s) can form by the STM-1 signal being carried out inserting the synchronizing signal multiple connection between byte simply, the multiple connection and the tap processing procedure of signal have been simplified greatly, make SDH be suitable for the high-speed high capacity fibre system in ten minutes, be convenient to the dilatation and the upgrading of communication system, embodied the forward compatibility of SDH technology.
For compatible existing P DH (PDH (Pseudo-synchronous Digital Hierarchy), Plesiochronous DigitalHierarchy), SDH uses VC (virtual container, Virtual Container) loads 1.5Mbit/s, 2Mbit/s, 34Mbit/S, 45Mbit/s and 140Mbit/s at interior PDH rate signal, be arranged in the net load of basic module signal frame of 155.520Mbit/s through multiple connection then, embodied the backwards compatibility of SDH technology.The realization of virtual container has with different levels step by step characteristics, and it comprises C-4-＞VC-4-＞STM1, C-3-＞VC-3-＞TU-3-＞VC-4-＞STM-1 and C-12-＞VC-12-＞TU-12-＞VC4-＞STM-1.
The SDH technology comprises the framing processing procedure of SDH frame in implementation procedure, i.e. the analytic process of the construction process of SDH frame, and SDH frame will describe respective process respectively below.
The construction process of described SDH frame is as follows:
(1) initial message is encapsulated according to corresponding method for packing;
The method for packing that adopts comprises at present: LAPS (SDH link-access process, Link AccessProcedure-SDH), GFP (general frame forming process, Generic Framing Procedure) and HDLC (High-Level Data Link Control, High level Data Link Control);
(2) put into container C-12, C-3 or C-4 through the data flow after the encapsulation process in the mode of Virtual Concatenation mapping;
(3) container C-12, C-3 or C-4 add that path overhead is mapped to virtual container VC-12, VC-3 or VC-4;
(4) low order virtual container VC-12, VC-3 navigate among tributary unit TU-12, the TU-3 by Tributary unit pointer respectively;
(5) tributary unit TU-12, TU-3 are multiplexed into high order virtual container VC-4 respectively;
(6) high order virtual container VC-4 adds that section overhead and Administrative Unit Pointer generate STM-1;
(7) the STM-1 frame is carried out interconnection processing and bus interface conversion, generate bus data, these data are exactly needed SDH Frame.
The analytic process of described SDH frame is as follows:
(1) receives bus data by PLI (programming language interface, Programming Language Interface);
(2) change receiving data according to respective bus, convert the frame structure of STM-1 to;
(3) section overhead and the Administrative Unit Pointer of STM-1 frame are analyzed, extracted high order virtual container VC-4;
(4) VC-4 is analyzed, separate and map out high-order container C-4 or demultiplexing obtains tributary unit TU-12, TU-3;
(5) tributary unit is analyzed, extracted low order virtual container VC-12 or VC3;
(6) VC-12 or VC3 are analyzed, separate and map out low order container C-12 or C-3;
(7) container C-12, C-3 or C-4 are analyzed, Virtual Concatenation is separated mapping and is obtained encapsulated message;
(8) encapsulated message is carried out decapsulation according to certain packaged type and handle, the territory of various encapsulation is analyzed, de-encapsulation method has LAPS, GFP and HDLC;
(9) at last the initial message after the decapsulation is carried out statistics and analysis.
At every content that above-mentioned SDH processing procedure relates to, in actual application, need to test accordingly respectively, determining the performance of every content that the SDH processing procedure relates to, thereby provide the SDH transmission network of dependable performance.
At present, the implementation of the method for testing that is adopted is a kind of testing scheme based on the file turnover.In this scheme, at first generate initial message, preserved in the mode of file; Then this document is operated, realized the encapsulation of data, its result is still preserved in the mode of file; Carry out each step that excited data generates by same operation, wherein all use the mode of file that data are carried out buffer memory.Therefore, in this scheme, the tested SDH excited data in logic that the SDH logic test platform is delivered to is a document form.
Because SDH frame format complexity, the frame capacity is also quite big, and therefore at the operation of excited data file with handle very numerous and diversely, and whole test process needs tester's participation, and automaticity is low.Cause having that real-time is strong, test period is long, testing efficiency is low and shortcoming such as poor expandability based on the logic test platform implementation of file turnover.
Summary of the invention
In view of above-mentioned existing in prior technology problem, the purpose of this invention is to provide a kind of system and method thereof of the SDH of realization logic testing, with the complexity of reduction SDH logic testing, and can improve the efficient and the Scalable Performance of SDH logic testing.
The objective of the invention is to be achieved through the following technical solutions:
The invention provides a kind of system of the SDH of realization logic testing, comprising:
Test controller: link to each other with framer and analyzer respectively, be used for issuing test command, reach the test result that the receiving and analyzing device reports to framer;
Framer: the order that is used for issuing according to test controller is treated to the synchronous transmission piece with initial message and sends to tested SDH logic;
Analyzer: receive from tested SDH logic and obtain the synchronous transmission piece that transmission comes, and the corresponding initial message of dissection process acquisition, will handle the initial message of acquisition again and expect that the initial message that receives compares the test result of analyzing definite tested SDH logic.
Described framer also links to each other with tested SDH logic by shared data structure with analyzer, is used for the data communication between framer or analyzer and tested SDH logic.
Described framer also comprises:
Parameter configuration module: be used for preserving the parameter of test process needs, and generate the parameter of testing needs, send to framer according to the concrete parameter value and the characteristic of correspondence attribute of configuration according to the characteristic attribute of parameter.
Described framer further comprises:
Initial message generation module: be used to generate the independently initial message of several, and send to package module;
Package module: described initial message is carried out sending to into frame module after the encapsulation process;
Become frame module: the initial message after the encapsulation that will obtain is handled and is generated corresponding SDH Frame, and sends to tested SDH logic.
Described parameter configuration module is also linked to each other by message generation module, package module and one-tenth frame module with described respectively, is used for sending its corresponding processing procedure parameters needed information to described each module.
Described one-tenth frame module further comprises:
The container submodule: the initial message after will encapsulating is put into container;
The virtual container submodule: the container that encapsulated message will be housed adds path overhead composition virtual container, and the tributary unit that the low order virtual container maybe will be housed adds path overhead composition high order virtual container;
Tributary unit submodule: the virtual container of low order is respectively charged into corresponding tributary unit;
Synchronous transmission piece submodule: with the multiplexing generation of high order virtual container SDH Frame.
Described analyzer comprises:
The parameter parsing module: be used for preserving the pre-period parameters that carries out the test result analysis needs according to the characteristic attribute of parameter, the actual parameter that will extract from the SDH frame that tested SDH logic receives is relatively determined test result with pre-period parameters.
Described analyzer further comprises:
Separate frame module: be used for that the SDH Frame that receives from tested SDH logic is separated frame and handle, and result is sent to decapsulation module;
Decapsulation module: be used for carrying out decapsulation and handling, and the initial message that obtains is handled in decapsulation sent to initial message processing module (MPM) to separating encapsulated message that frame module sends;
Initial message processing module (MPM): the initial message that receives is carried out statistical analysis, obtain to carry out the information that test result analysis needs.
Described parameter parsing module also with separate frame module, decapsulation module and initial message processing module (MPM) and link to each other, obtain the parameter information in the processing procedure of each module correspondence.
The described frame module of separating further comprises:
Synchronous transmission piece submodule: receive the SDH Frame that tested SDH logic is sent, and isolate high order virtual container, send to the virtual container submodule;
Virtual container submodule: the virtual container of carry data information is carried out demultiplexing processing acquisition cell therefor or tributary unit;
Tributary unit submodule: receive the tributary unit of each branch road respectively, and extract the low order virtual container and send to the virtual container submodule;
Container submodule: the container of carry data information is handled the acquisition encapsulated message, and send to decapsulation module.
The present invention also provides a kind of method of the SDH of realization logic testing, comprising:
A, tested SDH logic send the request of SDH Frame to test controller, and issue test command by test controller to framer;
After B, framer are received described order, carry out inter-process and generate corresponding SDH Frame, and send to tested SDH logic;
C, tested SDH logical process also transmit described SDH Frame, and send the transmission message request to controller, are carried out the reception of SDH Frame by controller notification analysis device and handle;
D, analyzer receive described SDH Frame and carry out analyzing and processing, obtain SDH logic testing result.
Described step B comprises:
Described framer will send to tested SDH logic by shared data structure according to the SDH Frame that test parameter information generates, and the notice of the described test controller of described tested SDH logical foundation is obtained the SDH Frame from shared data structure;
Described step D comprises:
Analyzer receives the SDH Frame that tested SDH logic is sent by shared data structure.
The method of described realization SDH logic testing also comprises:
E, in the parameter processing module of the parameter configuration module of framer and analyzer, preserve the characteristic information of each test respectively with parameter, and the Configuration Values information of each parameter, can determine to test the parameter information of usefulness according to the Configuration Values information of described parameter and the characteristic information of parameter.
Described step e also comprises:
The test subscriber makes amendment to the configuration information of the parameter of preserving respectively in the parameter processing module of the parameter configuration module of framer and analyzer by test controller.
Described step e also comprises:
In the parameter processing module of the parameter configuration module of framer and analyzer, preserve the initial value of the configuration information of parameter respectively.
Described step B and step D also comprise:
As the filter of data buffer zone, each filter corresponding buffer region is managed by the size of the pointer in the corresponding upper array of pointers to buffering area according to the buffer memory needs respectively for each module that described framer or analyzer comprise or submodule.
As seen from the above technical solution provided by the invention, same architecture is adopted in the design of analyzer and framer among the present invention, and the framing that had both met SDH is conciliate the feature of frame, has simplified the implementation procedure of test again.Each part of described system is by the array of pointers management of last layer, each buffering area in corresponding each part of each pointer in the array, this way to manage can be according to actual needs the quantity of buffering area open up buffering area, simultaneously, under the situation that is no more than the buffering area upper limit, the size of each buffering area also begins to increase from O according to actual needs.This mode of buffer management flexibly helps saving hardware resources such as internal memory;
Among the present invention, described framer and analyzer adopt the parameter management method of characteristic matching, can be to managing in each parameter set, and short and sweet.The user only needs to pass through simply to increase the parameter attribute descriptive statement, just can expand new parameter to be measured, and test is with good expansibility.
Description of drawings
Fig. 1 is the structural representation of system of the present invention;
Fig. 2 is the structural representation of the framer among Fig. 1;
Fig. 3 is the structural representation of the analyzer among Fig. 1;
Fig. 4 is the implementation procedure schematic diagram of the method for the invention.
Embodiment
Core of the present invention is that the excited data that tested SDH logic is delivered in order is the SDH Frame, and can adopt identical architecture analyze the acquisition test result to it to the SDH Frame that receives, to simplify test process.Simultaneously, also adopt the parameter management method of characteristic matching among the present invention, made things convenient for the management of the parameter that needs in the test process, and be convenient to expansion.
The specific implementation of system of the present invention specifically comprises framer as shown in Figure 1, Figure 2, Figure 3 and Figure 4, and analyzer and test controller are described in detail each part respectively below in conjunction with accompanying drawing.
Framer:
Described framer is used to generate the SDH Frame that sends tested SDH logic to, i.e. STM (synchronous transmission piece), and this framer further comprises:
Parameter configuration module: preserve the parameter information that needs in the SDH logic testing process, promptly preserve the parameter of test process needs according to the characteristic attribute of parameter, and, send to framer according to the parameter that needs are tested in the concrete parameter value and the generation of characteristic of correspondence attribute of configuration; The pattern that is specially according to characteristic matching manages, and preserves initial value and user's Configuration Values of parameter;
The method that the realization of parameter attribute coupling is adopted is: manage according to the type feature (as Boolean type, character type, character string type, integer, floating type, double etc.) of the parameter characteristic information to parameter; Parameter information to SDH logic testing needs, can be according to its title, upper limit value and lower limit value, systems etc. carry out the concrete parameter configuration value of centralized configuration, the characteristic information of described Configuration Values and parameter is determined the parameter information that a test needs jointly, utilizes described parameter information can generate the SDH Frame that test needs; When needing to revise certain parameter value in the SDH logic testing process,, search and its currency is left in the parameter buffering area by name coupling; When other modules need be extracted the value of certain parameter, by the name coupling, search and take out its value at buffering area, for example when carrying out the pointer adjustment, need read the start frame and the parameters such as end frame, adjustment Status Flag of current pointer value, adjustment, at first in parameter buffer pointer array, obtain the pointer that points to the relevant parameter buffering area, quote these parameters by this pointer then, realize desired pointer adjustment function.
Initial message generation module: the parameter information that is used for preserving according to parameter configuration module generates the independently initial message of several and gives package module, and way, number, the length of initial message can be defined by the test subscriber voluntarily according to SDH logic testing needs;
Package module: be used for the initial message that initial message generation module is sent is carried out encapsulation process, and message after the encapsulation process is sent to into frame module, the user can select the pattern and the relevant parameters of encapsulation according to the test needs by parameter configuration module;
Described initial message generation module and package module are respectively as the filter of data buffer zone, the pipeline that is used as data channel between two filters is communicated with, and the data buffer zone of each filter correspondence is carried out the management of buffer size according to the buffer memory needs of reality by the pointer of upper strata array of pointers correspondence;
Concrete way to manage is:
Described filter is for adopting passive type filter pattern, and promptly follow-up filter is asked for data to the precursor filter;
Follow-up filter is by judging whether oneself is that sky is selected whether to ask for data to the precursor filter, and this operation can be finished by Get (obtaining) function;
Whether the inspection oneself of precursor filter is full, if discontented then ask for data to precursor filter more, otherwise provide data to follow-up filter, empty this filter simultaneously;
Data are assembled according to the parameter information that the user is provided with in filter.
Become frame module: carry out framing with the initial message after the encapsulation and handle, generate the SDH Frame, and put into shared data structure, give tested SDH logic; Described framing inside modules is divided into the container submodule again, virtual container submodule, tributary unit submodule and synchronous transmission piece submodule;
Wherein:
The container submodule: the initial message after will encapsulating is put into container, finishes the function of Virtual Concatenation, with the sequence number of the initial message in each road according to appointment, is mapped in the multichannel virtual container;
The virtual container submodule: the container that encapsulated message will be housed adds that path overhead is mapped to virtual container, perhaps tributary unit is multiplexed into high order virtual container, realize LCAS (Link Capacity Adjustment Scheme, Link Capacity Adjustment Scheme) agreement, finish cyclic redundancy check (CRC) and postpone processing capacity, the virtual container that requires to postpone is inserted deferred frame;
Tributary unit submodule: the low order virtual container is located the corresponding tributary unit of packing into through tributary pointer respectively, finish Tributary unit pointer and adjust function, pointer just negative direction adjustment continuously;
Synchronous transmission piece submodule locatees high order virtual container for the synchronous transmission piece of packing into through managing pointer, generates the SDH Frame, finishes Administrative Unit Pointer and adjusts function, pointer just negative direction adjustment continuously;
Described container submodule, virtual container submodule, tributary unit submodule and synchronous transmission piece submodule are respectively filter, and the same pipeline that adopts is communicated with between each submodule, forms a big framing filter jointly; The implementation method of filter repeats no more as described above herein.
Analyzer
Described analyzer is used for receiving described SDH Frame from tested SDH logic, and described SDH Frame is analyzed acquisition SDH logic testing result, and described analyzer further comprises:
Parameter parsing module: be used for the parameter of the test result analysis needs pattern according to characteristic matching is managed; It is identical with the management method of parameter configuration module parameter information that test process is needed in the framer that the realization of parameter attribute coupling can be adopted.
Separate frame module: be used for taking out the SDH Frame that tested SDH logic is sent, and it separated frame handle, send to decapsulation module afterwards from shared data structure;
The described frame module inside of separating is divided into synchronous transmission mould module again, virtual container submodule, tributary unit submodule and container submodule;
Wherein:
Synchronous transmission piece submodule: receive the SDH Frame that tested SDH logic is sent, check A1, A2, the B2 byte is checked Administrative Unit Pointer, extracts payload and sends to the virtual container submodule, record error message and parameter field;
Virtual container submodule: to the virtual container of carry data information, extract and check the path overhead byte, analyze the realization of LCAS agreement, extract container or tributary unit that payload is put into response, record error message and parameter field;
Tributary unit submodule: receive the SDH Frame information of each branch road respectively, check Tributary unit pointer, extract payload and send to the virtual container submodule, record error message and parameter field;
Container submodule: the container of carry data information is separated mapping handle the acquisition encapsulated message, and send to decapsulation module, record error message and parameter field;
Described synchronous transmission piece submodule, virtual container submodule, tributary unit submodule and container submodule are respectively as the filter of data buffer zone, and the pipeline that is used as data channel between each submodule is communicated with, and forms a big framing filter jointly; The realization of filter can adopt with framer in the identical method of corresponding submodule.
Decapsulation module: be used for encapsulated message is analyzed, record error message and parameter field carry out decapsulation then and handle the corresponding initial message of acquisition, and give initial message processing module (MPM);
Initial message processing module (MPM): be used for described initial message is carried out statistics and analysis, as cyclic redundancy check (CRC), packet counting etc.;
Described decapsulation module and initial message processing module (MPM) also are respectively a filter, also adopt pipeline to be communicated with between the two, and the implementation method of concrete filter as previously mentioned.
The specific implementation of method of the present invention is still referring to Fig. 4, on the computer of execution SDH logic testing, the emulator software of SDH logic testing system and tested SDH logic is two tasks, thereby realizes data communication and the synchronous whole test process of finishing the SDH logic testing between two tasks.Tested SDH logic becomes frame data or sends data to the test controller request by calling PLI (FPGA (Field Programmable Gate Array) interface) interface routine in BFM (bus functionality module, the Bus FunctionalModel) interface; The PLI interface routine is realized the communication between SDH logic testing system and the tested SDH logic (being emulator software), and communication data is by the shared data structure transmission.
Concrete SDH logic testing processing procedure comprises:
(1) when tested SDH logic need be obtained into frame data, at first send the request of obtaining the SDH Frame to the data exchange module of test controller by the PLI interface routine, fill in the related data of shared data structure simultaneously, information such as object module name for example, because the request of tested SDH logic is the SDH Frame of framer, so the object module of this moment is a framer;
(2) after test controller is received request, learn that from shared data structure corresponding object module is a framer, so the data exchange module of test controller to object module (being framer) transmitting order to lower levels, calls the message processing procedure of framer;
(3) framer calls its internal processes and generates the SDH Frame, and the data exchange module Message Processing in the notice test controller finishes, the SDH Frame that generates need be deposited in the shared data structure, so that tested SDH logic can be called described SDH Frame from shared data structure;
(4) its request of the data exchange module of test controller notice PLI interface routine is finished dealing with, promptly Qing Qiu SDH Frame has been deposited in and has been waited in the shared data structure that it reads, after the message that described PLI interface routine obtains asking to finish dealing with, from shared data structure, obtain described SDH Frame;
(5) described tested SDH logic is carried out transmission process to the SDH Frame, when tested SDH logic need be when analyzer sends the SDH Frame, then still send the request that sends message to the data exchange module of test controller by the PLI interface routine, fill in the related data of shared data structure simultaneously, the dateout of object module name, tested SDH logic etc. for example, the object module of this moment is an analyzer;
(6) after the data exchange module in the test controller obtains request, learn that from shared data structure object module is an analyzer, so, call the message processing procedure of described analyzer to the analyzer transmitting order to lower levels;
(7) after analyzer is received the order that issues, from shared data structure, obtain message, and call its internal processes data are analyzed, finally obtain SDH logic testing result.
The test subscriber can carry out configuration, modification, the renewal of the parameter information in framer or the analyzer by user's service module of test controller among the present invention, and can issue test command by described user's service module, starts test process etc.
The test result that analyzer described in the present invention obtains can also save as corresponding order will file by user's service module, checks in order to calling.
The above; only for the preferable embodiment of the present invention, but protection scope of the present invention is not limited thereto, and anyly is familiar with those skilled in the art in the technical scope that the present invention discloses; the variation that can expect easily or replacement all should be encompassed within protection scope of the present invention.Therefore, protection scope of the present invention should be as the criterion with the protection range of claims.
Claims (16)
1, a kind of system that realizes the SDH logic testing is characterized in that, comprising:
Test controller: link to each other with framer and analyzer respectively, be used for issuing test command, reach the test result that the receiving and analyzing device reports to framer;
Framer: the order that is used for issuing according to test controller is treated to the synchronous transmission piece with initial message and sends to tested SDH logic;
Analyzer: receive from tested SDH logic and obtain the synchronous transmission piece that transmission comes, and the corresponding initial message of dissection process acquisition, will handle the initial message of acquisition again and expect that the initial message that receives compares the test result of analyzing definite tested SDH logic.
2, the system of realization SDH according to claim 1 logic testing is characterized in that:
Described framer also links to each other with tested SDH logic by shared data structure with analyzer, is used for the data communication between framer or analyzer and tested SDH logic.
3, the system of realization SDH according to claim 1 logic testing is characterized in that described framer also comprises:
Parameter configuration module: be used for preserving the parameter of test process needs, and generate the parameter of testing needs, send to framer according to the concrete parameter value and the characteristic of correspondence attribute of configuration according to the characteristic attribute of parameter.
4, according to the system of claim 1,2 or 3 described realization SDH logic testings, it is characterized in that described framer further comprises:
Initial message generation module: be used to generate the independently initial message of several, and send to package module;
Package module: described initial message is carried out sending to into frame module after the encapsulation process;
Become frame module: the initial message after the encapsulation that will obtain is handled and is generated corresponding SDH Frame, and sends to tested SDH logic.
5, the system of realization SDH according to claim 4 logic testing, it is characterized in that, described parameter configuration module is also linked to each other by message generation module, package module and one-tenth frame module with described respectively, is used for sending its corresponding processing procedure parameters needed information to described each module.
6, the system of realization SDH according to claim 4 logic testing is characterized in that described one-tenth frame module further comprises:
The container submodule: the initial message after will encapsulating is put into container;
The virtual container submodule: the container that encapsulated message will be housed adds path overhead composition virtual container, and the tributary unit that the low order virtual container maybe will be housed adds path overhead composition high order virtual container;
Tributary unit submodule: the virtual container of low order is respectively charged into corresponding tributary unit;
Synchronous transmission piece submodule: with the multiplexing generation of high order virtual container SDH Frame.
7, according to the system of claim 1,2 or 3 described realization SDH logic testings, it is characterized in that described analyzer comprises:
The parameter parsing module: be used for preserving the pre-period parameters that carries out the test result analysis needs according to the characteristic attribute of parameter, the actual parameter that will extract from the SDH frame that tested SDH logic receives is relatively determined test result with pre-period parameters.
8, the system of realization SDH according to claim 7 logic testing is characterized in that described analyzer further comprises:
Separate frame module: be used for that the SDH Frame that receives from tested SDH logic is separated frame and handle, and result is sent to decapsulation module;
Decapsulation module: be used for carrying out decapsulation and handling, and the initial message that obtains is handled in decapsulation sent to initial message processing module (MPM) to separating encapsulated message that frame module sends;
Initial message processing module (MPM): the initial message that receives is carried out statistical analysis, obtain to carry out the information that test result analysis needs.
9, the system of realization according to claim 8 SDH logic testing is characterized in that, described parameter parsing module also with separate frame module, decapsulation module and initial message processing module (MPM) and link to each other, obtain the parameter information in the processing procedure of each module correspondence.
10, the system of realization SDH according to claim 7 logic testing is characterized in that the described frame module of separating further comprises:
Synchronous transmission piece submodule: receive the SDH Frame that tested SDH logic is sent, and isolate high order virtual container, send to the virtual container submodule;
Virtual container submodule: the virtual container of carry data information is carried out demultiplexing processing acquisition cell therefor or tributary unit;
Tributary unit submodule: receive the tributary unit of each branch road respectively, and extract the low order virtual container and send to the virtual container submodule;
Container submodule: the container of carry data information is handled the acquisition encapsulated message, and send to decapsulation module.
11, a kind of method that realizes the SDH logic testing is characterized in that, comprising:
A, tested SDH logic send the request of SDH Frame to test controller, and issue test command by test controller to framer;
After B, framer are received described order, carry out inter-process and generate corresponding SDH Frame, and send to tested SDH logic;
C, tested SDH logical process also transmit described SDH Frame, and send the transmission message request to controller, are carried out the reception of SDH Frame by controller notification analysis device and handle;
D, analyzer receive described SDH Frame and carry out analyzing and processing, obtain SDH logic testing result.
12, the method for realization SDH according to claim 11 logic testing is characterized in that:
Described step B comprises:
Described framer will send to tested SDH logic by shared data structure according to the SDH Frame that test parameter information generates, and the notice of the described test controller of described tested SDH logical foundation is obtained the SDH Frame from shared data structure;
Described step D comprises:
Analyzer receives the SDH Frame that tested SDH logic is sent by shared data structure.
13, according to the method for claim 11 or 12 described realization SDH logic testings, it is characterized in that this method also comprises:
E, in the parameter processing module of the parameter configuration module of framer and analyzer, preserve the characteristic information of each test respectively with parameter, and the Configuration Values information of each parameter, can determine to test the parameter information of usefulness according to the Configuration Values information of described parameter and the characteristic information of parameter.
14, the method for realization SDH according to claim 13 logic testing is characterized in that described step e also comprises:
The test subscriber makes amendment to the configuration information of the parameter of preserving respectively in the parameter processing module of the parameter configuration module of framer and analyzer by test controller.
15, the method for realization SDH according to claim 13 logic testing is characterized in that described step e also comprises:
In the parameter processing module of the parameter configuration module of framer and analyzer, preserve the initial value of the configuration information of parameter respectively.
16, according to the method for claim 11 or 12 described realization SDH logic testings, it is characterized in that described step B and step D also comprise:
As the filter of data buffer zone, each filter corresponding buffer region is managed by the size of the pointer in the corresponding upper array of pointers to buffering area according to the buffer memory needs respectively for each module that described framer or analyzer comprise or submodule.
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Cited By (8)
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| CN101908985A (en) * | 2010-08-05 | 2010-12-08 | 中兴通讯股份有限公司 | Message checking method and device |
| CN101227237B (en) * | 2008-01-31 | 2012-02-08 | 中兴通讯股份有限公司 | Apparatus and method for implementing synchronizing digital hierarchy instrument |
| CN101645735B (en) * | 2008-08-05 | 2012-04-04 | 中兴通讯股份有限公司 | Method and system for automatically detecting fit of time slot services of synchronous digital hierarchy equipment |
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| CN106817160A (en) * | 2017-02-16 | 2017-06-09 | 国网江苏省电力公司无锡供电公司 | Network management controller and non-intervention type optical fiber link cloud monitoring system |
| CN107318057A (en) * | 2017-07-31 | 2017-11-03 | 广东中云海科技有限公司 | Digital baseband signal subdivision connects transmission switching matrix system |
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| JP2001127729A (en) * | 1999-10-28 | 2001-05-11 | Nec Eng Ltd | Testing device for sdh transmission device |
| JP3689295B2 (en) * | 2000-01-19 | 2005-08-31 | アンリツ株式会社 | SDH test equipment |
| US6973599B2 (en) * | 2001-09-28 | 2005-12-06 | Agilent Technologies, Inc. | Method of and system for constructing valid data for memory-based tests |
| US6961317B2 (en) * | 2001-09-28 | 2005-11-01 | Agilent Technologies, Inc. | Identifying and synchronizing permuted channels in a parallel channel bit error rate tester |
| EP1367750A1 (en) * | 2002-05-30 | 2003-12-03 | Agilent Technologies, Inc. - a Delaware corporation - | Testing network communications |
| CN100334430C (en) * | 2003-01-28 | 2007-08-29 | 华为技术有限公司 | Bonding jitter automatically testing method and system |
| GB2400770B (en) * | 2003-04-17 | 2006-03-22 | Agilent Technologies Inc | Testing network communications |
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| CN101227237B (en) * | 2008-01-31 | 2012-02-08 | 中兴通讯股份有限公司 | Apparatus and method for implementing synchronizing digital hierarchy instrument |
| CN101645735B (en) * | 2008-08-05 | 2012-04-04 | 中兴通讯股份有限公司 | Method and system for automatically detecting fit of time slot services of synchronous digital hierarchy equipment |
| CN101369847B (en) * | 2008-09-19 | 2012-06-06 | 中兴通讯股份有限公司 | Optical port active volume computing method |
| CN101908985A (en) * | 2010-08-05 | 2010-12-08 | 中兴通讯股份有限公司 | Message checking method and device |
| CN101908985B (en) * | 2010-08-05 | 2016-06-29 | 中兴通讯股份有限公司 | A kind of method of message checking and device |
| CN105553601A (en) * | 2015-12-09 | 2016-05-04 | 浪潮电子信息产业股份有限公司 | SDH framer design method for highly reusable verification platform |
| CN105553601B (en) * | 2015-12-09 | 2019-06-25 | 浪潮电子信息产业股份有限公司 | For the SDH framer design method of the verification platform of height reusability |
| CN106817160A (en) * | 2017-02-16 | 2017-06-09 | 国网江苏省电力公司无锡供电公司 | Network management controller and non-intervention type optical fiber link cloud monitoring system |
| CN106817160B (en) * | 2017-02-16 | 2019-06-18 | 国网江苏省电力公司无锡供电公司 | Network management controller and non-intervention type optical fiber link cloud monitor system |
| CN107318057A (en) * | 2017-07-31 | 2017-11-03 | 广东中云海科技有限公司 | Digital baseband signal subdivision connects transmission switching matrix system |
| CN107517170A (en) * | 2017-07-31 | 2017-12-26 | 广东中云海科技有限公司 | Redundant system and splicing system for polymorphic type, multi tate baseband signal |
| CN107318057B (en) * | 2017-07-31 | 2023-09-05 | 广东中云海科技有限公司 | Digital baseband signal multiplexing transmission switching matrix system |
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