CN1755835B - 具有改进的阵列稳定性的集成电路芯片 - Google Patents
具有改进的阵列稳定性的集成电路芯片 Download PDFInfo
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- CN1755835B CN1755835B CN 200510083278 CN200510083278A CN1755835B CN 1755835 B CN1755835 B CN 1755835B CN 200510083278 CN200510083278 CN 200510083278 CN 200510083278 A CN200510083278 A CN 200510083278A CN 1755835 B CN1755835 B CN 1755835B
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Claims (49)
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
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US10/950,940 US7295457B2 (en) | 2002-11-29 | 2004-09-27 | Integrated circuit chip with improved array stability |
US10/950,940 | 2004-09-27 |
Publications (2)
Publication Number | Publication Date |
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CN1755835A CN1755835A (zh) | 2006-04-05 |
CN1755835B true CN1755835B (zh) | 2011-11-23 |
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CN 200510083278 Active CN1755835B (zh) | 2004-09-27 | 2005-07-08 | 具有改进的阵列稳定性的集成电路芯片 |
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Families Citing this family (2)
Publication number | Priority date | Publication date | Assignee | Title |
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US7423446B2 (en) * | 2006-08-03 | 2008-09-09 | International Business Machines Corporation | Characterization array and method for determining threshold voltage variation |
US10056390B1 (en) * | 2017-04-20 | 2018-08-21 | Taiwan Semiconductor Manufacturing Co., Ltd. | FinFET SRAM having discontinuous PMOS fin lines |
Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5930163A (en) * | 1996-12-19 | 1999-07-27 | Kabushiki Kaisha Toshiba | Semiconductor memory device having two P-well layout structure |
US6027978A (en) * | 1997-01-28 | 2000-02-22 | Advanced Micro Devices, Inc. | Method of making an IGFET with a non-uniform lateral doping profile in the channel region |
US6621325B2 (en) * | 2001-09-18 | 2003-09-16 | Xilinx, Inc. | Structures and methods for selectively applying a well bias to portions of a programmable device |
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- 2005-07-08 CN CN 200510083278 patent/CN1755835B/zh active Active
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5930163A (en) * | 1996-12-19 | 1999-07-27 | Kabushiki Kaisha Toshiba | Semiconductor memory device having two P-well layout structure |
US6027978A (en) * | 1997-01-28 | 2000-02-22 | Advanced Micro Devices, Inc. | Method of making an IGFET with a non-uniform lateral doping profile in the channel region |
US6621325B2 (en) * | 2001-09-18 | 2003-09-16 | Xilinx, Inc. | Structures and methods for selectively applying a well bias to portions of a programmable device |
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CN1755835A (zh) | 2006-04-05 |
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Owner name: MICROSOFT TECHNOLOGY LICENSING LLC Free format text: FORMER OWNER: MICROSOFT CORP. Effective date: 20150427 |
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Effective date of registration: 20150427 Address after: Washington State Patentee after: Micro soft technique license Co., Ltd Address before: Washington State Patentee before: Microsoft Corp. |