CN1747620A - Laminated structure of printing circuit board and multi-laminate laminated structure - Google Patents
Laminated structure of printing circuit board and multi-laminate laminated structure Download PDFInfo
- Publication number
- CN1747620A CN1747620A CN 200410079933 CN200410079933A CN1747620A CN 1747620 A CN1747620 A CN 1747620A CN 200410079933 CN200410079933 CN 200410079933 CN 200410079933 A CN200410079933 A CN 200410079933A CN 1747620 A CN1747620 A CN 1747620A
- Authority
- CN
- China
- Prior art keywords
- layer
- circuit board
- printed circuit
- plane
- floor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Images
Landscapes
- Structure Of Printed Boards (AREA)
- Production Of Multi-Layered Print Wiring Board (AREA)
Abstract
A laminated structure for PCB is composed of ground layer, power supply layer, power supply layer and ground layer. Said two power supply layers between two grounding layers are positioned symmetrically at central position of whole PCB. A 12-layer PCB is composed of the 6th and the 7th power supply layers, the second, the 5th, the 8th and 11th ground layer, and the first, the third, the 4th, the 9th, the 10th and the 12th signal layers. The 14-layer and 16-layer PCBs are also disclosed.
Description
Technical field
The present invention relates to the laminated construction layer of printed circuit board and the laminated construction of corresponding 12,14,16 layers of printed circuit board thereof.
Background technology
Along with high-speed development of science and technology, the integrated level and the complexity of chip are more and more higher, and the design of printing board PCB has following characteristics:
(1) signal rate of the last transmission of PCB high more come high more, from original several MHZ to tens MHZ, even several GHZ till now.
(2) also from original several kinds more than ten till now, the electric pressure on the PCB is more and more lower for the kind of the power supply on the PCB, and power is increasing.
(3) the signal interconnection density on the PCB is also increasing.
This just has higher requirement to the each side such as signal integrity, power supply integrality and Electro Magnetic Compatibility of PCB.
As shown in Figure 1, common multi-layer sheet is by being made up of top layer Copper Foil 1, prepreg 2, central layer 3, and prepreg 2 is media of not being with Copper Foil 1, central layer 3 two sides are with Copper Foil 31, in the middle of the central layer 3 is dielectric material 32, and promptly central layer 3 is simple double sided boards, and Fig. 1 has shown one four laminate.
Its laminated construction from top to bottom is: upper epidermis Copper Foil 1, Copper Foil 31, Copper Foil 31, following top layer Copper Foil 1.
Laminating from top to bottom of various materials is: Copper Foil, medium, Copper Foil, medium, Copper Foil, medium, Copper Foil.
Multi-layer PCB board alternately is overrided to form six veneer structures as shown in Figure 2 by prepreg 2 and central layer 3.
The circuit of being laid on the circuit board of each in the pcb board layer mainly is divided into three kinds of stack types: bus plane, ground plane layer and signals layer.Any signal in the circuit board wiring all must have a return flow path, makes signal flow back to the source end.In general, the minimum path of impedance is always selected in the backflow of high speed signal, and therefore, the bus plane adjacent with signals layer, ground plane layer are owing to be the plane of bulk, and impedance is very little, becomes the optimal path that signal refluxes.We can be referred to as reference planes for signal provides the plane of low-impedance return flow path with this.
Existing board layer design, generally the adjacent layer at signals layer has 1-2 layer bus plane or ground plane layer as the reference plane.If but power plane can be brought a lot of problems as the reference planes of high speed signal.Because circuit board all has multiple power supply, as 5v, 3.3v, 1.8v, 2.5v etc., and a lot of power supplys are just powered to circuit board top device, therefore, general way is to hold several different power supplys simultaneously to be placed on same bus plane and to lay, and when design, separates by fluting between the different power supplys, to guarantee the insulation between each power supply, be referred to as to cut apart.But because cut apart if adjacent signals layer has holding wire to cross over this this cutting apart, as shown in Figure 3, just can't cut apart fluting in the backflow of bus plane so, can only detour by this; After detouring, the loop of whole signal code has just strengthened significantly, as shown in Figure 3, signal AB is when power plane refluxes, because the existence of groove has to move along concentrated flow at the circuit that power plane refluxes, for signal CD, also have to move along concentrated flow at the circuit that power plane refluxes, this has just brought following shortcoming:
1, increases the current loop area, strengthened loop inductance, the signal waveform of output is vibrated easily;
2, increase is subject to the influence of space magnetic field simultaneously to the radiated interference in space;
3, other circuit produces the possibility of magnetic field coupling on increasing and the circuit board;
4, the high frequency pressure drop on the loop inductance constitutes the common mode radiation source, and produces common mode radiation by external cable.
This impedance Control for the needs strictness, for the HW High Way of strip line model cabling, also can destroy the strip line model because of last plane or lower plane or the fluting of going up lower plane, cause the discontinuous of impedance, destroy signal integrity.
Summary of the invention
The object of the present invention is to provide signal, printed circuit board that the power supply integrality is good, avoid holding wire to stride and cut apart, to overcome deficiency of the prior art.
Printed circuit board laminating method of the present invention is: in described printed circuit board, comprise that an order is the laminated construction of ground plane layer, bus plane, bus plane, ground plane layer, described two bus planes fold up between described ground plane layer.
Described each bus plane is adjacent with a ground plane layer at least;
Described two bus planes are positioned at the centre position of each layer of printed circuit board;
The type of symmetrical each lamination of the upper and lower side of described bus plane is identical, and laminated construction is symmetry fully;
Each signals layer of described printed circuit board is all adjacent with at least one ground plane layer;
A kind of Floor 12 printed circuit board laminated structure is: layer 6, layer 7 are bus plane; The second layer, layer 5, the 8th layer, eleventh floor are ground plane layer; Ground floor, the 3rd layer, the 4th layer, the 9th layer, the tenth layer, Floor 12 are signals layer;
Conductive layer thickness in first, the ten binary signal layers of described printed circuit board is in 1.8 ± 0.7mil scope, and the conductive layer thickness of other each layer is in 1.4 ± 0.7mil scope.
A kind of 14 layers of printed circuit board laminated structure are: layer 7, the 8th layer are bus plane; The second layer, the 4th layer, layer 6, the 9th layer, eleventh floor, the 13 layer are ground plane layer; Ground floor, the 3rd layer, layer 5, the tenth layer, Floor 12, the 14 layer are signals layer;
Conductive layer thickness is in 1.4 ± 0.7mil scope in each of described printed circuit board layer, and the 3rd, five, ten, ten binary signal layers are identical with the dielectric thickness that is adjacent between the plane layer.
A kind of 16 layers of printed circuit board laminated structure are: the 8th layer, the 9th layer is bus plane; The second layer, layer 5, layer 7, the tenth layer, Floor 12, the 15 layer are ground plane layer; Ground floor, the 3rd layer, the 4th layer, layer 6, eleventh floor, the 13 layer, the 14 layer, the 16 layer are signals layer;
Conductive layer thickness in first, 16 signals layers of described printed circuit board is in 1.8 ± 0.7mil scope, and the conductive layer thickness of other each layer is in 1.4 ± 0.7mil scope;
In the described signals layer, layer 6 and eleventh floor are fit to transfer clock, high speed signal; The written or printed documents beneficial effect of the invention is:
In the present invention, bus plane folds up between ground plane layer, electromagnetic wave on the bus plane is easier to be absorbed by ground plane layer, prevent that the electromagenetic wave radiation on the bus plane from going out, bus plane is only adjacent with ground plane layer or bus plane, formed the lamination order of ground plane layer, bus plane, bus plane, ground plane layer, make each bus plane all have a ground plane layer adjacent, form a bigger plane capacitance, this plane capacitance can leach the high frequency electric source noise on the bus plane effectively, thereby improves the high frequency performance of power supply.
Because ground plane layer is complete plane, without the reference power source plane, the reference planes of each signals layer all are ground, can avoid high speed signal to stride fully and cut apart, avoid holding wire to stride effectively and cut apart the electromagnetic radiation that brings, so more help the impedance of control signal wire.
Bus plane is positioned at the stacked position, centre of printed circuit board, the stack type of the symmetrical stacked position of the upper and lower side of bus plane is identical, so just can make laminated construction symmetrical fully, promptly from top to bottom put in order just the same with putting in order from top to bottom, the laminated construction of symmetry helps the inner lamination stress equilibrium of pcb board, be not easy to cause the plate distortion, further improve practicality of the present invention.
Description of drawings
Fig. 1 is the lamination generalized section of four laminates in the prior art;
Fig. 2 is the lamination generalized section of six laminates in the prior art;
Fig. 3 is cut apart the schematic diagram of crosstalking that fluting causes signal for power plane in the prior art;
Fig. 4 is embodiment 1 a laminated construction schematic diagram;
Fig. 5 is embodiment 2 laminated construction schematic diagrames;
Fig. 6 is embodiment 3 laminated construction schematic diagrames.
Embodiment
With embodiment the present invention is described in further detail with reference to the accompanying drawings below: describe for convenient, with S (Signal) representation signal layer, P (Power) represents bus plane, G (GND) represents ground plane layer, conductive layer ordering successively from top to bottom with laminated construction, for example ground floor is a signals layer, is called S1; The second layer is a ground plane layer, is called G2; The 3rd layer is bus plane, is called P3 or the like.
Embodiment 1:
According to Fig. 4, a kind of laminated construction of Floor 12 printed circuit board is: layer 6, layer 7 are bus plane; The second layer, layer 5, the 8th layer, eleventh floor are ground plane layer; Ground floor, the 3rd layer, the 4th layer, the 9th layer, the tenth layer, Floor 12 are signals layer.
By shown in Figure 4, layer 5 to the is ground plane layer G5, bus plane P6, bus plane P7, ground plane layer G8 for eight layers in regular turn, bus plane P6 and bus plane P7 are positioned at the intermediate laminate position of this printed circuit board, the laminated construction symmetry of bus plane P6, the upper and lower side of P7, promptly from top to bottom put in order just the samely with putting in order from top to bottom, be to be the laminated construction of symmetry axis with bus plane P6, P7.
Bus plane P6, P7 are clipped in the middle of ground plane layer G5, the G8, make each bus plane P6, P7 all have a ground plane layer adjacent, form a big plane capacitance; Simultaneously, the electromagnetic wave on the power plane is easier to be absorbed by ground, prevents that the electromagenetic wave radiation on the power plane from going out.
When power type is more, this laminated construction wraps in bus plane P6, P7 in the middle of ground plane layer G5, the G8, because ground plane layer is complete plane, the reference planes of each signals layer all are ground plane layer, do not exist and stride the phenomenon of cutting apart, so more help the impedance of control signal wire.
As shown in table 1, be each lamination of Floor 12 plate of a 2.0mm and material, the thickness table of associated media.
Material | Lamination | Thickness (unit: mil) |
COPPER | S1 | 1.8+/-0.7 |
FR-4 | 3.66+/-1.0 | |
COPPER | G2 | 1.4+/-0.7 |
FR-4 | 5.12+/-1.0 |
COPPER | S3 | 1.4+/-0.7 |
FR-4 | 7.55+/-1.0 | |
COPPER | S4 | 1.4+/-0.7 |
FR-4 | 5.12+/-1.0 | |
COPPER | G5 | 1.4+/-0.7 |
FR-4 | 5.39+/-1.0 | |
COPPER | P6 | 1.4+/-0.7 |
FR-4 | 5.12+/-1.0 | |
COPPER | P7 | 1.4+/-0.7 |
FR-4 | 8.38+/-1.0 | |
COPPER | G8 | 1.4+/-0.7 |
FR-4 | 5.12+/-1.0 | |
COPPER | S9 | 1.4+/-0.7 |
FR-4 | 7.56+/-1.0 | |
COPPER | S10 | 1.4+/-0.7 |
FR-4 | 5.12+/-1.0 | |
COPPER | G11 | 1.4+/-0.7 |
FR-4 | 3.66+/-1.0 | |
COPPER | S12 | 1.8+/-0.7 |
Table 1
Cabling live width and the impedance Control parameter of signals layer S are as shown in table 4.
Lamination | Live width/spacing (mil) | Impedance (ohm) | |
Single line | S1、S12 | 5.0 | 55+/-10% |
S3、S4、S9、S10 | 5.0 | 55+/-10% | |
Differential lines | S1、S12 | 5.4/9.6 | 100+/-10% |
S3、S4、S9、S10 | 5.2/9.8 | 100+/-10% |
Table 4
Above-mentioned cabling live width and spacing can also increase and decrease 1.0mil about last table numerical value.Above-mentioned design parameter can be in about 55 ohm on control single line under the 2.0mm thickness of slab situation, about 100 ohm of differential lines.
Embodiment 2:
A kind of 14 layers of printed circuit board as shown in Figure 5, laminated construction is: layer 7, the 8th layer are bus plane; The second layer, the 4th layer, layer 6, the 9th layer, eleventh floor, the 13 layer are ground plane layer; Ground floor, the 3rd layer, layer 5, the tenth layer, Floor 12, the 14 layer are signals layer.
By shown in Figure 5, layer 6 to the is the laminated layer sequence of ground plane layer G6, bus plane P7, bus plane P8, ground plane layer G9 for nine layers in regular turn, bus plane P7 and bus plane P8 are positioned at the intermediate laminate position of this printed circuit board, bus plane P7, the upper and lower side of P8 to the laminated construction symmetry, promptly from top to bottom put in order just the same with putting in order from top to bottom, be to be the laminated construction of symmetry axis with bus plane P7, P8, signals layer S3, S5, S10, S12 are sandwiched between each ground plane layer G.
Two incomplete, have bus plane P7, the P8 cut apart to be placed on middle, the top of bus plane P7 is the following ground plane layer G9 of being of ground plane layer G6, bus plane P8, so just two bus plane P7, P8 are clipped between two ground plane layer G6, the G9, any signals layer not can with these two have bus plane P7, the P8 cut apart adjacent, avoided effectively striding cutting apart.Two whole conductively-closeds of bus plane P7, P8, effectively shielded power supply layer P7, P8 to external radiation, reduce the electromagnetic interference of whole printed circuit board.
Simultaneously, the adjacent layer of signals layers such as S1, S14, S3, S5, S10, S12 all is complete ground level, does not have the problem of cutting apart of striding.
As shown in table 2, be that a thickness of slab is each lamination of 14 laminates of 2.5mm and material, the thickness table of associated media.
Material | Lamination | Thickness (unit: mil) |
COPPER | S1 | 1.4+/-0.7 |
FR-4 | 4.5+/-1.0 | |
COPPER | G2 | 1.4+/-0.7 |
FR-4 | 8.27+/-1.0 | |
COPPER | S3 | 1.4+/-0.7 |
FR-4 | 6.7+/-1.0 | |
COPPER | G4 | 1.4+/-0.7 |
FR-4 | 8.27+/-1.0 | |
COPPER | S5 | 1.4+/-0.7 |
FR-4 | 6.7+/-1.0 |
COPPER | G6 | 1.4+/-0.7 |
FR-4 | 5.12+/-1.0 | |
COPPER | P7 | 1.4+/-0.7 |
FR-4 | 9.4+/-1.0 | |
COPPER | P8 | 1.4+/-0.7 |
FR-4 | 5.12+/-1.0 | |
COPPER | G9 | 1.4+/-0.7 |
FR-4 | 6.7+/-1.0 | |
COPPER | S10 | 1.4+/-0.7 |
FR-4 | 8.27+/-1.0 | |
COPPER | G11 | 1.4+/-0.7 |
FR-4 | 6.7+/-1.0 | |
COPPER | S12 | 1.4+/-0.7 |
FR-4 | 8.27+/-1.0 | |
COPPER | G13 | 1.4+/-0.7 |
FR-4 | 4.5+/-1.0 | |
COPPER | S14 | 1.4+/-0.7 |
Table 2
Wherein, dielectric material, thickness between signals layer S3, S5, S10, S12 and adjacent two ground plane layer are identical, thereby can guarantee the impedance unanimity of these four signals layer S3, S5, S10, S12 cabling, be 4.5mil by adjusting signals layer S1, S14 to the dielectric thickness of adjacent layer simultaneously, make this two layer signal to other impedance basically identicals of four layers, thereby reduce the reflection of signal between signals layer effectively.
Cabling live width and the impedance Control parameter of signals layer S are as shown in table 5.
Signals layer | Live width/spacing (mil) | Impedance (ohm) | |
Single line | S1、S14、 | 6.0 | 50 |
S3、S5、S10、 S12 | 5.0 | 50 | |
Differential lines | S1、S14、 | 5.0/8.0 | 100 |
S3、S5、S10、 S12 | 4.5/8.0 | 100 |
Table 5
Above-mentioned cabling live width and spacing can also increase and decrease 1.0mil about last table numerical value.Every layer of single line impedance in the present embodiment all is controlled at 50 ohm, and differential impedance all is controlled at 100 ohm, when holding wire changes layer like this, avoided the discontinuous generation of impedance, reduces the generation of signal reflex.
Embodiment 3:
According to Fig. 6, a kind of 16 layers of printed circuit board laminated structure are: the 8th layer, the 9th layer is bus plane; The second layer, layer 5, layer 7, the tenth layer, Floor 12, the 15 layer are ground plane layer; Ground floor, the 3rd layer, the 4th layer, layer 6, eleventh floor, the 13 layer, the 14 layer, the 16 layer are signals layer.
By shown in Figure 6, the 7th layer to the 10th layer laminated layer sequence that includes a ground plane layer G7, bus plane P8, bus plane P9, ground plane layer G10, bus plane P8 and bus plane P9 are positioned at the intermediate laminate position of this printed circuit board, the laminated construction symmetry of bus plane P8, the upper and lower side of P9, promptly from top to bottom put in order just the same with putting in order from top to bottom, be to be the laminated construction of symmetry axis with bus plane P8, P9, the laminated construction of symmetry is not easy to cause the pcb board distortion.
Two bus plane P8, P9 wrap in the middle of two ground plane layer G7, the G10, all signals layer S are adjacent with ground plane layer G, and can be not adjacent with bus plane P, signal on all signals layer S can not stride the power supply cut-off rule, thereby avoided high speed signal to cross over the power supply cut-off rule and the problem of aspects such as the signal integrity that causes and Electro Magnetic Compatibility.
Bus plane P8, P9 are adjacent with ground plane layer G7, G10 respectively, bus plane P8, P9, ground plane layer G7, G10 have formed a plane capacitance with corresponding medium, this plane capacitance can leach the high frequency electric source noise on bus plane P8, the P9 effectively, thereby improves the high frequency performance of power supply.
Signals layer S6, S11 are clipped between two ground plane layer G, and be not adjacent with other signals layers S, can be suitable for crucial HW High Way such as transfer clock, high speed signal, can not produce interference to the signal of other signals layers S or disturbed by other signal.
As shown in table 3, be each lamination of 16 laminates of a 3.0mm and material, the thickness table of associated media.
Material | Lamination | Thickness (unit: mil) |
COPPER | S1 | 1.8+/-0.7 |
FR-4 | 3.8+/-1.0 | |
COPPER | G2 | 1.4+/-0.7 |
FR-4 | 5.1+/-1.0 | |
COPPER | S3 | 1.4+/-0.7 |
FR-4 | 8.8+/-1.0 | |
COPPER | S4 | 1.4+/-0.7 |
FR-4 | 5.1+/-1.0 | |
COPPER | G5 | 1.4+/-0.7 |
FR-4 | 8.8+/-1.0 | |
COPPER | S6 | 1.4+/-0.7 |
FR-4 | 5.1+/-1.0 | |
COPPER | G7 | 1.4+/-0.7 |
FR-4 | 8.8+/-1.0 | |
COPPER | P8 | 1.4+/-0.7 |
FR-4 | 10.43+/-1.0 | |
COPPER | P9 | 1.4+/-0.7 |
FR-4 | 8.8+/-1.0 | |
COPPER | G10 | 1.4+/-0.7 |
FR-4 | 5.1+/-1.0 | |
COPPER | S11 | 1.4+/-0.7 |
FR-4 | 8.8+/-1.0 | |
COPPER | G12 | 1.4+/-0.7 |
FR-4 | 5.1+/-1.0 | |
COPPER | S13 | 1.4+/-0.7 |
FR-4 | 8.8+/-1.0 | |
COPPER | S14 | 1.4+/-0.7 |
FR-4 | 5.1+/-1.0 | |
COPPER | G15 | 1.4+/-0.7 |
FR-4 | 3.8+/-1.0 | |
COPPER | S16 | 1.8+/-0.7 |
Table 3
Cabling live width and the impedance Control parameter of signals layer S are as shown in table 6, and cabling live width and spacing can increase and decrease 1.0mil about following table numerical value.
Signals layer | Live width/spacing (mil) | Impedance (ohm) | |
Single line | S1、S16、 | 6.0 | 50 |
S3、S4、S13、S14 | 5.0 | 50 | |
S6、S11 | 5.0 | 50 | |
Differential lines | S1、S16、 | 5.0/9.0 | 100 |
S3、S4、S13、S14 | 4.5/9.5 | 100 | |
S6、S11 | 4.5/9.5 | 100 |
Table 6
Signals layer S3, S4, and signals layer S13, S14 be adjacent structure in twos, will note controlling the direction of routing of adjacent signals layer S when connecting up, and avoids also walking line of long distance, with the generation that prevents to disturb as far as possible.
Every layer of single line impedance in the present embodiment all is controlled at about 50 ohm, and differential impedance all is controlled at about 100 ohm, when holding wire changes layer like this, avoided the discontinuous generation of impedance, reduces the generation of signal reflex as far as possible.
Claims (11)
1. the laminated construction of a printed circuit board, it is characterized in that: in described printed circuit board, comprise that an order is the laminated construction of ground plane layer, bus plane, bus plane, ground plane layer, described two bus planes fold up between described ground plane layer.
2. the laminated construction of printed circuit board according to claim 1, it is characterized in that: described each bus plane is adjacent with a ground plane layer at least.
3. the laminated construction of printed circuit board according to claim 1, it is characterized in that: described two bus planes are positioned at the centre position of each layer of printed circuit board.
4. the laminated construction of printed circuit board according to claim 3, it is characterized in that: the type of symmetrical each lamination of the upper and lower side of described bus plane is identical, and laminated construction is symmetry fully.
5. according to the laminated construction of claim 1 or 2 or 3 or 4 described printed circuit boards, it is characterized in that: each signals layer of described printed circuit board is all adjacent with at least one ground plane layer.
6. Floor 12 printed circuit board laminated structure is characterized in that: comprise following each layer in the described printed circuit board:
Layer 6, layer 7 are bus plane;
The second layer, layer 5, the 8th layer, eleventh floor are ground plane layer;
Ground floor, the 3rd layer, the 4th layer, the 9th layer, the tenth layer, Floor 12 are signals layer.
Floor 12 printed circuit board laminated structure according to claim 6 is characterized in that:
Conductive layer thickness in first, the ten binary signal layers of described printed circuit board is in 1.8 ± 0.7mil scope, and the conductive layer thickness of other each layer is in 1.4 ± 0.7mil scope.
8. 14 layers of printed circuit board laminated structure is characterized in that: in the described printed circuit board, comprise following each layer:
Layer 7, the 8th layer are bus plane;
The second layer, the 4th layer, layer 6, the 9th layer, eleventh floor, the 13 layer are ground plane layer;
Ground floor, the 3rd layer, layer 5, the tenth layer, Floor 12, the 14 layer are signals layer.
9. 14 layers of printed circuit board laminated structure according to claim 8 is characterized in that:
Conductive layer thickness is in 1.4 ± 0.7mil scope in each of described printed circuit board layer, and the 3rd, five, ten, ten binary signal layers are identical with the dielectric thickness that is adjacent between the plane layer.
10. 16 layers of printed circuit board laminated structure is characterized in that: in the described printed circuit board, comprise following each layer:
The 8th layer, the 9th layer is bus plane;
The second layer, layer 5, layer 7, the tenth layer, Floor 12, the 15 layer are ground plane layer;
Ground floor, the 3rd layer, the 4th layer, layer 6, eleventh floor, the 13 layer, the 14 layer, the 16 layer are signals layer.
11. 16 layers of printed circuit board laminated structure according to claim 10, it is characterized in that: the conductive layer thickness in first, 16 signals layers of described printed circuit board is in 1.8 ± 0.7mil scope, and the conductive layer thickness of other each layer is in 1.4 ± 0.7mil scope.
12. 16 layers of printed circuit board laminated structure according to claim 10 is characterized in that: in the described signals layer, layer 6 and eleventh floor are fit to transfer clock, high speed signal.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN 200410079933 CN1747620A (en) | 2004-09-08 | 2004-09-08 | Laminated structure of printing circuit board and multi-laminate laminated structure |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN 200410079933 CN1747620A (en) | 2004-09-08 | 2004-09-08 | Laminated structure of printing circuit board and multi-laminate laminated structure |
Publications (1)
Publication Number | Publication Date |
---|---|
CN1747620A true CN1747620A (en) | 2006-03-15 |
Family
ID=36166899
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN 200410079933 Pending CN1747620A (en) | 2004-09-08 | 2004-09-08 | Laminated structure of printing circuit board and multi-laminate laminated structure |
Country Status (1)
Country | Link |
---|---|
CN (1) | CN1747620A (en) |
Cited By (11)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN101360408B (en) * | 2007-07-30 | 2010-06-09 | 英业达股份有限公司 | Electric power laminated board |
CN102566682A (en) * | 2011-12-31 | 2012-07-11 | 曙光信息产业股份有限公司 | Blade server motherboard |
CN102591419A (en) * | 2011-12-31 | 2012-07-18 | 曙光信息产业股份有限公司 | Blade server mainboard |
CN103533746A (en) * | 2013-10-08 | 2014-01-22 | 上海斐讯数据通信技术有限公司 | High-density interconnection integrated printed circuit board of improved laminated structure and manufacturing method thereof |
CN104093264A (en) * | 2014-07-22 | 2014-10-08 | 四川九洲电器集团有限责任公司 | Printed board wiring structure and wiring method based on intense radiation devices |
CN104470266A (en) * | 2014-12-09 | 2015-03-25 | 深圳怡化电脑股份有限公司 | Method for controlling high-speed PCB signal impedance |
CN104715908A (en) * | 2013-12-16 | 2015-06-17 | 西门子公司 | Planar transformer and electrical component |
CN106714445A (en) * | 2016-11-29 | 2017-05-24 | 郑州云海信息技术有限公司 | Multilayer PCB (Printed Circuit Board) |
CN108990321A (en) * | 2018-08-07 | 2018-12-11 | 信泰电子(西安)有限公司 | A kind of production method of random layer pcb board |
CN112084743A (en) * | 2020-09-11 | 2020-12-15 | 苏州浪潮智能科技有限公司 | SSD laminated plate distribution structure, design method and device |
CN113056090A (en) * | 2021-03-18 | 2021-06-29 | 山东英信计算机技术有限公司 | Multiplexing PCB lamination and server |
-
2004
- 2004-09-08 CN CN 200410079933 patent/CN1747620A/en active Pending
Cited By (15)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN101360408B (en) * | 2007-07-30 | 2010-06-09 | 英业达股份有限公司 | Electric power laminated board |
CN102591419B (en) * | 2011-12-31 | 2015-06-17 | 曙光信息产业股份有限公司 | Blade server mainboard |
CN102566682A (en) * | 2011-12-31 | 2012-07-11 | 曙光信息产业股份有限公司 | Blade server motherboard |
CN102591419A (en) * | 2011-12-31 | 2012-07-18 | 曙光信息产业股份有限公司 | Blade server mainboard |
CN102566682B (en) * | 2011-12-31 | 2014-04-09 | 曙光信息产业股份有限公司 | Blade server motherboard |
CN103533746A (en) * | 2013-10-08 | 2014-01-22 | 上海斐讯数据通信技术有限公司 | High-density interconnection integrated printed circuit board of improved laminated structure and manufacturing method thereof |
CN104715908A (en) * | 2013-12-16 | 2015-06-17 | 西门子公司 | Planar transformer and electrical component |
CN104093264A (en) * | 2014-07-22 | 2014-10-08 | 四川九洲电器集团有限责任公司 | Printed board wiring structure and wiring method based on intense radiation devices |
CN104470266A (en) * | 2014-12-09 | 2015-03-25 | 深圳怡化电脑股份有限公司 | Method for controlling high-speed PCB signal impedance |
CN106714445A (en) * | 2016-11-29 | 2017-05-24 | 郑州云海信息技术有限公司 | Multilayer PCB (Printed Circuit Board) |
CN108990321A (en) * | 2018-08-07 | 2018-12-11 | 信泰电子(西安)有限公司 | A kind of production method of random layer pcb board |
CN108990321B (en) * | 2018-08-07 | 2019-06-04 | 信泰电子(西安)有限公司 | A kind of random layer pcb board and preparation method thereof |
CN112084743A (en) * | 2020-09-11 | 2020-12-15 | 苏州浪潮智能科技有限公司 | SSD laminated plate distribution structure, design method and device |
CN112084743B (en) * | 2020-09-11 | 2023-01-10 | 苏州浪潮智能科技有限公司 | SSD laminated plate distribution structure, design method and device |
CN113056090A (en) * | 2021-03-18 | 2021-06-29 | 山东英信计算机技术有限公司 | Multiplexing PCB lamination and server |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
CN1282188C (en) | Wired circuit board | |
CN1108733C (en) | Reducing of electromagnetic noise radiated by printed circuit board | |
CN1747620A (en) | Laminated structure of printing circuit board and multi-laminate laminated structure | |
CN1062377C (en) | Multilayer through type capacitor array | |
US20130187743A1 (en) | Inductor structure | |
CN1856846A (en) | Ultra-thin flexible inductor | |
CN101031182A (en) | Printing circuit-board and its designing method | |
JP2007526584A5 (en) | ||
CN101206947A (en) | Inductance capacitance integrated structure implemented by flexible circuit board in EMI filter | |
CN101052266A (en) | Printed circuit board and manufacturing method thereof | |
KR20120031362A (en) | Embedded pcb and manufacturing method for the same | |
CN1909220A (en) | Chip type electric device and liquid crystal display module including the same | |
CN103052281A (en) | Embedded multilayer circuit board and manufacturing method thereof | |
CN1780536A (en) | Impedance adjustment of multi-layer printing circuit board | |
CN204836777U (en) | Multilayer high frequency blind hole PCB circuit board | |
WO2018139382A1 (en) | Multilayer substrate and electronic device | |
CN1856239A (en) | Printing circuit board | |
CN106714475A (en) | Lamination method of six-layer PCB | |
CN1841732A (en) | Integrated circuit with multi joint type capacitor | |
CN104684281B (en) | The preparation method and circuit board systems of circuit board systems | |
CN2741319Y (en) | Circuit substrate | |
CN104080268B (en) | A kind of pcb board | |
CN2881955Y (en) | Chip package | |
CN116321696B (en) | PCB (printed circuit board) | |
CN1248551C (en) | Circuit board capable of inhibiting electromagnetic interference and its inhibition method |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
C06 | Publication | ||
PB01 | Publication | ||
C10 | Entry into substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
C12 | Rejection of a patent application after its publication | ||
RJ01 | Rejection of invention patent application after publication |
Open date: 20060315 |