CN1734498A - Image processing apparatus - Google Patents
Image processing apparatus Download PDFInfo
- Publication number
- CN1734498A CN1734498A CNA2005100902321A CN200510090232A CN1734498A CN 1734498 A CN1734498 A CN 1734498A CN A2005100902321 A CNA2005100902321 A CN A2005100902321A CN 200510090232 A CN200510090232 A CN 200510090232A CN 1734498 A CN1734498 A CN 1734498A
- Authority
- CN
- China
- Prior art keywords
- image data
- adjusted size
- data
- input
- processing apparatus
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Images
Landscapes
- Compression Of Band Width Or Redundancy In Fax (AREA)
- Compression Or Coding Systems Of Tv Signals (AREA)
- Image Processing (AREA)
- Editing Of Facsimile Originals (AREA)
Abstract
To provide an image processing apparatus, wherein the response time from the reception of an image reproduction instruction until an image is actually displayed can be shortened. Expansion processing and resize processing are started almost at the same time. When the expansion processing is carried out and transfer of expanded image data by a prescribed number of data is finished, the output DMA 2d of a JPEG processing section 2 transmits an output DAM2d transfer end signal to a memory control section 9. When the transfer of the expanded image data, from an input DAM 3a of a resize processing section 3 to a resize section 3b, is finished, the input DMA 3a transmits an input DMA3a transfer end signal to the memory control section 9. The memory control section 9 executes output control of an input DMA3a weighted signal to the input DMA3a according to the output DMA2d transfer end signal and the input DMA3a transfer end signal. When the input DMA3a weighted signal is outputted, the resize processing at resize processing section 3 is awaited.
Description
Technical field
The present invention relates to image processing apparatus, particularly can reproduce the image processing apparatus that shows compressing image data.
Background technology
As motion about image processing apparatus that can a plurality of Flame Image Process of pipeline processes, for example in patent documentation 1, by handling the storer that the low capacity of connecting between the processing is dwindled in amplification that the Flame Image Process that (JPEG compression and jpeg decompression) wait and the amplification of carrying out image dwindle (adjusted size processing) carrying out JPEG in advance, can both processing of pipeline processes.That is, in patent documentation 1, temporarily storing in the storer, read the view data of being stored with predetermined block unit and amplify and dwindle processing by Flame Image Process processed images data.
The technology of patent documentation 1 is described with reference to Fig. 5.In the image processing apparatus of Fig. 5, on bus 101, be connected with JPEG handling part 102, adjusted size handling part 103, storer (SDRAM) 106, VideoI/F (video interface) 107, and be connected with storage card 105 by Media Interface Connector (I/F) 104.Here, JPEG handling part 102 is made of input DMA 102a, the JPEG compression/decompression 102b of portion, memory buffer 102c, output DMA 102d, and adjusted size handling part 103 is made of input DMA 103a, the 103b of adjusted size portion, output DMA 103c.
In such structure, be stored under the situation of the image in the storage card 105 in reproduction, at first from storage card 105, read compressing image data, and the compressing image data of being read is temporarily stored among the SDRAM 106 by medium I/F 104.Then, read the compressing image data that is stored among the SDRAM 106 by the input DMA 102a in the JPEG handling part 102.The compressing image data of being read is imported among the JPEG compression/decompression 102b of portion and is extracted.The decompressed image data that are extracted in the JPEG compression/decompression 102b of portion and obtain are exported to bus 101 by memory buffer 102c and output DMA 102d, and store among the SDRAM 106.
Afterwards, read the decompressed image data that are stored among the SDRAM106 by the input DMA 103a in the adjusted size handling part 103.The decompressed image of being read is imported among the 103b of adjusted size portion, and is adjusted to suitable display size.Decompressed image data after the adjusted size are exported to bus 101 by output DMA103c, and store among the SDRAM 106.
Afterwards, read the decompressed image data that are stored among the SDRAM 106 by Video I/F 107 and on not shown image display devices such as TFT LCD, carry out the image demonstration.
In these were handled, as shown in Figure 6, decompression processing and adjusted size were handled and are carried out continuously in time.That is, in the technology of patent documentation 1, when having carried out the key operation of the reconstruction of image, begin to read compressing image data, when reading of compressing image data finished, begin decompression processing by medium I/F 104 by the user.When the decompress(ion) of the compressing image data of 1 frame that is through with in decompression processing, the beginning adjusted size is handled, and according to each predetermined block the decompressed image data is carried out adjusted size.
[patent documentation 1] spy opens the 2000-311241 communique
As mentioned above, in the technology of patent documentation 1, because after the decompress(ion) of the compressing image data of 1 frame is all over, carry out the size of images adjustment, so its time length, it is elongated promptly to carry out the response time that the reconstruction of image is indicated to till the actual displayed image from the user.
Summary of the invention
The present invention is exactly In view of the foregoing and proposes, and its purpose is to provide a kind of can the shortening from carrying out the reconstruction of image to be indicated to the image processing apparatus of the response time till the actual displayed image.
In order to reach above-mentioned purpose, the image processing apparatus of the 1st embodiment of the present invention, the compressing image data imported or read implemented the Flame Image Process that is used to reproduce from recording medium, it is characterized in that, comprise: decompression processing portion, it implements decompression processing to above-mentioned compressing image data, to obtain the decompressed image data; Storage part, it stores above-mentioned decompressed image data; Adjusted size portion, it is that the above-mentioned decompressed image data that are stored in the above-mentioned storage part are read by unit with the piece, and obtains display image data by implementing the adjusted size processing; Control part, the execution that it is handled according to the above-mentioned adjusted size of the above-mentioned adjusted size of the data numerical control system portion that is stored in the decompressed image data in the above-mentioned storage part.
According to the 1st embodiment, handle by carrying out adjusted size according to the data number that is stored in the decompressed image data in the above-mentioned storage part, also can carry out adjusted size even without the decompressed image data that obtain 1 frame and handle.
According to the present invention, can provide to shorten to be indicated to the image processing apparatus of the response time till the actual displayed image from carrying out the reconstruction of image.
Description of drawings
Fig. 1 is the block scheme of structure that the image processing apparatus of an embodiment of the invention is shown.
Fig. 2 is the figure that the detailed structure of memory controller is shown.
Fig. 3 is the sequential chart of the state separately of output DMA 2d, memory controller 9, input DMA 3a and counter 9a when in chronological order the reconstruction of image being shown.
Fig. 4 is the figure of the flow process of the data processing when in chronological order the reconstruction of image being shown.
Fig. 5 illustrates the block scheme of the structure of the image processing apparatus of example in the past.
Fig. 6 is the figure of the flow process of the data processing the when reconstruction of image of image processing apparatus of example is shown in the past in chronological order.
Embodiment
Below, with reference to the description of drawings embodiments of the present invention.
Fig. 1 is the block scheme of structure that the image processing apparatus of an embodiment of the invention is shown.
In the image processing apparatus of Fig. 1, be connected with on the bus 1 JPEG handling part 2 as decompression processing portion, as the adjusted size handling part 3 of adjusted size portion, as storage part storer (SDRAM) 6, CPU 8, as the memory controller 9 of control part.Here, though in Fig. 1, omitted diagram, but on bus 1, also be connected be used for and record carry out the medium I/F of data transmission between the storage card of compressing image data and be used for and image display device such as TFT LCD between carry out Video I/F of data transmission etc.
And in Fig. 1, JPEG handling part 2 is made of input DMA 2a, the JPEG compression/decompression 2b of portion, memory buffer 2c, output DMA 2d.And adjusted size handling part 3 is made of input DMA 3a, the 3b of adjusted size portion, output DMA 3c.
In addition, in Fig. 1, the output DMA 2d of JPEG handling part 2 and the input DMA 3a of adjusted size handling part 3 are connected with memory controller 9 as memory controller.
In addition, be provided with register 8a in the inside of CPU 8, memory controller 9 constitutes and can read the register setting value that is stored among the register 8a by bus 1.Here, be stored in register setting value among the register 8a be as the 1st tentation data number output DMA 2d transmission line number, as the input DMA 3a transmission line number of the 2nd tentation data number and as the number of data lines that needs of predetermined value.To narrate in the back about these register setting values.
Action to image processing apparatus with the such structure of Fig. 1 describes.At first, when reading compressing image data by not shown medium I/F, the compressing image data of being read is temporarily stored among the SDRAM 6.Then, read the compressing image data that is stored among the SDRAM 6 by JPEG handling part 2.The compressing image data of being read is input among the JPEG compression/decompression 2b of portion by input DMA 2a and is extracted.
In this first embodiment, in the JPEG compression/decompression 2b of portion, carry out decompress(ion) and the decompressed image data that obtain are exported to bus 1 by memory buffer 2c and output DMA 2d successively and store among the SDRAM 6.Then, when the end of transmission (EOT) of the decompressed image data of preset lines number, from output DMA 2d to memory controller 9 output output DMA 2d end of transmission signal.Here,, for example the jpeg image data of YC 422 are being carried out under the situation of decompress(ion),, the view data of 8 lines is being carried out decompress(ion) by 1 decompression processing as compressing image data.In this first embodiment, the decompressed image data of every transmission primaries 8 lines are just to memory controller 9 output output DMA 2d end of transmission signal.
Here, in this first embodiment, the adjusted size in the 3b of adjusted size portion is handled, and the view data among the input DMA 3a in the 3b of adjusted size portion is read by memory controller 9 controls in more detail.That is,, then import DMA 3a waiting signal to the input DMA of adjusted size handling part 3 3a output from memory controller 9 if be not stored in the decompressed image data that the 3b of adjusted size portion can carry out the amount of adjusted size processing among the SDRAM 6.In input DMA 3a, during output input DMA 3a waiting signal, do not carry out reading of decompressed data, make adjusted size handle standby.
On the other hand, be used to carry out enough decompressed image data that adjusted size is handled, then stop from memory controller 9 to input DMA 3a output input DMA 3a waiting signal if in SDRAM 6, store.In this case, begin to read the decompressed image data of the needed amount of adjusted size, the decompressed image data of being read are inputed to the 3b of adjusted size portion by input DMA 3a.When being through with from input DMA 3a when the 3b of adjusted size portion transmits the decompressed image data of the needed amount of adjusted size, import DMA 3a end of transmission signal to memory controller 9 outputs from input DMA 3a.Afterwards, in the 3b of adjusted size portion, the decompressed image of being imported is adjusted to suitable display size, generates display image data.
Fig. 2 illustrates the originally figure of the detailed structure of the memory controller 9 of the major part of first embodiment of conduct.
The memory controller 9 of Fig. 2 is made of counter 9a and comparer 9b.In Fig. 2, import above-mentioned output DMA 2d end of transmission signal to the Up of counter 9a input terminal.And, import above-mentioned input DMA 3a end of transmission signal to the Down of counter 9a input terminal.
And, in Fig. 2, to the addition value input terminal of counter 9a and the subtraction value input terminal register setting value of input register 8a respectively.Addition value input terminal input register setting value " output DMA 2d transmission line number " to counter 9a.This output DMA 2d transmission line number is the setting value of expression from the timing of output DMA 2d output output DMA 2d end of transmission signal.For example, under the jpeg image data conditions of YC 422, the decompressed image data obtain by per 8 lines.Therefore, in this first embodiment, will export DMA 2d transmission line number and be made as 8.And the value that can make output DMA 2d transmission line number changes according to the specification of output DMA 2d etc.
In addition, " import DMA3a transmission line number " to the subtraction value input terminal input register setting value of counter 9a.This input DMA 3a transmission line number is the setting value of expression from the timing of input DMA 3a output input DMA 3a end of transmission signal.In this first embodiment, input DMA3a transmission line number is made as the number of data lines that can carry out adjusted size in adjusted size handling part 3, for example be made as 10.And the value that can make input DMA 3a transmission line number changes according to the specification of input DMA 3a etc.
And in Fig. 2, the efferent of counter 9a is connected with the input part of comparer 9b.In addition, another input part input register setting value to comparer 9b " needs number of data lines ".This needs number of data lines is that the 3b of adjusted size portion carries out adjusted size and handles needed data number.For example in this first embodiment, will need number of data lines to be made as 10 lines (1 piece).
With reference to Fig. 3 the action of memory controller 9 with structure shown in Figure 2 is described.Fig. 3 is the sequential chart of the state separately of output DMA 2d, memory controller 9, input DMA 3a and counter 9a when according to time sequencing the reconstruction of image being shown.
When the reconstruction of image, read compressing image data, when the transmission of the decompressed image data of 8 lines that in the output DMA of JPEG handling part 2 2d, are through with, from output DMA 2d to counter 9a output output DMA 2d end of transmission signal.After receiving this signal, in counter 9a, make count value increase output DMA 2d transmission line number=8.Like this, the count value of counter 9a becomes " 8 ".Then, in comparer 9b to the count value " 8 " of counter 9a with need number of data lines " 10 " to compare.This time count value＜need number of data lines owing to there is not the sizes of memory adjustment to handle the decompressed image data of needed amount, continues output input DMA 3a waiting signal in SDRAM 6.
Afterwards, when the transmission of the decompressed image data of 8 lines that in the output DMA of JPEG handling part 2 2d, are through with again, from output DMA 2d to counter 9a output output DMA 2d end of transmission signal.The count value that receives counter 9a behind this signal increases, and the count value of counter 9a becomes " 16 ".Then, in comparer 9b to the count value " 16 " of counter 9a with need number of data lines " 10 " to compare.This time count value＞need number of data lines owing to store the decompressed image data that adjusted size is handled needed amount in SDRAM16, stops output input DMA 3a waiting signal.
Like this, begin to read the decompressed image data by input DMA 3a.When decompressed image data of reading during to the end of transmission (EOT) of the 3b of adjusted size portion by input DMA 3a, from input DMA 3a to counter 9a output input DMA 3a end of transmission signal.After receiving this signal, in counter 9a, make count value reduce input DMA 3a transmission line number=10.Like this, the count value of counter 9a becomes " 6 ".Then, in comparer 9b to the count value " 6 " of counter 9a with need number of data lines " 10 " to compare.This time count value＜need number of data lines owing to there is not the sizes of memory adjustment to handle the decompressed image data of needed amount, begins output input DMA 3a waiting signal once more in SDRAM 6.After, similarly by in comparer 9b to count value and need number of data lines to compare, import the output control of DMA 3a waiting signal.
Sequential chart when Fig. 4 represents the reconstruction of image of this first embodiment.As shown in Figure 4, in this first embodiment, when reading of compressing image data finished, almost begin jpeg decompression processing and adjusted size simultaneously and handle.Then, when the compressing image data to tentation data number (1 piece) has carried out decompress(ion), and when storing among the SDRAM 6, remove the wait of adjusted size handling part 3, press piece and carry out the adjusted size processing.
Like this, in this first embodiment, even the decompression processing of the view data of 1 frame does not finish as yet, handle needed decompressed image data if store adjusted size among the SDRAM 6, then also can carry out adjusted size handles, so can pipeline processes JPEG handle and the adjusted size processing, and can shorten the key operation that carries out the reconstruction of image from the user response time till the actual displayed image.In addition, because need not monitor the transmission line number of following the trail of the decompressed image data and carry out the line number of the view data of adjusted size processing by CPU 8, thus can carry out tracking process, and can not increase the load of CPU 8.
Though the present invention has been described according to above embodiment, the invention is not restricted to above-mentioned embodiment, certainly in the scope of main idea of the present invention, carry out various distortion and application.
And, comprised the invention in various stages in the above-described embodiment, can extract various inventions by the disclosed a plurality of constitutive requirements of appropriate combination.For example, even several constitutive requirements of deletion from the whole constitutive requirements shown in the embodiment, if can solve in the problem described in the paragraph of " summary of the invention ", can obtain in the effect described in the paragraph of " invention effect ", the formation of then having deleted these constitutive requirements also can be used as invents and extracts.
Claims (7)
1. image processing apparatus is implemented the Flame Image Process that is used to reproduce to the compressing image data of being imported or read from recording medium, it is characterized in that, comprising:
Decompression processing portion, it implements decompression processing to described compressing image data, to obtain the decompressed image data;
Storage part, it stores described decompressed image data;
Adjusted size portion, it is that the described decompressed image data of storing in the described storage part are read by unit with the piece, and obtains display image data by implementing the adjusted size processing;
Control part, the execution that it is handled according to the described adjusted size of the described adjusted size of the data numerical control system portion of the decompressed image data of storing in the described storage part.
2. image processing apparatus according to claim 1 is characterized in that, described control part comprises:
Count section, its data number to the described decompressed image data of storing in the described storage part is counted;
Comparing section, its data number and predetermined value to the described decompressed image data that described count section is counted compares.
3. image processing apparatus according to claim 2, it is characterized in that, described control part is under the situation of data number less than described predetermined value of described decompressed image data at the comparative result of described comparing section, make described adjusted size handle the waiting signal of standby to the output of described adjusted size portion, comparative result in described comparing section is under the situation of data number more than or equal to described predetermined value of described decompressed image data, stop to export described waiting signal, control the execution that described adjusted size is handled thus to described adjusted size portion.
4. according to claim 2 or 3 described image processing apparatus, it is characterized in that described predetermined value is the value of setting in advance in register.
5. image processing apparatus according to claim 2 is characterized in that,
Described decompression processing portion exports the 1st end of transmission signal to described count section under the decompressed image data conditions that obtains the 1st tentation data number,
Described adjusted size portion is carrying out exporting the 2nd end of transmission signal to described count section under the situation that adjusted size handles to the decompressed image data of the 2nd tentation data number,
The counting of the data number of the described decompressed image data of carrying out for described count section, under the situation of having imported described the 1st end of transmission signal, undertaken by making count value increase described the 1st tentation data number, under the situation of having imported described the 2nd end of transmission signal, undertaken by making described count value reduce described the 2nd tentation data number.
6. image processing apparatus according to claim 5 is characterized in that, described the 1st tentation data number and described the 2nd tentation data number are the values of setting in register in advance.
7. image processing apparatus according to claim 1 is characterized in that, roughly begins the described decompression processing of described decompression processing portion and the described adjusted size of described adjusted size portion simultaneously and handles.
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2004233486A JP2006054584A (en) | 2004-08-10 | 2004-08-10 | Image processing apparatus |
| JP2004233486 | 2004-08-10 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN1734498A true CN1734498A (en) | 2006-02-15 |
| CN100389436C CN100389436C (en) | 2008-05-21 |
Family
ID=36031781
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CNB2005100902321A Active CN100389436C (en) | 2004-08-10 | 2005-08-10 | Image processing apparatus |
Country Status (2)
| Country | Link |
|---|---|
| JP (1) | JP2006054584A (en) |
| CN (1) | CN100389436C (en) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN100534187C (en) * | 2007-04-13 | 2009-08-26 | 威盛电子股份有限公司 | Output buffer method of pixel data for joint photographic experts group image |
| CN102005028A (en) * | 2010-11-18 | 2011-04-06 | 福州瑞芯微电子有限公司 | Image processing system using special DMA for images |
| CN103970781A (en) * | 2013-01-30 | 2014-08-06 | 深圳市同洲电子股份有限公司 | Embedded browser picture decoding device and method |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP4893154B2 (en) * | 2006-08-21 | 2012-03-07 | 富士通セミコンダクター株式会社 | Image processing apparatus and image processing method |
| JP5449791B2 (en) * | 2009-02-02 | 2014-03-19 | オリンパス株式会社 | Data processing apparatus and image processing apparatus |
Family Cites Families (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6563535B1 (en) * | 1998-05-19 | 2003-05-13 | Flashpoint Technology, Inc. | Image processing system for high performance digital imaging devices |
| US6195024B1 (en) * | 1998-12-11 | 2001-02-27 | Realtime Data, Llc | Content independent data compression method and system |
| JP3840076B2 (en) * | 2001-08-29 | 2006-11-01 | キヤノン株式会社 | Image processing apparatus and method, computer program, and storage medium |
-
2004
- 2004-08-10 JP JP2004233486A patent/JP2006054584A/en active Pending
-
2005
- 2005-08-10 CN CNB2005100902321A patent/CN100389436C/en active Active
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN100534187C (en) * | 2007-04-13 | 2009-08-26 | 威盛电子股份有限公司 | Output buffer method of pixel data for joint photographic experts group image |
| CN102005028A (en) * | 2010-11-18 | 2011-04-06 | 福州瑞芯微电子有限公司 | Image processing system using special DMA for images |
| CN103970781A (en) * | 2013-01-30 | 2014-08-06 | 深圳市同洲电子股份有限公司 | Embedded browser picture decoding device and method |
Also Published As
| Publication number | Publication date |
|---|---|
| JP2006054584A (en) | 2006-02-23 |
| CN100389436C (en) | 2008-05-21 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US9058792B1 (en) | Coalescing to avoid read-modify-write during compressed data operations | |
| CN1734498A (en) | Image processing apparatus | |
| CN112804532A (en) | Image data acquisition method, system and related device | |
| US6490669B1 (en) | Memory LSI with compressed data inputting and outputting function | |
| US20060236000A1 (en) | Method and system of split-streaming direct memory access | |
| CN100345436C (en) | Image processing apparatus | |
| JPH1091393A (en) | Data buffering device | |
| JP4533447B2 (en) | Image processing device | |
| JP3033052B2 (en) | Waveform analyzer | |
| JP3091917B2 (en) | Compressed data transfer device | |
| EP1657915A1 (en) | Sized optimized pixel line to pixel block conversion algorithm | |
| JPH10341437A (en) | Image processing method and device therefor | |
| JP2862121B2 (en) | Image processing circuit | |
| JP3148023B2 (en) | Two-dimensional DMA controller | |
| US20040183948A1 (en) | Real time smart image scaling for video input | |
| US20060007237A1 (en) | Apparatuses and methods for sharing a memory between display data and compressed display data | |
| US20070109582A1 (en) | Image data storage device, photocopier, image forming system, and image data storage method | |
| CN115936102A (en) | Sparse data decompression device and method for neural network tensor processor | |
| JP2945668B2 (en) | Pipeline processing equipment | |
| CN1330178C (en) | Method and equipment for recording digital image processing | |
| US8427495B1 (en) | Coalescing to avoid read-modify-write during compressed data operations | |
| JP2006510080A (en) | Method and apparatus for encoding a configuration description in a reconfigurable multiprocessor system | |
| JPH0664600B2 (en) | Image display device | |
| JP2007235851A (en) | Image processing device, image processing method, program, and recording medium | |
| JP2001218203A (en) | Image-processing unit and its method |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant |