CN1728044A - Automatic power down rebooting device - Google Patents
Automatic power down rebooting device Download PDFInfo
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- CN1728044A CN1728044A CN 200410070680 CN200410070680A CN1728044A CN 1728044 A CN1728044 A CN 1728044A CN 200410070680 CN200410070680 CN 200410070680 CN 200410070680 A CN200410070680 A CN 200410070680A CN 1728044 A CN1728044 A CN 1728044A
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Abstract
An automatic restart - up device from power failure adds a delay circuit and a relay on hardware equipped with watchdog circuit. It is feature as triggering relay to act for cutting off power input end of microprocessor application device after certain amount of reset pulse is detected by delay circuit, restoring relay to be original state for reswitching on microprocessor application device after a period of time.
Description
Technical field
The present invention relates to the microprocessor applications field, be specifically related to a kind of technology that restarts of microprocessor.
Background technology
Power-equipment and environment centralized supervision system are that various parameters, image, sound of plurality of devices such as the power supply, air-conditioning, oily machine, accumulator, high and low voltage electric distribution to communication bureau's (station) and environment etc. take remote measurement, remote signalling and remote control, monitor its operational factor in real time, diagnosis and handling failure, record and analyze related data, thus realize communication bureau's (station) people or unmanned and equipment is carried out the computer control system of Centralized Monitoring and centralized maintenance less.
Along with microprocessor technology constantly develops, power-equipment and environment centralized supervision system hardware design mostly with microprocessor as host CPU, and be equipped with basic peripheral circuit such as storer, decoding scheme, reset circuit and A/D change-over circuit and special circuits such as communication interface and real-time clock.In addition, in order to improve the operational reliability of terminal module, generally all also designing has hardware watchdog (WATCHDOG) circuit.
In fact so-called hardware watchdog circuit is exactly when utilizing the CPU operate as normal, and the timing reset counter makes the value of counter be no more than a certain value; When the CPU cisco unity malfunction, because counter can not be reset, so its counting can surpass a certain value, thereby produces reset pulse, makes CPU recover normal operating conditions.Like this, adopt the terminal module of hardware watchdog circuit, just can effectively avoid phenomenons such as " deadlock ", " program is walked to fly ", improve system's operational reliability greatly.
The typical hardware watchdog circuit all adopts special chip, and the MAX813L that produces as Maxim company etc. except that having the Watchdog output function, also have multiple functions such as electrification reset, power down monitoring voltage, hand-reset simultaneously.Yet, for watch-dog based on microprocessor, its running environment all compares badly, on-the-spot various environment complicated and changeable may cause CPU some to occur can not all pass through the just phenomenons such as " deadlock ", " program is walked to fly " of solution of hardware watchdog circuit reset CPU, certain equipment often occurring as the scene is ceaselessly resetting, but can't normally move exactly, the maintainer also can not find phenomenons such as device failure behind the scene, on the contrary, the maintainer may only need and then re-power device powers down and just might allow system recovery normal.The reason that this soft fault takes place has a lot, a kind of possible cause is exactly certain status register of CPU peripherals owing to disturb by unusual set, CPU gets muddled when handling this status register contents, cause " deadlock ", the CPU because the hardware watchdog circuit can only reset, so the status register contents of peripherals still remains unchanged, can get muddled again when after CPU reruns, handling this status register contents again, cause " deadlock ", have only by power down, the status register contents of peripherals is disappeared, could really deal with problems, just the frequent power-down operation of doing of maintainer.
Similar above-mentioned " deadlock " phenomenon occurring can't expect in practice, also be cumbersome, particularly to the watch-dog of the backcountry operation that is operated in unattended duty, it only is to re-power startup after equipment is fallen electricity that the maintainer rushes towards the scene from afar, serious maintainer's enthusiasm not only, can cause that more reaching of user is big discontented, more serious is, if above-mentioned fault, the maintainer can't in time rush towards on-the-spot, and equipment is under the long-term continuous reset state, not only have a strong impact on the operate as normal of total system, and equipment is further worsened, and cause part of devices to lose efficacy, result in greater loss.
To sum up, at present this only have the reliability service of the microprocessor applications equipment of hardware watchdog circuit not only to need the hardware watchdog circuit to produce hot reset (not power down), also needs the device of a similar hardware watchdog circuit to produce cold reset (re-powering after the power down).Otherwise, the reliability service and the maintenance cost of system all had a strong impact on.
Summary of the invention
Technical matters to be solved by this invention is exactly can only produce hot reset when phenomenon such as " deadlock ", " program is walked to fly " appears in the hardware watchdog circuit in the prior art at CPU, can not produce the problem of cold reset, proposes a kind of automatic power down rebooting device.
A kind of automatic power down rebooting device comprises the microprocessor applications device A, watchdog circuit B, described microprocessor applications device A and watchdog circuit B altogether, the reset terminal of described microprocessor applications device A links to each other with the output terminal of watchdog circuit B; The output control terminal of described microprocessor applications device A links to each other with the input end of watchdog circuit;
Described device also comprises a delay circuit C and a relay D; But described delay circuit C comprises the counter of a preset count value, power on a lockout module and a trigger flip-flop; The described lockout module that powers on makes counter be in cleared condition all the time in the device power process; The input end of clock of the output termination counter of described watchdog circuit B, the clear terminal of counter links to each other with the clear terminal of the lockout module that powers on, and the output terminal of counter links to each other with the input end of trigger flip-flop; The power input of described microprocessor applications device A and the watchdog circuit B and the lockout module that powers on also connects the end that the back is connected the normally closed contact of relay D, another termination power positive end of the normally closed contact of relay D; Described electric lockout module and microprocessor applications device A and watchdog circuit B are altogether; The positive voltage input termination power positive end of described trigger flip-flop; The driving circuit input end of the output relay termination D of described trigger flip-flop; The driving circuit power supply termination power positive end of relay D; When microprocessor applications device A operation irregularity, after the reset pulse count value of described counter reaches preset value, the output of counter will trigger trigger flip-flop, trigger flip-flop drives relay D through its output terminal output significant level after the delay process, relay D normally closed contact is opened, except that trigger flip-flop works on, the power down of described device other parts; After arriving the stabilization time of trigger flip-flop, the upset of trigger flip-flop output level stops to drive relay D, relay D normally closed contact closure, and described device re-powers startup.
Adopt and to depend merely on the microprocessor function that the hardware watchdog circuit produces hot reset in automatic power down rebooting device that the present invention proposes and the prior art and compare, increased the function of automatic power down rebooting, make it have automatic cold reset function, thereby fault coverages such as hardware watchdog circuit soluble " deadlock ", " program is walked to fly " are further enlarged, improved greatly equipment functional reliability, reduced work of maintenance personnel amount and maintenance cost.Simultaneously this device is all adjustable to parameters such as the numeration number of reset pulse and power down times, has also made things convenient for applying in a flexible way of various application scenarios.
Description of drawings
Fig. 1 is the circuit theory diagrams of the automatic power down rebooting device that proposes of the present invention;
Fig. 2 is the physical circuit schematic diagram of delay circuit C among Fig. 1;
Fig. 3 is the circuit theory diagrams of the specific embodiment of delay circuit C.
Embodiment
The present invention is described in further detail below in conjunction with drawings and Examples.
Fig. 1 is the circuit theory diagrams of the automatic power down rebooting device that proposes of the present invention; Fig. 2 is the physical circuit schematic diagram of delay circuit C among Fig. 1.As depicted in figs. 1 and 2, the automatic power down rebooting device that the present invention proposes comprises the microprocessor applications device A, watchdog circuit B, microprocessor applications device A and watchdog circuit B altogether, the reset terminal of microprocessor applications device A links to each other with the output terminal of watchdog circuit B; The output control terminal of microprocessor applications device A links to each other with the input end of watchdog circuit; Described device also comprises a delay circuit C and a relay D; But delay circuit C comprises the counter of a preset count value, power on a lockout module and a trigger flip-flop; The lockout module that powers on makes counter be in cleared condition all the time in the device power process.Device power is an asymptotic process from 0V to VCC, generally when supply voltage reach VCC 90% the time, watchdog circuit will produce a reset pulse, is called electrification reset.Normal startup is necessary because this reset pulse is CPU, and the reset pulse that normally moves back house dog generation with CPU is different, therefore claims that it is effective impulse.Because this effective impulse only produces when powering on, therefore can it is not counted reset pulse in the device power process, and the reset pulse that only CPU house dog in service is produced be counted by the lockout module control counter that powers on.The lockout module that powers on produces in a period of time after the electrification reset by the house dog that powers at slave unit and makes the clear terminal of counter be in effective status always, reaches not the purpose to the electrification reset step-by-step counting.The input end of clock of the output termination counter of watchdog circuit B, the clear terminal of counter links to each other with the clear terminal of the lockout module that powers on, and the output terminal of counter links to each other with the input end of trigger flip-flop; The power input of microprocessor applications device A and the watchdog circuit B and the lockout module that powers on also connects the end that the back is connected the normally closed contact of relay D, another termination power positive end of the normally closed contact of relay D; Electricity lockout module and microprocessor applications device A and watchdog circuit B are altogether; The positive voltage input termination power positive end of trigger flip-flop; The driving circuit input end of the output relay termination D of trigger flip-flop; The driving circuit power supply termination power positive end of relay D; When microprocessor applications device A operation irregularity, after the reset pulse count value of counter reaches preset value, the output of counter will trigger trigger flip-flop, trigger flip-flop drives relay D through its output terminal output significant level after the delay process, relay D normally closed contact is opened, except that trigger flip-flop works on, the power down of device other parts; After arriving the stabilization time of trigger flip-flop, the upset of trigger flip-flop output level stops to drive relay D, relay D normally closed contact closure, and described device re-powers startup.
Wherein the microprocessor applications device A is an application apparatus based on microprocessor, except the output pin WDO (WATCHDOG Output) of resetting pin RESET and watchdog circuit B links to each other, also have the WDI (WATCHDOG Input) of an output control pin OC (Output Control) and watchdog circuit B to link to each other.Watchdog circuit B is except with the microprocessor applications device A links to each other, and its WDO (WATCHDOG Output) also links to each other with the CLK of delay circuit C.Delay circuit C is an important component part of the present invention, forms by three functional modules, and be respectively the counter function module, the lock-out facility that powers on module and trigger flip-flop output function module, shown in Figure 2 is the annexation of three functional modules.The outside of delay circuit C connects fairly simple, except its CLK input end with the WDO of watchdog circuit B links to each other, the driving loop input end DI (DRIVE INPUT) of its output terminal DO (DELAY OUTPUT) and relay D links to each other.The normally closed contact series connection of relay D inserts the current supply circuit of described device.Active homing pulse that house dog (WATCHDOG) circuit B produces when distinguishing device power and the reset pulse that produces when powering on afterwards because of the CPU operation irregularity, also has the lockout module that powers among the delay circuit C, this module functions guaranteed exactly before counter receives first effective reset pulse, counter is in cleared condition always, neither can count, also can not trigger trigger flip-flop output function module drive relay D reset pulse.
During operate as normal, veneer at first powers on by the normally closed contact of relay D, watchdog circuit B produces the electrification reset pulse and outputs to the microprocessor applications device A by WDO, after resetting, the microprocessor applications device A brings into operation, its output control OC regularly produces quenching pulse by the counter O reset that WDI makes watchdog circuit B simultaneously, no longer produces reset pulse so that WDO is maintained fixed level.
During abnormal work, because the output of microprocessor applications device A control OC can't produce quenching pulse, the counter of watchdog circuit B will be counted always, when surpassing a certain value of setting, will produce a reset pulse by the WDO microprocessor applications device A that resets, in the microprocessor applications device A that resets, because WDO also links to each other with the CLK of delay circuit C, therefore reset pulse has entered the counter function module among the delay circuit C simultaneously, this module is counted the reset pulse that enters among the delay circuit C, when not reaching predefined count value, delay circuit C can not do further action, have only after the microprocessor applications device A is being passed through resetting of certain number of times, when promptly entering reset pulse number among the delay circuit C and reaching predefined count value, the output of counter will trigger trigger flip-flop, trigger flip-flop will be exported significant level through its DO after the delay process and drive relay D, make relay D action, at this moment, the relay D normally closed contact that is serially connected in the feed circuit of microprocessor applications device A will be opened, make the power down of microprocessor applications device A, the power down time of microprocessor applications device A can be set by the stable state time that trigger flip-flop output function module is set, when setting-up time then, trigger flip-flop DO output level upset stopping to drive relay D among the delay circuit C, the normally closed contact of relay D recloses the current supply circuit of microprocessor applications equipment, and microprocessor applications equipment re-powers the back and recovers operate as normal.
Fig. 3 is the circuit theory diagrams of the specific embodiment of delay circuit C.As shown in Figure 3, but counter is the counter of a preset count value among the delay circuit C, and the lock-out facility that powers on module is a RC delay circuit, and trigger flip-flop output function module is a trigger flip-flop that constitutes based on 555 timers.Wherein S1, S2, S3 are used for the counter preset parameter to adjust cpu reset just power down of back equipment several times, R and C are used for adjusting the slave unit delay time that counter begins to count that powers on, and this delay time should produce time of electrification reset pulse greater than the slave unit hardware watchdog circuit B that powers on.In an embodiment of the present invention, the shared power vd D of lockout module and watchdog circuit powers on, when supply voltage begins to rise, because capacitor C needs charging, therefore the CLR of counter end is just arrived low significant level by the capacitor C clamper always, have only when capacitor C is charged near VDD, the CLR end just can be invalid, and this hour counter just can enter count status.Therefore by adjusting R and C parameter, just can adjust the time that capacitor C is charged to VDD, make this time arrive the time that produces reset pulse from power on greater than watchdog circuit.Simultaneously, in order to guarantee behind power-down rebooting, still to play the lock-out facility that powers on, necessary and the equipment power down together of this delay circuit, delay time is constant when guaranteeing that equipment re-powers, R1 and C1 be used for adjusting when the cpu reset number of times reach number of times is set after to the delay time TIME11 that drives relay D action, R2 and C1 are used for adjusting the slave unit power down to re-powering the delay time TIME2 of restarting.
Claims (5)
1, a kind of automatic power down rebooting device comprises the microprocessor applications device A, watchdog circuit B, described microprocessor applications device A and watchdog circuit B altogether, the reset terminal of described microprocessor applications device A links to each other with the output terminal of watchdog circuit B; The output control terminal of described microprocessor applications device A links to each other with the input end of watchdog circuit; It is characterized in that:
Described device also comprises a delay circuit C and a relay D; But described delay circuit C comprises the counter of a preset count value, power on a lockout module and a trigger flip-flop; The described lockout module that powers on makes counter be in cleared condition all the time in the device power process; The input end of clock of the output termination counter of described watchdog circuit B, the clear terminal of counter links to each other with the clear terminal of the lockout module that powers on, and the output terminal of counter links to each other with the input end of trigger flip-flop; The power input of described microprocessor applications device A and the watchdog circuit B and the lockout module that powers on also connects the end that the back is connected the normally closed contact of relay D, another termination power positive end of the normally closed contact of relay D; Described electric lockout module and microprocessor applications device A and watchdog circuit B are altogether; The positive voltage input termination power positive end of described trigger flip-flop; The driving circuit input end of the output relay termination D of described trigger flip-flop; The driving circuit power supply termination power positive end of relay D; When microprocessor applications device A operation irregularity, after the reset pulse count value of described counter reaches preset value, the output of counter will trigger trigger flip-flop, trigger flip-flop drives relay D through its output terminal output significant level after the delay process, relay D normally closed contact is opened, except that trigger flip-flop works on, the power down of described device other parts; After arriving the stabilization time of trigger flip-flop, the upset of trigger flip-flop output level stops to drive relay D, relay D normally closed contact closure, and described device re-powers startup.
2, automatic power down rebooting device according to claim 1 is characterized in that: the power down time of described processor application apparatus A can be set by the stabilization time of setting trigger flip-flop.
3, automatic power down rebooting device according to claim 1 is characterized in that: the described lockout module that powers on is a RC delay circuit, and the delay time of this delay circuit produces time of electrification reset pulse greater than the slave unit hardware watchdog circuit B that powers on.
4, automatic power down rebooting device according to claim 1 is characterized in that: described trigger flip-flop is based on the circuit that 555 timers constitute.
5, automatic power down rebooting device according to claim 1 is characterized in that: described relay D is an electromagnetic relay.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNB2004100706800A CN100351738C (en) | 2004-07-29 | 2004-07-29 | Automatic power down rebooting device |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNB2004100706800A CN100351738C (en) | 2004-07-29 | 2004-07-29 | Automatic power down rebooting device |
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| CN1728044A true CN1728044A (en) | 2006-02-01 |
| CN100351738C CN100351738C (en) | 2007-11-28 |
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| CNB2004100706800A Expired - Fee Related CN100351738C (en) | 2004-07-29 | 2004-07-29 | Automatic power down rebooting device |
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| CN107463236B (en) * | 2017-08-28 | 2023-05-12 | 珠海格力电器股份有限公司 | Reset detection circuit and reset detection method |
| CN109813550A (en) * | 2017-11-16 | 2019-05-28 | 斯凯孚公司 | The method of condition monitoring sensing system and the situation for monitoring system |
| CN109813550B (en) * | 2017-11-16 | 2022-09-06 | 斯凯孚公司 | Condition monitoring sensor system and method for monitoring condition of system |
| CN110632867A (en) * | 2019-08-08 | 2019-12-31 | 浙江中控技术股份有限公司 | Controller reset system and device |
| CN113821070A (en) * | 2021-08-20 | 2021-12-21 | 浙江大华技术股份有限公司 | Power supply control system, method, computer equipment and storage medium |
| CN113821070B (en) * | 2021-08-20 | 2022-12-20 | 浙江大华技术股份有限公司 | Power supply control system, method, computer equipment and storage medium |
| CN117406699A (en) * | 2023-12-12 | 2024-01-16 | 苏州萨沙迈半导体有限公司 | MCU power-on self-checking circuit, chip and electronic equipment |
| CN117406699B (en) * | 2023-12-12 | 2024-04-02 | 苏州萨沙迈半导体有限公司 | MCU power-on self-checking circuit, chip and electronic equipment |
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| CN100351738C (en) | 2007-11-28 |
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