CN1725207A - Method and system for regulating processor allocation mode - Google Patents
Method and system for regulating processor allocation mode Download PDFInfo
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- CN1725207A CN1725207A CN 200510068142 CN200510068142A CN1725207A CN 1725207 A CN1725207 A CN 1725207A CN 200510068142 CN200510068142 CN 200510068142 CN 200510068142 A CN200510068142 A CN 200510068142A CN 1725207 A CN1725207 A CN 1725207A
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Abstract
This invention relates to a method for regulating the configuration mode of a processor including: A, providing a storage unit for storing configuration character deciding working mode of the processor and letting the processor fetch the default configuration characters preset in the storage unit when it resists, B, writing a new configuration word in said character storage unit to replace the original one, C, turning the new character valid and the processor works according to the new mode. This invention provides a system including a processor, an input unit and an output unit for configuration characters. Another system is provided including a processor, an erasable storage and its output unit.
Description
Technical field
The present invention relates to a kind of electronic system, particularly relate to a kind of method and system of adjusting processor allocation mode.
Background technology
Along with the intelligentized development of electronic equipment, the application of CPU in electronic equipment is very extensive.In the configuration of equipment, monitoring, management, more and more be unable to do without the processing of CPU.Singularity in view of CPU, the configuration of its some functional mode can only depend on simply goes up drop-down processing to hardware circuit, decide some original states of CPU, for example determine the multiplier parameter of the inside phaselocked loop of CPU frequency of operation, time series pattern of visit BOOTROM or the like, but these configuration modes are realized by hardware, when the needs adjustment modes, because it is hardware configuration and underaction, so can only finish (such as realizing) by shirtsleeve operation by outer meeting resistance.For example certain serial equipment when needs switch operating frequency, must pass through to revise the configuration resistance of hardware pattern because at different users, though adopt the CPU of same model, its frequency of operation need be switched between 200MHz and 300MHz.But when revising configuration resistance, very little change just may cause reconfiguring its mode of operation, thereby has increased the construction cycle greatly.
At present, existing configuration CPU initial operation mode mainly is by adopting outer meeting resistance to go up drop-down mode.As shown in Figure 1, be the synoptic diagram of existing configuration CPU11 initial operation mode, comprising: pattern MODE1, MODE2, MODE3, MODE4 are respectively 4 pins of CPU11, with the mode of operation that decides CPU11; And according to system's needs described pin is passed through outer meeting resistance 14 and distinguish connecting to neutral or power supply VCC.When system powered on, CPU11 obtained corresponding work mode by detecting the level state (0 or 1) of these 4 pins.Table 1 is the pattern of state correspondence of 4 pins of CPU:
| Pin name | Level | The CPU mode of operation |
| MODE1 | 0 | The serial FLASH mode of operation |
| 1 | Parallel FLASH mode of operation | |
| MODE2 | 0 | Use the FLASH of 8bit bit wide |
| 1 | Use the FLASH of 16bit bit wide | |
| MODE3 | 0 | Plug-in storer is SDRAM |
| 1 | Plug-in storer is DDR SDRAM | |
| MODE4 | 0 | CPU works in the 100MHz dominant frequency |
| 1 | CPU works in the 200MHz dominant frequency |
According to the information in the table 1 as can be known, the mode of operation after CPU starts among Fig. 1 is: parallel FLASH mode of operation, use the FLASH of 16bit bit wide, plug-in storer to work in the 100MHz dominant frequency as SDRAM, CPU.In addition, if the user needs CPU to work in the 200MHz dominant frequency, then can only change MODE4 into and drawing, be i.e. the resistance reconfiguration VCC of ground connection.
In sum, the shortcoming of prior art is: the pattern configurations of CPU relatively depends on hardware design, and its pattern configurations fixes, dumb.Such as in case configure after a kind of initial configuration pattern, CPU can only work in this pattern when powering at every turn, if the user has demand to change other mode of operation, just can only send back to manufacturer to this equipment makes amendment, under no electric resistance welding, the resistance of burn-oning and needing could change the mode of operation of CPU.
Summary of the invention
The technical matters that the present invention solves provides a kind of method and system of adjusting processor allocation mode, change the hardware configuration circuit of self voluntarily by CPU, dynamically update the start-up mode of CPU, thereby solve the design that the CPU mode of operation is no longer dependent on hardware, adapt to the different requirements of varying environment CPU.
For solving the problems of the technologies described above, the invention provides a kind of method of adjusting the processor mode configuration, described method comprises step:
A, provide a storage unit in order to depositing the configuration words of decision processor operating mode, and can read default configuration word default in this storage unit when making processor reset;
B, a new configuration words is write the configuration words storage unit of described address indication to replace original configuration words;
C, new configuration words is come into force, processor is by new configuration mode work.
System takies the address that the resistance on the address obtains the configuration words storage unit by adjusting default default configuration word in the steps A.
Between steps A and step B, also comprise step:
System latchs new configuration words, and new configuration words is input to the pattern configurations pin of processor by the detection to reset signal;
Processor obtains new configuration mode by the described new configuration words of sampling.
The pattern configurations pin that new configuration words is input to processor also comprises step before: whether the configuration pin of judging described processor adopts multiplex bus, if, sending to processor again after then reset signal being postponed a period of time resets, stable to guarantee configuration words output, otherwise, directly reset signal is sent to processor and resets.
Also comprise step before the steps A: described default default configuration word writes the configuration words storage unit in advance by fever writes.
The present invention also provides a kind of system that adjusts processor allocation mode, comprising:
Processor;
The configuration words storage unit links to each other with processor with data bus by address bus, and an address space in order to deposit this configuration words and to can read when the system initialization is set in it at least;
The configuration words output unit is connected respectively with the configuration words storage unit with processor, by detecting reset signal, reads and latchs from the configuration words of configuration words storage unit output, sends it to the configuration pin of processor after handling through delay.
Described configuration words storage unit is the nonvolatile memory that processor can be read and write.
Described configuration words memory unit address line is provided with pull down resistor in order to obtain the address that described initialization can read.
Described configuration words output unit comprises latch, and described latch latchs and export the configuration words on this address when the address bus of processor and data bus are all exported three-state.
The present invention provides a kind of system that adjusts processor allocation mode again, comprising:
Processor, it has configuration pin, and the input on this configuration pin determines this processor operating mode;
Scratch pad memory, link to each other with processor with data bus by address bus, wherein said address bus is configured to point to a certain default address of storer, should be placed with configuration words by the indicated storage space internal memory in default address, thereby processor can read the configuration words in the storage space pointed of this address and it is outputed to the processor configuration pin when making system initialization.
Should default address be by drop-down acquisition on the resistance on the address bus.
Described system also comprises the configuration words output unit, this configuration words output unit is connected respectively with the configuration words storage unit with processor, by detecting reset signal, read and latch from the configuration words of configuration words storage unit output, send it to the configuration pin of processor after handling through delay.
Compared with prior art, the present invention has following beneficial effect: the present invention changes the hardware configuration circuit of self voluntarily by CPU, thereby reach the initialized mode of operation of dynamic adjustment CPU, make the CPU mode of operation be no longer dependent on the design of hardware (the simple fixed configurations of hardware), dirigibility strengthens greatly, can onlinely be adjusted to new mode of operation.For example the present invention adjusts the initialization dominant frequency of CPU if desired, only needs the user to issue an order of revising dominant frequency to CPU, and CPU just can the online modification configuration words, and restart facility refreshes the work dominant frequency, thereby reaches the mode of operation of user's needs.
Description of drawings
Fig. 1 is the synoptic diagram of existing configuration CPU initial operation mode;
Fig. 2 adjusts the process flow diagram of processor mode collocation method for the present invention;
Fig. 3 is the synoptic diagram of system reset of the present invention;
Fig. 4 adjusts the theory diagram of the system of processor mode configuration for the present invention;
Fig. 5 adjusts the theory diagram of the another kind of system of processor mode configuration for the present invention.
Embodiment
In embedded system, upgrading cpu model is a kind of common needs, and for example certain Ethernet switch is along with the variation of customer group, the variation of user's request, must be suitable for market demand, handle various different business and emerging business, CPU need work under the different patterns.The different business of device processes that is updated to of configuration mode provides upgrading means easily.
The present invention mainly changes the hardware configuration pattern of self voluntarily by CPU, thereby reaches the purpose that dynamically updates CPU initial work pattern, makes the initialize mode configuration of CPU be no longer dependent on hardware design, no longer solidifies, and is more flexible.The present invention is directed to different applied environments, and can in time adjust its mode of operation, thereby when avoiding the mode of operation of processor being adjusted to other working environment, it must be returned factory, remodify the hardware design of circuit as need according to user's request.
The present invention is further illustrated below in conjunction with accompanying drawing.
See also Fig. 2, for the present invention adjusts the process flow diagram of the method for processor allocation mode, described method comprises step:
Step S11: provide a storage unit in order to depositing the configuration words of decision processor operating mode, and can read default configuration word default in this storage unit when making processor reset;
Step S12: a new configuration words is write the configuration words storage unit of described address indication to replace original configuration words;
Step S13: new configuration words is come into force, and processor is by new configuration mode work.
The present invention also comprised step before step S11: set in advance the default configuration word, described default configuration word is the configuration words that certain particular address storage system is used first in the storer.Described generally speaking default configuration word (initial configuration word) is used as a general data and is write when the BOOTROM programming, it should be noted that in a single day this address is used for the stored configuration word, just can not store other data.That is to say that in use, the program of processor has not been visited this address just, only when the refresh configuration word, processor is just visited this address.When systematic reset signal arrived, the address bus of CPU, data bus, control bus were all exported high-impedance state, and be drop-down on the resistance by storage address, obtains the address of configuration words storage unit, and storer is exported current configuration words by data bus.
The configuration status that described current configuration words reads outside sheet when being meant cpu reset, under the situation such as power in system, the user presses reset key, system in case of system halt equipment is restarted automatically, CPU begins to start, at this moment CPU at first detects the state of configuration pin, it is the state of measurement processor MODE1, MODE2, MODE3, MODE4 pin, we just are called configuration words the state of described pattern MODE1～MODE4, described configuration words one group of data of the mode of operation that decides CPU, promptly described configuration words is read outside sheet by the pattern configurations pin by CPU in the electrification reset process.
When system detects reset signal, at first, latch latchs the content of current data bus earlier, promptly latch the configuration words that is input to processor from data bus, and the configuration words after latching no longer changes, processor will work in the pairing mode of operation of this configuration words always, just can change when the arrival of next reset signal.Then, latch judges whether the configuration pin of CPU adopts the mode of multiplexed data bus again, if, then need described reset signal is postponed to give CPU after a period of time, configuration words after described latch will latch simultaneously outputs to the pattern configurations pin of CPU, to guarantee the data stability of CPU storer output when resetting, guarantee that promptly processor when system reset, obtains stable configuration words.
Particularly during system reset, CPU obtains current self working mode by the configuration words that sample latch latchs.CPU is exactly the state of cpu model configuration pin when resetting to the sampling of configuration words, and CPU reads this state decision mode of operation, is the hardware detection of cpu chip fully, will cause cpu reset just as CPU receives reset signal.When the user need change the mode of operation of CPU, CPU will be according to the address of configuration words storage unit in the configuration words write store of the pattern correspondence of user's needs.That is to say CPU when operate as normal, storer (such as the FLASH chip) is exactly to use as one of CPU storer commonly used, and CPU can arbitrarily visit FLASH and carry out read-write operation.The address of the storage unit of configuration words described in the storer also is that CPU can read and write at any time, when CPU decision needs to change configuration words, directly new configuration words has been write in the storer just.This implementation procedure is just as us the upgrade bios program of PC, i.e. CPU refresh configuration word.After described configuration words refreshes, need system reset that new configuration words is come into force, allow CPU enter new mode of operation.Wherein, described system reset can adopt CPU to automatically reset or the mode of manual reset system.Described CPU automatically resets and just is meant that CPU receives by the I/O mouth on the pin of the chip that resets, and when the processor output low level, the chip that resets output reset signal resets to system equipment.Lifting an example below describes, as shown in Figure 3, CPU11 receives on the MR pin of the special-purpose chip 15 (ADM706) that resets by the I/O mouth, when low level of CPU output, the RESET pin of ADM706 chip 15 will be exported the reset signal of an above pulsewidth of 200ms, and system equipment is resetted.Described manual reset is exactly the reset button by system.Described automatically reset and manual reset all is equivalent to PC and selects computer to restart and by the reset key of PC from menu.In case the startup reset signal promptly forwards described step 11 to and operates, promptly storer is by the current configuration words of data bus output.
The present invention also provides a kind of system that adjusts processor allocation mode, sees Fig. 4 for details.Described this system comprises: processor 11, configuration words storage unit 12 and configuration words output unit 13.Described configuration words storage unit 12 links to each other with processor 11 with data bus 17 by address bus 16, and an address space in order to deposit this configuration words and to can read when the system initialization is set in it at least; Described configuration words output unit 13 is connected respectively with configuration words storage unit 12 with processor 11, by detecting reset signal, read and latch from the configuration words 18 of configuration words storage unit 12 outputs, send it to the configuration pin of processor 11 after handling through delay.
Described configuration words 18 refers to the configuration status that CPU11 reads when resetting outside sheet, power in system, when the user presses reset key 15, CPU11 begins to start, at this moment CPU at first detects the state of configuration pin, it is the state of measurement processor MODE1, MODE2, MODE3, MODE4 pin, we just are called configuration words the state of described pattern MODE1～MODE4, described configuration words has determined the initial operation mode of CPU, and promptly described configuration words is read outside sheet by the pattern configurations pin by CPU in the electrification reset process.
Described configuration words storage unit 12 is the read-write nonvolatile memory of CPU, as the FLASH chip.CPU11 startup work be unable to do without BOOTROM, and when CPU11 started, program pointer pointed to certain address (this address is the cpu chip designs fix, can provide in the chip handbook) automatically, begins executive routine from this address.We begin to deposit one section program from this address, CPU11 just can carry out.We just are called bootrom this section program, are commonly called as bios program in PC.BOOTROM all uses the FLASH chip generally speaking, and the present invention uses BOOTROM as the configuration words memory device, can save special-purpose storer like this, can not increase extra cost to equipment.In the prior art, there is not the configuration words storer, but the fixed resistance that uses is connect extremely, can not in time make amendment, it must be returned factory and weld the mode of operation that outer meeting resistance changes processor again as if wanting to revise according to user's demand.In the present invention, if according to user's request, change the mode of operation of processor, promptly need to on-the-fly modify configuration words, a kind of embodiment is to increase a read-write memory to be used for depositing specially configuration words, but cost may slightly increase; The embodiment that another is more excellent is about to configuration words and directly leaves in the necessary BOOTROM storer of CPU startup, so compared with prior art, not only can not increase cost, can also in time adjust the mode of operation of processor according to demand.
CPU need be to 12 read-writes of configuration words storage unit, so the address bus 16 of CPU and data bus 17 have all been received configuration words storage unit 12.Be generally less than the data bus bit wide because the hardware configuration word bit of CPU is wide, get final product so only need in configuration words storage unit 12, take an address space.Configuration words is exactly a pin status, the state that reads when CPU powers on, no matter this state is to draw dead or send out from storer by resistance, CPU only is concerned about that the level of this pin is 0 or 1.Such as, the BOOTROM storer of 8bit, a memory cell, promptly an address space just has 8 bit data positions, has 8 independently 0 or 1, and we are these 8 configuration pin of exporting to CPU, and CPU just can obtain corresponding configuration mode.The CPU that mentions in background technology just only needs 4 configuration words, and address space of the storer of we 8bit just can provide 8 configuration words, has 4 to have more than needed.Therefore only at reseting stage, the address of CPU and data bus are all exported high-impedance state, need be with the address of memory device by being pulled down to the address that memory word is placed on the resistance.The data output dependence of storer is in the selection of address, the memory chip of the 256MB of 8 bit wides for example, 28 bit address lines are arranged, 8 position datawires, when CPU need visit the content of certain address, only need send appropriate address, memory chip will be exported 8 bit data of this storage unit from data line.The address wire of storer is 0,1 level more just still, the data that for example need address bit 0x20 in the reference-to storage, the level that only scale-of-two of address bit need be connected " 0000000000000000000000100000 " gets final product, (as for this address be CPU output or resistance draws, storer also is indifferent to), can from storage chip configuration words be read in the back that powers on, and after the equipment operate as normal, go up and drop-downly can not impact cpu bus.For example configuration words is placed on this address of 0x4 of the BOOTROM of CPU startup, only need to draw on the A2 address wire with the BOOTROM chip, that is to say by resistance A2 is received power supply, by resistance certain signal wire being received power supply is called and draws, be called drop-down with receiving, other address wires are drop-down, and the enable signal of reading of chip also draws to effectively by resistance.
The initial configuration word is used as a general data and is write together when the BOOTROM programming, described programming is by an equipment that is called chip burner one heap data to be write in the FLASH chip, it should be noted that this address can not be used as other purposes, because, this address is used for having stored configuration words, so just can not deposit other data.Particularly in use, the program of CPU has not been visited this address just.Only when the refresh configuration word, just visit.
Described configuration words output unit 13 latchs the CPU hardware configuration word of configuration words storage unit 12 from cpu data bus at reseting stage.When resetting, last drop-down by to the FLASH storage address, and output control signal can make FLASH when the output of cpu address data bus is ternary, export the memory contents of this address automatically, i.e. configuration words.Described three-state is exactly a high-impedance state, and it is unsettled to be equivalent to pin.At reseting period, the output of CPU is exactly ternary, by the cpu chip design decision.Latch after finishing no matter how data bus changes, the configuration words of output unit output no longer changes, and arrival resetted up to next time.Reset and judge, when RESET effectively will cause system reset by the RESET signal.If CPU only reads configuration words when RESET just arrives, then the reset signal of CPU is given CPU after need postponing to handle by the configuration words output unit again, guarantee that promptly output unit correctly latchs the configuration pin that CPU exported in the hardware configuration word, the RESET signal output after will postponing then resets to CPU.If the CPU initial configuration is undertaken by data bus, promptly disposing the input port is data bus, then the configuration words output unit is only finished the reset signal delay feature, no longer need latching to configuration words, it is that the configuration words of storing among the BOOTROM has outputed on the data bus reliably from the configuration words storage unit when guaranteeing that resetting of CPU arrived that the reset signal of CPU is postponed.
The input port of configuration words output unit, promptly cpu bus interface is unidirectional input interface, can not cause extra any influence to cpu data bus.
In addition, the present invention provides the another kind of system that adjusts processor allocation mode again, sees Fig. 5 for details.This system comprises at least: processor 11 and scratch pad memory 22.Described processor 11 has configuration pin, and the input on this configuration pin determines this processor operating mode; Scratch pad memory 22, link to each other with processor 11 with data bus 17 by address bus 16, wherein said address bus 16 is configured to point to a certain default address of scratch pad memory 22, should be placed with configuration words by the indicated storage space internal memory in default address, thereby processor 11 can read the configuration words in the storage space pointed of this address and it is outputed to the processor configuration pin when making system initialization.Wherein said configuration words sets in advance in the scratch pad memory.Should default address be by drop-down acquisition on the resistance on the address bus 14.The another kind of system that adjusts the processor mode configuration of the present invention, also comprise configuration words output unit 13, this configuration words output unit is connected respectively with scratch pad memory 22 with processor 11, by detecting reset signal 15, read and latch from the configuration words 18 of configuration words storage unit output, send it to the configuration pin of processor 11 after handling through delay.The realization of described system is identical with above-mentioned implementation procedure, is not here giving unnecessary details.
When CPU need upgrade mode of operation, only need write new startup configuration words to the configuration words storage unit by address and data bus, send the device reset order then, with device reset, can realize reconfiguring of cpu model.During the CPU operate as normal, the FLASH chip uses as the storer of CPU, and CPU can arbitrarily visit FLASH and carry out read-write operation.The address of memory stores configuration words also is that CPU can read and write at any time, when CPU decision needs to change configuration words, directly new configuration words has been write in the storer just.As for reset command, CPU only needs the chip that resets in the system has been sent an order of restarting just, just as our PC can select to restart computing machine in menu.Be an example below, CPU receives by the I/O mouth on the MR pin of the special-purpose chip ADM706 that resets, and when low level of CPU output, the RESET pin of ADM706 will be exported the reset signal of an above pulsewidth of 200ms, and system equipment is resetted.
Make the CPU mode of operation be no longer dependent on the configuration of simple fixation, dirigibility strengthens greatly, can onlinely switch to new mode of operation.Technical scheme realizes by resistance at present, revise the CPU mode of operation if desired, must send equipment back to manufacturer, under no electric resistance welding, the resistance of burn-oning and needing could change the mode of operation of CPU, for example in the prior art as if needing the CPU frequency of operation to have 100MHz to adjust to 200MHz, just must draw by outer meeting resistance configuration pin MODE4 from drop-down changing into, could adjust the mode of operation of processor.And the present invention need not revise equipment, only needs the user to issue an order of revising dominant frequency to CPU, and CPU is energy online modification configuration words just, and restarting equipment refreshes the work dominant frequency.
The above only is a preferred implementation of the present invention; should be pointed out that for those skilled in the art, under the prerequisite that does not break away from the principle of the invention; can also make some improvements and modifications, these improvements and modifications also should be considered as protection scope of the present invention.
Claims (12)
1, a kind of method of adjusting processor allocation mode, it is applied to it is characterized in that among the electronic system, comprises step:
A, provide a storage unit in order to depositing the configuration words of decision processor operating mode, and can read default configuration word default in this storage unit when making processor reset;
B, a new configuration words is write the configuration words storage unit of described address indication to replace original configuration words;
C, new configuration words is come into force, processor is by new configuration mode work.
According to the method for the described adjustment processor allocation mode of claim 1, it is characterized in that 2, system takies the address that the resistance on the address obtains the configuration words storage unit by adjusting default default configuration word in the steps A.
3, according to the method for claim 1 or 2 described adjustment processor allocation modes, it is characterized in that, between steps A and step B, also comprise step:
31) system latchs new configuration words, and new configuration words is input to the pattern configurations pin of processor by the detection to reset signal;
32) processor obtains new configuration mode by the described new configuration words of sampling.
4, according to the method for the described adjustment processor allocation mode of claim 3, it is characterized in that, step 31) the pattern configurations pin that in new configuration words is input to processor also comprises step before: whether the configuration pin of judging described processor adopts multiplex bus, if, sending to processor again after then reset signal being postponed a period of time resets, stable to guarantee configuration words output, otherwise, directly reset signal is sent to processor and reset.
According to the method for the described adjustment processor mode configuration of claim 1, it is characterized in that 5, also comprise step before the steps A: described default default configuration word writes the configuration words storage unit in advance by fever writes.
6, a kind of system that adjusts processor allocation mode comprises processor; It is characterized in that, also comprise:
The configuration words storage unit links to each other with processor with data bus by address bus, and an address space in order to deposit this configuration words and to can read when the system initialization is set in it at least;
The configuration words output unit is connected respectively with the configuration words storage unit with processor, by detecting reset signal, reads and latchs from the configuration words of configuration words storage unit output, sends it to the configuration pin of processor after handling through delay.
According to the system of the described adjustment processor allocation mode of claim 6, it is characterized in that 7, described configuration words storage unit is the nonvolatile memory that processor can be read and write.
8, according to the system of the described adjustment processor mode configuration of claim 7, it is characterized in that described configuration words memory unit address line is provided with pull down resistor in order to obtain the address that described initialization can read.
9, the system that disposes according to the described adjustment processor mode of claim 6, it is characterized in that, described configuration words output unit comprises latch, and described latch latchs and export the configuration words on this address when the address bus of processor and data bus are all exported three-state.
10. a system that adjusts processor allocation mode is characterized in that, this system comprises at least:
Processor, it has configuration pin, and the input on this configuration pin determines this processor operating mode;
Scratch pad memory, link to each other with processor with data bus by address bus, wherein said address bus is configured to point to a certain default address of storer, should be placed with configuration words by the indicated storage space internal memory in default address, thereby processor can read the configuration words in the storage space pointed of this address and it is outputed to the processor configuration pin when making system initialization.
According to the system of the described adjustment processor mode of claim 10 configuration, it is characterized in that 11, this default address is by drop-down acquisition on the resistance on the address bus.
12, the system that disposes according to the described adjustment processor mode of claim 10, it is characterized in that, also comprise the configuration words output unit, this configuration words output unit is connected respectively with scratch pad memory with processor, by detecting reset signal, read and latch from the configuration words of configuration words storage unit output, send it to the configuration pin of processor after handling through delay.
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| CN105630120A (en) * | 2014-11-03 | 2016-06-01 | 普天信息技术有限公司 | Processor hardware configuration word loading method and device |
| CN105630120B (en) * | 2014-11-03 | 2019-03-08 | 普天信息技术有限公司 | A kind of method and device of loading processing device hardware configuration word |
| CN105223492A (en) * | 2015-10-23 | 2016-01-06 | 英特格灵芯片(天津)有限公司 | A kind of chip pin configuration-system and method thereof |
| CN105223492B (en) * | 2015-10-23 | 2018-08-28 | 英特格灵芯片(天津)有限公司 | A kind of chip pin configuration system and method |
| CN109324995A (en) * | 2018-08-24 | 2019-02-12 | 江西洪都航空工业集团有限责任公司 | A method of configuration DSP initialization |
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