CN1678068A - Single-frequency network system of ground digital TV broadcast and its realizing method - Google Patents
Single-frequency network system of ground digital TV broadcast and its realizing method Download PDFInfo
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Abstract
The system comprises three parts: adapter in single frequency network, GPS receiver, and modulator of supporting ground digital TV broadcasting in single frequency network. At central transmitting terminal, the adapter inserts MIP packets in transmission code stream. MIP packet carries synchronizing time label relevant to GPS receiver and system maximal time delay to each relay station etc. In each relay station, synchronization system detects M1P packets, reading out time label and maximal time delay, measuring time delay of received signal, calculating out additional time delay. According to the additional time delay, TS flow is delayed properly in order to make signal synchronization again among relay stations. The disclosed scheme is realized through FPGA, and is applied to ground digital multiple media broadcasting transmission system forwaded by Tsinghua Univ. Favorable effect is obtained through actual try.
Description
Technical field
The invention belongs to digital information transmission technical field, particularly a kind of ground digital television broadcast (Digital TV terrestrialbroadcasting, single frequency network DTTB) (Single FrequnecyNetwork, SFN) system.
Background technology
In traditional analog television broadcast, for certain zone is covered, the adjacent transmission platform need use different frequencies to avoid the phase mutual interference, same frequency must just can be reused beyond certain distance, this is multiple frequency network, MFN (Multi-Frequnecy Network, MFN) mode, as shown in Figure 1.Under the multiple frequency network, MFN mode, for using a plurality of transposer stations in zone of reliable covering, because channeling covers a zone and need take a plurality of frequencies.Like this, one road signal demand takies several times bandwidth, has consumed a large amount of frequency spectrum resources.
Along with tv broadcasting technology develop rapidly, TV has entered a New Times now: the Digital Television epoch.Digital Television is meant the making of whole employing digital form, transmission and received television program, and image, the sound that the beholder is watched be equivalent to TV station's studio program quality do not have ghost image and " snowflake ".It is the high-tech product that integrates hi-tech developments such as digital signal and the information processing technology, digital communication technology, computer and network technology, microelectric technique.Digital television broadcasting mainly via satellite, three kinds of transmission meanss of cable TV and terrestrial wireless realize.It is generally acknowledged that satellite broadcasting focuses on that solving large tracts of land covers.Cable tv broadcast focuses on solution " information is to the family ", particularly at population inhabitation congested areas such as cities and towns.And terrestrial wireless broadcast is as the traditional means of television broadcasting and since its unique simple reception and move the ability that receives, can satisfy present information society desired " information be'ss to the people " primary demand.So ground digital television broadcast will possess great commercial value in following many decades.Along with the day of frequency resource is becoming tight, in Digital Television Terrestrial Broadcasting, introduced the notion of single frequency network.So-called single frequency network (SFN) is meant that the same time of several transmitting stations launch same signal on same frequency, with the reliable covering of realization to certain coverage.A kind of single frequency network covers schematic diagram as shown in Figure 2.Adopting single frequency network to carry out television broadcasting, is the result that the TV tech digitlization brings, and multi-carrier digital modulation and Digital Signal Processing make the application of single frequency network become possibility.
The most direct raising that benefit is a spectrum efficiency that single frequency network is brought.For traditional multiple frequency network, MFN, owing to do not need frequency reuse, transmitting one road signal in the coverage only needs a frequency range, has therefore saved a large amount of frequency resources, and for the television broadcasting of the big bandwidth of needs, this advantage is more outstanding.The diversity that a plurality of transmitting stations are worked and brought simultaneously makes that also the reliability that receives is enhanced, and obtains better program coverage rate.In addition, by adjustment and optimization to transmit network (as the height of the quantity of transmitter, distribution, individual transmitter, transmitting power etc.), also can reduce total power consumption, alleviate interference near other network, even the distribution of convenient, flexible as required change overlay area.
The proposition of single frequency network is allo with multi-carrier modulation, such as OFDM (OrthogonalFrequency Division Multiplexing, OFDM).A characteristics is-symbol of OFDM modulation system has protects interval (Guard Interval), drops on the multipath signal in the protection at interval, after the process equilibrium, not only can not produce front and back intersymbol interference (ISI), even has strengthened the power of useful signal.At a wireless environment that the multipath situation is serious, except the natural multipath that reflection, scattering etc. cause, the signal that other transmitter is launched on same frequency also produces a large amount of artificial multipaths, and may be strong multipath.Rely on the OFDM modulation, can more easily handle these complicated multipaths, make the application of single frequency network become possibility.
Digital Television Terrestrial Broadcasting (DTTB) mainly contains three standards at present in the world, be United States advanced television systems committee (Advanced Television Systems Committee, ATSC) eight level vestigial side bands of Yan Fa lattice code (Trellis-Coded 8-Level Vestigial Side-Band, 8-VSB) modulating system; Europe digital video broadcast-terrestrial (Digital Video Terrestrial Broadcasting-Terrestrial, DVB-T) Coded Orthogonal Frequency Division Multiplexing (COFDM) of standard employing (Coded Orthogonal Frequency Division Multiplexing, COFDM) modulation; The Japan broadcasting of floor synthetic service digital (Integrated Service Digital Broadcasting-Terrestrial, ISDB-T) the frequency band segment transmissions of Cai Yonging (Bandwidth Segmented Transmission, BST) OFDM.These three kinds of standard major different are modulation system, and wherein European standard and Nippon Standard have all adopted the multi-carrier modulation technology based on OFDM, and Unite States Standard has then been used the single-carrier modulated mode of 8-VSB.The difference of modulation system has directly influenced the application of single frequency network in various criterion.Adopt the European standard and the Nippon Standard of multi-transceiver technology to have natural good support ability for single frequency network.Generally speaking, the standard of U.S. ATSC is not supported synchronous single frequency network.Because what adopt is the single-carrier modulated technology, the ability of handling multipath mainly comes from adaptive equalizer, in the strong multi-path environment that has a plurality of transmitting stations to transmit simultaneously, realizes that the single frequency network of single carrier is quite difficult.Under the ATSC standard, except using the multiple frequency network, MFN scheme, also adopt the mode of cochannel regenerator (On-channel repeater) to come the expansion service zone.Regenerator receives the signal of transmitting station, after simply handling signal forwarding is gone out.Disturb in order to reduce artificial multipath, regenerator and receiver often use directional antenna.Because it is nonsynchronous that different regenerators transmits, therefore strictly speaking, this structure is not a single frequency network.Certainly, the cochannel regenerator also can be used as the expansion service zone in the scheme that adopts multi-carrier modulation.In addition, use directional antenna to help the realization of single frequency network too.
The specification requirement of most critical is exactly that each transmitter signal of broadcasting is all realized in frequency with on the time synchronously in the single frequency network.Frequency Synchronization requires the operating frequency of each single frequency network transmitter all mutually the same, for multi-carrier modulation, also requires the absolute frequency of each subcarrier to equate.Frequency Synchronization can be utilized the common reference frequency reference frequency of gps satellite (for example, from) to control all modulators and realize.
Among the OFDM protection length at interval determined system the maximum delay time of treatable multipath signal, thereby limited ultimate range between the single frequency network transmitter.Protection is long more at interval, and the distance between transmitter just can be big more, in DVB-T and ISDB-T standard, all provides the bigger at interval 8k mode of operation of protection to realize the single frequency network of large scale, covers a country or an area.Less protection pattern at interval is then in order to provide local single frequency network to cover.In the DVB standard, the relation between maximum delay expansion under the different protections at interval and transmitter between the distance is seen Fig. 3.
On the other hand, protection is long more at interval, and the efficiency of transmission of system is just low more, is to disturb for receiver and exceed protection multipath signal at interval, will influence systematic function.Therefore require transmitter to launch identical OFDM symbol, realize time synchronized, thereby allow limited protection on the processing multipath, play a role at interval, rather than consume on the synchronous error between the compensation transmitter in the identical time.
In the practical application of single frequency network, also have a class to be called the transmitting station of " mending a some device ", they mainly be distributed in because distance or decay are serious can't received signal than the zonule, " remedying " carried out in these zones.For the consideration of economic factor, these benefit point devices are compared general transmitter in synchronous requirement be not so strict, therefore often much lower than general single frequency network transmitter on transmitting power yet.
At present, adopt the countries and regions of DVB-T standard that European various countries, Australia, Singapore etc. are arranged.Countries such as the U.S., Canada, Korea S have adopted the ATSC standard.Japanese then adopted the ISDB-T standard of own proposition.After after a while preparation, test and adjustment, various countries mainly are that Digital Television Terrestrial Broadcasting has been carried out in big city and surrounding area thereof respectively in some areas.Wherein used the DVB-T standard that is based on substantially of single frequency network.
China also began the research work of high definition TV from 1994.And succeeded in developing Chinese first generation functional prototype of high definition TV in 1998.Organized the expert of China that Digital Television and digital high-definition television standard are formulated by radio and television responsible institution, SARFT(The State Administration of Radio and Television), the T-DMB host-host protocol that Tsing-Hua University proposes is one of testing scheme.This scheme adopts the TDS-OFDM technology of Domain Synchronous.TDS-OFDM belongs to multi-carrier modulation technology, and it has utilized spread spectrum technic, inserted the PN sequence time domain carry out frame synchronization, Frequency Synchronization, regularly synchronously, channel transfer characteristic is estimated and follow the tracks of phase noise etc.Owing to used spreading code, make the TDS-OFDM system have the superior function of spread spectrum communication, thereby the system that makes both had the advantage of COFDM, had avoided its shortcoming again.
The TDS-OFDM transmission system has adopted hierarchical frame structure, sees Fig. 4.It has periodically, and can and Absolute Time Synchronization.The elementary cell of frame structure is called signal frame, as shown in Figure 5.A signal frame comprises a Frame and adds a protection at interval, and protection length at interval can be 1/9 or 1/4 of data frame length.A signal frame group is according to protection length difference at interval, and the frame group comprises the individual signal frame shown in Fig. 5 structure of M (M is an integer) to constitute.A big frame (Megaframe) comprises 4 frame groups, comprises the TS bag of the MPEG-2 (Moving Picture Experts Group phase 2) of individual 188 bytes of N (N is an integer) in each big frame, and the TS pack arrangement as shown in Figure 6.A superframe comprises 480 frame groups (perhaps 120 big frames).
Because system adopts OFDM modulation and signal frame and these two characteristics of Absolute Time Synchronization, therefore realizing having inborn advantage on the single frequency network.The present invention has just proposed a kind of simple and reliable single frequency network implementation method based on this frame structure.
Summary of the invention
The objective of the invention is to propose mono-frequency network system and its implementation of a kind of ground digital television broadcast.
Mainly (Global Position System, GPS) ground digital television broadcast modulator three parts of receiver, support single frequency network are formed by single frequency adapter, global positioning system for the low complex degree that the present invention proposes, reliable single frequency network (SFN) system.At the center transmitting terminal, the SFN adapter is at transport stream (the Transport Stream of MPEG-2, TS) insert MIP (Megaframe Initialization Packet) bag in, carry lock in time label (the Synchronization Time Stamp relevant in the MIP bag with the GPS receiver, STS) with to the system maximum delay of each relay station (Max Delay, information such as MD).At each relay station, synchro system detects the MIP bag, therefrom readout time label and maximum delay, measure received signal time-delay (Measured Delay), calculate additional delay (Additional Delay), and suitably postpone TS stream according to additional delay, make the signal Synchronization that each relay station is launched once more.
The basic structure block diagram of the mono-frequency network system of the ground digital television broadcast that the present invention proposes as shown in Figure 7.The output of SFN adapter is a legal mpeg 2 transport stream, and the TS bag of output is formed one group according to some N, is called a big frame (Megaframe).N is an integer, and its size can be looked the transmission rate of TS code stream and be adjusted.In the cell site, center, in mpeg 2 transport stream, insert MIP bag with a SFN adapter every a big frame, carry label lock in time (STS) in the MIP bag and to the system maximum delay of each relay station.STS is that 1pps (the one pulse per second) signal of GPS receiver is to the time difference that big frame begins, as shown in Figure 8.
The frame structure of the structure of MIP and the TS of MPEG-2 stream is in full accord, and it comprises the packet header of 4 bytes and the payload of 184 bytes, and see Fig. 9 concrete the composition.Being explained as follows of each several part:
Packet header (transport packet heater): meet the definition in relevant TS stream packet header among the ISO/IEC 13818-1;
Indication (synchronizatio_id) synchronously: be used to discern used synchronous configuration, promptly whether adopt single frequency network to dispose synchronously;
Block length (section_length): be used for indicating the byte number of this bag following closely, comprise last position, do not comprise byte of padding to the CRC_32 verification;
Pointer field (pointer): first bag of indicating Megaframe subsequently with the bigit of 2 bytes is apart from the TS stream bag number of this MIP.The scope of pointer is decided by the used modulating mode of ground digital television broadcast;
Time synchronized label (synchronization_time_stamp): the time synchronized label of the MIP among M Megaframe is used to indicate the actual zero-time of M+1 Megaframe (beginning from beginning to transmit first bag, first byte) and nearest pulse with reference to the difference between (pps is obtained by GPS);
Maximum delay (maximum_delay): the maximum delay of the MIP among M Megaframe is used for indicating the difference of the beginning of the beginning of M+1 Megaframe of the digital baseband signal that sends from transmitting antenna and M+1 Megaframe the SFN adapter.The summation that the numerical value of maximum delay should be delayed time greater than the long delay in the main distributed network and modulator time-delay, repeater time-delay, feeder.The maximum time-delay of handling is 1 second;
CRC check (CRC 32): totally 32 bits do not comprise byte of padding during calculating;
Byte of padding (stuffing_yte): the value of each byte of padding is 0xFF.
All parameters of MIP (for example STS and MD) are all corresponding to adjacent next Megaframe, i.e. the Megaframe pointed of pointer in the pointer field.For example, the MIP parameter value among M Megaframe is corresponding to M+1 Megaframe.
At each acceptance point, when detecting MIP, synchro system in the ground digital television broadcast modulator will be measured the time started of local corresponding big frame and the time difference (Measured Delay) of the 1pps signal that obtains from the GPS receiver, as shown in figure 10.From the MIP that receives, obtain the maximum delay MD information of STS time tag and channel simultaneously, can calculate the additional delay (Additional Delay) that transmission code stream should add by following formula then:
STS+MD＝Measured?Delay+Additional?Delay
Each ground digital television broadcast modulator just can align the transmission code stream time-delay through the heterogeneous networks propagated according to the additional delay that calculates, the time synchronized requirement in using with the assurance single frequency network.
Synchro system can also provide a reset signal (Reset), makes the modulator of each relay station to reset at synchronization.Reset signal information is carried by MIP bag, and the cell site, center provides reset signal, and each relay station each modulator that resets simultaneously makes the signal frame of each modulator keep absolute synchronization.
The mono-frequency network system of the ground digital television broadcast that the present invention proposes contains single frequency adapter, GPS receiver, distributed network and synchro system etc., it is characterized in that it contains:
(1) MPEG-2 multiplexer comprises:
The subsystem of video that has video signal input terminal,
The audio subsystem that has audio signal input end,
Multiplexer, it is formed by single-unit order multiplex circuit and multi program multiplex circuit serial connection, two inputs of single-unit order multiplex circuit link to each other with the basic service flows output of subsystem of video, audio subsystem respectively, and several inputs of multi program multiplex circuit link to each other with several transmission stream outputs of single-unit order multiplex circuit respectively successively;
(2) single frequency adapter is the SFN adapter, and it contains:
(2.1) interface format translation circuit comprises:
Synchronous parallel interface is that SPI is transformed into the chip that Asynchronous Serial Interface is ASI,
Asynchronous Serial Interface is transformed into the chip of synchronous parallel interface;
Transport stream as requested is the interface format of TS stream, and when signal was imported, ASI linked to each other with the TS stream output of multi program multiplex circuit in the MPEG-2 multiplexer to the input of SPI interface format translation circuit;
(2.2) empty bag filtering circuit is realized in digital circuit, comprising:
Three shift registers that are connected in series successively, wherein the input of first shift register links to each other with the TS stream output of interface format translation circuit;
Empty bag decision circuitry, its three inputs link to each other with the TS stream input of first, second, third shift register respectively successively;
(2.3) buffer is realized in digital circuit, and it is a FIFO memory, and its input links to each other with the TS stream output after the filtering of sky bag that the sky bag is considered dividing circuit;
(2.4) big frame initialization bag is the formation circuit that MIP wraps, in digital circuit, realize, wherein, the frame structure of the TS stream of the structure of MIP bag and MPEG-2 is in full accord, it comprises the packet header of 4 bytes and the payload of 184 bytes, specifically be made up of following each several part, they are all identical and corresponding to each big frame initialization bag:
A) packet header,
B) indication synchronously,
C) block length is got rid of byte of padding,
D) pointer field, it is the bigit of one 2 byte, its expression first bag of big frame is subsequently wrapped number apart from the TS stream that this MIP wraps,
E) lock in time, label was STS, and label lock in time of the MIP bag in the big frame of M represents that the actual zero-time of M+1 big frame and the nearest reference pulse that is obtained by transmitting terminal GPS are the difference between the 1pps,
F) maximum delay is MD, the difference of the time started of M+1 big frame in individual big frame time started of its M+1 of expression from the digital baseband signal that transmitting antenna sends and the single frequency adapter, and the time-delay of maximum processing is 1 second,
G) CRC check, totally 32 bits,
H) byte of padding;
(2.5) the GPS receiver of transmitting terminal, it forms circuit interconnection by RS232 interface and MIP bag, and its 10M signal and reference pulse is that the output of 1pps links to each other with the respective input that the MIP bag forms circuit;
(2.6) multiplexing and rate adapted circuit, realize that in digital circuit it contains:
Multiplexing and rate adapted electronic circuit, it realizes that in digital circuit it has four signal input parts:
TS stream signal behind MIP bag indication useful signal, MIP bag, the empty index signal of buffer and the empty bag of filtering, its output signal has three kinds of situations:
When MIP bag index signal is effective, prioritised transmission MIP bag;
When invalid the and buffer of MIP bag index signal is not empty, transmission TS stream;
When invalid the and buffer of MIP bag index signal be empty, transmission is empty wrapped;
Program clock reference is the PCR correcting circuit, and its input links to each other with output multiplexing and the rate adapted electronic circuit;
(3) the transmission network adapter of transmitting terminal, its input links to each other with the TS stream output that meets Moving Picture Experts Group-2 of single frequency adapter, and it is the commercially available prod;
(4) distributed network, its input links to each other with the Network Transmission signal output part of transmission network adapter;
(5) a plurality of transmission network adapters of receiving terminal, their each input all is the Network Transmission signal;
(6) a plurality of GPS receivers of receiving terminal, the 10MHz signal and the reference pulse of they each is that the respective input of the MIP testing circuit in output and the synchro system of 1pps links to each other, and the 10MHz signal output part of each also links to each other with the respective input of phase-locked loop in the synchro system;
(7) a plurality of synchro systems of receiving terminal, their input link to each other with the TS stream output that meets Moving Picture Experts Group-2 of each transmission network adapter respectively, and each synchro system contains:
(7.1) interface format translation circuit comprises:
Synchronous parallel interface is that SPI is transformed into the chip that Asynchronous Serial Interface is ASI,
Asynchronous Serial Interface is transformed into the chip of synchronous parallel interface;
Transport stream as requested is the interface format of TS stream, and when signal was imported, ASI linked to each other with the TS stream output of the transmission network adapter of receiving terminal to the input of SPI interface format translation circuit;
(7.2) register is realized in digital circuit, and its input links to each other with the TS stream output of form translation circuit;
(7.3) transmission code stream packet header testing circuit is realized in digital circuit, and its input links to each other with the output of register, and its output is above-mentioned STS and MD value;
(7.4) counter, in digital circuit, realize, its measured signal input links to each other with the output of transmission code stream packet header testing circuit, its two counting control input signals are respectively 10MHZ clock and the 1pps pulses from receiving terminal GPS receiver, and its output is the local measurement delayed data;
(7.5) delay circuit is realized in digital circuit, and it contains:
Calculate the subtracter of additional delay, its minuend input links to each other with the output of transmission code stream packet header testing circuit, and its subtrahend input links to each other with the local measurement time-delay output of above-mentioned counter;
Buffer, its input links to each other with the output of subtracter, and another input links to each other with the TS stream output of above-mentioned register;
(7.6) digital PLL circuit, its input links to each other with the 10MHz clock signal output terminal of receiving terminal GPS receiver;
(8) a plurality of ground digital television broadcast modulators, its first input links to each other with the modulated carrier output of phase-locked loop circuit, second input is that the Reset output links to each other with the global reset signal of delay circuit, and the 3rd input links to each other with the time-delay output TS signal bit stream output of delay circuit.
The mono-frequency network system implementation method of the ground digital television broadcast that the present invention proposes is characterized in that it contains following steps:
(1) sets
Big frame initialization bag is that the frame structure of TS stream of the structure of MIP bag and MPEG-2 is in full accord, and it comprises the packet header of 4 bytes and the payload of 184 bytes, and its each several part is composed as follows:
A) packet header,
B) indication synchronously,
C) block length is got rid of byte of padding,
D) pointer field, it is the bigit of one 2 byte, its expression first bag of big frame is subsequently wrapped number apart from the TS stream that this MIP wraps,
E) lock in time, label was STS, and label lock in time of the MIP bag in the big frame of M represents that the actual zero-time of M+1 big frame and the nearest reference pulse that is obtained by transmitting terminal GPS are the difference between the 1pps,
F) maximum delay is MD, the difference of the time started of M+1 big frame in individual big frame time started of its M+1 of expression from the digital baseband signal that transmitting antenna sends and the single frequency adapter, and the time-delay of maximum processing is 1 second,
G) CRC check, totally 32 bits,
H) byte of padding;
(2) at the center transmitting terminal, be that the SFN adapter is not to insert the MIP bag among the TS every a big frame in the transport stream of MPEG-2 by single frequency adapter, big frame refers to one group of TS stream, and the N bag is arranged, and N is a positive integer, and its step is as follows:
(2.1) conversion interface format
When the interface modes of input TS stream is a synchronous parallel interface when being the SPI pattern, then directly input signal is inserted;
When the interface modes of input TS stream is an Asynchronous Serial Interface when being the ASI pattern, then to be converted to the SPI pattern to it;
(2.2) by detecting the bag sign of empty bag, the sky bag filtering in the input TS stream deposits data in the buffer in;
(2.3) by receiving 1pps pulse and the 10MHz clock signal from the GPS receiver, drawing the lock in time label by following formula is STS, and and the channel maximum delay be that MD joins in the TS stream bag that meets Moving Picture Experts Group-2 according to the MIP structure together, form MIP;
The STS=1pps signal is to the time of big frame initialization bag
(2.4) according to the principle of uniformly-spaced inserting, divide following three kinds of situations, from buffer and MIP bag formation circuit, read the TS flow data successively, be combined into the TS data flow of output:
A) when MIP bag index signal is effective, preferentially export the MIP bag;
When b) invalid and buffer is not empty when MIP bag index signal, output TS code stream;
When c) invalid and buffer be empty when MIP bag index signal, export the sky bag that meets Moving Picture Experts Group-2;
(2.5) the TS code stream to last output is that Program Clock Reference is the PCR jitter correction as program clock reference;
(2.6) if requiring the interface modes of the TS stream of output is ASI, then wanting the conversion interface modes is SPI;
(2.7) the transmission network adapter is sent to distributed network to the TS code stream of receiving;
(3) when receiving terminal is received the TS stream of process network delay from the transmission network adapter, the adjustment of delaying time according to the following steps:
(3.1) conversion interface format
When the interface modes of input TS stream is a synchronous parallel interface when being the SPI pattern, then directly input signal is inserted;
When the interface modes of input TS stream is an Asynchronous Serial Interface when being the ASI pattern, then to be converted to the SPI pattern to it;
(3.2) synchro system detects the MIP bag from the TS stream that receives, and reads STS and MD information;
(3.3) synchro system is measured local delayed data by receiving 1pps pulse and the 10MHz clock signal from the GPS receiver;
(3.4) synchro system is calculated additional delay according to following formula:
The local time-delay of additional delay=STS+MD-;
(3.5) synchro system is according to additional delay output TS code stream;
(3.6) synchro system output format output TS code stream as requested determines whether to carry out the interface modes conversion;
(3.7) the 10MHz clock signal of GPS receiver output is as the input signal of phase-locked loop circuit in the synchro system, the output of phase-locked loop as modulated carrier signal, as global reset signal, the time-delay TS stream of exporting together with delay circuit in the synchro system is sent to the ground digital television broadcast modulator the Reset of the delay circuit in synchro system output.
The mono-frequency network system implementation that the present invention proposes is based on ofdm system, utilized the periodicity of the hierarchical frame structure in the ground digital television broadcast agreement, the SFN adapter of designing inserts MIP regularly in the TS of MPEG-2 stream bag, and the synchro system of receiving terminal is exported during with the TS curtain coating according to the additional delay that calculates, also for modulator provides the whole network synchronous carrier modulation, Frequency Synchronization and time synchronized in the single frequency network technology have been realized well simultaneously.The real system experiment shows that the single frequency network implementation method of the ground digital television broadcast that the present invention proposes is simple and reliable.
The single frequency network implementation that the present invention proposes realizes with FPGA, and is applied in the T-DMB transmission system that Tsing-Hua University proposes, actual pilot and test has obtained good effect, and Figure 18 is the site test schematic diagram of single frequency network.
Description of drawings
Fig. 1 is the multiple frequency network, MFN planning that is used for analog television broadcast.
Fig. 2 is that a kind of single frequency network covers schematic diagram.
Fig. 3 be in the DVB-T standard different protections at interval following maximum delay expand and transmitter between distance.
Fig. 4 is the hierarchical frame structure of T-DMB host-host protocol.
Fig. 5 is the structure of baseband signal frame in the T-DMB host-host protocol.
Fig. 6 is the TS pack arrangement of MPEG-2.
Fig. 7 is the basic structure of the ground digital television broadcast mono-frequency network system of the present invention's proposition.
Fig. 8 is STS schematic diagram in the single frequency network implementation method of the present invention's proposition.
Fig. 9 is the structure of MIP in the single frequency network implementation method of the present invention's proposition.
Fig. 1 O measures the time-delay schematic diagram for receiving terminal in the single frequency network implementation method of the present invention's proposition.
Figure 11 is a MPEG-2 drop multiplexer architecture schematic diagram.
Figure 12 is the structured flowchart of the single frequency adapter of the present invention's proposition.
The receiving terminal synchronous system architecture block diagram that Figure 13 proposes for the present invention.
Figure 14 is the structured flowchart of the sky bag filtering circuit of the present invention's proposition.
Figure 15 is the structured flowchart of the multiplexing and rate adapted circuit of the present invention's proposition.
Figure 16 is the structured flowchart of the MIP testing circuit of the present invention's proposition.
Figure 17 is the structured flowchart of the delay circuit of the present invention's proposition.
Figure 18 is a single frequency network site test schematic diagram.
Embodiment
Below in conjunction with accompanying drawing theory analysis of the present invention and specific embodiment are described in detail.
Fig. 7 has shown the basic structure of the ground digital television broadcast mono-frequency network system that the present invention proposes.Native system mainly is made up of ground digital television broadcast modulator three parts of single frequency adapter, GPS receiver, support single frequency network.At the center transmitting terminal, the SFN adapter decide the compartment of terrain and is inserted the MIP bag in the TS of MPEG-2 stream, carries the lock in time label (STS) relevant with the GPS receiver in the MIP bag and arrives the system maximum delay information such as (MD) of each relay station.At each relay station, synchro system detects the MIP bag, therefrom readout time label and maximum delay, measure received signal time-delay (MeasuredDelay), calculate additional delay (Additional Delay), and suitably postpone TS stream according to additional delay, make the signal Synchronization that each relay station is launched once more.
The mono-frequency network system of the ground digital television broadcast that the present invention proposes mainly is made of following components:
1) MPEG-2 multiplexer.Basic service flows and auxiliary data is multiplexing, be output as TS stream.Structural representation as shown in figure 11.
2) GPS receiver.Be mainly used in to single frequency adapter provides 1pps reference pulse and 10MHz synchronised clock, the existing GPS receiver of above-mentioned two signals that can provide can be suitable for.
3) single frequency adapter.Insert the MIP bag that comprises STS and MD information in the TS stream that is mainly used at MPEG-2, receive for receiving terminal and calculate additional delay, the MIP package location of insertion can be adjusted as requested voluntarily.Simultaneously, adapter can also be realized the rate adapted of system input by inserting empty bag.The structured flowchart of SFN adapter as shown in figure 12.
4) transmission network adapter.At transmitting terminal, be input as the TS stream of synchronous parallel interface (SPI) or Asynchronous Serial Interface (ASI) form, be output as the signal of Network Transmission such as being fit to optical fiber or cable; At receiving terminal, input and output are opposite, finish opposite function.This existing ready-made product can be used.
5) distributed network.Transmission medium can be cable or optical fiber etc.
6) synchro system.It generally is arranged in the ground digital television broadcast modulator, and major function is to calculate additional delay by measurement time-delay (Measured Delay) of this locality and STS and the MD that obtains from the MIP that receives, and the TS code stream is delayed time the corresponding time.The modulated carrier that also will provide global reset signal simultaneously and lock with gps signal.The synchronous system architecture block diagram as shown in figure 13.
7) ground digital television broadcast modulator.Being used for will be through launching after the modulation of synchronous adjusted TS stream, and this modulator has actual product.
The structured flowchart of the SFN adapter that the present invention proposes as shown in figure 12.Its process of inserting MIP and carry out rate adapted in the TS code stream is divided into following steps and finishes:
1) if the interface modes of input TS code stream is Asynchronous Serial Interface (ASI), then elder generation is converted to synchronous parallel interface (SPI) pattern with the code stream of ASI form, in native system, use the CY7B933 of Cypress company to realize, also can use the of the same type chip suitable to realize with its function as acp chip; If the interface modes of input TS code stream is SPI, then directly input signal is inserted.
2) by detecting the bag sign PID=0x1FFF of empty bag, the sky bag filtering with in the TS code stream of input deposits data flow in the buffer in then.Particular circuit configurations as shown in figure 14.
3) by receiving 1pps pulse and 10MHz clock signal, calculate label STS lock in time from the GPS receiver, and and channel maximum delay information MD join in the TS stream bag that meets Moving Picture Experts Group-2 according to structure shown in Figure 9 together, form MIP.
4) according to equally spaced insertion rule, from buffer and MIP formation circuit, read the TS flow data successively, the signal of output can be divided into three kinds of situations: when MIP bag index signal is effective, prioritised transmission MIP bag; When invalid and buffer is not empty when MIP bag index signal, transmission TS code stream; When invalid and buffer be empty when MIP bag index signal, transmit the sky bag that meets Moving Picture Experts Group-2.In addition, also the TS stream of exporting at last to be made the PCR jitter correction.This is multiplexing and the rate adapted circuit, and concrete structure as shown in figure 15.
5) be ASI if require the interface modes of the TS code stream of output, then the TS circulation that meets the SPI pattern to be changed to the TS stream output that meets the ASI pattern, in native system, use the CY7B923 of Cypress company to realize, also can use the of the same type chip suitable to realize with its function as acp chip; If requiring the interface modes of output TS code stream is SPI, then directly signal is exported.
Wherein, above-mentioned sky bag filtering circuit, cache circuit, MIP form circuit and multiplexing and usefulness hardware programming language realizations in FPGA of rate adapted circuit.
The receiving terminal synchronous system architecture block diagram that the present invention proposes as shown in figure 13.The process of its time-delay output TS code stream is divided into following steps and finishes:
1) if the interface modes of input TS code stream is ASI, then elder generation is converted to the SPI pattern with the code stream of ASI form, uses the CY7B933 of Cypress company to realize as acp chip in native system, also can use the of the same type chip suitable with its function to realize; If the interface modes of input TS code stream is SPI, then directly input signal is inserted.
2) by checking MIP structure shown in Figure 9, from the TS stream that receives, detect MIP, read wherein STS and MD information.The structure of MIP testing circuit as shown in figure 16.
3) by receiving 1pps pulse and 10MHz clock signal, measure local delayed data Measured Delay from the GPS receiver.
4) calculate additional delay Additional Delay according to STS, MD and local time-delay Measured Delay information according to following formula:
STS+MD＝Measured?Delay+Additional?Delay
5) according to Additional Delay time-delay output TS code stream.The basic structure of above-mentioned delay circuit as shown in figure 17.
6) be ASI if require the interface modes of the TS code stream of output, then the TS circulation that meets the SPI pattern to be changed to the TS stream output that meets the ASI pattern, in native system, use the CY7B923 of Cypress company to realize, also can use the of the same type chip suitable to realize with its function as acp chip; If requiring the interface modes of output TS code stream is SPI, then directly signal is exported.
7) the 10MHz clock that the GPS receiver is exported is as the reference source, and for the ground digital television broadcast modulator provides modulated carrier signal, this can realize by phase-locked loop circuit commonly used in the digital communication.
Wherein, above-mentioned MIP testing circuit, delay circuit are all realized with the hardware programming language in FPGA.
Claims (2)
1. the mono-frequency network system of ground digital television broadcast contains single frequency adapter, GPS receiver, distributed network and synchro system etc., it is characterized in that it contains:
(1) MPEG-2 multiplexer comprises:
The subsystem of video that has video signal input terminal,
The audio subsystem that has audio signal input end,
Multiplexer, it is formed by single-unit order multiplex circuit and multi program multiplex circuit serial connection, two inputs of single-unit order multiplex circuit link to each other with the basic service flows output of subsystem of video, audio subsystem respectively, and several inputs of multi program multiplex circuit link to each other with several transmission stream outputs of single-unit order multiplex circuit respectively successively;
(2) single frequency adapter is the SFN adapter, and it contains:
(2.1) interface format translation circuit comprises:
Synchronous parallel interface is that SPI is transformed into the chip that Asynchronous Serial Interface is ASI,
Asynchronous Serial Interface is transformed into the chip of synchronous parallel interface;
Transport stream as requested is the interface format of TS stream, and when signal was imported, ASI linked to each other with the TS stream output of multi program multiplex circuit in the MPEG-2 multiplexer to the input of SPI interface format translation circuit;
(2.2) empty bag filtering circuit is realized in digital circuit, comprising:
Three shift registers that are connected in series successively, wherein the input of first shift register links to each other with the TS stream output of interface format translation circuit;
Empty bag decision circuitry, its three inputs link to each other with the TS stream input of first, second, third shift register respectively successively;
(2.3) buffer is realized in digital circuit, and it is a FIFO memory, and its input links to each other with the TS stream output after the filtering of sky bag that the sky bag is considered dividing circuit;
(2.4) big frame initialization bag is the formation circuit that MIP wraps, in digital circuit, realize, wherein, the frame structure of the TS stream of the structure of MIP bag and MPEG-2 is in full accord, it comprises the packet header of 4 bytes and the payload of 184 bytes, specifically be made up of following each several part, they are all identical and corresponding to each big frame initialization bag:
A) packet header,
B) indication synchronously,
C) block length is got rid of byte of padding,
D) pointer field, it is the bigit of one 2 byte, its expression first bag of big frame is subsequently wrapped number apart from the TS stream that this MIP wraps,
E) lock in time, label was STS, and label lock in time of the MIP bag in the big frame of M represents that the actual zero-time of M+1 big frame and the nearest reference pulse that is obtained by transmitting terminal GPS are the difference between the 1pps,
F) maximum delay is MD, the difference of the time started of M+1 big frame in individual big frame time started of its M+1 of expression from the digital baseband signal that transmitting antenna sends and the single frequency adapter, and the time-delay of maximum processing is 1 second,
G) CRC check, totally 32 bits,
H) byte of padding;
(2.5) the GPS receiver of transmitting terminal, it forms circuit interconnection by RS232 interface and MIP bag, and its 10M signal and reference pulse is that the output of 1pps links to each other with the respective input that the MIP bag forms circuit;
(2.6) multiplexing and rate adapted circuit, realize that in digital circuit it contains:
Multiplexing and rate adapted electronic circuit, it realizes that in digital circuit it has four signal input parts:
TS stream signal behind MIP bag indication useful signal, MIP bag, the empty index signal of buffer and the empty bag of filtering, its output signal has three kinds of situations:
When MIP bag index signal is effective, prioritised transmission MIP bag;
When invalid the and buffer of MIP bag index signal is not empty, transmission TS stream;
When invalid the and buffer of MIP bag index signal be empty, transmission is empty wrapped;
Program clock reference is the PCR correcting circuit, and its input links to each other with output multiplexing and the rate adapted electronic circuit;
(3) the transmission network adapter of transmitting terminal, its input links to each other with the TS stream output that meets Moving Picture Experts Group-2 of single frequency adapter, and it is the commercially available prod;
(4) distributed network, its input links to each other with the Network Transmission signal output part of transmission network adapter;
(5) a plurality of transmission network adapters of receiving terminal, their each input all is the Network Transmission signal;
(6) a plurality of GPS receivers of receiving terminal, the 10MHz signal and the reference pulse of they each is that the respective input of the MIP testing circuit in output and the synchro system of 1pps links to each other, and the 10MHz signal output part of each also links to each other with the respective input of phase-locked loop in the synchro system;
(7) a plurality of synchro systems of receiving terminal, their input link to each other with the TS stream output that meets Moving Picture Experts Group-2 of each transmission network adapter respectively, and each synchro system contains:
(7.1) interface format translation circuit comprises:
Synchronous parallel interface is that SPI is transformed into the chip that Asynchronous Serial Interface is ASI,
Asynchronous Serial Interface is transformed into the chip of synchronous parallel interface;
Transport stream as requested is the interface format of TS stream, and when signal was imported, ASI linked to each other with the TS stream output of the transmission network adapter of receiving terminal to the input of SPI interface format translation circuit;
(7.2) register is realized in digital circuit, and its input links to each other with the TS stream output of form translation circuit;
(7.3) transmission code stream packet header testing circuit is realized in digital circuit, and its input links to each other with the output of register, and its output is above-mentioned STS and MD value;
(7.4) counter, in digital circuit, realize, its measured signal input links to each other with the output of transmission code stream packet header testing circuit, its two counting control input signals are respectively 10MHZ clock and the 1pps pulses from receiving terminal GPS receiver, and its output is the local measurement delayed data;
(7.5) delay circuit is realized in digital circuit, and it contains:
Calculate the subtracter of additional delay, its minuend input links to each other with the output of transmission code stream packet header testing circuit, and its subtrahend input links to each other with the local measurement time-delay output of above-mentioned counter;
Buffer, its input links to each other with the output of subtracter, and another input links to each other with the TS stream output of above-mentioned register;
(7.6) digital PLL circuit, its input links to each other with the 10MHz clock signal output terminal of receiving terminal GPS receiver;
(8) a plurality of ground digital television broadcast modulators, its first input links to each other with the modulated carrier output of phase-locked loop circuit, second input is that the Reset output links to each other with the global reset signal of delay circuit, and the 3rd input links to each other with the time-delay output TS signal bit stream output of delay circuit.
2. the mono-frequency network system implementation method of ground digital television broadcast is characterized in that it contains following steps:
(1) sets
Big frame initialization bag is that the frame structure of TS stream of the structure of MIP bag and MPEG-2 is in full accord, and it comprises the packet header of 4 bytes and the payload of 184 bytes, and its each several part is composed as follows:
A) packet header,
B) indication synchronously,
C) block length is got rid of byte of padding,
D) pointer field, it is the bigit of one 2 byte, its expression first bag of big frame is subsequently wrapped number apart from the TS stream that this MIP wraps,
E) lock in time, label was STS, and label lock in time of the MIP bag in the big frame of M represents that the actual zero-time of M+1 big frame and the nearest reference pulse that is obtained by transmitting terminal GPS are the difference between the 1pps,
F) maximum delay is MD, the difference of the time started of M+1 big frame in individual big frame time started of its M+1 of expression from the digital baseband signal that transmitting antenna sends and the single frequency adapter, and the time-delay of maximum processing is 1 second,
G) CRC check, totally 32 bits,
H) byte of padding;
(2) at the center transmitting terminal, be that the SFN adapter is not to insert the MIP bag among the TS every a big frame in the transport stream of MPEG-2 by single frequency adapter, big frame refers to one group of TS stream, and the N bag is arranged, and N is a positive integer, and its step is as follows:
(2.1) conversion interface format
When the interface modes of input TS stream is a synchronous parallel interface when being the SPI pattern, then directly input signal is inserted;
When the interface modes of input TS stream is an Asynchronous Serial Interface when being the ASI pattern, then to be converted to the SPI pattern to it;
(2.2) by detecting the bag sign of empty bag, the sky bag filtering in the input TS stream deposits data in the buffer in;
(2.3) by receiving 1pps pulse and the 10MHz clock signal from the GPS receiver, drawing the lock in time label by following formula is STS, and and the channel maximum delay be that MD joins in the TS stream bag that meets Moving Picture Experts Group-2 according to the MIP structure together, form MIP;
The STS=1pps signal is to the time of big frame initialization bag
(2.4) according to the principle of uniformly-spaced inserting, divide following three kinds of situations, from buffer and MIP bag formation circuit, read the TS flow data successively, be combined into the TS data flow of output:
A) when MIP bag index signal is effective, preferentially export the MIP bag;
When b) invalid and buffer is not empty when MIP bag index signal, output TS code stream;
When c) invalid and buffer be empty when MIP bag index signal, export the sky bag that meets Moving Picture Experts Group-2;
(2.5) the TS code stream to last output is the PCR jitter correction as program clock reference;
(2.6) if requiring the interface modes of the TS stream of output is ASI, then wanting the conversion interface modes is SPI;
(2.7) the transmission network adapter is sent to distributed network to the TS code stream of receiving;
(3) when receiving terminal is received the TS stream of process network delay from the transmission network adapter, the adjustment of delaying time according to the following steps:
(3.1) conversion interface format
When the interface modes of input TS stream is a synchronous parallel interface when being the SPI pattern, then directly input signal is inserted;
When the interface modes of input TS stream is an Asynchronous Serial Interface when being the ASI pattern, then to be converted to the SPI pattern to it;
(3.2) synchro system detects the MIP bag from the TS stream that receives, and reads STS and MD information;
(3.3) synchro system is measured local delayed data by receiving 1pps pulse and the 10MHz clock signal from the GPS receiver;
(3.4) synchro system is calculated additional delay according to following formula:
The local time-delay of additional delay=STS+MD-;
(3.5) synchro system is according to additional delay output TS code stream;
(3.6) synchro system output format output TS code stream as requested determines whether to carry out the interface modes conversion;
(3.7) the 10MHz clock signal of GPS receiver output is as the input signal of phase-locked loop circuit in the synchro system, the output of phase-locked loop as modulated carrier signal, as global reset signal, the time-delay TS stream of exporting together with delay circuit in the synchro system is sent to the ground digital television broadcast modulator the Reset of the delay circuit in synchro system output.
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