CN1655458A - Frequency synthesizer and automatic gain calibration method - Google Patents
Frequency synthesizer and automatic gain calibration method Download PDFInfo
- Publication number
- CN1655458A CN1655458A CN 200410005348 CN200410005348A CN1655458A CN 1655458 A CN1655458 A CN 1655458A CN 200410005348 CN200410005348 CN 200410005348 CN 200410005348 A CN200410005348 A CN 200410005348A CN 1655458 A CN1655458 A CN 1655458A
- Authority
- CN
- China
- Prior art keywords
- frequency
- voltage
- signal
- control signal
- gain
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 238000000034 method Methods 0.000 title claims abstract description 20
- 238000011045 prefiltration Methods 0.000 claims description 29
- 230000004044 response Effects 0.000 claims description 24
- 239000000284 extract Substances 0.000 claims description 9
- 238000001914 filtration Methods 0.000 claims description 8
- 230000008859 change Effects 0.000 claims description 3
- 230000008676 import Effects 0.000 claims description 2
- 238000000605 extraction Methods 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 9
- 230000005540 biological transmission Effects 0.000 description 3
- 238000004519 manufacturing process Methods 0.000 description 3
- 238000004364 calculation method Methods 0.000 description 2
- 239000003990 capacitor Substances 0.000 description 2
- 238000006243 chemical reaction Methods 0.000 description 2
- 230000007812 deficiency Effects 0.000 description 2
- 238000007599 discharging Methods 0.000 description 2
- 230000008569 process Effects 0.000 description 2
- 230000008901 benefit Effects 0.000 description 1
- 230000008878 coupling Effects 0.000 description 1
- 238000010168 coupling process Methods 0.000 description 1
- 238000005859 coupling reaction Methods 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 238000002955 isolation Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000010355 oscillation Effects 0.000 description 1
- 230000008054 signal transmission Effects 0.000 description 1
- 238000004088 simulation Methods 0.000 description 1
- 238000006467 substitution reaction Methods 0.000 description 1
Images
Landscapes
- Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
Abstract
This invention relates to frequency synthesizer and automatic gain correction method, which is modulated for inputting signals, wherein, the synthesizer comprises the following: locking phase loop, phase comparer to generate one signal; low pass filter to generate control signal on the signal filter; pressure control oscillator to generate relative frequency output controlled by the signal control; frequency divider input to the phase comparer input end; front filter with frequency responding to the locking phase loop frequency reverse and inputting one signal to the front filter and outputting frequency divider through controlling signals; automatically gains correcting circuit to receive low pass filter control signals and computing relative pressure oscillator current gains according to control signal voltage and outputting adjusting current gains.
Description
Technical field
The present invention particularly is to provide the frequency synthesizer of a tool automatic gain calibration relevant for a kind of frequency synthesizer.
Background technology
Present wireless telecommunications transmit in the receiver, generally all are to use a phase-locked loop to produce carrier signal, then the data of required transmission are modulated the signal that produces modulation.The phase-locked loop is made up of a frequency plot comparator, a low pass loop filter, a voltage controlled oscillator and a frequency divider.Wherein the function of frequency plot comparator will relatively produce the signal of an error through the signal after the frequency divider frequency division and reference clock signal, convert corresponding electric current again to.Obtain after the electric current, low pass loop filter is discharged and recharged,, it is done the operation of charging if reference clock is very fast, otherwise,, then be the operation of it being done discharge if reference clock is slower, current conversion is become voltage, and the voltage that obtains is controlled controller again, and it is operated on the frequency of being scheduled to.
The method of modulation signal has multiple, general mode exactly oscillator directly to be modulated, and just after the phase-locked loop is locked into needed carrier frequency, feedback path is cut off, then directly to oscillator modulates.The problem that this kind way exists is that the phase-locked loop must periodically connect, and avoids the situation of carrier frequency drift too serious.And when modulation, also must be quite careful, with oscillator and noise isolation on every side, just can be not disturbed.
Another kind of mode for example No. 4965531 patent of the U.S. by the digital modulation mode of phase-locked loop, the disclosed loop circuit of people such as Reley.Its mode is the frequency synthesizer with a coefficient N, obtain desired frequency through changing the value that frequency divider removed, and for example No. 4864257 patent of United States Patent (USP) is by the disclosed patent of people such as Vandegraaf, and its modulation signal then directly can be to the oscillator modulates of loop circuit.Though above-mentioned two cases itself because carrier frequency is because the relation of loop circuit and can drift but has the problem generation of frequency range deficiency.Therefore, the radio-frequency head branch of signal is filtered and is produced the oscillation frequency signal of distortion.The frequency of transmission signals will be limited be lived.
In order to compensate the deficiency of the two frequency range, there is SOME METHODS to be suggested.Use the mode of analogue amplifier in by the disclosed patent of people such as Vandegraaf No. the 4864257th, aforesaid U.S. Patent, with modulation signal through a frequency response be the phase-locked loop oppositely after, deliver among the phase-locked loop.But the compensation way of simulation can make both frequency responses not match because of the drift of manufacturing process and temperature.So Perrot, the mode that promptly discloses with digital prefilter in the 6008th, No. 703 patent of United States Patent (USP) compensates, with the influence of avoiding manufacturing process and temperature drift to be caused.Such design still exists problem, is exactly that so, unmatched situation can take place once again because the increase of channel and frequency range makes the number of oscillator and working range and then to increase.So Norman is at United States Patent (USP) the 6th, 515, mentioned the modulation system of dual-port in No. 553 patents, just in the middle of the process of modulation, signal through a high pass filter, is added to the HFS of signal in the control circuit of oscillator.So can reach the characteristic of an all-pass filter.But analog element has the influence that drift caused of manufacturing process and temperature when realizing, and the area on layout is also big than digital circuit, makes that cost and power consumption all can be than higher.
Fig. 1 represents the frequency synthesizer of a traditional tool prefilter, and phase-locked loop 1 comprises a phase comparator 10, low pass filter 11, voltage controlled oscillator 12, a N/N+1 frequency divider 13 and a sigma-delta modulator 14.Because phase-locked loop 1 itself has a low pass filter 11, in the time of therefore can making its signal transmission in the HFS distortion.So in order to reach wideband modulation, we can establish a prefilter 15 in order to overcome the low-frequency filter characteristics of phase-locked loop when the transmission signals before frequency synthesizer, signal is given filtering.This preposition filter 15 in frequency response and the frequency response of phase-locked loop 1 be fully reverse, for example shown in Fig. 2 A, so can produce an all-pass filter, allow on the output that is sent to voltage controlled oscillator 12 in the phase-locked loop 1 that signal can be complete.
Yet a common frequency synthesizer is in order to be operated on the quite wide frequency band, and the voltage controlled oscillator that we can design many different frequency bands goes to synthesize by frequency synthesizer.Owing to the consideration on the design area, only can have only the value of one group of prefilter usually.Yet, when we switch same oscillator different frequency, switch a different oscillator or when the equivalence value of impedance was different, the loop gain of opening that is produced will be different, cause the characteristic on the phase-locked loop and prefilter can be different.So the result can allow the signal transport process, will produce distortion because of the difference of frequency response.The distortion that this kind causes because of filter freguency response does not match has two kinds of possibilities, and for example shown in Fig. 2 B and Fig. 2 C, Fig. 2 B represents to work as the situation (f of the frequency range of preposition filter less than the phase-locked loop
C-pre＜f
C-pll); Fig. 2 C represents to work as the situation (f of the frequency range of preposition filter greater than the phase-locked loop
C-pre＞f
C-pll), two kinds of situations all can not cause the distortion of signal because of frequency range matches.
Summary of the invention
In view of this, main purpose of the present invention is to provide the frequency synthesizer of a tool automatic gain calibration.
For reaching aforementioned purpose, the invention provides a kind of frequency synthesizer, comprise a phase-locked loop: the phase-locked loop has: a phase comparator can produce one first signal; One low pass filter carries out filtering and produces control signal this first signal; One voltage controlled oscillator is subjected to this control signal to produce corresponding first frequency and exports; One frequency divider will export the input of this phase comparator to behind this frequency division of the frequency; One modulator is connected to this frequency divider; One prefilter receives this input signal and delivers to this modulator after with this signal filtering; One automatic gain calibration circuit, receive this low pass filter and export this control signal, calculate the current gain value of this phase comparator behind the magnitude of voltage according to this control signal, and export the current gain of this control signal in this phase comparator to, make this prefilter frequency response can with the frequency response coupling of this phase-locked loop.
The present invention proposes a method in addition, gain in order to the frequency synthesizer of automatic calibration one tool phase-locked loop, wherein this frequency synthesizer includes a prefilter and a loop filter, the frequency response of this prefilter and this phase-locked loop is reciprocal each other, this method comprises: (a). extract control signal voltage to one an automatic gain calibration circuit, this control signal is the output of this loop filter; (b). calculate current gain value according to this control signal magnitude of voltage corresponding to this control signal; And (c). control this phase comparator, the current value that makes this control signal is to should the current gain value, make this prefilter frequency can with the frequency match of this frequency divider.
For above-mentioned and other purposes of the present invention, feature and advantage can be become apparent, a preferred embodiment cited below particularly, and cooperate appended diagram, be described in detail below.
Description of drawings
Fig. 1 represents the frequency synthesizer of a traditional tool prefilter;
Fig. 2 A represents that the frequency range of prefilter equals the frequency response schematic diagram of frequency synthesizer;
Fig. 2 B represents to work as the frequency response schematic diagram of the frequency range of preposition filter less than frequency synthesizer;
Fig. 2 C represents to work as the frequency response schematic diagram of the frequency range of preposition filter greater than frequency synthesizer;
Fig. 3 represents the system block diagrams of a preferred embodiment of the present invention
Fig. 4 represents the system block diagrams of another preferred embodiment of the present invention;
Fig. 5 represents the detailed circuit calcspar of this phase comparator.
Fig. 6 represents the circuit block diagram of the another preferred embodiment of the present invention.
Fig. 7 represents by the automatic gain calibration method of being implemented by the foregoing description.
Fig. 8 represents a flow chart of steps.
Fig. 9 represents a flow chart of steps.
The related symbol explanation
Frequency synthesizer～1; Frequency plot comparator～10; Low pass loop filter～11; Voltage controlled oscillator～12; Frequency divider～13; Sigma-delta modulator～14; Prefilter～15; Automatic gain calibration module～20; Frequency selector～16; Adder～18; Analog-digital converter～200; Controller～201; The gain table of comparisons～202; Phase detectors～100; Charge-discharge circuit～103; Output～101,102; Switch～S1; Switch～S2; Switch～S
c, charging current source～2
0I
1～2
nI
1N position digital signal～gain_control_sink[n:0]; Electric capacity～C
PController～201 '.
Embodiment
Fig. 3 represents the system block diagrams of a preferred embodiment of the present invention, this frequency synthesizer comprises that a phase comparator 10, a low pass filter 11, a voltage controlled oscillator 12, a frequency divider 13, a modulator have a sigma-delta modulator 14 and a frequency selector 16, a prefilter 15, and an automatic gain calibration module 20.
Voltage controlled oscillator 12 receives this filtered control signal input, to convert frequency (first frequency) output of desire modulation to.
Automatic gain calibration circuit 20, receive the control signal that this low pass filter 11 is exported, when this phase-locked loop 1 is stable when locking the frequency of expectation, calculate of the gain extremely gain of expectation of the corresponding current yield value of phase comparator 10 with compensated voltage controlled oscillator 12 according to the magnitude of voltage of this control signal, this corresponding current yield value exports the current gain of this control signal of control in this phase comparator 10 to, and the frequency response of this prefilter 15 can be mated with the frequency response of this phase-locked loop 1.
Phase-locked loop 1 among Fig. 3 is a loop circuit, and phase comparator 10, low pass filter 11 and voltage controlled oscillator 12 then are out the loop, sees also following formula (1), and the relational expression between loop gain and loop circuit gain is opened in its expression one:
Wherein CL (S) represents the loop circuit gain; Loop gain is opened in OL (S) representative; N is the divisor of this frequency divider 13
And in the formula (1), its
Wherein k φ is the gain of this phase comparator 10, and kvco is the gain of this voltage controlled oscillator 12, and Z (S) is the impedance of low pass filter, wherein the controlled definite value that is made as of Z (S).
By above-mentioned formula (2) as can be known, the frequency response of prefilter 15 is exactly the frequency response by the loop circuit, if the resistance value Z (S) of low pass filter is accurately, influence the just gain kvco of the current gain k φ of remaining phase comparator 10 and oscillator only of unmatched parameter so.
As described above, has only one group owing to produce the frequency response of prefilter 15, therefore work as us and switch frequencies different in the voltage controlled oscillator 12, just having different oscillator gain kvco produces, cause the frequency response meeting of the frequency response of prefilter 15 and phase-locked loop different, and the method for compensation is exactly the gain that changes electric current, for example following formula:
K φ, pre * kvco, pre=k φ, pll * kvco, pll formula (3)
Therefore, during real work, this automatic gain calibration module 20 can be extracted the control signal voltage of low pass filter 11 outputs, to find out the yield value of these voltage controlled oscillator 12 correspondences after the locking frequency according to this voltage then, and then according to the current gain k φ of this prefilter 15, pre (fixed current gain) and voltage controlled oscillator gain kvco, after pre (fixed voltage gain) brings formula (3) calculating into, can try to achieve the current gain value of this phase comparator 10, again these phase comparator 10 output currents of output control.
Fig. 4 represents the system block diagrams of another preferred embodiment of the present invention, and the most of element among this embodiment is all identical with last embodiment, does not repeat them here the detailed circuit in its main this automatic gain calibration circuit 20 of further narration.
This automatic gain calibration circuit 20 comprises an analog-digital converter 200, a controller 201, reaches a gain table of comparisons 202, wherein this analog-digital converter 200 is converted to this control signal analog voltage the digital voltage value of one correspondence, then, controller 201 promptly enters the yield value kvco that the gain table of comparisons 202 is found voltage controlled oscillator 12 correspondences after receiving this digital voltage value, pll, bring above-mentioned formula (3) then into and can calculate the current gain k φ of phase comparator 10, behind the pll, the corresponding current value of these phase comparator 10 outputs of output control.
Fig. 5 represents the detailed circuit calcspar of this phase comparator 10, wherein, this phase comparator 10 comprises phase detectors 100 and a charge-discharge circuit 103 (charge pump), wherein, the signal that these phase detectors 100 receive behind above-mentioned reference clock signal and the frequency division produces error signal switching with switch S 1 or switch S 2 in the control charge-discharge circuit 103 in output 101 or 102, and switch S 1 is by a plurality of switch S
c(first switch) couples a plurality of charging current sources 2
0I
1～2nI
1(first electric current), these switch S c can be subjected to the N+1 position digital signal gain_control_sink[n:0 that passed by automatic gain calibration circuit 20] (and being the state of work or shutoff, same switch S 2 (second switch) also couples a plurality of discharging currents source 2 by a plurality of switch S d
0I
2～2
nI
2(second electric current), these switch S d can be subjected to the N+1 position digital signal gain_control_source[n:0 that passed by automatic gain calibration circuit 20] and be the state of work or shutoff.One capacitor C
P, electric capacity receives that charging current adds up and charging or receive this discharging current and add up and discharge.
During practical operation, phase detectors 100 output error signals are to exporting 101 or 102 with operating switch S1 or S2, then by by N position control signal controllable switch S
COr switch S
dThe number of work, the further electric current I of may command inflow
1Or electric current I
2Current value add up so that capacitor C
PCharge or discharge, and reach the current gain that its desire is controlled.
Fig. 6 represents the another preferred embodiment of the present invention, its most of element is identical with previous embodiment, do not repeat them here, its main difference is for to comprise an analog/digital converter 200 and a controller 201 ' at this automatic gain calibration circuit 20 ', and this analog/digital converter 200 becomes corresponding digital value with the analog signal conversion that receives.This controller 201 ' can extract one first voltage of being exported by this low pass filter 11 when locking the carrier frequency of this phase-locked loop.Then, by the adder 18 of this controller 201 ' input one deviation frequency (offset frequency) Δ f to this modulator 2, behind the modulating input signal, extract one second voltage by the output of low pass filter 11 again.At last, again according to this deviation frequency Δ f and this second voltage and this first voltage difference V
2-V
1Calculate the current gain value of phase comparator 10 correspondences, controller 201 ' is according to this deviation frequency and this second voltage and this first voltage difference V
2-V
1Bring the yield value kvco that following calculation formula (4) can be calculated voltage controlled oscillator into, then this yield value is brought into above-mentioned formula (3) can obtain phase comparator corresponding to current gain value k φ, pll.
Wherein Δ f represents deviation frequency, V2-V1 then represents second voltage and this first voltage difference, when deviation frequency Δ f and voltage difference V2-V1 are very little, can learn Kvco=df/dv, when controller 201 ' output offset frequency Δ f to this modulator 2, make modulator 2 export frequency divider 13 to and change its frequency dividing ratios, so frequency and the voltage derivative value of low pass filter output be the gain of the required increase of cell frequency, so to the yield value of phase comparator thereby learn.
Fig. 7 represents to comprise the following steps: by the automatic gain calibration method of being implemented by the foregoing description
Step S1 extracts control signal voltage to one an automatic gain calibration circuit, and this control signal is the output of this low pass loop filter; Then, step S2, the automatic gain calibration circuit is calculated current gain value corresponding to this control signal according to the magnitude of voltage of this control signal; At last, step S3, controller is controlled the current gain of this phase comparator according to this current gain value, makes the corresponding electric current of this phase comparator output, make this prefilter frequency can with the frequency match of this frequency divider.
As shown in Figure 8, also comprise the following steps: among the step S2
At first, in step S2.1, change the digital voltage value of magnitude of voltage to a correspondence of this control signal through an analog/digital converter; Then, in step S2.2, controller is found the corresponding yield value of voltage controlled oscillator in the phase-locked loop in a gain table of comparisons according to this digital voltage value.At last, in step 2.3, can calculate the current gain value of this control signal according to the yield value of this voltage controlled oscillator and a fixed current yield value and the aforementioned formula of voltage gain value substitution (3).
Another embodiment of step S2 comprises the following steps: in Fig. 9 presentation graphs 7
At first, in step S2.4, extract one first voltage by low pass filter output control signal; Then, in step S2.5, import a deviation frequency, extract one second voltage of this low pass filter output control signal; Step S2.6 calculates yield value corresponding to this voltage controlled oscillator according to this deviation frequency and this second voltage and this first voltage difference.At last, enter step S2.7, bring the current gain value of calculating this control signal in the aforementioned formula (3) into according to the yield value of this voltage controlled oscillator and a fixed current yield value and voltage gain value.
In sum; though the present invention with a preferred embodiment openly as above; right its is not in order to limit the present invention; any those skilled in the art; under the situation that does not break away from the spirit and scope of the present invention; can carry out various changes and modification, so protection scope of the present invention is as the criterion when looking the claim restricted portion that is proposed.
Claims (14)
1. a frequency synthesizer in order to modulate an input signal, comprising:
One phase-locked loop, has a phase comparator, can produce one first signal, one low pass filter, this first signal is carried out filtering export a control signal, one voltage controlled oscillator produces the output signal and a frequency divider of a first frequency according to this control signal, will export the input of this phase comparator behind this first frequency output signal frequency division to;
One modulator is connected to this frequency divider;
One prefilter receives this input signal and delivers to this modulator after with this signal filtering;
One automatic gain calibration circuit, receive this control signal, calculate current gain value according to the magnitude of voltage of this control signal corresponding to this control signal, and export the current gain of adjusting these phase detectors in this phase comparator to, the frequency response of this prefilter can be mated with the frequency response of this frequency divider.
2. frequency synthesizer as claimed in claim 1, wherein this automatic gain calibration circuit comprises:
One analog-to-digital converting module receives the aanalogvoltage of this control signal and converts corresponding digital voltage value output to;
The one gain table of comparisons, the correspondence gain that can find this voltage controlled oscillator according to this digital voltage value;
One controller, calculate the current gain of this control signal in this phase comparator according to the gain of this voltage controlled oscillator and a fixed current yield value and voltage gain value after, a gain control signal of this phase comparator of output control.
3. frequency synthesizer as claimed in claim 1, wherein this automatic gain calibration circuit is imported a deviation frequency to this modulator again after extracting one first voltage earlier, this modulator is modulated this input signal according to this offset voltage, extract one second voltage again, calculate current gain value corresponding to this control signal according to this deviation frequency and this second voltage and this first voltage difference and a fixed current yield value and voltage gain value.
4. frequency synthesizer as claimed in claim 1, wherein this phase comparator comprises:
One phase detectors, receive a reference clock signal and this frequency division after signal export an error signal;
One charge-discharge circuit receives the control of this error signal and controls one first switch or a second switch.
5. frequency synthesizer as claimed in claim 4, wherein in this charge-discharge circuit:
This first switch, the state that receives the error signal of this phase detectors output and be a job or turn-off, this first switch receives the first corresponding electric current by a plurality of the 3rd switches, and wherein respectively the digital signal exported according to this automatic gain calibration circuit of the 3rd switch is the state of work or shutoff;
This second switch, the state that receives the error signal of this phase detectors output and be a job or turn-off, this first switch receives the second corresponding electric current by a plurality of the 4th switches, and wherein respectively the digital signal exported according to this automatic gain calibration circuit of the 4th switch is the state of work or shutoff; And
One electric capacity receives that first electric current through first switch of this work adds up and charging or receive second electric current through the second switch of this work and add up and discharge.
6. frequency synthesizer as claimed in claim 1, this modulator wherein, after comprising a sigma-delta modulator and a channel selector, this channel selector is coupled on this prefilter, in order to exporting in this frequency divider through selecting channel modulator and this sigma-delta modulator through this input signal of this prefilter.
7. frequency synthesizer as claimed in claim 1, wherein the frequency response of the frequency response of this phase lock circuitry and this prefilter is reciprocal each other.
8. a method, in order to the gain of the frequency synthesizer of automatic calibration one tool phase-locked loop, wherein this frequency synthesizer includes a prefilter and a loop filter, and the frequency response of this prefilter and this phase-locked loop is reciprocal each other, and this method comprises:
(a). extract control signal voltage to one an automatic gain calibration circuit, this control signal is the output of this loop filter;
(b). this automatic gain calibration circuit is calculated current gain value corresponding to this control signal according to the magnitude of voltage of this control signal; And
(c). control the current gain of this phase comparator, make the corresponding electric current of this phase comparator output, make this prefilter frequency can with the frequency match of this frequency divider.
9. method as claimed in claim 8 wherein in step (b), also comprises:
Change the digital voltage value of magnitude of voltage to a correspondence of this control signal;
Find the corresponding yield value of voltage controlled oscillator device in the phase-locked loop according to this digital voltage value; And
Calculate the current gain value of this control signal according to the yield value of this voltage controlled oscillator and a fixed current yield value and voltage gain value.
10. method as claimed in claim 9 is the digital voltage value of a correspondence by an analog/digital converter with the magnitude of voltage of this control signal wherein.
11. method as claimed in claim 9 wherein receives this digital voltage value by a controller and enters the corresponding yield value that a gain table of comparisons is found voltage controlled oscillator device in the phase-locked loop.
12. method as claimed in claim 9 is wherein by the current gain value of being calculated this phase comparator by a controller according to the yield value of this voltage controlled oscillator.
13. method as claimed in claim 8 wherein in step (b), also comprises:
Extraction is by one first voltage of low pass filter output control signal;
Import a deviation frequency, extract one second voltage of this low pass filter output control signal;
Calculate yield value according to this deviation frequency and this second voltage and this first voltage difference corresponding to this voltage controlled oscillator; And
Calculate the current gain value of this control signal according to the yield value of this voltage controlled oscillator and a fixed current yield value and voltage gain value.
14. method as claimed in claim 13 is wherein by calculated this current gain value corresponding to this control signal by a controller.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNB2004100053486A CN100499374C (en) | 2004-02-11 | 2004-02-11 | Frequency synthesizer and automatic gain calibration method |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNB2004100053486A CN100499374C (en) | 2004-02-11 | 2004-02-11 | Frequency synthesizer and automatic gain calibration method |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN1655458A true CN1655458A (en) | 2005-08-17 |
| CN100499374C CN100499374C (en) | 2009-06-10 |
Family
ID=34892065
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CNB2004100053486A Expired - Lifetime CN100499374C (en) | 2004-02-11 | 2004-02-11 | Frequency synthesizer and automatic gain calibration method |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN100499374C (en) |
Cited By (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101789687A (en) * | 2010-03-23 | 2010-07-28 | 浙江大学 | Average current mode controller based on inductance current self-calibration lossless detection |
| CN101098141B (en) * | 2006-06-29 | 2012-05-30 | 日本电波工业株式会社 | Frequency synthesizer |
| CN102522984A (en) * | 2011-12-31 | 2012-06-27 | 杭州士兰微电子股份有限公司 | Phase-locked loop and voltage-controlled oscillating circuit thereof |
| CN102739244A (en) * | 2007-10-16 | 2012-10-17 | 联发科技股份有限公司 | All-digital phase-locked loop |
| CN104065377A (en) * | 2013-03-21 | 2014-09-24 | 富士通株式会社 | Pll Circuit And Phase Comparison Method In Pll Circuit |
| CN104135278A (en) * | 2014-05-27 | 2014-11-05 | 英属开曼群岛威睿电通股份有限公司 | Gain measurement system and method of voltage-controlled oscillator |
| CN103873056B (en) * | 2012-12-07 | 2016-11-23 | 中芯国际集成电路制造(上海)有限公司 | Agitator self-checking device and calibration steps thereof |
| CN107196623A (en) * | 2016-03-15 | 2017-09-22 | 络达科技股份有限公司 | Acoustic wave device with active calibration mechanism |
| CN114978220A (en) * | 2021-02-18 | 2022-08-30 | 瑞昱半导体股份有限公司 | Communication chip |
-
2004
- 2004-02-11 CN CNB2004100053486A patent/CN100499374C/en not_active Expired - Lifetime
Cited By (14)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101098141B (en) * | 2006-06-29 | 2012-05-30 | 日本电波工业株式会社 | Frequency synthesizer |
| CN102739244B (en) * | 2007-10-16 | 2016-08-10 | 联发科技股份有限公司 | Loop gain calibration steps |
| CN102739244A (en) * | 2007-10-16 | 2012-10-17 | 联发科技股份有限公司 | All-digital phase-locked loop |
| CN101789687A (en) * | 2010-03-23 | 2010-07-28 | 浙江大学 | Average current mode controller based on inductance current self-calibration lossless detection |
| CN102522984A (en) * | 2011-12-31 | 2012-06-27 | 杭州士兰微电子股份有限公司 | Phase-locked loop and voltage-controlled oscillating circuit thereof |
| CN103873056B (en) * | 2012-12-07 | 2016-11-23 | 中芯国际集成电路制造(上海)有限公司 | Agitator self-checking device and calibration steps thereof |
| CN104065377A (en) * | 2013-03-21 | 2014-09-24 | 富士通株式会社 | Pll Circuit And Phase Comparison Method In Pll Circuit |
| CN104065377B (en) * | 2013-03-21 | 2017-05-17 | 富士通株式会社 | Pll Circuit And Phase Comparison Method In Pll Circuit |
| CN104135278A (en) * | 2014-05-27 | 2014-11-05 | 英属开曼群岛威睿电通股份有限公司 | Gain measurement system and method of voltage-controlled oscillator |
| US9784770B2 (en) | 2014-05-27 | 2017-10-10 | Intel Corporation | Devices and methods of measuring gain of a voltage-controlled oscillator |
| CN104135278B (en) * | 2014-05-27 | 2017-12-15 | 英特尔公司 | Voltage-controlled oscillator gain measurement system and method |
| CN107196623A (en) * | 2016-03-15 | 2017-09-22 | 络达科技股份有限公司 | Acoustic wave device with active calibration mechanism |
| CN114978220A (en) * | 2021-02-18 | 2022-08-30 | 瑞昱半导体股份有限公司 | Communication chip |
| CN114978220B (en) * | 2021-02-18 | 2024-03-08 | 瑞昱半导体股份有限公司 | Communication chip |
Also Published As
| Publication number | Publication date |
|---|---|
| CN100499374C (en) | 2009-06-10 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN1188946C (en) | Circuit and method for linearizing amplitude modulation in power amplifier | |
| CN1190931C (en) | Radio transmitter architecture comprising PLL and delta-sigma modulator | |
| CN1026745C (en) | Multiple accumulator fractional n synthesis with series recombination | |
| CN100350737C (en) | Trimming method and trimming device for a pll circuit for two-point modulation | |
| CN1258259C (en) | Frequency modulator using a waveform generator | |
| CN1768479A (en) | Method and system of jitter compensation | |
| US7397883B2 (en) | Spread spectrum type clock generation circuit for improving frequency modulation efficiency | |
| CN112953516B (en) | Low-power-consumption decimal frequency division phase-locked loop circuit | |
| CN1701521A (en) | Transmission device and adjustment method thereof | |
| CN1202042A (en) | Multiband PPL frequency synthesizer with loop condition controlled | |
| CN1255782A (en) | Phase-locked loop and method thereof | |
| WO2004054108A2 (en) | Phase-locked loop comprising a sigma-delta modulator | |
| EP0630538A4 (en) | Binary phase shift keying modulation system or frequency multiplier. | |
| CN1655458A (en) | Frequency synthesizer and automatic gain calibration method | |
| CN113556187B (en) | Frequency deviation calibration system of two-point modulation transmitter | |
| DE10257181B3 (en) | Phase locked loop with modulator | |
| CN109698697B (en) | Phase-locked loop device applied to FPGA chip and FPGA chip | |
| US20020114386A1 (en) | Fractional N synthesizer with reduced fractionalization spurs | |
| CN1677821B (en) | Charge pump circuit having commutator | |
| US20050156676A1 (en) | Synthesizer and calibrating method for the same | |
| EP2188895B1 (en) | Phase locked loop | |
| CN1175130A (en) | Phase-Locking oscillation circuit | |
| CN213637720U (en) | Ultra-wideband fine stepping fast frequency hopping source | |
| CN1308789A (en) | System for generating an accurate low-noise periodic signal | |
| CN1909373A (en) | Method and circuit for developing spread-spectrum or overfrequency clock |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| CP01 | Change in the name or title of a patent holder | ||
| CP01 | Change in the name or title of a patent holder |
Address after: Taiwan, Hsinchu, China Patentee after: Dafa Technology Co.,Ltd. Address before: Taiwan, Hsinchu, China Patentee before: AIROHA TECHNOLOGY CORP. |
|
| CX01 | Expiry of patent term | ||
| CX01 | Expiry of patent term |
Granted publication date: 20090610 |