CN1655431A - Slow starting electric charge pump circuit - Google Patents
Slow starting electric charge pump circuit Download PDFInfo
- Publication number
- CN1655431A CN1655431A CN 200410003880 CN200410003880A CN1655431A CN 1655431 A CN1655431 A CN 1655431A CN 200410003880 CN200410003880 CN 200410003880 CN 200410003880 A CN200410003880 A CN 200410003880A CN 1655431 A CN1655431 A CN 1655431A
- Authority
- CN
- China
- Prior art keywords
- clock signal
- charge pump
- amplitude
- voltage
- amplitude modulation
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Images
Abstract
This invention relates to one charge pump driven by at least one clock signal to convert one supply one voltage source into one pump voltage. The pump voltage is one function of swing of one clock signal. The swing is adjusted to range form one staring value within one swing time, which relays one or more amount degree to the one circle. The charge pump is started by the at least signals by swing. After started, the charge pump is controlled by the production pump voltage varying with the at least one time signal for changing.
Description
Technical field
The present invention relates to a kind of charge pump circuit (Charge Pump Circuit), relate in particular to a kind of slow charge pump circuit that starts pump voltage (Soft-Start Pumping Voltage) that produces, be used for driving power switch (Power Switch) suitably and the effect of inrush current (Inrush Current) when obtaining to suppress to start.
Background technology
Charge pump circuit, or be called capacitive voltage multiplier (Capacitive Voltage Multiplier), be a kind of circuit that is used to produce the voltage higher than the voltage source that is supplied to itself.By this boost capability, need in the electronic system of various operating voltage at inner each component units, portable computer (Portable Computer) for example, charge pump circuit can be used to provide from supply-voltage source (Supply VoltageSource) voltage of required rising, and reduces the independently demand of high-tension electricity potential source that additionally is provided with.
On the other hand, by USB (Universal Serial Bus, USB) Port or other types Port and the many peripheral devices that are connected in portable computer also need to draw energy from supply-voltage source.In this case, charge pump circuit can be used for the driving power switch, and the handover operation of controlling between supply-voltage source and peripheral device is normally implemented and be provided with to this power switch by nmos pass transistor.More high by the grid voltage that makes the NMOS power switch transistor than its drain voltage, charge pump circuit fully conducting NMOS power switch transistor so that minimum conducting resistance is provided in the normal running of peripheral device.
Now describe the circuit blocks figure that common charge pump circuit is applied to the driving power switch in detail with reference to Fig. 1 (a).The drain D of the power switch of being implemented by nmos pass transistor 10 and source S are respectively as the input and the output of power switch 10.The drain D of power switch 10 is connected in supply-voltage source V
In, its source S then provides output voltage V
OutTo extraneous load (not shown), for example has the peripheral device of USB Port.In addition, output capacitance C
oBe connected between the source S and ground potential of power switch 10.Charge pump circuit 11 is with supply-voltage source V
InConvert a pump voltage V who raises to
Pp, be used for the grid G of power controlling switch 10.Pump voltage V when grid G
PpThe supply-voltage source V that quite is higher than drain D
InThe time, power switch 10 can be provided minimum conducting resistance by complete conducting, mat and make the output voltage V at the source S place of power switch 10
OutThe supply-voltage source V at drain D place no better than
InAs a result, supply-voltage source V
InCan be supplied to extraneous load efficiently.When power switch 10 is in conducting state, from supply-voltage source V
InThe drain D of power switch 10 of flowing through and the conducting electric current I of source S
OnPromptly be supplied to extraneous load and output capacitance C
o
At least one overlapping or non-overlapped fixed amplitude clock signal 13 that the boost operations of charge pump circuit 11 is exported by clock generator 12 is controlled.Usually, the pulse signal that each of fixed amplitude clock signal 13 is synchronous each other, the oscillator signal with a preset frequency 15 that its frequency is exported by oscillator 14 decides.For example, charge pump circuit 11 can be well-known Dickson type charge pump, shown in Fig. 1 (b).Particularly, charge pump circuit 11 can comprise the charge pump stage (Stage) of several series connection, and wherein one-level is indicating Ref. No. 110.Each charge pump stage comprises a diode 111 and a pump electric capacity 112, and has an input node 113 and an output node 114.In this Dickson type charge pump, the fixed amplitude clock signal of exporting from clock generator 12 13 is a pair of complementary clock signal CLK1 and CLK2, is used to drive pump electric capacity at different levels.Clock signal clk 1 drives the odd number pump stage, and clock signal clk 2 then drives the even number pump stage.The input node 115 of first order series connection charge pump often is connected in supply-voltage source V
InThe isolated diode 116 of least significant end can be considered the part of final stage series connection charge pump, and can obtain the pump voltage V of charge pump circuit 11 from it
Pp
Fig. 2 (a) schemed to the time sequential routine that the common charge pump circuit 11 shown in 2 (c) displayed map, 1 (a) is applied to driving power switch 10, and wherein Fig. 2 (a) is the pump voltage V of charge pump circuit 11
PpSequential chart; Fig. 2 (b) is the output voltage V of power switch 10
OutSequential chart; And Fig. 2 (c) is the conducting electric current I of power switch 10
OnSequential chart.With reference to Fig. 2 (a), in time T
ABefore, because charge pump circuit 11 is in (Disable) state of not energizing, so its pump voltage V
PpBe zero.Charge pump circuit 11 is in time T
AStart, begin to carry out boosting.From time T
ATo time T
BTransition period in, the pump voltage V of charge pump circuit 11
PpBe rapidly increased to stable maximum, for example previously described NV from zero
Clk-(N+1) V
d Charge pump circuit 11 is in time T
BThe place obtains stable mode of operation, makes pump voltage V
PpKeep stable.
With reference to Fig. 2 (b) and 2 (c), at T start-up time
ABefore, the pump voltage V of charge pump circuit 11
PpLess than threshold voltage, so not conducting of power switch 10 makes its output voltage V
OutBe zero and conducting electric current I
OnAlso be zero.The pump voltage V of charge pump circuit 11
PpReaching behind the threshold voltage can conducting power switch 10 and begin output capacitance C
oCharging makes the output voltage V of power switch 10
OutRise.Because the pump voltage V of charge pump circuit 11
PpPower switch is driven into provides minimum conducting resistance, so the output voltage V of power switch 10
OutIn time T
CThe place obtains supply-voltage source V no better than
In
When being applied to driving power switch 10, common charge pump circuit 11 can cause a problem.Because the pump voltage V of charge pump circuit 11
PpRaise rapidly, so power switch 10 promptly provides minimum conducting resistance in initial start stage.Yet, because output voltage V
OutIn initial start stage is zero, that is output capacitance C
oStill uncharged, so supply-voltage source V
InProduce a sizable conducting electric current I
OnThe power switch 10 of flowing through, this is an inrush current.If maximum inrush current I
PeakSuppress inadequately, may cause supply-voltage source V
InViolent decline, or burn power switch 10.
Summary of the invention
Because foregoing problems, one of the present invention purpose is to provide a kind of charge pump circuit, can produce the slow pump voltage that starts of slow rising.
Another object of the present invention is to provide a kind of charge pump circuit, suitably driving power switch and obtain to suppress the effect of maximum inrush current.
According to the present invention, a charge pump is driven by at least one clock signal, and being used to change a supply-voltage source becomes a pump voltage.This pump voltage is one of the amplitude of this at least one clock signal function, makes then to heal greatly when this amplitude of this at least one clock signal one of this pump voltage absolute value of healing when big.This amplitude modulation Cheng Zaiyi amplitude modulation of this at least one clock signal gradually changed from a startup value in period.The one-period of this this at least one clock signal of amplitude modulation ratio in period more prolongs one or more order of magnitude.This charge pump is started during by this startup value in its amplitude by this at least one clock signal, makes this absolute value of its this pump voltage that produces relatively little.After this started, this absolute value that this charge pump is controlled so as to this pump voltage that is produced gradually changed along with the modulation of this amplitude of this at least one clock signal, so that suppress the climbing speed of this absolute value of this pump voltage.
Preferably, this amplitude of this at least one clock signal after date when this amplitude modulation reaches a stationary value.
Preferably, this stationary value equals this supply-voltage source.
Preferably, this amplitude of this at least one clock signal is determined by the potential difference that raises gradually across one of this electric capacity that an electric capacity is presented in charging process.
Preferably, this pump voltage is used to control a power switch.
Preferably, this at least one clock signal is produced by a clock amplitude modulation device.This clock amplitude modulation device comprises: a slow start-up control device is used to produce a slow start-up control signal; And an accurate deviator, this amplitude of this at least one clock signal of modulation in response to this slow start-up control signal.
Preferably, this slow start-up control signal be one have gradually change the position standard voltage signal.
Preferably, this amplitude of this at least one amplitude modulation clock signal is by accurate decision the in this position that gradually changes of this slow start-up control signal.
Preferably, this slow start-up control device comprises: one switches capacitor equivalent resistance, has first and second end points, and this first end points is connected in this supply-voltage source; And a charging capacitor, be connected between this second end points and ground, make and should be presented in this second end points by slow start-up control signal.
Preferably, this accurate deviator comprises: at least one clock passage, be respectively applied for this at least one amplitude modulation clock signal of generation, wherein each in this at least one clock passage has an output stage inverter, one of this output stage inverter power source supply end is used for reception should delay the start-up control signal, so that this amplitude of each in this at least one amplitude modulation clock signal of control.
Preferably, each of this at least one clock passage more comprises: an input stage inverter, and have a power source supply end and receive this supply-voltage source, be used to provide one to have the clock signal of fixed amplitude to this output stage inverter.
Description of drawings
Fig. 1 (a) shows that common charge pump circuit is applied to the circuit blocks figure of driving power switch.
Fig. 1 (b) shows the detailed circuit diagram of common charge pump circuit.
Fig. 2 (a) shows that to 2 (c) common charge pump circuit is applied to the time sequential routine figure of driving power switch, and wherein Fig. 2 (a) is the sequential chart of the pump voltage of charge pump circuit; Fig. 2 (b) is the sequential chart of the output voltage of power switch; And Fig. 2 (c) is the sequential chart of the conducting electric current of power switch.
Fig. 3 (a) shows the circuit blocks figure that is applied to the driving power switch according to the present invention's slow startup charge pump circuit.
Fig. 3 (b) shows the waveform sequential chart according to one of the present invention's amplitude modulation clock signal example.
Fig. 4 (a) shows the circuit blocks figure of clock amplitude modulation device in the present invention.
Fig. 4 (b) shows the detailed circuit diagram of one of clock amplitude modulation device example in the present invention.
Fig. 5 (a) shows the time sequential routine figure that is applied to the driving power switch according to the present invention's slow startup charge pump circuit to 5 (d), and wherein Fig. 5 (a) is the sequential chart of the slow start-up control signal of slow start-up control device; Fig. 5 (b) is the slow slow sequential chart that starts pump voltage that starts charge pump circuit; Fig. 5 (c) is the sequential chart of the output voltage of power switch; And Fig. 5 (d) is the sequential chart of the conducting electric current of power switch.
Fig. 6 (a) shows three examples of the interdependent type charge pump of clock amplitude in the present invention to 6 (b).
The component symbol explanation:
10 power switchs
11 charge pump circuits
12 clock generators
13, CLK1, CLK2 fixed amplitude clock signal
14 oscillators
15 oscillator signals
30 power switchs
The 31 slow charge pump circuits that start
41 slow start-up control devices
42 accurate deviators
43 output buffers
The interdependent type charge pump stage of 61～63 clock amplitudes
110 charge pump stage
111 diodes
112 pump electric capacity
113 input nodes
114 output nodes
The input node of 115 first order series connection charge pump
116 least significant ends completely cut off diode
311 clock amplitude modulation devices
The interdependent type charge pump of 312 clock amplitudes
313, CLKS1, CLKS2 amplitude modulation clock signal
The nmos pass transistor of 611 diode-coupled modes
612,623,624,635,636 pump electric capacity
621,622,631,633 nmos pass transistors
632,634 PMOS transistors
C
1, C
2Electric capacity
The D drain electrode
The G grid
INV
1～INV
4Inverter
I
bBuffer current source
I
OnThe conducting electric current
I
PeakMaximum inrush current
I
PeaksThe maximum inrush current of slow startup
Q
bBuffer transistor
R
EqThe switch-capacitor equivalent resistance
The S source electrode
S
1, S
2Switch
T
AmpAmplitude modulation period
T
ClkClock cycle
V
ClkThe clock amplitude
V
InSupply-voltage source
V
OutOutput voltage
V
PpPump voltage
V
PpsThe slow pump voltage that starts
V
SsSlow start-up control signal
Embodiment
Explanation hereinafter and accompanying drawing will be stated and other purposes, feature, more obvious with advantage before will making the present invention.Now with reference to the preferred embodiment of graphic detailed description according to the present invention.
Fig. 3 (a) shows the circuit blocks figure that is applied to driving power switch 30 according to the present invention's slow startup charge pump circuit 31.Comparison diagram 3 (a) and Fig. 1 (a) as long as will replace the common charge pump circuit 11 of Fig. 1 (a) according to the present invention's slow startup charge pump circuit 31, can obtain the circuit blocks figure shown in Fig. 3 (a) as can be known.Power switch 30 shown in Fig. 3 (a) is equal to the power switch 10 shown in Fig. 1 (a).Therefore, hereinafter will omit the explanation that is same as circuit part's branch of Fig. 1 (a) among Fig. 3 (a).
With reference to Fig. 3 (a), slow start charge pump circuit 31 under the control of at least one fixed amplitude clock signal 13 with supply-voltage source V
InConvert to and have the slow pump voltage V that starts feature
Pps, be used for the grid G of power controlling switch 30.Has the slow pump voltage V that starts feature
PpsRefer to: compared to common pump voltage V
Pp, the slow pump voltage V that starts
PpsBe increased to the acquisition stationary value from the startup value and considerably prolonged required transit time, that is the slow pump voltage V that starts
PpsAdvancing the speed in transit time is slower.Particularly, the slow charge pump circuit 31 that starts comprises a clock amplitude modulation device 311 and the interdependent type charge pump 312 of a clock amplitude.Clock amplitude modulation device 311 carries out amplitude modulation for slow at least one the fixed amplitude clock signal 13 that starts charge pump circuit 31 of input, is used to produce at least one amplitude modulation clock signal 313.The interdependent type charge pump 312 of clock amplitude refers to its pump voltage V
PpValue depend on the charge pump circuit of clock amplitude that is pump voltage V
PpBe clock amplitude V
ClkFunction.On the typical case, when the amplitude of clock signal is healed when big the pump voltage V of the interdependent type charge pump 312 of clock amplitude
PpPromptly bigger.For example, the Dickson type charge pump 11 shown in Fig. 1 (b) is the interdependent type charge pump of a kind of clock amplitude, since its pump voltage V
Pp=NV
Clk-(N+1) V
dAnd clock amplitude V
ClkPump voltage V more then
PpBigger.Based on this feature of the interdependent type charge pump 312 of clock amplitude, start charge pump circuit 31 according to delaying of the present invention and can obtain to have the slow pump voltage V that starts feature
PpsParticularly, start among one of charge pump circuit 31 embodiment at the slow of foundation the present invention, at least one amplitude modulation clock signal 313 is designed to that the minimum value of its amplitude when charge pump circuit 31 starts slowly increases to stable maximum and the clock signal that becomes the continually varying amplitude.Therefore, the slow slow pump voltage V that starts that starts charge pump circuit 31
PpsCan slowly raise along with the amplitude of amplitude modulation clock signal 313 and slowly increase.
Fig. 3 (b) shows the waveform sequential chart according to one of the present invention's amplitude modulation clock signal 313 example.With reference to Fig. 3 (b), amplitude modulation clock signal clk S1 and amplitude modulation clock signal clk S2 constitute the amplitude modulation clock signal 313 of a pair of complementation.Amplitude modulation clock signal clk S1 and CLKS2 can have a fixed amplitude V shown in clock amplitude modulation device 311 transition diagrams 1 (b) by using
ClkClock signal CLK1 and CLK2 and producing.As a result, amplitude modulation clock signal clk S1 and CLKS2 have the amplitude minimum value when charge pump starts, and amplitude slowly increases subsequently, through a predetermined amplitude modulation T in period
AmpBack amplitude reaches stable maximum V
ClkIn one of foundation the present invention embodiment, stable maximum V
ClkSet for and equal supply-voltage source V
InAmplitude modulation T in period
AmpCan be adjusted to appropriate value according to needing of side circuit application.Amplitude modulation T in period
AmpLength will directly influence the slow pump voltage V that starts
PpsReach the stationary value length of required transit time from the startup value.In one of foundation the present invention embodiment, amplitude modulation T in period
AmpSet for than clock cycle T
ClkAt least more prolonged an order of magnitude.In another embodiment of foundation the present invention, clock cycle T
ClkBe about 10 microseconds (μ s), and amplitude modulation T in period
AmpThen be about 2.5 microseconds (ms).
Please note at the slow of foundation the present invention to start in the charge pump circuit 31 that the interdependent type charge pump 312 of clock amplitude is in amplitude modulation T in period
AmpIn promptly start and carry out boost operations, be not by the time amplitude modulation clock signal 313 reach stable maximum V
ClkAfter just carry out boost operations.Just at amplitude modulation T in period
AmpIn, because the slow pump voltage V that starts of the interdependent type charge pump 312 of clock amplitude
PpsSo the amplitude size that depends on amplitude modulation clock signal 313 is the slow pump voltage V that starts of the interdependent type charge pump 312 of clock amplitude
PpsCan slowly raise along with the amplitude of amplitude modulation clock signal 313 and slowly increase.
Fig. 4 (a) shows the circuit blocks figure of clock amplitude modulation device 311 in the present invention.With reference to Fig. 4 (a), clock amplitude modulation device 311 comprises a slow start-up control device 41 and an accurate deviator 42.Slow start-up control device 41 outputs one slow start-up control signal V
SsTo the accurate deviator 42 in position.In response to slow start-up control signal V
Ss, the accurate deviator 42 in position converts thereof into amplitude modulation clock signal 313 by the fixed amplitude that changes clock signal 13.Should slow start-up control signal V
SsBe used to determine the amplitude modulation of amplitude modulation clock signal 313, that is minimum value, the maximum when stablizing, amplitude modulation T in period when starting
Amp, and/or at amplitude modulation T in period
AmpThe variation pattern of interior amplitude.
Fig. 4 (b) shows the detailed circuit diagram of one of clock amplitude modulation device 311 example in the present invention.With reference to Fig. 4 (b), slow start-up control device 41 comprises two switch S
1With S
2And two capacitor C
1With C
2Switch S
1With S
2Be controlled to and be in conducting state interlaced with each otherly and can all be in not on-state simultaneously.Work as switch S
1During conducting, supply-voltage source V
InTo capacitor C
1Charging.Work as switch S
2During conducting, capacitor C
1Via switch S
2Discharge.Can know switch S by inference from well-known switch-capacitor (Switch Capacitor) technology
1With S
2And capacitor C
1Circuit equivalent in an equivalent resistance R
Eq, be coupled in supply-voltage source V
InWith capacitor C
2Between.Therefore, supply-voltage source V
InVia equivalent resistance R
EqTo capacitor C
2Charging causes across capacitor C
2The potential difference that goes up raises gradually and has time constant R
EqC
2Across capacitor C
2On potential difference can use as slow start-up control signal V
SsIn the embodiment shown in Fig. 4 (b), across capacitor C
2On potential difference export the accurate deviator 42 in position to via an output buffer 43 so that obtain the slow start-up control signal V that driving force strengthens
SsOutput buffer 43 comprises a buffer current source I
bWith a buffer transistor Q
bBuffer current source I
bBe connected in supply-voltage source V
In, be used to provide needed drive current.Buffer transistor Q
bImplemented by a PMOS transistor, made across capacitor C
2On potential difference and the actual slow start-up control signal V that uses
SsBetween roughly differ a fixed value, that is buffer transistor Q
bThreshold voltage.
The accurate deviator 42 in position shown in Fig. 4 (b) is applied to two shown in modulation Fig. 1 (b) and has fixed amplitude V
ClkClock signal clk 1 and CLK2, therefore be provided with two clock passages accordingly.Particularly, inverter INV
1With INV
2Constitute a clock passage, wherein inverter INV in cascade (Cascade) mode
1As input stage and inverter INV
2As output stage.Similarly, inverter INV
3With INV
4Constitute another clock passage, wherein inverter INV with cascade system
3As input stage and inverter INV
4As output stage.Input stage inverter INV
1With INV
3Power source supply end all be coupled in supply-voltage source V
In, and output stage inverter INV
2With INV
4Power source supply end then all be coupled in slow start-up control signal V
SsBecause each clock passage is made of two inverters, so phase place can not change after the clock signal is by the clock passage.Yet, because output stage inverter INV
2With INV
4Power source supply end all be coupled in slow start-up control signal V
SsSo the position amplitude of accurate deviator 42 outputs shown in Fig. 3 (b) is along with slow start-up control signal V
SsThe amplitude modulation clock signal clk S1 and the CLKS2 of change.In this example, amplitude modulation T in period
AmpPromptly by slow start-up control signal V
SsTime constant R
EqC
2Determine.
Though should note in the described embodiment of preamble, the slow charge pump circuit 31 that starts uses two clock signals, but the invention is not restricted to this and can be applicable to slowly start that charge pump circuit 31 uses a clock signal or overlapping or non-overlapped clock signal more than three.Use in the situation of n clock signal at the slow charge pump circuit 31 that starts, the accurate deviator 42 in position is provided with n clock passage accordingly, is respectively applied for the amplitude of a modulation n clock signal.N clock passage of the accurate deviator 42 in position also can be built into different, thereby provides different modulation modes for n clock signal.Perhaps, slow also exportable several different slow start-up control signal V of start-up control device 41
SsTo the accurate deviator 42 in position, so that provide different modulation modes for n clock signal.
Fig. 5 (a) shows the time sequential routine figure that is applied to driving power switch 30 according to the present invention's slow startup charge pump circuit 31 to 5 (d), and wherein Fig. 5 (a) is the slow start-up control signal V of slow start-up control device 41
SsSequential chart; Fig. 5 (b) is the slow slow pump voltage V that starts that starts charge pump circuit 31
PpsSequential chart; Fig. 5 (c) is the output voltage V of power switch 30
OutSequential chart; And Fig. 5 (d) is the conducting electric current I of power switch 30
OnSequential chart.At Fig. 5 (b) to 5 (d), solid line is to be used for expression according to operating characteristics that the present invention obtained, dotted line then is used for presentation graphs 2 (a) to the common operating characteristics shown in 2 (c), relatively to highlight practicality and the excellent results that is obtained according to the present invention now mutually.Please note among Fig. 5 (a) only to show solid line, because the slow start-up control signal V that does not provide in the skill according to the present invention is provided now
Ss
With reference to Fig. 5 (a), slow start-up control signal V
SsFrom time T
AThe startup value at place slowly rises to stationary value, and (this stationary value is set for and is about V in the present embodiment
In), make the amplitude of amplitude modulation clock signal 313 along with slow start-up control signal V
SsBe about V and slowly increase to
In, as previously mentioned.
With reference to Fig. 5 (b), in time T
ABefore, because the slow charge pump circuit 31 that starts is in the state of not energizing, so its slow pump voltage V that starts
PpsBe zero.The slow charge pump circuit 31 that starts is in time T
AStart, begin to carry out boosting.Because the amplitude of amplitude modulation clock signal 313 is from T start-up time
ARising slowly increases, so the slow slow pump voltage V that starts that starts charge pump circuit 31
PpsPump voltage V than common charge pump circuit 11
PpRaise with slower speed.Common pump voltage V
PpIn time T
BThe place has promptly obtained to stablize, yet according to the present invention's the slow pump voltage V that starts
PpsStill need considerable time just can reach stable.
With reference to Fig. 5 (c) and 5 (d), because the slow pump voltage V that starts
PpsIt is slower to rise, so the 10 more late conductings of power switch 30 specific power switches cause the output voltage V of power switch 30
OutLater rising.As previously mentioned, the slow pump voltage V that starts
PpsThe grid of power controlling switch 30.Since the conducting resistance of power switch 30 is proportional to its grid voltage, so the conducting resistance of power switch 30 is along with the slow pump voltage V that starts
PpsOn rise and reduce.Because the slow pump voltage V that starts
PpsThan common pump voltage V
PpThe conducting resistance of power switch 30 raises with slower speed, so can just not be decreased to minimum value in initial start stage.As a result, the conducting resistance that slowly reduces of power switch 30 has successfully suppressed the conducting electric current I of power switch 30
On, especially for initial start stage output capacitance C
oInrush current when still uncharged is all the more so.
In one of the present invention embodiment, suppose supply-voltage source V
InBe about 5 volts, common output voltage V
OutReach 5 volts of required times from startup and be about 200 microseconds (μ s), and according to the present invention's output voltage V
OutReach 5 volts of required times from startup and then be about 800 microseconds (μ s).In this example, common maximum inrush current I
PeakBe about 5.4 amperes, and according to the present invention's maximum inrush current I
PeaksThen be about 1.1 amperes.Therefore, start charge pump circuit 31 according to delaying of the present invention and successfully suppress inrush current, can be effectively applied to driving power switch 30.
Fig. 6 (a) shows three examples of the interdependent type charge pump 312 of clock amplitude in the present invention to 6 (b).With reference to Fig. 6 (a), charge pump stage 61 is equal to the one-level 110 of the Dickson type charge pump shown in Fig. 1 (b), and just it uses the nmos pass transistor 611 of diode-coupled mode to implement the diode 111 shown in Fig. 1 (b).Pump electric capacity 612 can be driven by amplitude modulation clock signal clk S1 or CLKS2, regards it as odd number pump stage or even number pump stage and decides.
With reference to Fig. 6 (b), charge pump stage 62 comprises two nmos pass transistors 621 and 622 and two pump electric capacity 623 and 624.When clock signal CLKS1 is low and clock signal clk S2 when being high, nmos pass transistor 622 conductings and pump electric capacity 623 is charged to supply-voltage source V
InThis moment, nmos pass transistor 621 was not conducting.When changing height and clock signal clk S2 into, clock signal CLKS1 changes into when low, pump electric capacity 624 descends the grid voltage of nmos pass transistor 622 and causes nmos pass transistor 622 not conductings, and pump electric capacity 623 makes the grid voltage rising of nmos pass transistor 621 exceed supply-voltage source V
InAnd cause nmos pass transistor 621 conductings.As a result, pump electric capacity 624 forward is charged to complete supply-voltage source V under the loss of pressure drop at no any diode
InWhen clock signal CLKS1 changes into low and clock signal clk S2 changes into when high, nmos pass transistor 621 is because of grid voltage descend not conducting and pump voltage V
PpBe boosted to supply-voltage source V
InAdd clock amplitude V
Clk
With reference to Fig. 6 (c), charge pump stage 63 comprises two nmos pass transistors 631 and 633 and two PMOS transistors 632 and 634, is construed as a cross-linked exclusive circuit.Charge pump stage 63 more comprises by clock signal clk S1 and CLKS2 separately-driven two pump electric capacity 635 and 636.When clock signal CLKS1 is height and clock signal clk S2 when low, nmos pass transistor 631 conductings and pump electric capacity 636 is charged to supply-voltage source V
InWhen clock signal CLKS1 changes into low and clock signal clk S2 changes into when high, PMOS transistor 632 conductings and make pump voltage V
PpBoosted to supply-voltage source V
InAdd clock amplitude V
ClkAt this moment, also conducting and make pump electric capacity 635 be charged to supply-voltage source V of nmos pass transistor 633
In, clock signal CLKS1 changes when low PMOS transistor 634 conductings and make pump voltage V into when changing height and clock signal clk S2 into
PpBoosted to supply-voltage source V
InAdd clock amplitude V
Clk
Though the present invention is illustrated as illustration by preferred embodiment, will be appreciated that: the invention is not restricted to the embodiment that is disclosed at this.On the contrary, this invention is intended to contain and for the personage who has the knack of this skill, belong to tangible various modification and similar configuration.Therefore, the scope of claim should be according to the widest annotation, and this type of is revised and similar configuration and contain all.
Claims (10)
1. one kind is delayed the startup charge pump circuit, comprises:
One clock amplitude modulation device, be used to produce at least one amplitude modulation clock signal, the amplitude of this at least one amplitude modulation clock signal gradually changes from a startup value in period at an amplitude modulation, and the one-period of this this at least one amplitude modulation clock signal of amplitude modulation ratio in period more prolongs one or more order of magnitude; And
One charge pump is driven by this at least one amplitude modulation clock signal, and being used to change a supply-voltage source becomes a pump voltage, wherein:
This charge pump is started during by this startup value in its amplitude by this at least one amplitude modulation clock signal, make one of its this pump voltage that produces absolute value relatively little, this absolute value that this charge pump is controlled so as to this pump voltage that is produced after this startup gradually changes along with the modulation of this amplitude of this at least one clock signal.
2. slow startup charge pump circuit as claimed in claim 1, it is characterized in that: this clock amplitude modulation device comprises: a slow start-up control device, be used to produce a slow start-up control signal, this slow start-up control signal is one to have the voltage signal of the position standard that gradually changes; And an accurate deviator, this amplitude of this at least one amplitude modulation clock signal of modulation in response to this slow start-up control signal.
3. slow startup charge pump circuit as claimed in claim 2 is characterized in that: this amplitude of this at least one amplitude modulation clock signal is by accurate decision the in this position that gradually changes of this slow start-up control signal.
4. slow startup charge pump circuit as claimed in claim 2 is characterized in that: this slow start-up control device comprises: one switches capacitor equivalent resistance, has first and second end points, and this first end points is connected in this supply-voltage source; And a charging capacitor, be connected between this second end points and ground, make and should be presented in this second end points by slow start-up control signal.
5. slow startup charge pump circuit as claimed in claim 2, it is characterized in that: this accurate deviator comprises: at least one clock passage, be respectively applied for this at least one amplitude modulation clock signal of generation, wherein each in this at least one clock passage has an output stage inverter, one of this output stage inverter power source supply end is used for reception should delay the start-up control signal, so that control described each amplitude in this at least one amplitude modulation clock signal.
6. slow startup charge pump circuit as claimed in claim 5, it is characterized in that: each of this at least one clock passage more comprises: an input stage inverter, have a power source supply end and receive this supply-voltage source, be used to provide one to have the clock signal of fixed amplitude to this output stage inverter.
7. method that starts charge pump circuit comprises:
Produce at least one clock signal, the amplitude of this at least one clock signal gradually changes from a startup value in period at an amplitude modulation, and the one-period of this this at least one clock signal of amplitude modulation ratio in period more prolongs one or more order of magnitude;
When this amplitude of this at least one clock signal is this startup value, use this at least one clock start signal one charge pump, become a pump voltage and change a supply-voltage source; And
After this starts, one of this pump voltage absolute value is gradually changed, along with the modulation of this amplitude of this at least one clock signal with the climbing speed of this absolute value of suppressing this pump voltage.
8. the method for startup charge pump circuit as claimed in claim 7 is characterized in that more comprising: make this amplitude after date when this amplitude modulation of this at least one clock signal reach a stationary value.
9. as the method for the startup charge pump circuit of 8 of claims the, it is characterized in that: this stationary value equals this supply-voltage source.
10. the method for startup charge pump circuit as claimed in claim 7, it is characterized in that: in producing this step of at least one clock signal, the potential difference that raises gradually across one of this electric capacity that is presented in charging process by an electric capacity determines this amplitude of this at least one clock signal.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 200410003880 CN1655431A (en) | 2004-02-10 | 2004-02-10 | Slow starting electric charge pump circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 200410003880 CN1655431A (en) | 2004-02-10 | 2004-02-10 | Slow starting electric charge pump circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN1655431A true CN1655431A (en) | 2005-08-17 |
Family
ID=34891968
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN 200410003880 Pending CN1655431A (en) | 2004-02-10 | 2004-02-10 | Slow starting electric charge pump circuit |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN1655431A (en) |
Cited By (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101136629B (en) * | 2007-10-16 | 2010-10-06 | 友达光电股份有限公司 | Driving circuit and driving method for charge pump |
| CN101291108B (en) * | 2007-04-19 | 2010-11-17 | 立锜科技股份有限公司 | Starting circuit and method for charge pump |
| CN103376812A (en) * | 2012-04-30 | 2013-10-30 | 英飞凌科技股份有限公司 | System and method for a programmable voltage source |
| CN104242632A (en) * | 2014-08-29 | 2014-12-24 | 南京航空航天大学 | Ripple rejection technology for driving charge pump DC-DC converter by means of trapezoidal waves |
| CN104410259A (en) * | 2014-12-17 | 2015-03-11 | 南京航空航天大学 | Charge pump multiphase interleaving technology based on multistep charge-discharge of flying capacitors |
| CN104410258A (en) * | 2014-12-17 | 2015-03-11 | 南京航空航天大学 | Charge pump ripple rejection technology based on multistep discharge of flying capacitor |
| CN105490515A (en) * | 2016-01-11 | 2016-04-13 | 中国电子科技集团公司第十研究所 | Starting circuit with nF-stage capacitance load |
-
2004
- 2004-02-10 CN CN 200410003880 patent/CN1655431A/en active Pending
Cited By (13)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101291108B (en) * | 2007-04-19 | 2010-11-17 | 立锜科技股份有限公司 | Starting circuit and method for charge pump |
| CN101136629B (en) * | 2007-10-16 | 2010-10-06 | 友达光电股份有限公司 | Driving circuit and driving method for charge pump |
| US9743196B2 (en) | 2012-04-30 | 2017-08-22 | Infineon Technologies Ag | System and method for a programmable voltage source |
| CN103376812B (en) * | 2012-04-30 | 2016-02-24 | 英飞凌科技股份有限公司 | For the system and method for programmable voltage source |
| US9281744B2 (en) | 2012-04-30 | 2016-03-08 | Infineon Technologies Ag | System and method for a programmable voltage source |
| CN103376812A (en) * | 2012-04-30 | 2013-10-30 | 英飞凌科技股份有限公司 | System and method for a programmable voltage source |
| CN104242632A (en) * | 2014-08-29 | 2014-12-24 | 南京航空航天大学 | Ripple rejection technology for driving charge pump DC-DC converter by means of trapezoidal waves |
| CN104242632B (en) * | 2014-08-29 | 2018-01-23 | 南京航空航天大学 | A kind of Ripple Suppression method that charge pump DC-DC converter is driven with trapezoidal wave |
| CN104410259A (en) * | 2014-12-17 | 2015-03-11 | 南京航空航天大学 | Charge pump multiphase interleaving technology based on multistep charge-discharge of flying capacitors |
| CN104410258A (en) * | 2014-12-17 | 2015-03-11 | 南京航空航天大学 | Charge pump ripple rejection technology based on multistep discharge of flying capacitor |
| CN104410259B (en) * | 2014-12-17 | 2018-04-27 | 南京航空航天大学 | A kind of charge pump multiphase interleaving technology based on striding capacitance multistep discharge and recharge |
| CN105490515A (en) * | 2016-01-11 | 2016-04-13 | 中国电子科技集团公司第十研究所 | Starting circuit with nF-stage capacitance load |
| CN105490515B (en) * | 2016-01-11 | 2018-02-23 | 中国电子科技集团公司第十研究所 | Start-up circuit with nF level capacitive loads |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN1274084C (en) | Charge pump circuit | |
| CN101034847A (en) | Voltage step-up circuit and electric appliance therewith | |
| CN1280974C (en) | Simple boost device of level shift circuit including allowable low breakdown voltage | |
| CN1453762A (en) | Efficient liquid crystal display drive voltage generating circuit and its method | |
| KR101225399B1 (en) | Step-down switching regulator | |
| CN1866706A (en) | Electronic circuit | |
| CN1061184C (en) | Switching power supply | |
| CN101065891A (en) | Switching power supply and its control circuit, and electronic apparatus employing such switching power supply | |
| CN1449099A (en) | Electric power unit and portable machine containing the same | |
| CN1617432A (en) | Power supply apparatus capable of supplying a stable converted voltage | |
| CN1457137A (en) | DC-DC converter | |
| CN101079650A (en) | Image forming device and image forming method | |
| CN1161790C (en) | Charge pump circuit | |
| CN1841900A (en) | Switching regulator circuit | |
| CN1447506A (en) | Power circuit and PVVM circuit | |
| CN1855678A (en) | Electronic device including charge-pump circuit | |
| CN1933312A (en) | Soft-start circuit for a dc-to-dc converter | |
| CN1179259C (en) | Voltage generating circuit capable of stable supplying voltage without over-rated-voltage for power supply | |
| CN1233093C (en) | Driving circuit | |
| CN102148614A (en) | Pulse generating circuit and method, reference voltage generating circuit and method as well as reference voltage driving circuit and method | |
| JP2017028668A (en) | Switching element drive circuit | |
| CN1655431A (en) | Slow starting electric charge pump circuit | |
| CN1929032A (en) | Sample/hold circuit module and sample/hold method for input signal | |
| CN1592054A (en) | Step-down voltage output circuit | |
| CN1497608A (en) | Power-supply device and its power supply method |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| C41 | Transfer of patent application or patent right or utility model | ||
| TA01 | Transfer of patent application right |
Effective date of registration: 20090109 Address after: Hsinchu City, Taiwan, China Applicant after: Global Mixed-mode Technology Inc. Address before: Taiwan, China Applicant before: Yuanchuang Science and Technology Co., Ltd. |
|
| ASS | Succession or assignment of patent right |
Owner name: ZHIXIN TECHNOLOGY CO., LTD. Free format text: FORMER OWNER: YUANCHUANG TECHNOLOGY CO., LTD. Effective date: 20090109 |
|
| AD01 | Patent right deemed abandoned | ||
| C20 | Patent right or utility model deemed to be abandoned or is abandoned |