CN1624755A - Digital analog converter for mult-channel data drive circuit of display - Google Patents
Digital analog converter for mult-channel data drive circuit of display Download PDFInfo
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- CN1624755A CN1624755A CN 200310117079 CN200310117079A CN1624755A CN 1624755 A CN1624755 A CN 1624755A CN 200310117079 CN200310117079 CN 200310117079 CN 200310117079 A CN200310117079 A CN 200310117079A CN 1624755 A CN1624755 A CN 1624755A
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Abstract
The invention relates to a digital analog converter which is applied in display multichannel data drive circuit. It is mainly made up of complex number digital comparator and a random number generator. Each digital comparator has image data input end and reference signal end. The reference signal is together connected to the random number generator, and the output end is correspondingly connected to the complex number data channel to gain the reference signal and compare with the image data input end. Because of the voltage reference signal of the complex number digital comparator is took out by random number, this can avoid the problem of direct current excursion and resonance distortion caused by arranging bit line by order, and ensure the vision quality of the display.
Description
Technical field
The present invention is the digital analog converter that is applied to display multi-channel data driving circuit for a kind of, especially refer to that a kind of use pulse wave modulation is to reach the digital analogue signal conversion, and overcome traditional harmonic distortion and the multidigit circuit switches the problems such as electromagnetic interference (EMI) that cause simultaneously, and have the digital analog converter of desirable image display quality.
Background technology
So-called digital indicator is to have integrated professional domains such as photoelectricity, electronics, chemical industry, semiconductor.With regard to general digital indicator framework, no matter luminous principle, material or how form structure, its display mode is not still taken off the use that cooperates the multi-channel data driver, reaches the purpose of control display video picture.
Because the multi-channel data driver is the key component of control display video picture, and the relevant dealer of developing digital indicator in recent years, also propose multi-channel data driver miscellaneous, satisfy the video picture demand of different displays, as miniaturization demand or raising image display quality demand.
In the digital analog converter of several traditional multi-channel data drivers,, can adopt pulse-width modulation formula digital analog converter usually if need undersized driver.Seeing also shown in Figure 8ly, is to be the calcspar of a pulse-width modulation formula digital analog converter, and it includes:
One sequence counter 41 is counters of going up number under number or the order for an order, and in order to export a count value, the figure place of this count value is identical with signal of video signal figure place nbits;
Plural number digital comparator 40, the corresponding respectively complex data passage that is connected to a display 42 of each digital comparator 40 output terminal, and each digital comparator 40 has an image data input end and a reference signal end, this reference signal end is to be connected to this sequence counter 41, to obtain a count value as the reference signal.
The reference signal end of all digital comparators 40 of this pulse-width modulation formula digital analog converter all is connected to same sequence counter 41.As shown in Figure 9, all digital comparator 40 is all imported each bit comparison of image data with identical count value and identical high low level order 0-bit～n-bit with this.If the input image data is more than or equal to count value, then digital comparator 40 can be exported a noble potential, anti-, if the input image data is less than count value, then digital comparator 40 is exported an electronegative potential, shown in Figure 10 A, B, disclose the comparison pulse wave signal output that different reference signals are input into time domain respectively.Again, if sequence comparer 41 counting overflows, then this sequence counter 41 can be counted again, and the output signal of digital comparator 40 also can be after one-period 1024 finishes, again count and output signal, and this cycle is to be determined by the bit length of sequence counter 41 and the clock pulse frequency of sequence counter 41.
By above-mentioned pulse-width modulation formula digital simulation than the circuit operation of parallel operation as can be known, it only is made up of sequence counter 41 and plural same numbers comparer 40, thus easy hypostazation, and incarnate area is also little.Therefore, adopt the multi-channel data driving circuit of this digital analog converter to have undersized advantage, cost of manufacture is comparatively cheap relatively.Yet this digital analog converter still has shortcoming:
1. if the output pulse width signal period is not done, then the direct current position brigadier of output signal produces skew.
2. the situation that has flicker when the pulse-width modulation signal makes video picture because of harmonic distortion takes place.That is to say, when the figure place of digital comparator input signal of video signal increases, can make and the cycle of its pulse-width modulation signal can be index and increases, cause the harmonic distortion problem more serious.
Illustrate: if image input data and counter are 10bits, then the cycle of its output pulse wave signal is 1024 (2
10) clock signal.The frequency that makes clock signal is a constant, so this pulse wave signal cycle increases then representative picture turnover rate (Frame Rate) reduction.In case and picture update rate is lower than the acceptable renewal frequency of general human eye, when then human eye is watched display, can see the image of flicker.Therefore, this digital analog converter of commonly using pulse wave width modulation is subject to the first harmonic influence and reduces image display quality.And harmonic distortion forms reason and is: when digital comparator carries out the comparison of count value and image data, be in order by the paramount bit comparison of low level, and cause being easy to generate significant low-frequency harmonics.By being as can be known, though the hypostazation easily of this pulse-width modulation formula digital analog converter, and incarnate area is little, but do not have desirable image display quality.
And another kind of digital analog converter with good image display quality, then be to adopt Sigma-Delta modulation mode, see also shown in Figure 11, this digital analog converter is made up of plural groups Sigma-Delta modulation unit 50, each Sigma-Delta modulation unit 50 is made up of a totalizer 51, a loop filter 52 and a quantizer 53 as shown in figure 12; Wherein an input end of this totalizer 51 is for image data input DigitalIn, and another input end then is the output terminal that is connected to quantizer 53, to constitute a Sigma-Delta loop 54.
The totalizer 51 of above-mentioned Sigma-Delta modulation unit 50 can be subtracted each other the signal of quantizer 53 feedbacks with the input image data, to produce a rub-out signal Es, this rub-out signal Es inputs in the loop filter 54 again.This loop filter 52 is integrated in the rub-out signal time sampling in the input sigma-delta loop 54, exports quantizer 53 again to, uses and stablizes sigma-delta loop 54.This quantizer 53 is that the output signal to loop filter 52 quantizes.Because rub-out signal Es is poor for quantized signal and signal of video signal, so feedback inputs in the sigma-delta loop 54, it is zero to make that rub-out signal Es reduces to, and makes the output of quantizer 53 not disturbed by first harmonic.
See also shown in Figure 13 A, the B figure, it discloses Sigma-Delta modulation unit two different direct currents position standard (512/299) output state respectively, be that direct current position standard is broken up, because the high levels of Figure 13 A is than the high levels big (512＞299) of Figure 13 B, so two time domain waveforms, Figure 13 A waveform density is than the height of Figure 13 B.If two signals are inputed in the display, the direct current position standard of corresponding diagram 13A can be bright than Figure 13 B.In addition, the signal waveform of under the different images data, being exported by Sigma-Delta modulation unit as can be known, this Sigma-Delta modulation unit is not limited to finish computing in one-period, could obtain direct current position standard accurately.Only manage Sigma-Delta modulation unit and put the interior computing that finishes at any time, the still rough and desirable output valve of the sum total of its high and low direct current position standard is suitable, therefore, Sigma-Delta regulating type digital analog converter uses plural Sigma-Delta modulation unit, does not have the accurate coarse problem in direct current position.
Please cooperate again and consult shown in Figure 14 A, the B, the direct current signal position standard of this Sigma-Delta modulation unit and pulse-width modulation formula digital analog converter output and the situation of first harmonic, by among the figure as can be known, this Sigma-Delta modulation unit is eliminated first harmonic fully.
Described before combining, the effect of aforementioned digital analog converter is good than pulse-width modulation formula digital analog converter really.Yet, with regard to the integrated circuit framework, the assembly of each Sigma-Delta modulation unit is many and complicated, moreover the corresponding different port numbers of this digital analog converter, and need use the Sigma-Delta modulation unit of equal number, therefore, it is much bigger that the layout area of whole multi-channel digital analog converter is compared pulse-width modulation formula digital analog converter.
From the above, for the employed digital analog converter of existing multi-channel data driving circuit, digital analog converter little with layout area and that image display quality is good is not arranged at present.
Summary of the invention
Fundamental purpose of the present invention provides the pulse-width modulation formula digital analog converter of an improvement, makes its small size that has the PWM digital analog converter concurrently, and avoids the advantage of direct current offset and harmonic distortion, realizes good image display quality with low cost.
And the major technique of the pulse-width modulation formula digital analog converter of improvement is general as following:
1. the body frame structure is according to conventional P WM digital analog converter way, and each display passage correspondence connects the output terminal of a digital comparator, and again, each digital comparator comprises an image data input end and a reference signal input end;
2. the reference signal input end of a non-sequence count reference signal to each digital comparator is provided;
The above-mentioned non-sequence count reference signal that inputs to digital comparator can be by a tandom number generator with direct generation random number, also can make digital comparator obtain non-sequence count reference signal by the position order of connection between sequence counter cooperation change and digital comparator.The image data input end of this digital comparator then is connected to the image data input signal, so this digital comparator promptly with non-sequence count reference signal and image data relatively, and exports the dispersion pulse wave signal of high and low current potential.Therefore, each digital comparator can be to be scattered in one-period with the high and low position standard of output signal, half cycle before can not producing high levels and concentrating on and low level concentrates on the situation of second half.Be with, even each digital comparator output signal does not reach a complete cycle as yet, high low level quasi-average value between period of output still can be similar to the value of desire output, and make ratio of the present invention " real output value " more approach ideal value rate=1.0 divided by " idea output ", so the side-play amount of direct current of the present invention output is much smaller than known pulse-width modulation formula.Again, because the reference signal of the input of digital comparator is to be a non-sequence count reference signal, regularity is very low, so can significantly reduce the first harmonic of low frequency, avoids visually causing flicker.
Combine it, a plurality of digital comparators are only shared a tandom number generator or sequence counter among the present invention, hardware simplicity framework with pulse-width modulation formula digital analog converter, the reference signal of factor word comparer is a non-sequence count reference signal again, high and low position standard can be scattered in one-period, and can improve the shortcoming of commonly using the direct current signal value skew under the uncompleted cycle of pulse-width modulation formula digital analog converter output signal, and first harmonic can effectively be weakened, so have the excellent developing quality.
The present invention's time purpose is to make above-mentioned digital analog converter avoid electromagnetic interference (EMI).Above-mentioned a plurality of digital comparator is connected to one jointly to tandom number generator or sequence counter, therefore, all digital comparators can be obtained identical non-sequence count reference signal, so, all digital comparators will switch respective channel simultaneously, and produce big voltage, big electric current and significant electromagnetic interference (EMI) most probably, cause the damage of assembly.Be with, the present invention makes the position order of connection of tandom number generator or sequence counter and each digital comparator neither together, and make all digital comparators obtain different non-sequence count reference signals in the same time, use to fall and subtract the multidigit circuit and switch the electromagnetic interference problem that is caused simultaneously.
Description of drawings
Fig. 1: the calcspar that is the present invention's first preferred embodiment.
Fig. 2: the bit line connection diagram that is single digital comparator of the present invention and tandom number generator.
Fig. 3: be the calcspar of the present invention's second preferred embodiment, it discloses the bit line connection diagram of digital comparator and tandom number generator.
Fig. 4 A: be the calcspar of the present invention's the 3rd preferred embodiment, it discloses the bit line connection diagram of digital comparator and sequence counter.
Fig. 4 B: be the calcspar of the present invention's the 4th preferred embodiment, it discloses the bit line connection diagram of digital comparator and sequence counter.
Fig. 5: a preferable enforcement circuit diagram that is tandom number generator of the present invention.
Fig. 6 A, B: be the time modulation oscillogram of output signal of the present invention, it discloses the output signal of different images data input respectively.
Fig. 7 A, B: be Fig. 6 A, B and the Frequency spectrum ratio of commonly using pulse-width modulation formula digital analog converter than diagrammatic sketch, be disclosed in direct current intensity and first harmonic intensity under the two different output signals respectively.
Fig. 8: be the calcspar of commonly using the PWM digital analog converter.
Fig. 9: the detailed bit line connection diagram that is single digital comparator of Fig. 8 and sequence counter.
Figure 10 A, B: be the different signal output waveform figure of Fig. 8, it discloses the output signal of different images data input respectively.
Figure 11: the calcspar that is a Sigma-Delta digital analog converter.
Figure 12: the calcspar that is the single Sigma-Delta modulation of Figure 10 unit.
Figure 13 A, B: be the time modulation oscillogram of Figure 11 output signal, disclose the output waveform of different images data respectively.
Figure 14 A, B: be Figure 13 A, B and the Frequency spectrum ratio of commonly using the PWM digital analog converter than diagrammatic sketch, be disclosed in direct current intensity and first harmonic intensity under the two different output signals respectively.
Figure 15: be the present invention and Fig. 8 under time domain, measure and height ratio oscillogram.
In the accompanying drawing:
The 10--digital comparator
11--reference signal end
12--image data input end
The 20--tandom number generator
20 '--sequence counter
The 30--display
The 40--digital comparator
The 41--sequence counter
The 42--display
50--Sigma-Delta modulation unit
The 51--totalizer
The 52--loop filter
The 53--quantizer
The 54--Sigma-Delta loop
Embodiment
The present invention be directed to the multi-channel data design of Driver and have preferable development quality signals, and the little digital analog converter of layout area, to simplify the circuit layout complexity, relatively reduce the processing procedure cost.
The present invention is that the reference input with each digital comparator is connected to a non-sequence count reference signal, compares with image data again, makes each digital comparator export direct current position standard, can on average be scattered in one-period.Below promptly introduce several embodiment that the present invention realizes aforementioned purpose:
At first seeing also shown in Figure 1ly, is a calcspar that is connected to tool multi-channel data display 30 for the present invention's first preferred embodiment, and it includes:
Plural number digital comparator 10, the figure place that each digital comparator 10 includes an image data input end 12 and a reference signal input end 11, two input ends is identical;
One tandom number generator 20, its output terminal are the reference signal input ends 11 that is connected to each digital comparator, to export non-sequence count reference signal; Again, this tandom number generator 20 can be made of the random number generation component, or binding sequence counter composition, makes several lowest orders of tandom number generator 20 output terminals be sequence count.
Please cooperate again consult shown in Figure 2, be the connection diagram of single digital comparator 10 with the thin position line of tandom number generator 20, its main framework is identical with Fig. 1, and only tandom number generator 20 is corresponding to high and low position series arrangement with the bit line of each digital comparator 10.
Above-mentioned digital comparator 10 is that the numerical value of these tandom number generator 20 outputs and image data are compared, with output direct current position standard, shown in Fig. 6 A, B, when being respectively the input of two different images data, the time domain waveform figure of digital comparator 10 a direct current position standard of exporting wherein.Fig. 6 A is the comparison output signal of a complete cycle, and a direct current position standard 512 is scattered in the complete cycle, and Fig. 6 B is scattered in the complete cycle for another direct current position standard 299, because 512 greater than 229, so the high levels pulse wave waveform of Fig. 6 A is close than Fig. 6 B.By as can be known graphic, direct current position standard is on average disperseed, therefore, no matter whether digital comparator 10 finishes the output of one-period, the image data that high and low position in its output signal is accurate all can approach at that time to be imported, as shown in figure 15, transverse axis is the output cycle, and the longitudinal axis is the ratio of real output value and idea output.The present invention and known pulse-width modulation formula are not relatively finished an output during cycle as yet, and ratio of the present invention " real output value " can more approach ideal value rate=1.0 divided by " idea output ", so the present invention can avoid the problem of direct current output offset.In addition, shown in Fig. 7 A, B, the present invention with commonly use pulse-width modulation formula digital analog converter and compare, direct current signal of the present invention is accurate really, and first harmonic intensity is also suppressed effectively.
Please cooperate consult shown in Figure 3, be to be second preferred embodiment of the present invention, its big primary structure is identical with Fig. 1, only, for avoiding all digital comparators to switch all passages simultaneously, cause electromagnetic interference (EMI), therefore, this tandom number generator 20 is corresponding no longer according to high and low position series arrangement with the bit line of each digital comparator 10, make each 10 same time of digital comparator obtain the non-sequence count reference signal of different numerical value, by this, to make the not situation of switching channel simultaneously of all digital comparators 10.Because during digital comparator 10 practical layout, for saving layout area, in the layout regulation that processing procedure allows, each bit line all is closer to each other as far as possible, again, each digital comparator 10 is the digital comparators 10 for multidigit, therefore, when the image data of each passage was identical, all digital comparators 10 switched the multidigit circuit simultaneously in moment, can make that the electromagnetic interference (EMI) phenomenon is remarkable, and may undermine assembly.And each passage switches simultaneously, will produce the big electric current of moment at system end and change, and produces instant high-voltage via the stray inductance effect at system end, causes system or assembly to damage.Therefore, the present invention is linked in sequence tandom number generator 20 respectively with the bit line of all digital comparators 10 for reducing this electromagnetic interference (EMI) phenomenon according to different high low levels, change to avoid the hyperchannel signal to connect simultaneously, reduce bit line electromagnetic interference (EMI) each other, further guarantee the quality of output signal.
Again, the of the present invention the 3rd good embodiment, shown in Fig. 4 A, be to improve the electromagnetic interference problem of commonly using pulse-width modulation formula digital analog converter, structure is identical with Fig. 1 mostly, and only, tandom number generator is to replace with a sequence counter 20 ', and the bit line of the output terminal of this sequence counter 20 ' is connected to each digital comparator 10 reference signal input end according to the different high low level orders of connection, to provide digital comparator 10 non-sequence count reference signals.
Again, shown in Fig. 4 A, each digital comparator 10 is to be connected with sequence counter 20 ' with the identical position order of connection, therefore, at one time, all digital comparators 10 can be obtained identical non-sequence count numerical value, and switching channel is simultaneously arranged equally, cause the problem of electromagnetic interference (EMI) to take place.Be with, shown in Fig. 4 B, be the present invention's the 4th preferred embodiment, be that the position order of connection of each digital comparator 10 with sequence counter 20 ' is changed, make all digital comparators 10 at one time, can not obtain identical non-sequence count numerical value, and can solve the problem of electromagnetic interference (EMI).
The main composition logical circuit of above-mentioned tandom number generator can be represented by a verilog logical program, below lifts the logical program of 10 tandom number generators of an example:
Module RandGen (reset, clk, randpat); Input reset; * set the end (reset) of resetting and be input port input clk; * set clock signal end (clk) for the input port＜!--SIPO＜DP n=" 7 "〉--〉＜dp n=" d7 "/output[1:10] randpat; * setting randpat is 10 output port reg[1:10] randpat; * set one 10 buffer reg tmp; Always@ (posedge clk or negedge reset) begin* clock signal rising edge is that clock signal triggers, or reset signal falling edge triggering if (! Reset) randpat=' b0000000001; * be output as binary zero 000000001 else begin tmp=randpat[1 if random number is then set in replacement] ^randpat[8]; Randpat=randpat＜＜1; Randpat[10]=tmp; The 1st and the 8th of end* carries out logic mutual exclusion exclusive disjunction, to produce the 10th end endmodule
Please cooperate shown in Figure 5ly, be the main composition logical circuit for the incarnate tandom number generator of above-mentioned verilog logical program, is made up of ten D shape flip-flops, has 10 output terminals altogether.
From the above, the reference signal of digital comparator of the present invention is to be a random number, signal output that can high and low position is accurate after relatively through digital comparator be scattered in one-period, avoided because of not finishing a complete compare cycle, and caused the accurate incorrect problem generation in direct current position.Therefore, can guarantee that output signal is undistorted.In addition, change the high and low position of the bit line order that tandom number generator is connected to each digital comparator, can lower the electromagnetic interference (EMI) phenomenon, make whole output signal quality that more reliability is better, this mode also can apply to lower the electromagnetic interference problem of traditional hyperchannel PWM.Because of a plurality of digital comparators of the present invention are shared same tandom number generator, so it is few than the package count of sigma-delta digital analog converter, relatively effectively reduce layout area, be with, the present invention is a digital analog converter little with layout area and image display quality is good.
Therefore, the present invention meets patent requirements such as usability, novelty and progressive on the industry of patent of invention really, files an application in whence mere formality in accordance with the law.
Claims (7)
1. a digital analog converter that is applied to display multi-channel data driving circuit is characterized in that, includes:
The plural number digital comparator, each digital comparator includes an image data input end and a reference signal input end, and its output terminal is connected to the data channel of display respectively;
One tandom number generator, its output terminal are connected to the reference signal input end of each digital comparator;
This tandom number generator output signal figure place is identical with the figure place of input image data.
2. as 1 described digital analog converter that is applied to the multi-channel data driving circuit of display of claim the, it is characterized in that this tandom number generator is to be made of a random number generation component.
3. as 1 described digital analog converter that is applied to the multi-channel data driving circuit of display of claim the, it is characterized in that, this tandom number generator by random number generation component and sequence of complex numbers counter in conjunction with forming.
4. as 1,2 or 3 described digital analog converters that are applied to the multi-channel data driving circuit of display of claim the, it is characterized in that the reference signal input end of each digital comparator and tandom number generator output terminal are linked in sequence according to high and low position.
5. as 1,2 or 3 described digital analog converters that are applied to the multi-channel data driving circuit of display of claim the, it is characterized in that, the reference signal input end of all digital comparators is different with the position order of tandom number generator output terminal, makes all digital comparators obtain different random in the same time and counts reference signal.
6. a digital analog converter that is applied to the multi-channel data driving circuit of display is characterized in that, is to include:
The plural number digital comparator, each digital comparator includes an image data input end and a reference signal input end, and the output terminal of plural digital comparator is connected to the data channel of display more respectively again;
One sequence counter, its output terminal is connected with each digital comparator reference signal input end, and the position of sequence counter output terminal is disobeyed high and low position with reference signal input end position and is linked in sequence;
This sequence counter output signal figure place is identical with the figure place of input image data.
7. as 6 described digital analog converters that are applied to the multi-channel data driving circuit of display of claim the, it is characterized in that, the reference signal input end of all digital comparators and the position order of connection of sequence counter output terminal are neither together, make all digital comparators obtain different non-sequence count reference signals in the same time.
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Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101501996B (en) * | 2006-08-07 | 2011-09-07 | 松下电器产业株式会社 | Multi-channel current summing DAC |
| US8275145B2 (en) | 2006-04-25 | 2012-09-25 | Harman International Industries, Incorporated | Vehicle communication system |
| CN105866767A (en) * | 2016-06-12 | 2016-08-17 | 无锡海鹰电子医疗系统有限公司 | Ultrasonic emission channel time-delay control module |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5455681A (en) * | 1992-11-16 | 1995-10-03 | Eastman Kodak Company | Low resolution grey level printing method from high resolution binary input file |
| US6067066A (en) * | 1995-10-09 | 2000-05-23 | Sharp Kabushiki Kaisha | Voltage output circuit and image display device |
| US5952948A (en) * | 1997-09-24 | 1999-09-14 | Townsend And Townsend And Crew Llp | Low power liquid-crystal display driver |
| US6169505B1 (en) * | 1999-02-12 | 2001-01-02 | Agilent Technologies, Inc. | Multi-channel, parallel, matched digital-to-analog conversion method, multi-channel, parallel, matched digital-to-analog converter, and analog drive circuit incorporating same |
| US6441829B1 (en) * | 1999-09-30 | 2002-08-27 | Agilent Technologies, Inc. | Pixel driver that generates, in response to a digital input value, a pixel drive signal having a duty cycle that determines the apparent brightness of the pixel |
| KR20020070383A (en) * | 2000-11-13 | 2002-09-06 | 코닌클리케 필립스 일렉트로닉스 엔.브이. | A dither method and device for an image display |
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Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US8275145B2 (en) | 2006-04-25 | 2012-09-25 | Harman International Industries, Incorporated | Vehicle communication system |
| CN101501996B (en) * | 2006-08-07 | 2011-09-07 | 松下电器产业株式会社 | Multi-channel current summing DAC |
| CN105866767A (en) * | 2016-06-12 | 2016-08-17 | 无锡海鹰电子医疗系统有限公司 | Ultrasonic emission channel time-delay control module |
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