CN1115780C - Bit quasi-shifting D/A converter - Google Patents
Bit quasi-shifting D/A converter Download PDFInfo
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- CN1115780C CN1115780C CN 96119998 CN96119998A CN1115780C CN 1115780 C CN1115780 C CN 1115780C CN 96119998 CN96119998 CN 96119998 CN 96119998 A CN96119998 A CN 96119998A CN 1115780 C CN1115780 C CN 1115780C
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Abstract
The present invention relates to a bit quasi-shifting D/A converter which comprises a multiplexer, a stepping voltage (current) output circuit, a bit quasi voltage (current) output circuit and a bit quasi-shifting buffer stage circuit. The present invention mainly utilizes the application of the stepping voltage (current) output circuit and the bit quasi voltage (current) output circuit to simplify the complicated circuit design of the traditional D/A converter, improves the control adverse to precision of the D/A converter caused by multiple component numbers and effectively reduces cost.
Description
Invention field
The invention relates to a kind of bit quasi-shifting D/A converter, refer to a kind of bit quasi-shifting D/A converter that can improve traditional digital to analog converter complicated circuit especially.
Background technology
By traditional digital to analog converter mainly is that the correspondence code that will separate is in advance directly imported in the voltage taking-up circuit of digital to analog converter, and then with the output signal of man-to-man correspondence simulating; As shown in Figure 1, schematic diagram for the datum weighted-voltage D/A converter, mainly be with the incompatible effect of reaching dividing potential drop of the resistor group of R-2R formula, wherein 10 is a multiplexer I, mainly be that input value is walked around into switch control code (digital signal) and exported to control switch, 12 is a buffer I, shown in Figure 2 in addition, schematic diagram for another datum weighted-voltage D/A converter, mainly be with the incompatible effect of reaching dividing potential drop of resistance string joint group, wherein 11 is its function of multiplexer II as described in the above-mentioned multiplexer I (10), 14 is a buffer II, as shown in Figure 2, if wish to get the analog output signal on 50 rank, the at first essential correspondence code that produces 50 groups, yet, these a plurality of correspondence codes must be reached the output of analog signal by the combination of switch and resistance, so need a lot for circuit required switch number and resistive segments number average, resistance series connection partial pressure type with Fig. 2 is an example, if desire then needs at least 50 switches and 49 sections resistance, in addition for Fig. 1 R～2R form circuit with the signal that 0～4.9V is divided into 50 rank, because its element as switch itself has electric current to pass through, so the characteristic of this element can influence the accuracy at R～2R networking.When making switch with elements such as CMOS or PMOS, NMOS, the impedance operator of MOS can be along with the change of voltage, temperature difference, make the size flow through electric current and drift to some extent, so can make R～2R networking output signal distortion, generally speaking, R～2R can't reach the accuracy as resistance series connection partial pressure type; And if with identical bit number, MOS area and resistance value size that R～2R networking is required all will be greater than resistance tandem.So traditional digital to analog converter must use a large amount of elements, bigger circuit area or complicated circuit to reach required accuracy.So make cost rise, and element the more, circuit complexity is just higher, and the accuracy influencing factor of circuit is certainly with regard to the more and wayward.
Therefore, as from the foregoing, traditional digital to analog converter, in design and practical application, still have some inconvenience and defective and exist, You Zhiqi is the combination of the many parts numbers of utilization, not only influences its cost of manufacture, other is vulnerable to the interference of more environment noise and accuracy is controlled problems such as difficult, and can wait to be improved.
Summary of the invention
Main purpose of the present invention is to be to utilize the design of sublevel voltage (electric current) output circuit and position accurate voltage (electric current) output circuit to produce required voltage output value, solve the design that traditional digital to analog converter need use polynary number of packages design or complicated circuit, be subjected to the influence of environment easily and produce multinomial factors such as many noises and unfavorable accurate control, and cause the problems such as a big burden of cost of manufacture, so this circuit not only reduces cost, and the complexity of circuit is reduced greatly.
Another object of the present invention is to be that the magnitude of voltage that utilizes a bit quasi-shifting buffer stage circuit that the accurate voltage follower circuit of sublevel voltage follower circuit and position is exported can obtain required output voltage signal via this buffer stage processing of circuit.
Another object of the present invention is that the current signal that is to utilize a change-over circuit that the accurate current output circuit of sublevel current output circuit and position is exported is converted to voltage signal, again via bit quasi-shifting buffer stage processing of circuit to obtain required output voltage signal.
One aspect of the present invention mainly is with traditional sublevel voltage follower circuit, design is divided into the circuit of two parts: one is the sublevel voltage follower circuit, another is the accurate voltage follower circuit in position, and wherein the accurate voltage follower circuit of this sublevel voltage follower circuit and position can utilize a variety of modes to reach; For example: be originally the then sublevel voltage follower circuit of R～2R of available 5bit of circuit that the R of 7bit～2R forms, R～the 2R that reaches with 2bit does the accurate voltage follower circuit in position, can reduce the complexity of integrated circuit by the Combination Design of this two circuit, cooperate the utilization of a bit quasi-shifting buffer stage again, to obtain required output voltage signal.
The digital to analog converter of this aspect comprises according to the present invention:
-multiplexer is the signal that former digital value is changed into the required digital code of this digital to analog converter and export these a plurality of digital codes;
-sublevel voltage follower circuit is to be electrically connected to this multiplexer, receives the signal by at least one digital code of this multiplexer output, and the voltage difference that cooperates its exponent number S that has planned and each exponent number is to export a voltage signal;
The accurate voltage follower circuit in-position, be to be electrically connected to this multiplexer, reception is by the signal of at least one digital code of this multiplexer output, and the voltage difference that cooperates the accurate number X in position that it has planned and each accurate number is to export a voltage signal, the accurate number of its meta depends on the required output voltage range of user, and has following relation: Ve=Δ VnX
Wherein Ve represents the output voltage values of the accurate voltage follower circuit in position, and Δ Vn represents the fixed voltage difference that each standard is planned;
-bit quasi-shifting buffer stage circuit, be to be electrically connected to this sublevel voltage follower circuit and this accurate voltage follower circuit, be used for exporting this sublevel voltage output and the accurate voltage output in position sum according to required aanalogvoltage form, wherein, the product of the accurate number in position of the exponent number of this sublevel voltage follower circuit and this accurate voltage follower circuit is that to wish to get the exponent number of analog output voltage identical with the user.
Another aspect of the present invention mainly is to utilize the principle identical with above-mentioned aspect, the accurate voltage follower circuit change of above-mentioned sublevel voltage follower circuit and position is designed to the accurate current output circuit of sublevel current output circuit and position, by a change-over circuit current output signal is converted to the voltage output signal, cooperate the utilization of a bit quasi-shifting buffer stage circuit again, to obtain required output voltage signal.
The digital to analog converter of this aspect comprises according to the present invention:
-multiplexer is the signal that former digital value is changed into the required digital code of this data converter and export these a plurality of digital codes;
-sublevel current output circuit is to be electrically connected to this multiplexer, receives the signal by at least one digital code of this multiplexer output, and the electric current difference that cooperates its exponent number of having planned and each exponent number is to export a current signal;
The accurate current output circuit in-position, be to be electrically connected to this multiplexer, reception is by the signal of at least one digital code of this multiplexer output, and the electric current difference that cooperates the accurate number in position that it has planned and each accurate number is to export a current signal, the accurate number of its meta depends on the required output voltage range of user, and has following relation: I
L(Z+1)=I
L(Z)+Δ I
L,
I wherein
LRepresent the output current value of the accurate current output circuit in position, Δ I
LRepresent the fixed current difference that each standard is planned, Z position in the Z representative planning accurate number in position well is accurate;
-current-to-voltage converting circuit, be to be electrically connected to this sublevel current output circuit and this accurate current output circuit, the output current signal of reception both current output circuits by this, and combination is a needed analog voltage signal and exports with this current signal of conversion;
Wherein the product of the accurate number in position of the exponent number of this sublevel current output circuit and this accurate current output circuit is that to wish to get the exponent number of analog output signal identical with the user.
Thus, bit quasi-shifting D/A converter of the present invention, it is compared with traditional digital to analog converter and has following advantage:
(1) circuit complexity that the present invention can be identical reaches preferable accuracy, promptly reaches the accuracy identical with traditional circuit with better simply circuit.
(2) the present invention can make traditional circuit complexity reduce (parts number is less), and helps the control of precision, and in addition, the influence degree of environment also can decrease.
(3) the present invention reduces the use number of switch, so can reduce the noise that is produced when switch switches effectively.
(4) the present invention has reduced the number that uses element in a large number because of it, and lowers cost of manufacture.
Description of drawings
For making for purpose of the present invention, characteristics and effect have further to be understood and approval, and existing conjunction with figs. describes in detail as the back:
Fig. 1 is the schematic diagram of datum weighted-voltage D/A converter.
Fig. 2 is the schematic diagram of another datum weighted-voltage D/A converter.
Fig. 3 is the circuit block diagram of first embodiment of the invention.
Fig. 4 is the circuit diagram of first embodiment of the invention bit quasi-shifting buffer stage circuit.
Fig. 5 is the circuit block diagram of second embodiment of the invention.
Fig. 6 is the schematic diagram of the generation output voltage of second embodiment of the invention.
Embodiment
At first, see also accompanying drawing 3, circuit block diagram for first embodiment of the invention, it includes a multiplexer III (24), a sublevel voltage follower circuit (26), an accurate voltage follower circuit (28), a bit quasi-shifting buffer stage circuit (30), wherein the voltage phase difference value of voltage exponent number, the accurate number in position and this first exponent number of its institute out of the ordinary desire generation of this sublevel voltage follower circuit (26) and the accurate voltage follower circuit in position (28) is all planned by each user and is designed, and sees also the explanation of following principle:
Vn (S): the output voltage values S of sublevel voltage follower circuit: exponent number
Ve (X): the output voltage values X of the accurate voltage follower circuit in position: the accurate number in position
Vo: the output voltage values that both synthesize
→Vo＝Vn(S)+Ve(X)
If 0～4.9V will be divided into the magnitude of voltage on 50 rank
At first, make its exponent number S can be divided into 10 rank, then the accurate number X in position is split up into the 50/10=5 rank, promptly
S＝0、1、2、3、…、8、9
X＝0、1、2、3、4
And each exponent number voltage difference of planning this sublevel voltage follower circuit is 0.1V, and then the accurate number voltage difference of each of this accurate voltage follower circuit is 1V, then
Vn(S)＝0.1V×S
Ve(X)＝1V×X
If wish to get required voltage output value and be 3.5V and 0.8V then by
Vo=Vn (S)+Ve (X)
3.5V＝Vn(5)+Ve(3)
0.8V＝Vn(8)+Ve(O)
As shown in Figure 3, at first former digital value is converted to the required digital code of digital to analog converter and exports these a plurality of digital code signals to deliver to sublevel voltage follower circuit (26) and position accurate voltage follower circuit (28) respectively by multiplexer III (24), this sublevel voltage follower circuit (26) and this accurate voltage follower circuit (28) are according to the signal of multiplexer (24) input and the exponent number that cooperates it to plan, the voltage difference of the accurate number of position accurate number and each exponent number and position and export a voltage signal respectively to bit quasi-shifting buffer stage circuit (30) is exportable required analog voltage output signal via this bit quasi-shifting buffer stage circuit (30) back (in hypomere with detailed description) that is for further processing.
In addition, see also Fig. 4, be the circuit diagram of first embodiment of the invention bit quasi-shifting buffer stage, wherein Vn be the magnitude of voltage by the output of sublevel voltage follower circuit, the Ve magnitude of voltage that the accurate voltage follower circuit in position is exported of serving as reasons, and Vn=Vn
AC+ Vn
DC(Vn
ACBe the AC signal of sublevel voltage follower circuit output, Vn
DCDirect current signal for the output of sublevel voltage follower circuit), Ve=Ve
DC(Ve
DCDirect current signal for the accurate voltage follower circuit output in position), can learn Vo=(1+R2/R1) Vn by the diagram computing
AC+ ((1+R2/R1) Vn
DC-(R2/R1) Ve
DC) ((1+R2/R1) Vn wherein
ACBe an AC signal, ((1+R2/R1) Vn
DC-(R2/R1) Ve
DC) be a direct current signal, so only will adjust the resistance value of R1, R2 and the size of a signal voltage Ve value that accurate voltage follower circuit is exported, can obtain required output voltage V o.
In addition, see also Fig. 5, it is circuit block diagram for second embodiment of the invention, it includes a multiplexer IV (32), one sublevel current output circuit (34), an accurate current output circuit (36), one current-to-voltage converting circuit (38) and a buffer stage circuit (40), wherein the accurate number of exponent number and position of this sublevel current output circuit (34) and the desire generation of position accurate current output circuit (36) institute is the principle identical with first embodiment, do not given unnecessary details at this, right in required output voltage V o, see also Fig. 6, be the schematic diagram of second embodiment of the invention generation output voltage, it is described as follows:
IL (a): the output current value a of the accurate current circuit in position: the accurate number in position
I
s(b): the output current value b of sublevel current circuit: exponent number
Vo: the magnitude of voltage of present embodiment output
→Vo＝〔IL(a)+IS(b)〕×R1
Present embodiment also is designed to the magnitude of voltage on 50 rank, then
a＝0、1、2、3、4
b＝0、1、2、3……8、9
And each exponent number electric current difference of planning this rank current output circuit is Δ IL, and then each exponent number electric current difference DELTA IS=Δ IL/10 of this sublevel current circuit output circuit can obtain
IL(Z+1)＝IL(Z)+ΔIL Z＝0、1、2、3
IS(W+1)＝IS(W)+ΔIS W＝0、1、2、3……7、8
Wherein Δ IL and Δ IS are certain value
As shown in Figure 5, at first sublevel current output circuit (34) and the accurate current output circuit in position (36) cooperate the electric current difference of the accurate number in position, exponent number, each exponent number and the accurate number planned to export a current signal respectively to current-to-voltage converting circuit (38) according to the signal of multiplexer input again, this current-to-voltage converting circuit (38) is converted to the current value combination magnitude of voltage and exports buffer stage circuit (40) to, is exportable required analog voltage output signal after being for further processing via this buffer stage circuit (40).
From the above mentioned, the present invention mainly is the combination that utilizes the accurate voltage follower circuit of sublevel voltage follower circuit and position as can be known, cooperate the magnitude of voltage combination of the utilization of a bit quasi-shifting buffer stage circuit again with this two circuit output, or utilize the sublevel current output circuit and the position accurate current output circuit combination, cooperate the current value combination conversion of the utilization of a current-to-voltage converting circuit and buffer stage circuit again with this two circuit output, can obtain required analog voltage signal, wherein the design by this sublevel voltage (electric current) output circuit and position accurate voltage (electric current) output circuit has significantly reduced required switch number and the resistance hop count of traditional circuit, not only make its circuit complexity reduce the control that helps precision, and the noise when reducing switch and switching, and then more reduce cost of manufacture, effectively promote the efficient of this bit quasi-shifting D/A converter.
The above only is a preferred embodiment of the present invention, can not with the scope implemented of qualification the utility model.Be all various variations and corrections of in claim of the present invention institute restricted portion, being done, all should belong in the scope that patent of the present invention contains.
Claims (3)
1, a kind of bit quasi-shifting D/A converter, it includes:
-multiplexer is the signal that former digital value is changed into the required digital code of this digital to analog converter and export these a plurality of digital codes;
-sublevel voltage follower circuit is to be electrically connected to this multiplexer, receives the signal by at least one digital code of this multiplexer output, and the voltage difference that cooperates its exponent number S that has planned and each exponent number is with output-voltage signal;
The accurate voltage follower circuit in-position, be to be electrically connected to this multiplexer, reception is by the signal of at least one digital code of this multiplexer output, and the voltage difference that cooperates the accurate number X in position that it has planned and each accurate number is with output-voltage signal, the accurate number of its meta depends on the required output voltage range of user, and has following relation: Ve=Δ VnX
Wherein Ve represents the output voltage values of the accurate voltage follower circuit in position, and Δ Vn represents the fixed voltage difference that each standard is planned;
-bit quasi-shifting buffer stage circuit is to be electrically connected to this sublevel voltage follower circuit and this accurate voltage follower circuit, is used for exporting this sublevel voltage output and the accurate voltage output in position sum according to required aanalogvoltage form,
Wherein, the product of the accurate number in position of the exponent number of this sublevel voltage follower circuit and this accurate voltage follower circuit is that to wish to get the exponent number of analog output voltage identical with the user.
2, a kind of bit quasi-shifting D/A converter, it includes:
-multiplexer is the signal that former digital value is changed into the required digital code of this data converter and export these a plurality of digital codes;
-sublevel current output circuit is to be electrically connected to this multiplexer, receives the signal by at least one digital code of this multiplexer output, and the electric current difference that cooperates its exponent number of having planned and each exponent number is with output-current signal;
The accurate current output circuit in-position, be to be electrically connected to this multiplexer, reception is by the signal of at least one digital code of this multiplexer output, and the electric current difference that cooperates the accurate number in position that it has planned and each accurate number is to export a current signal, the accurate number of its meta depends on the required output voltage range of user, and tool
Following relation: I is arranged
L(Z+1)=I
L(Z)+Δ I
L,
I wherein
LRepresent the output current value of the accurate current output circuit in position, Δ I
LRepresent the fixed current difference that each standard is planned, Z position in the Z representative planning accurate number in position well is accurate;
-current-to-voltage converting circuit, be to be electrically connected to this sublevel current output circuit and this accurate current output circuit, the output current signal of reception both current output circuits by this, and combination is a needed analog voltage signal and exports with this current signal of conversion;
Wherein the product of the accurate number in position of the exponent number of this sublevel current output circuit and this accurate current output circuit is that to wish to get the exponent number of analog output signal identical with the user.
3, digital to analog converter as claimed in claim 2 wherein also comprises a buffer stage circuit, is used to cushion the analog voltage signal that this current-to-voltage converting circuit is exported.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 96119998 CN1115780C (en) | 1996-07-03 | 1996-09-26 | Bit quasi-shifting D/A converter |
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN96215874.7 | 1996-07-03 | ||
| CN96215874 | 1996-07-03 | ||
| CN 96119998 CN1115780C (en) | 1996-07-03 | 1996-09-26 | Bit quasi-shifting D/A converter |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN1171659A CN1171659A (en) | 1998-01-28 |
| CN1115780C true CN1115780C (en) | 2003-07-23 |
Family
ID=25744047
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN 96119998 Expired - Fee Related CN1115780C (en) | 1996-07-03 | 1996-09-26 | Bit quasi-shifting D/A converter |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN1115780C (en) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN100438343C (en) * | 2004-04-30 | 2008-11-26 | 中国科学院半导体研究所 | Single electron digital-analog signal conversion equipment |
-
1996
- 1996-09-26 CN CN 96119998 patent/CN1115780C/en not_active Expired - Fee Related
Also Published As
| Publication number | Publication date |
|---|---|
| CN1171659A (en) | 1998-01-28 |
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Owner name: SHENGQUN SEMICONDUCTOR CO., LTD. Free format text: FORMER OWNER: HETAI SEMICONDUCTOR CO., LTD. Effective date: 20030313 |
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