CN1599188A - Parallel cross operation method of critical continuous conducting mode power factor corrector - Google Patents

Abstract

The parallel connection interleaving operational method of the power factor corrector in the critical and consecutive conducting mode belongs to the field of the control technology of the power converter. It chooses the method of digital dead beat control, adopts single DSP, confirms one of the several shunt-wound BCM Boost convertors as the master convertor, which is controlled in closed loop, and the rest as the appurtenant convertors, which are controlled in open loop. Under the condition of variable switch frequency and sampling frequency, make the inductive current of the appurtenant convertors follow the inductive current of the master convertors and realize the parallel connection interleaving operation of the BCM Boost APFC convertor. It only samples the input voltage and the output voltage, does not need to detect the peak value of the switched current in the hardware or to judge the crossover point of the inductive current, can get relatively high power and control it more simply.

Description

The paralleling and interleaving operation method of critical continuous conduction mode power factor corrector

Technical field

(Active Power Factor Correction, APFC) Bu Fen research and application belong to the control technology field of power inverter to the invention belongs to single-phase AC/DC power factor corrector in the Switching Power Supply.

Background technology

(Boundary Conduction Mode, BCM) Boost APFC converter are called for short BCM Boost APFC converter to critical continuous conduction mode.Because it can be realized zero current, the no-voltage (ZCS, ZVS) that switching tube is opened and eliminate the loss that the reverse recovery of high pressure fast recovery diode brings, with respect to (CCM) and intermittently (DCM) BoostAPFC converter continuously, it has high conversion rate.Fig. 1 and Fig. 2 have provided the system configuration and the crucial work wave of BCM Boost APFC converter.Fig. 3 has provided the switching frequency of BCM Boost APFC converter and the relation curve of input voltage.

The control strategy of BCM Boost APFC converter shown in Figure 1 is the variable peak current control of switching frequency, and its control procedure can be divided into 4 parts:

(1) output voltage is regulated part: output voltage U _DcWith set-point U _DcrefDifference through a pi regulator computing after, be output as U _Vea

(2) inductive current reference value i _LrefGeneration: by a multiplier, the output U of Voltage loop pi regulator _VeaMultiply by the input voltage of converter | u _Ac| obtain the reference value i of inductive current _Lref, i _LrefTherefore the control signal that has comprised inductive current and output voltage, can realize the control of input current and output voltage;

(3) peak value of switching current detects: when the peak value of switching current equals reference value i _LrefThe time, switching tube S turn-offs, and realizes the control of inductive current.When S turn-offed, the parasitic capacitance of switching tube S and inductance L generation resonance were realized the ZVS that switching tube S opens;

(4) zero crossing of inductive current judgement (ZCD): when detecting the inductive current zero passage, open switching tube S, the critical of realization inductive current realized the ZCS that switching tube S opens continuously, and eliminates the loss that the reverse recovery of fast recovery diode brings.

Shown in Figure 2 is the pwm signal and the critical continuous inductive current waveform of BCM Boost APFC converter switches pipe.U among the figure _AcBe AC-input voltage, reference value i _LrefEnvelope for inductive current.

The switching frequency f of BCM Boost APFC converter shown in Figure 3 _SwRelation curve with input voltage.As seen from the figure, the switching frequency of converter is variable.In half power frequency period, switching frequency reduces with the rising of input voltage amplitude, and switching frequency is minimum at the peak value place of input voltage, and the highest at the zero crossing place of input voltage switching frequency.

Because inductive current is operated in critical condition, promptly between DCM and CCM, BCM Boost converter has higher input power factor.And bigger inductive current ripple has increased the burden of electromagnetic interface filter, makes that power density reduces, cost increases, and therefore, single switch BCM Boost APFC converter generally only is applicable to the small-power occasion.And, can adopt a plurality of BCM Boost APFC converter parallel operations in theory than the high-power applications occasion, and make the HF switch phase place of BCMBoost converter in parallel evenly stagger, realize the staggered of inductive current.Can make total input current ripple very little like this, reduce the volume of electromagnetic interface filter.In addition, each switching tube and fast recovery diode are evenly shared electric current, can reduce the current stress of device.Therefore, the BCM Boost APFC converter of paralleling and interleaving is a very attractive topology.Along with going deep into of research, and the occasion of having relatively high expectations more high-power at some, the BCM Boost APFC converter of paralleling and interleaving will may be obtained better complete machine performance by replaced C CM Boost APFC converter.Fig. 4 has provided the example that is connected in parallel with 3 Boost converters, Fig. 5 provided 3 staggered inductive currents and staggered after total current waveform.

Shown in Figure 4 is APFC master's topology of 3 BCM Boost converter paralleling and interleavings.3 Boost converters structurally are connected in parallel, and it is evenly staggered with the inductive current that makes 3 converters to realize that in control 3 Boost converters are evenly born total input current.

Shown in Figure 5 is the inductive current waveform that interlocks, though the ripple of single inductive current is very big, the total input current ripple in staggered back is very little, and, the increase that the frequency of ripple also can be at double.

At present, the control of BCM Boost APFC converter all adopts analog controller to realize.The paralleling and interleaving general modfel of BCM BoostAPFC converter is: at first use the special-purpose basic BCM Boost APFC converter of analog IC control, realize the staggered of parallel connection converter inductive current with logical circuit then.Go wrong for fear of logical circuit, improve the functional reliability of paralleling and interleaving circuit, each converter all needs an independently analog IC controller, and this makes the components and parts number of circuit increase greatly, when especially the number of paralleling and interleaving is big, implement very complicated.And communication delay can influence the evenly staggered degree of inductive current between difference between the multi-controller PWM and the controller, reduces the quality of input current.And utilize the flexibility of digitial controller, can realize the paralleling and interleaving of a plurality of BCM APFC converters at an easy rate, obtain more high-power output, make critical flow Discontinuous Conduction mode Boost Boost APFC converter in industry, obtain using comparatively widely, improve the conversion efficiency and the complete machine performance of APFC converter.

Summary of the invention

The object of the present invention is to provide a kind of method of BCM Boost APFC converter paralleling and interleaving operation.

The invention is characterized in: it contains following each step successively:

(1) at digital signal processor, be called for short in the DSP, set:

N:BCM Boost APFC converter is called for short converter, the number of paralleling and interleaving operation;

T _s: the control cycle of N converter paralleling and interleaving operation;

T _Sw: the pulse width modulation cycle of each converter;

T _Sw/ N: the time interval of the staggered phase shift of each converter;

TxPR:T _sWith each T _SwThe period register set point, preestablish;

TxCNT:T _sWith each T _SwThe timer count value;

TxCMPR: the set point of corresponding each comparator preestablishes;

Above-mentioned each switch periods of each converter is T _SwThe service time of interior switching tube and turn-off time, use t respectively _OnAnd t _OffExpression:

$t_{\mathrm{on}}=L\frac{i_{\mathrm{Lref}}}{\left|u_{\mathrm{ac}}\right|},$

$t_{\mathrm{off}}=L\frac{i_{\mathrm{Lref}}}{U_{\mathrm{dc}}-\left|u_{\mathrm{ac}}\right|},$

Wherein, U _DcFor each converter output voltage instantaneous value, be identical to each converter, | u _Ac| for each converter input voltage instantaneous value, be identical to each converter; L is the inductance of each converter, is identical to each converter; i _LrefBeing the inductive current reference value on the inductance L of each converter, also is identical to each converter;

i _LrefBeing the inductive current reference value, is a voltage signal, is proportional to U _Vea| u _Ac| product;

| u _Ac|, U _Dc, i _LrefSampling period and sampling interval;

(2) T _sTimer counting make zero, interrupt signal goes into wherein to break mouth;

(3) 1 ^#The timer T1CNT zero clearing of converter;

(4) the DSP startup is right | u _Ac|, U _Dc, i _LrefSampling, comprise and calculate i according to the following steps _Lref:

(4.1) calculate U _Dcref-U _Dc

(4.2) U _Dcref-U _DcDifference input pi regulator, U _Vea

(4.3) U _Vea, | u _Ac| import a multiplier, get i _Lref

(5) DSP foundation | u _Ac|, U _DcAnd i _LrefValue, calculate t _On, t _Off, obtain the required pwm signal that gets of each converter, also be current 1 ^#The PWM of converter ₁Signal;

(6) work as i _LrefZero passage is that the value of T1CNT equals T1CMPR promptly 1 ^#During the value of comparator, DSP is to 1 ^#Switching tube sends PWM ₁Signal;

(7) DSP judges that the stand-by period equals T _Sw/ N denys, if equate, then to 2 ^#Switching tube sends PWM ₂Signal;

(8) repeating step (7) is until DSP sends PWM _NSignal.

Described T _s=4T _Sw

The present invention is directed to BCM Boost APFC converter generally only is applicable to and the restriction of small-power occasion proposes a kind of digital dead beat controlling schemes.This scheme is only to input voltage and output voltage sampling, do not need the switch current peak is detected and to the judgement of inductive current zero crossing, realized the BCM Boost APFC convertor controls that switching frequency is variable.Based on the flexibility of digital control technology, adopt the variable method of sample frequency, use single DSP relatively easily to realize the work of a plurality of BCM BoostAPFC converter paralleling and interleaving.Determining one in the middle of the BCM of a plurality of parallel connections Boost converter is main converter, and other is from converter.Because inductive current is critically continuously so can adopt the main converter closed-loop control, from converter open loop control, to allow the inductive current of following main converter from the inductive current of converter change, realize that a plurality of Boost converters work under the BCM pattern.Utilize software to realize the staggered of each converter PWM, inductive current is interlocked come, realize the paralleling and interleaving operation of a plurality of BCM Boost APFC converters.

Description of drawings

The system construction drawing of Fig. 1 .BCM Boost APFC converter.

The inductive current waveform of Fig. 2 .BCM Boost APFC converter.

The input voltage of Fig. 3 .BCM Boost APFC converter and the graph of a relation of switching frequency.

Fig. 4 .3 BCM Boost converter topology that is connected in parallel.

The inductive current that Fig. 5 .3 is staggered and staggered after total current waveform.

Two kinds of mode of operations of Fig. 6 .BCM Boost converter.

The dead beat controller of Fig. 7 .BCM Boost converter.

The controller schematic diagram of Fig. 8 .3 paralleling and interleaving BCM Boost APFC converter.

Fig. 9. digital PWM occurring principle schematic diagram.

The principle schematic that Figure 10 .3 converter PWM is staggered 120 °.

Figure 11. the software flow pattern of paralleling and interleaving controller.

Embodiment

The dead beat controller that the present invention proposes is based on that two kinds of mode of operations of BCM Boost APFC converter obtain, two kinds of mode of operations of BCM Boost APFC converter as shown in Figure 6, the dead beat controlling schemes of proposition is as shown in Figure 7.The a plurality of BCM Boost converter paralleling and interleaving operating schemes based on single DSP that utilize the variable sampling frequency to realize that propose are as Fig. 8, Fig. 9 and shown in Figure 10.

In the mode of operation shown in Fig. 6 (a), inductive current $i_L=\frac{\left|u_{\mathrm{ac}}\right|}{L}{t}_{\mathrm{on}},$ In the mode of operation shown in Fig. 6 (b), $i_L=\frac{U_{\mathrm{dc}}-\left|u_{\mathrm{ac}}\right|}{L}{t}_{\mathrm{off}},$ Wherein | u _Ac| and U _DcIt is the input and output instantaneous voltage of Boost converter.By BCM BoostAPFC operation principle as can be known, i _LrefBe the envelope of inductive current, utilize i _LrefCan obtain the service time and the turn-off time of each switch periods switching tube, promptly $t_{\mathrm{on}}=L\frac{i_{\mathrm{Lref}}}{\left|u_{\mathrm{ac}}\right|}$ With $t_{\mathrm{off}}=L\frac{i_{\mathrm{Lref}}}{U_{\mathrm{dc}}-\left|u_{\mathrm{ac}}\right|}.$ Therefore, in digitial controller, can calculate the required pwm signal of each switch periods in real time, realize critical continuous control inductive current.

Shown in Figure 7 is the dead beat controlling schemes, and control procedure can be divided into 3 parts:

(1) output voltage U _DcWith set-point U _DcrefDifference be output as U through a pi regulator _Vea, then, U _VeaMultiply by the input voltage of converter | u _Ac| obtain the reference value i of inductive current _Lref, i.e. the envelope of inductive current;

(2) input voltage, output voltage instantaneous value and the inductive current reference value i that utilizes sampling to obtain _Lref, calculate required ON time t _OnWith turn-off time t _Off

(3) according to the t that calculates _OnAnd t _OffObtain required driving pwm signal, realize the control of BCM Boost APFC converter.

The paralleling and interleaving controller schematic diagram that shown in Figure 8 is is example with 3 BCM Boost APFC converters.1# is a main converter among the figure, adopts closed-loop control, and 2# and 3# are from converter, and the control mode of employing is open loop.In addition, the driving pulse PWM of 3 converters ₁, PWM ₂, PWM ₃Cycle all be the same with duty ratio, just on the HF switch phase place, staggered Realize the evenly staggered of 3 inductive currents.

What this paper adopted is this class of TI TMS320LF240X DSP control chip cheaply.That driving pulse is selected for use is the T1PWM of timer 1, the T2PWM of timer 2 and the T3PWM of timer 3, and control program adopts the interruption of timer 4 to realize.Fig. 9 and shown in Figure 10 be the HF switch phase shifting 120 ° the software of 3 PWM is realized principle.

Shown in Figure 9 is the PWM occurring principle of TMS320LF240X timer.Drive signal TxPWM (x=1～4) is relatively produced by the value of the counter TxCNT of this timer and the value of comparand register TxCMPR, and what select for use among the present invention is low effective model, and when promptly the value of TxCNT was lower than TxCMPR, TxPWM was output as high level.

Shown in Figure 10 is the principle schematic that software is realized staggered 120 ° of 3 PWM.The switching frequency of the paralleling and interleaving BCM Boost converter among the present invention is variable., in order to realize the evenly staggered of 3 inductive currents, sample frequency also is variable, changes with the variation of switching frequency.The driving pulse of 3 BCM Boost converter uses is respectively T1PWM, T2PWM and T3PWM, and period register T1PR, the T2PR of timer and T3PR determine the period T of passage TxPWM separately _Sw, period register T4PR decision control cycle T _sAnd, T _SwAnd T _sAll be variable.Adopt the underflow of timer 4 to interrupt, promptly response is interrupted when counter register T4CNT count down to zero, executive control program.Because switching frequency is variable, each interruption all will change staggered time value So, in order to access uniformly staggered PWM, must make the counter T1CNT of the counter T4CNT of timer 4 and timer 1 count down to simultaneously zero realize a phase place synchronously, promptly to guarantee switch periods and be the relation of an integral multiple between the sampling period.Take all factors into consideration the size of control program and the performance of controller, select T _s=4T _Sw, as shown in figure 10.

In digitial controller, when the counter T4CNT of timer 4 count down to zero, enter underflow and interrupt starting the PWM function of T1 then immediately with the T1CNT zero clearing, forbid the PWM function of T2 and T3 simultaneously.Postpone After, with the T2CNT zero clearing, start the PWM function of T2, the PWM function of forbidding T3 simultaneously.Postpone again

After, with the T3CNT zero clearing, start the PWM function of T3 then.So just realize the phase cross-over of 120 ° of 3 high-frequency PWMs.

Shown in Figure 11 is with 3 BCM Boost APFC converters is the software flow pattern of the paralleling and interleaving controller of example.

Claims (2)

1. the paralleling and interleaving operation method of critical continuous conduction mode power factor corrector is characterized in that, it contains following each step successively:

(1) at digital signal processor, be called for short in the DSP, set:

N: critical continuous conduction mode power factor corrector, be called for short converter, paralleling and interleaving operation number;

T _s: the control cycle of N converter paralleling and interleaving operation;

T _Sw: the pulse width modulation cycle of each converter;

T _Sw/ N: the time interval of the staggered phase shift of each converter;

TxPR:T _sWith each T _SwThe period register set point, preestablish;

TxCNT:T _sWith each T _SwThe timer count value;

TxCMPR: the set point of corresponding each comparator preestablishes;

Above-mentioned each switch periods of each converter is T _SwThe service time of interior switching tube and turn-off time, use t respectively _OnAnd t _OffExpression:

$t_{\mathrm{on}}=L\frac{i_{\mathrm{Lref}}}{\left|u_{\mathrm{ac}}\right|},$

$t_{\mathrm{off}}=L\frac{i_{\mathrm{Lref}}}{U_{\mathrm{dc}}-\left|u_{\mathrm{ac}}\right|},$

Wherein, U _DcFor each converter output voltage instantaneous value, be identical to each converter, | u _Ac| for each converter input voltage instantaneous value, be identical to each converter; L is the inductance of each converter, is identical to each converter; i _LrefBeing the inductive current reference value on the inductance L of each converter, also is identical to each converter;

i _LrefBeing the inductive current reference value, is a voltage signal, is proportional to U _Vea| u _Ac| product;

| u _Ac|, U _Dc, i _LrefSampling period and sampling interval;

(2) T _sTimer counting make zero, interrupt signal goes into wherein to break mouth;

(3) 1 ^#The timer T1CNT zero clearing of converter;

(4) the DSP startup is right | u _Ac|, U _Dc, i _LrefSampling, comprise and calculate i according to the following steps _Lref:

(4.1) calculate U _Dcref-U _Dc

(4.2) U _Dcref-U _DcDifference input pi regulator, U _Vea

(4.3) U _Vea, | u _Ac| import a multiplier, get i _Lref

(5) DSP foundation | u _Ac|, U _DcAnd i _LrefValue, calculate t _On, t _Off, obtain the required pwm signal that gets of each converter, also be current 1 ^#The PWM of converter ₁Signal;

(6) work as i _LrefZero passage is that the value of T1CNT equals T1CMPR promptly 1 ^#During the value of comparator, DSP is to 1 ^#Switching tube sends PWM ₁Signal;

(7) DSP judges that the stand-by period equals T _Sw/ N denys, if equate, then to 2 ^#Switching tube sends PWM ₂Signal;

(8) repeating step (7) is until DSP sends PWM _NSignal.

2. the paralleling and interleaving operation method of critical continuous conduction mode power factor corrector according to claim 1 is characterized in that, described T _s=4T _Sw

Images