CN1591785A - Self-aligning contact window open mfg. method, internal connecting structure and mfg. method thereof - Google Patents
Self-aligning contact window open mfg. method, internal connecting structure and mfg. method thereof Download PDFInfo
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- CN1591785A CN1591785A CN 03156644 CN03156644A CN1591785A CN 1591785 A CN1591785 A CN 1591785A CN 03156644 CN03156644 CN 03156644 CN 03156644 A CN03156644 A CN 03156644A CN 1591785 A CN1591785 A CN 1591785A
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Abstract
The present invention relates to a making method of self-aligned contact window opening, internal wire-connected structure and its making method. The making method of said self-aligned contact window opening includes the following steps: firstly, providing a base on which the gate dielectric layer, gate conductive layer and top cover layer are formed, forming protection layer on the top cover layer, in which the removing of the protection layer is less than that of top cover layer, then patterning protection layer, top cover layer and gate conductive layer so as to form several gate structures, then forming gap wall on side wall of gate structure, and forming dielectric layer on upper portion of base, said dielectric layer can be used for covering gate structure and protection layer, then patterning the dielectric layer so as to form self-aligned contact window opening.
Description
Technical field
The present invention relates to a kind of semiconductor element and manufacture method thereof, particularly relate to a kind of manufacture method of contact window and manufacture method of internal connection-wire structure and intraconnections thereof of aiming at voluntarily.
Background technology
Very lagre scale integrated circuit (VLSIC) (ULSI) processing procedure resolution (resolution) has developed into below 0.18 micron at present, be that the degree of depth is more and more big to the ratio of width or diameter, metal and semi-conductive contact hole are also more and more little, therefore to how to overcome more and more little live width, prevent contact hole generation aligning mistake (Misalignment), become the research and development emphasis of semiconductor industry.
In order to overcome more and more little live width and to prevent contact hole generation aligning mistake, common many semiconductor elements can adopt and aim at contact hole (self-aligned contact, design SAC) voluntarily.Particularly, if desire to make the doped region in the substrate to electrically connect, then can adopt the design of aiming at contact hole voluntarily to reach with the conductor structure that is formed on the substrate top.
Seeing also shown in Figure 1A to Fig. 1 D, is existing known a kind of manufacturing process and structural profile schematic diagram of aiming at contact hole voluntarily.
At first see also shown in Figure 1A, this aims at the manufacturing process and the structure of contact hole voluntarily, provide substrate 100, several gate structures with cap layer 108 110 have been formed with in the substrate 100, and each gate structure 110 also includes gate dielectric layer 102, polysilicon layer 104 and metal silicide layer 106, and wherein polysilicon layer 104 and metal silicide layer 106 are to be gate conducting layer.
Then, see also shown in Figure 1B, at the sidewall formation clearance wall 112 of gate structure 110.
Afterwards, see also shown in Fig. 1 C, cvd silicon oxide dielectric layer 114 in substrate 100 is to cover gate structure 110.Then, pattern dielectric layer 114 is aimed at contact window 116 voluntarily to form between adjacent two gate structures 110.Afterwards, insert electric conducting material again, aim at contact hole 118 (shown in Fig. 1 D) voluntarily to form.
Yet, aim at voluntarily in the process of contact window 116 in formation, because silicon oxide dielectric layer 114 is for the etching selectivity of silicon nitride cap layer 108 not high enough (about 10-20), therefore in the process of pattern dielectric layer 114, can be exposed out (shown in Fig. 1 C) because of cap layer 108 is removed the gate conducting layer (polysilicon layer 104 with metal silicide layer 106) that may cause the below gradually, so can be made follow-up formed aim at voluntarily contact hole 118 and exposed gate conducting layer (polysilicon layer 104 and metal silicide layer 106) short circuit (shown in Fig. 1 D).
This shows that above-mentioned existing manufacture method of aiming at contact window voluntarily and internal connection-wire structure and manufacture method thereof still have defective, and demand urgently further being improved.In order to solve the defective of existing manufacture method and internal connection-wire structure, relevant manufacturer there's no one who doesn't or isn't seeks solution painstakingly, but does not see always that for a long time being suitable for design is finished by development, and this obviously is the problem that the anxious desire of relevant dealer solves.
Because the above-mentioned existing manufacture method of contact window and the defective of internal connection-wire structure and manufacture method existence thereof of aiming at voluntarily, the inventor enriches practical experience and professional knowledge for many years based on being engaged in this type of product design manufacturing, actively studied innovation, to found a kind of new manufacture method of aiming at contact window voluntarily and internal connection-wire structure and manufacture method thereof, make it have more practicality.Through constantly research, design, and after studying sample and improvement repeatedly, create the present invention who has practical value finally.
Summary of the invention
Main purpose of the present invention is, overcome the above-mentioned existing manufacture method of contact window and the defective of internal connection-wire structure and manufacture method existence thereof of aiming at voluntarily, and a kind of new manufacture method of aiming at contact window voluntarily and the manufacture method of internal connection-wire structure and intraconnections thereof be provided, technical problem underlying to be solved is that it can be solved is existing known when aiming at the contact window processing procedure voluntarily between adjacent two gate structures, because dielectric layer is not high enough for the etching selectivity of cap layer, and may make that gate conducting layer is exposed out, and then cause problem of short-circuit, thereby have more practicality, and have the value on the industry.
The object of the invention to solve the technical problems realizes by the following technical solutions.According to a kind of manufacture method of aiming at contact window voluntarily that the present invention proposes, it may further comprise the steps: a substrate is provided, has been formed with a gate dielectric layer, a gate conducting layer and a cap layer in this substrate; Form a protective layer on this cap layer, wherein this protective layer removes the remove speed of speed less than this cap layer; This protective layer of patterning, this cap layer and this gate conducting layer are coated with a plurality of gate structures of this protective layer with formation; Sidewall at those gate structures forms a clearance wall; Above this substrate, form a dielectric layer, to cover those gate structures and this protective layer; And this dielectric layer of patterning, wherein to form one between two those gate structures and aim at contact window voluntarily, expose this substrate surface adjacent.
The object of the invention to solve the technical problems also can be applied to the following technical measures to achieve further.
Aforesaid manufacture method of aiming at contact window voluntarily, wherein said dielectric layer is greater than 30 to the ratio that removes speed of this protective layer.
Aforesaid manufacture method of aiming at contact window voluntarily, wherein said dielectric layer is between 10 to 20 to the ratio that removes speed of this cap layer.
Aforesaid manufacture method of aiming at contact window voluntarily, the material of wherein said protective layer comprises a metal material.
Aforesaid manufacture method of aiming at contact window voluntarily, wherein said metal material be selected from tungsten, tungsten nitride and titanium nitride one of them.
Aforesaid manufacture method of aiming at contact window voluntarily; wherein after the sidewall of those gate structures forms the step of this clearance wall; with before forming the step of this dielectric layer above this substrate; more comprise this protective layer that removes part, to retain predetermined this protective layer of aiming at the contact window place voluntarily that forms.
Aforesaid manufacture method of aiming at contact window voluntarily wherein in the step of this protective layer of patterning, this cap layer and this gate conducting layer, more comprises this gate dielectric layer of patterning simultaneously, to expose this substrate surface.
The object of the invention to solve the technical problems also realizes by the following technical solutions.The manufacture method of a kind of intraconnections that proposes according to the present invention, it may further comprise the steps: a substrate is provided, has been formed with a gate dielectric layer, a gate conducting layer and a cap layer in this substrate; Form a protective layer on this cap layer, wherein this protective layer removes the remove speed of speed less than this cap layer; This protective layer of patterning, this cap layer and this gate conducting layer are coated with a plurality of gate structures of this protective layer with formation; Sidewall at those gate structures forms a clearance wall; Above this substrate, form a dielectric layer, to cover those gate structures and this protective layer; This dielectric layer of patterning wherein to form one between two those gate structures and aim at contact window voluntarily adjacent, exposes this substrate surface; Aim at voluntarily at this and to insert an electric conducting material in contact window, aim at contact hole voluntarily to form one; And on this dielectric layer, form a conductor structure, aim at contact hole voluntarily to cover this.
The object of the invention to solve the technical problems also can be applied to the following technical measures to achieve further.
The manufacture method of aforesaid intraconnections, wherein said dielectric layer is greater than 30 to the ratio that removes speed of this protective layer.
The manufacture method of aforesaid intraconnections, wherein said dielectric layer is between 10 to 20 to the ratio that removes speed of this cap layer.
The manufacture method of aforesaid intraconnections, the material of wherein said protective layer comprises a metal material.
The manufacture method of aforesaid intraconnections, wherein said metal material be selected from tungsten, tungsten nitride and titanium nitride one of them.
The manufacture method of aforesaid intraconnections; wherein after the sidewall of those gate structures forms the step of this clearance wall; with before forming the step of this dielectric layer above this substrate; more comprise this protective layer that removes part, to retain predetermined this protective layer of aiming at the contact window place voluntarily that forms.
The manufacture method of aforesaid intraconnections wherein in the step of this protective layer of patterning, this cap layer and this gate conducting layer, more comprises this gate dielectric layer of patterning simultaneously, to expose this substrate surface.
The manufacture method of aforesaid intraconnections, the formation method of wherein said conductor structure comprise carries out the damascene processing procedure.
The manufacture method of aforesaid intraconnections, the formation method of wherein said conductor structure comprises: form a lead material layer on this dielectric layer, aim at contact hole voluntarily to cover this; And this lead material layer of patterning, to define this conductor structure.
The object of the invention to solve the technical problems also realizes by the following technical solutions.According to a kind of internal connection-wire structure that the present invention proposes, it comprises: a plurality of gate structures, be configured in the substrate, and wherein each those gate structure has a gate dielectric layer, a gate conducting layer and a cap layer; One protective layer is configured in the top of those gate structures; One clearance wall is configured in the sidewall of those gate structures; One dielectric layer covers this protective layer, this substrate and those gate structures; One aims at contact hole voluntarily, is disposed at wherein in this dielectric layer between two adjacent those gate structures, and wherein this is aimed at contact hole voluntarily and is and this protective layer adjacency; And a conductor structure, be configured on this dielectric layer, and this conductor structure is to aim at contact hole voluntarily with this to electrically connect.
The object of the invention to solve the technical problems also can be applied to the following technical measures to achieve further.
Aforesaid internal connection-wire structure, the material of wherein said protective layer comprises a metal material.
Aforesaid internal connection-wire structure, wherein said metal material be selected from tungsten, tungsten nitride and titanium nitride one of them.
The present invention compared with prior art has tangible advantage and beneficial effect.By above technical scheme as can be known, in order to reach aforementioned goal of the invention, major technique of the present invention thes contents are as follows:
The present invention proposes a kind of manufacture method of aiming at contact window voluntarily, and this method is that a substrate is provided earlier, has been formed with gate dielectric layer, gate conducting layer and cap layer in this substrate.Afterwards, form protective layer on cap layer, wherein protective layer removes the remove speed of speed less than cap layer.Then, patterning protective layer, cap layer and gate conducting layer are to form the gate structure of several protective mulches.Then, the sidewall at these gate structures forms clearance wall.Continue it, above substrate, form dielectric layer, to cover these gate structures and protective layer.Subsequently, pattern dielectric layer is aimed at contact window voluntarily to form between adjacent two gate structures.
Owing in manufacture method of aiming at contact window voluntarily of the present invention, be coated with above gate structure and remove the low protective layer of speed ratio cap layer, when carrying out pattern dielectric layer, protective layer more is difficult for being removed than existing known cap layer.Therefore, can solve existing manufacture method in the process of pattern dielectric layer, the problem that gate conducting layer may be exposed out can produce problem of short-circuit so can avoid follow-up with gate conducting layer at the formed contact hole of aiming at voluntarily.
The present invention proposes a kind of manufacture method of intraconnections again, and this method is that a substrate is provided earlier, has been formed with gate dielectric layer, gate conducting layer and cap layer in this substrate.Afterwards, form protective layer on cap layer, wherein protective layer removes the remove speed of speed less than cap layer.Then, patterning protective layer, cap layer and gate conducting layer are to form the gate structure that several are coated with protective layer.Then, the sidewall at these gate structures forms clearance wall.Continue it, above substrate, form dielectric layer, to cover these gate structures and protective layer.Subsequently, pattern dielectric layer is aimed at contact window voluntarily to form between adjacent two gate structures.Afterwards, insert electric conducting material in the contact window aiming at voluntarily, aim at contact hole voluntarily to form.Then, on dielectric layer, form conductor structure, aim at contact hole voluntarily to cover.
Owing in the manufacture method of intraconnections of the present invention, be coated with above gate structure and remove the low protective layer of speed ratio cap layer, when carrying out pattern dielectric layer, protective layer more is difficult for being removed than existing known cap layer.Therefore, can solve existing knownly in the process of pattern dielectric layer, the problem that gate conducting layer may be exposed out can produce problem of short-circuit with gate conducting layer so can avoid aiming at voluntarily contact hole.
In addition, above-mentioned manufacture method is except the intraconnections processing procedure that is applied to general element, more can be applicable in memory body (be internal memory, memory, below all the be called memory body) element, so that the doped region in the substrate electrically connects by the bit line of aiming at contact hole and top voluntarily.
The present invention also proposes a kind of structure of intraconnections, and this structure includes several gate structures, protective layer, clearance wall, dielectric layer, aims at contact hole and conductor structure voluntarily, and these gate structures comprise gate dielectric layer, gate conducting layer and cap layer.Wherein, these gate structures are to be configured in the substrate.In addition, protective layer is the top that is configured in these gate structures.In addition, clearance wall is the sidewall that is configured in these gate structures.In addition, dielectric layer is protective mulch, substrate and these gate structures.In addition, aiming at contact hole voluntarily is in the dielectric layer that is disposed between two adjacent gate structures, and wherein this is aimed at contact hole voluntarily and is and the protective layer adjacency.In addition, conductor structure is to be configured on the dielectric layer, and this conductor structure is and aims at contact hole voluntarily and electrically connect.
In the structure of intraconnections of the present invention, above gate structure, be coated with protective layer, the configuration of this protective layer can be protected gate structure, avoids in the process of pattern dielectric layer, aims at contact hole voluntarily and contacts with gate conducting layer and cause short circuit.
In sum, the manufacture method of aiming at contact window voluntarily that the present invention is special and internal connection-wire structure and manufacture method thereof, in the time of can solving prior art and between adjacent two gate structures, aim at the contact window processing procedure voluntarily, because dielectric layer is not high enough for the etching selectivity of cap layer, and may make that gate conducting layer is exposed out, and then cause problem of short-circuit, and have more practicality.It has above-mentioned plurality of advantages and practical value, and in similar manufacture method and product, do not see have similar approach and structure to publish or use and really genus innovation, no matter bigger improvement is all arranged on manufacture method, structure or function, have technically than much progress, the multinomial effect that has enhancement than prior art, thereby being suitable for practicality more, and having the extensive value of industry, really is a new and innovative, progressive, practical new design.
Above-mentioned explanation only is the general introduction of technical solution of the present invention, for can clearer understanding technological means of the present invention, and can be implemented according to the content of specification, below with preferred embodiment of the present invention and conjunction with figs. describe in detail as after.
Description of drawings
Figure 1A to Fig. 1 D is existing known a kind of manufacturing process and structural profile schematic diagram of aiming at contact hole voluntarily.
Fig. 2 A to Fig. 2 E is according to the manufacturing process of a kind of intraconnections of a preferred embodiment of the present invention and structural profile schematic diagram.
100,200: substrate 102,202,202a: gate dielectric layer
104,204,204a: polysilicon layer 106,205,205a: metal silicide layer
108,208,208a: cap layer 110,212: gate structure
112,214: clearance wall 114,216,216a: dielectric layer
116,218: aim at contact window 118,220 voluntarily: aim at contact hole voluntarily
206,206a: gate conducting layer 210,210a, 210b: protective layer
224: conductor structure
Embodiment
Below in conjunction with accompanying drawing and preferred embodiment, to the manufacture method of aiming at contact window voluntarily and internal connection-wire structure and its concrete manufacture method of manufacture method, step, structure, feature and the effect thereof that foundation the present invention proposes, describe in detail as after.
Seeing also shown in Fig. 2 A to Fig. 2 E, is manufacturing process and the structural profile schematic diagram according to a kind of intraconnections of a preferred embodiment of the present invention.
At first see also shown in Fig. 2 A, the manufacture method of the intraconnections of preferred embodiment of the present invention is that substrate 200 is provided earlier, and be formed with gate dielectric layer 202 in the substrate 200, gate conducting layer 206 and cap layer 208.Wherein, the material of gate dielectric layer 202 for example is a silica.Gate conducting layer 206 is made of polysilicon layer 204 and metal silicide layer 205, and the material of metal silicide layer 205 for example is tungsten silicide or titanium silicide.And the material of cap layer 208 for example is a silicon nitride.
Afterwards, please continue to consult shown in Fig. 2 A, on cap layer 208, form protective layer 210.Wherein, protective layer 210 removes the remove speed of speed less than cap layer 208.The material of protective layer 210 for example is a metal material, and this metal material for example is tungsten, tungsten nitride or titanium nitride.In addition, the formation method of protective layer 210 for example is to carry out chemical vapour deposition technique.
Then, see also shown in Fig. 2 B, patterning protective layer 210, cap layer 208, gate conducting layer 206 and gate dielectric layer 202 are to form several gate structures that is coated with protective layer 210a 212.Wherein, gate structure 212 is cap layer 208a, gate conducting layer 206a and the gate dielectric layer 202a that include patterning, and gate conducting layer 206a is made of polysilicon layer 204a and metal silicide layer 205a.
In addition, in another preferred embodiment, this patterning step is to proceed to gate conducting layer 206a, and retains gate dielectric layer 202.And this gate dielectric layer 202 is to remove it again in the step of contact window is aimed in follow-up formation voluntarily, so that substrate 200 exposes out.
Then, please continue to consult Fig. 2 B, at the sidewall formation clearance wall 214 of gate structure 212.Wherein, the formation method of clearance wall 214 is to form conformal spacer material layer (not shown) earlier in substrate 200, and the material of this spacer material layer for example is a silicon nitride.Then, form clearance wall 214 with non-grade to this spacer material layer of etching.
Subsequently, see also shown in Fig. 2 C, remove the protective layer 210a of part, to retain the predetermined protective layer 210b that aims at the contact window place voluntarily that forms.In another preferred embodiment, the step that removes the protective layer 210a of part is to omit, and keeps the protective layer 210a among original Fig. 2 B.
Continue it, please continue to consult shown in Fig. 2 C, above substrate 200, form dielectric layer 216, to cover gate structure 212 and protective layer 210b.Wherein, the material of dielectric layer 216 silica for example.In a preferred embodiment; dielectric layer 216 is made of non-impurity-doped silica glass layer (silica) and doped silicon glass layer (boron-phosphorosilicate glass); and the method that forms dielectric layer 216 for example is to utilize chemical vapour deposition technique to form boron-phosphorosilicate glass earlier, to cover gate structure 212 and protective layer 210b.Afterwards, utilize chemical vapour deposition technique on boron-phosphorosilicate glass, to form silica again.Wherein, the reacting gas of silicon oxide dielectric layer for example is silicon tetraethyl acid esters (tetra-ethyl-ortho-silicate is called for short TEOS).
What is particularly worth mentioning is that, protective layer 210b can and dielectric layer 216 between have high etching selectivity.And the ratio that removes speed of 216 couples of protective layer 210b of dielectric layer is greater than the ratio that removes speed of 216 couples of cap layer 208a of dielectric layer.In a preferred embodiment, the proportionality that removes speed of 216 couples of protective layer 210b of dielectric layer is in this way greater than 30, and the proportionality that removes speed of 216 couples of cap layer 208a of dielectric layer is in this way between 10 to 20.
Subsequently, see also Fig. 2 D, pattern dielectric layer 216 is aimed at contact window 218 voluntarily to form between adjacent two gate structures 212.Wherein, the method for pattern dielectric layer 216 for example is to carry out micro-photographing process and dry-etching processing procedure.
In addition; what deserves to be mentioned is; owing to above gate knot ditch 212, be coated with protective layer 210b; and the etching selectivity of 216 couples of protective layer 210b of dielectric layer is greater than the etching selectivity of 216 couples of cap layer 208a of dielectric layer; so because of cap layer 208a is removed the problem that may cause gate conducting layer 206a (metal silicide layer 205a and polysilicon layer 204a) to be exposed out, can't take place in the present invention in the prior art.That is the cap layer 208a that protective layer 210b compares prior art more is difficult for etched; so protective layer 210b can stop etched erosion effectively; and the function of the gate structure 212 of performance protection below is so when carrying out pattern dielectric layer 216, gate structure 212 can not be exposed out.
Afterwards, see also shown in Fig. 2 E, in aiming at contact window 218 voluntarily, insert electric conducting material, aim at contact hole 220 voluntarily to form.Wherein, electric conducting material for example is electric conducting materials such as tungsten or polysilicon, and the method for inserting of electric conducting material for example is to form earlier electric conducting material on dielectric layer 216a, and this electric conducting material fills up at least and aims at contact window 218 voluntarily, removes opening 218 electric conducting material in addition with etch-back method or chemical mechanical milling method then.
Then, please continue to consult shown in Fig. 2 E, on dielectric layer 216a, form conductor structure 224, and this conductor structure 224 is and aims at contact hole 220 voluntarily and electrically connect.Wherein, the formation method of conductor structure 224 for example is to carry out the damascene processing procedure.This damascene processing procedure for example is to form another layer dielectric layer (not shown) earlier on dielectric layer 216a, and wherein, this dielectric layer has the irrigation canals and ditches (not shown), aims at contact hole 220 voluntarily to expose.Then, in irrigation canals and ditches, insert the lead material layer (not shown).Wherein, the material of lead material layer for example is conductor materials such as tungsten or copper.Then, remove irrigation canals and ditches lead material layer in addition with chemical mechanical milling method.
In addition, in another preferred embodiment, the formation method of conductor structure 224 for example is to form the lead material layer (not shown) earlier on dielectric layer 216a, aims at contact hole 220 voluntarily to cover.Wherein, this lead material layer for example is conductor materials such as tungsten or aluminium.Then, carry out micro image etching procedure, to define conductor structure 224.
Owing to aim at voluntarily in the process of contact hole in formation in the present invention, above gate structure, be coated with and remove the low protective layer of speed ratio cap layer, so when carrying out pattern dielectric layer, protective layer more is difficult for being removed than the cap layer of prior art.Therefore, can solve prior art in the process of pattern dielectric layer, the problem that gate conducting layer may be exposed out can produce problem of short-circuit with gate conducting layer so can avoid aiming at voluntarily contact hole.
In addition, above-mentioned manufacture method more can be applicable in the memory cell except the intraconnections processing procedure that is applied to general element, so that the doped region in the substrate is by the electric connection of the bit line of aiming at contact hole and top voluntarily.If above-mentioned processing procedure is to be applied in the memory cell, 224 of above-mentioned conductive structures are the bit lines, and aiming at contact hole 220 automatically then is bit line contact hole.
Below will be illustrated at the structure of utilizing the said method gained.See also shown in Fig. 2 E; this structure comprises several gate structures 212, protective layer 210b, clearance wall 214, dielectric layer 216a, aims at contact hole 220 and conductor structure 224 voluntarily; and these gate structures 212 comprise gate dielectric layer 202a, polysilicon layer 204a, metal silicide layer 205a and cap layer 208a, and polysilicon layer 204a and metal silicide layer 205a are gate conducting layer 206a.
Wherein, these gate structures 212 are to be configured in the substrate 200.In addition, protective layer 210b is the top that is configured in these gate structures 212.Wherein, the material of protective layer 210b for example is a metal material, and this metal material for example is tungsten, tungsten nitride or titanium nitride.
In addition, clearance wall 214 is the sidewalls that are configured in these gate structures 212.In addition, dielectric layer 216a is protective mulch 210b, substrate 200 and these gate structures 212.
In addition, aiming at contact hole 220 voluntarily is among the dielectric layer 216a that is disposed between two adjacent gate structures 212, and aims at contact hole 220 voluntarily and be and protective layer 210b adjacency.Wherein, the material of aiming at contact hole 220 voluntarily for example is electric conducting materials such as tungsten or polysilicon.
In addition, conductor structure 224 is to be configured on the dielectric layer 216a, and this conductor structure 224 is and aims at contact hole 220 voluntarily and electrically connect.Wherein, the material of conductor structure 224 for example is conductor materials such as tungsten, aluminium or copper.
In the structure of intraconnections of the present invention; above gate structure, be coated with protective layer; and the configuration of this protective layer can be protected gate structure; thereby can avoid in the process of pattern dielectric layer, gate conducting layer being come out, and cause the follow-up formed contact hole of aiming at voluntarily to contact and short circuit with gate conducting layer.
The above, it only is preferred embodiment of the present invention, be not that the present invention is done any pro forma restriction, though the present invention discloses as above with preferred embodiment, yet be not in order to limit the present invention, any those skilled in the art, in not breaking away from the technical solution of the present invention scope, when the method that can utilize above-mentioned announcement and technology contents are made a little change or be modified to the equivalent embodiment of equivalent variations, but every content that does not break away from technical solution of the present invention, according to technical spirit of the present invention to any simple modification that above embodiment did, equivalent variations and modification all still belong in the scope of technical solution of the present invention.
Claims (19)
1, a kind of manufacture method of aiming at contact window voluntarily is characterized in that it may further comprise the steps:
One substrate is provided, has been formed with a gate dielectric layer, a gate conducting layer and a cap layer in this substrate;
Form a protective layer on this cap layer, wherein this protective layer removes the remove speed of speed less than this cap layer;
This protective layer of patterning, this cap layer and this gate conducting layer are coated with a plurality of gate structures of this protective layer with formation;
Sidewall at those gate structures forms a clearance wall;
Above this substrate, form a dielectric layer, to cover those gate structures and this protective layer; And
This dielectric layer of patterning wherein to form one between two those gate structures and aim at contact window voluntarily adjacent, exposes this substrate surface.
2, manufacture method of aiming at contact window voluntarily according to claim 1 is characterized in that wherein said dielectric layer is greater than 30 to the ratio that removes speed of this protective layer.
3, manufacture method of aiming at contact window voluntarily according to claim 1 is characterized in that wherein said dielectric layer is between 10 to 20 to the ratio that removes speed of this cap layer.
4, manufacture method of aiming at contact window voluntarily according to claim 1 is characterized in that the material of wherein said protective layer comprises a metal material.
5, manufacture method of aiming at contact window voluntarily according to claim 4, it is characterized in that wherein said metal material be selected from tungsten, tungsten nitride and titanium nitride one of them.
6, manufacture method of aiming at contact window voluntarily according to claim 1; it is characterized in that wherein after the sidewall of those gate structures forms the step of this clearance wall; with before forming the step of this dielectric layer above this substrate; more comprise this protective layer that removes part, to retain predetermined this protective layer of aiming at the contact window place voluntarily that forms.
7, manufacture method of aiming at contact window voluntarily according to claim 1; it is characterized in that wherein in the step of this protective layer of patterning, this cap layer and this gate conducting layer; more comprise this gate dielectric layer of patterning simultaneously, to expose this substrate surface.
8, a kind of manufacture method of intraconnections is characterized in that it may further comprise the steps:
One substrate is provided, has been formed with a gate dielectric layer, a gate conducting layer and a cap layer in this substrate;
Form a protective layer on this cap layer, wherein this protective layer removes the remove speed of speed less than this cap layer;
This protective layer of patterning, this cap layer and this gate conducting layer are coated with a plurality of gate structures of this protective layer with formation;
Sidewall at those gate structures forms a clearance wall;
Above this substrate, form a dielectric layer, to cover those gate structures and this protective layer;
This dielectric layer of patterning wherein to form one between two those gate structures and aim at contact window voluntarily adjacent, exposes this substrate surface;
Aim at voluntarily at this and to insert an electric conducting material in contact window, aim at contact hole voluntarily to form one; And
On this dielectric layer, form a conductor structure, aim at contact hole voluntarily to cover this.
9, the manufacture method of intraconnections according to claim 8 is characterized in that wherein said dielectric layer is greater than 30 to the ratio that removes speed of this protective layer.
10, the manufacture method of intraconnections according to claim 8 is characterized in that wherein said dielectric layer is between 10 to 20 to the ratio that removes speed of this cap layer.
11, the manufacture method of intraconnections according to claim 8 is characterized in that the material of wherein said protective layer comprises a metal material.
12, the manufacture method of intraconnections according to claim 11, it is characterized in that wherein said metal material be selected from tungsten, tungsten nitride and titanium nitride one of them.
13, the manufacture method of intraconnections according to claim 8; it is characterized in that wherein after the sidewall of those gate structures forms the step of this clearance wall; with before forming the step of this dielectric layer above this substrate; more comprise this protective layer that removes part, to retain predetermined this protective layer of aiming at the contact window place voluntarily that forms.
14, the manufacture method of intraconnections according to claim 8 is characterized in that wherein in the step of this protective layer of patterning, this cap layer and this gate conducting layer, more comprises this gate dielectric layer of patterning simultaneously, to expose this substrate surface.
15, the manufacture method of intraconnections according to claim 8, the formation method that it is characterized in that wherein said conductor structure comprises carries out the damascene processing procedure.
16, the manufacture method of intraconnections according to claim 8 is characterized in that the formation method of wherein said conductor structure comprises:
On this dielectric layer, form a lead material layer, aim at contact hole voluntarily to cover this; And
This lead material layer of patterning is to define this conductor structure.
17, a kind of internal connection-wire structure is characterized in that it comprises:
A plurality of gate structures are configured in the substrate, and wherein each those gate structure has a gate dielectric layer, a gate conducting layer and a cap layer;
One protective layer is configured in the top of those gate structures;
One clearance wall is configured in the sidewall of those gate structures;
One dielectric layer covers this protective layer, this substrate and those gate structures;
One aims at contact hole voluntarily, is disposed at wherein in this dielectric layer between two adjacent those gate structures, and wherein this is aimed at contact hole voluntarily and is and this protective layer adjacency; And
One conductor structure is configured on this dielectric layer, and this conductor structure is to aim at contact hole voluntarily with this to electrically connect.
18, internal connection-wire structure according to claim 17 is characterized in that the material of wherein said protective layer comprises a metal material.
19, internal connection-wire structure according to claim 18, it is characterized in that wherein said metal material be selected from tungsten, tungsten nitride and titanium nitride one of them.
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| CNB031566448A CN100485875C (en) | 2003-09-05 | 2003-09-05 | Self-aligning contact window open manufacturing method, internal connecting structure and manufacturing method thereof |
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| CNB031566448A CN100485875C (en) | 2003-09-05 | 2003-09-05 | Self-aligning contact window open manufacturing method, internal connecting structure and manufacturing method thereof |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN100394552C (en) * | 2005-04-18 | 2008-06-11 | 力晶半导体股份有限公司 | Contact window opening formation and its production of semiconductor component |
| CN106206457A (en) * | 2015-05-25 | 2016-12-07 | 华亚科技股份有限公司 | Semiconductor packages |
-
2003
- 2003-09-05 CN CNB031566448A patent/CN100485875C/en not_active Expired - Lifetime
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN100394552C (en) * | 2005-04-18 | 2008-06-11 | 力晶半导体股份有限公司 | Contact window opening formation and its production of semiconductor component |
| CN106206457A (en) * | 2015-05-25 | 2016-12-07 | 华亚科技股份有限公司 | Semiconductor packages |
| CN106206457B (en) * | 2015-05-25 | 2020-07-10 | 美光科技公司 | Semiconductor package |
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| Publication number | Publication date |
|---|---|
| CN100485875C (en) | 2009-05-06 |
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