CN1591673A - Magnetic tunnel junction and memory device including the same - Google Patents
Magnetic tunnel junction and memory device including the same Download PDFInfo
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- CN1591673A CN1591673A CN200410056683.9A CN200410056683A CN1591673A CN 1591673 A CN1591673 A CN 1591673A CN 200410056683 A CN200410056683 A CN 200410056683A CN 1591673 A CN1591673 A CN 1591673A
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- 230000005294 ferromagnetic effect Effects 0.000 claims abstract description 58
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- 229910003321 CoFe Inorganic materials 0.000 claims description 66
- 229910001030 Iron–nickel alloy Inorganic materials 0.000 claims description 49
- 239000000463 material Substances 0.000 claims description 21
- 230000004888 barrier function Effects 0.000 claims description 19
- XEEYBQQBJWHFJM-UHFFFAOYSA-N Iron Chemical compound [Fe] XEEYBQQBJWHFJM-UHFFFAOYSA-N 0.000 claims description 12
- 239000000428 dust Substances 0.000 claims description 11
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- 239000003302 ferromagnetic material Substances 0.000 claims description 6
- 229910052742 iron Inorganic materials 0.000 claims description 6
- 229910019236 CoFeB Inorganic materials 0.000 claims description 4
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- B82Y25/00—Nanomagnetism, e.g. magnetoimpedance, anisotropic magnetoresistance, giant magnetoresistance or tunneling magnetoresistance
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- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/02—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements
- G11C11/14—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements using thin-film elements
- G11C11/15—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements using thin-film elements using multiple magnetic layers
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- H—ELECTRICITY
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- H01F—MAGNETS; INDUCTANCES; TRANSFORMERS; SELECTION OF MATERIALS FOR THEIR MAGNETIC PROPERTIES
- H01F10/00—Thin magnetic films, e.g. of one-domain structure
- H01F10/32—Spin-exchange-coupled multilayers, e.g. nanostructured superlattices
- H01F10/324—Exchange coupling of magnetic film pairs via a very thin non-magnetic spacer, e.g. by exchange with conduction electrons of the spacer
- H01F10/3254—Exchange coupling of magnetic film pairs via a very thin non-magnetic spacer, e.g. by exchange with conduction electrons of the spacer the spacer being semiconducting or insulating, e.g. for spin tunnel junction [STJ]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01F—MAGNETS; INDUCTANCES; TRANSFORMERS; SELECTION OF MATERIALS FOR THEIR MAGNETIC PROPERTIES
- H01F10/00—Thin magnetic films, e.g. of one-domain structure
- H01F10/32—Spin-exchange-coupled multilayers, e.g. nanostructured superlattices
- H01F10/324—Exchange coupling of magnetic film pairs via a very thin non-magnetic spacer, e.g. by exchange with conduction electrons of the spacer
- H01F10/3268—Exchange coupling of magnetic film pairs via a very thin non-magnetic spacer, e.g. by exchange with conduction electrons of the spacer the exchange coupling being asymmetric, e.g. by use of additional pinning, by using antiferromagnetic or ferromagnetic coupling interface, i.e. so-called spin-valve [SV] structure, e.g. NiFe/Cu/NiFe/FeMn
- H01F10/3272—Exchange coupling of magnetic film pairs via a very thin non-magnetic spacer, e.g. by exchange with conduction electrons of the spacer the exchange coupling being asymmetric, e.g. by use of additional pinning, by using antiferromagnetic or ferromagnetic coupling interface, i.e. so-called spin-valve [SV] structure, e.g. NiFe/Cu/NiFe/FeMn by use of anti-parallel coupled [APC] ferromagnetic layers, e.g. artificial ferrimagnets [AFI], artificial [AAF] or synthetic [SAF] anti-ferromagnets
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- H01F10/00—Thin magnetic films, e.g. of one-domain structure
- H01F10/32—Spin-exchange-coupled multilayers, e.g. nanostructured superlattices
- H01F10/324—Exchange coupling of magnetic film pairs via a very thin non-magnetic spacer, e.g. by exchange with conduction electrons of the spacer
- H01F10/3295—Spin-exchange coupled multilayers wherein the magnetic pinned or free layers are laminated without anti-parallel coupling within the pinned and free layers
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- H01F10/00—Thin magnetic films, e.g. of one-domain structure
- H01F10/32—Spin-exchange-coupled multilayers, e.g. nanostructured superlattices
- H01F10/3204—Exchange coupling of amorphous multilayers
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Abstract
A magnetic tunnel junction device and a memory device including the same. The magnetic tunnel junction device includes a magnetically programmable free magnetic layer. The free magnetic layer includes a lamination of at least two ferromagnetic layers and at least one intermediate layer interposed between the at least two ferromagnetic layers.
Description
Technical field
Present invention relates in general to MRAM storage (MRAM) device, and especially, the present invention relates to have the MRAM device of multilayer free magnetic layer and the method for making MRAM device with multilayer free magnetic layer.
Background technology
MRAM storage (MRAM) device is a kind of nonvolatile memory, and wherein data are by programming magnetic tunnel-junction (magnetic tunnel junction, MTJ) storage.MTJ conversion between two kinds of magnetic alignings selectively.Different resistance values between these two kinds of orientations is used to distinguish the logical value of storage unit.
Fig. 1 is the rough schematic view that is in a kind of MTJ in low-resistance logical zero magnetic state and the high resistant logical one magnetic state.In the drawings, the free magnetic layer that Reference numeral 101 representatives are made of ferromagnetic material, Reference numeral 102 is represented tunnel barriers (tunneling barrier layer), the pinned magnetosphere (pinned magnetic layer) that Reference numeral 103 representatives are made of ferromagnetic material, the pinning layer (pinning layer) that Reference numeral 104 representatives are made of antiferromagnet.
Shown in arrow among Fig. 1, the magnetic orientation of ferromagnetic nailed layer is fixed.This condition can obtain by making antiferromagnetic pinning layer 104 contact and heat-treat (at about 200 degrees centigrade to 300 degrees centigrade) with nailed layer 103 in manufacturing process.When becoming fixing and be exposed in the external magnetic field afterwards, the application in the magnetic field by pinning layer in the heat treatment process 104, the magnetic spin of nailed layer 103 do not overturn.So, as shown in Figure 1, the magnetic moment of nailed layer 103 be fixed in one direction (among Fig. 1 towards the right).On the contrary, along with tunnel barrier layer (tunnel barrier layer) 102 is sandwiched between pinned magnetosphere 103 and the free magnetic layer 101, the magnetic orientation of free magnetic layer 101 keeps not stationary state.So, when being exposed in the external magnetic field afterwards, the magnetic spin of free magnetic layer 103 rotates freely.In the MTJ of MRAM, free magnetic layer 103 can be oriented in the both direction one with being stabilized, and promptly one is the magnetic moment that its magnetic moment is parallel to pinned magnetosphere 103, and another is that its magnetic moment is opposite with the magnetic moment of pinned magnetosphere 103.
As shown in Figure 1, when the magnetic moment of the magnetic moment of nailed layer 103 and free magnetic layer 101 was parallel to each other, MTJ showed low resistance, and it can be set to the logical zero attitude.On the contrary, when magnetic moment extended in the opposite direction, MTJ had high resistance, and it can be set to the logical one attitude.
Fig. 2 is the comparatively detailed synoptic diagram of conventional MTJ.In this sectional view, Reference numeral 1 is represented pinning layer, the pinned magnetosphere of Reference numeral 8 representatives, and Reference numeral 9 is represented tunnel barriers, and Reference numeral 14 is represented free magnetic layer.
As mentioned above, pinning layer 1 is made of antiferromagnet.Example comprises PtMn, IrMn and FeMn.
Pinned magnetosphere 8 is formed by three layers, i.e. a bottom ferromagnetic layer 3, a metal level 5 and a upper ferromagnetic layer 7.Upper and lower ferromagnetic layer 3 and 7 example are CoFe, and an example of metal level 5 is Ru.
Free magnetic layer 14 is double-deckers, is made up of the thin lower ferromagnetic layer 11 of one deck and the upper ferromagnetic layer 13 of a bed thickness.An example of thin lower ferromagnetic layer 11 is CoFe, and an example of thick upper ferromagnetic layer is NiFe.
Fig. 3 (A) and 3 (B) have illustrated the mram memory cell of a routine, and wherein Fig. 3 (B) is the sectional view along the middle I-I ' line intercepting of Fig. 3 (A).
At first with reference to figure 3 (B), storage unit comprises a MTJ36 as shown in Figure 2, is clipped between top electrode 37 and the bottom electrode 27.This MTJ36 comprises the free magnetic layer 35 that the pinned magnetosphere 31 of pinning layer 29, one deck, one deck tunnel barriers 33 and one deck that one deck contacts with bottom electrode 27 contact with top electrode 37.This MTJ36, top electrode 37 and bottom electrode 27 have defined a magnetoresistive element MR able to programme together.
The bottom of one data line (digit line) DL and bottom electrode 27 separates, and interlayer dielectric 25 places therebetween.This data line DL is parallel to the magnetic direction of MTJ36 and extends, and in this embodiment, and data line DL extends about in the figure of Fig. 3 (B).
Data line DL can be formed on the interlayer dielectric 23, and this dielectric can be formed on the substrate 21 again.
Fig. 3 (A) is a vertical view, shows the configuration of bit line BL and data line DL, and the peripheral profile of magnetoresistive element MR.As shown, the top profile of magnetoresistive element MR is rectangle basically, and length L is longer than width W.This bit line BL transmits bit line current IBL, and along the width W longitudinal extension of magnetoresistive element MR.In addition, bit line BL is enough wide, to cover the length L of magnetoresistive element MR basically.Data line DL is perpendicular to bit line BL, extend along the length L of magnetoresistive element MR.In addition, data line DL is enough wide to cover the width W of magnetoresistive element MR basically.
Shown in Fig. 3 (A), Hard Magnetic axle (hard magnetic axis) Hhard extends in short width W direction, and easily magnetic axis (easy magnetic axis) Heasy extends in long length L direction.
Fig. 4 illustrates a conventional MRAM array, it comprise many intersections bit line BL1, BL2 ..., BLn and data line DL1, DL2 ..., DLn.Write current ID is applied on every data line, and write current IB is applied on every bit lines.Magnetoresistive element MR12, MR22 ..., MRn2 along bit line with the infall of data line location.
Fig. 5 (A) is the schematic cross-section of mram cell, and this unit comprises the transistor of the logic state that is used for reading unit, and Fig. 5 (B) is its circuit diagram.Magnetoresistive element MR1 constitutes shown in Fig. 3 (B) like that, and comprise top electrode 77, bottom electrode 55 and be clipped in top electrode 77 and bottom electrode 55 between MTJ75.MTJ75 comprises pinning layer 57, pinned magnetosphere 64, insulation barrier 65 and free magnetic layer 73.
Transistor T A is made of word line (grid) WL, source S and drain D.Source S and drain D are formed in the substrate 51.Source S is connected with source pad (source pad) 103S by contact plunger 101s.Drain D is connected with bottom electrode 55 by upper and lower drain pad 107,103d and contact plunger 109,105,101d.
When the signal on the word line WL is enough to make transistor T A to be in conducting state, carry out read operation.So electric current flows through magnetoresistive element MR1 from bit line BL.When magnetoresistive element MR1 is programmed when being in low resistance state (logical zero), big relatively electric current will flow through transistor T A.When magnetoresistive element MR1 is programmed when being in high-impedance state (logical one), relatively little electric current will flow through transistor T A.Thereby the size of electric current can be used for determining the programming state of magnetoresistive element.
The read range of magnetoresistive element (sensing margin) by magnetoresistive element MR1 high-impedance state Rmax and low resistance state Rmin between differ from or compare value defined.Unfortunately, however the magnetic defective (magnetic imperfection) in the free magnetic layer of MTJ plays detrimental effect to read range.
Fig. 6 (A) has described the free magnetic layer 14 that has external magnetic field H to be applied thereto.A magnetic domain of each besieged Regional Representative's free magnetic layer 14.In case applied external magnetic field H, the direction of magnetization of each magnetic domain should be parallel to magnetic field H.Yet as can seeing among Fig. 6 (A), some direction of magnetization is not parallel with magnetic field H, especially at the domain wall place.This has reduced read range.Therefore, for overcoming the non-parallel magnetic moment at domain wall place, need strengthen magnetic field H by the electric current that increase puts on bit line and the data line.The result has increased power consumption.
Shown in the right of Fig. 6 (B), free magnetic layer is made up of evenly distributed crystal grain ideally.Yet shown in the zoomed-in view on Fig. 6 (B) left side, thick ferromagnetic layer has big and irregular crystal grain.The result has many destructions to magnetize inhomogeneity domain wall.
Fig. 7 is a magnetic hysteresis loop of explaining magnetic defect influence among the MTJ.Solid line partly is the magnetic hysteresis loop of desirable MTJ, and the dotted line on the right shows the loop line feature of conventional MRAM.
As shown in the figure, under the situation of desirable MTJ, when magnetic flux Heasy be+H1 (oersted, in the time of Oe), the magnetic moment of free magnetic layer forwards on the direction fully, and the resistance R w of MTJ (ohm, Ω) change to Rmax from Rmin.On the other hand, when magnetic flux Heasy be-during H1 (oersted), magnetic moment forwards on another direction, and the resistance R w of MTJ changes to Rmin from Rmax.Equally, if magnetic flux Heasy greater than-H1 and less than+H1, the resistance R w of MTJ does not just change.
Yet conventional MRAM works ideally, on the contrary, the resistance R w of MTJ becomes at magnetic flux+only locate to begin to increase during H1 at " k ".The rotation of free magnetic layer magnetic moment is progressive, so the resistance R w of MTJ increases gradually along with the increase of magnetic flux Heasy.For reaching Rmax, need the magnetic flux+H1 ' of increase, this means to consume extra power.
By way of parenthesis, as previously mentioned, conventional free magnetic layer is made up of CoFe lower floor and NiFe upper strata.Adopt the CoFe layer to increase read range, just poor between Rmax and the Rmin among Fig. 7.On the other hand, the NiFe layer is conceived to reduce the width Q of the magnetic hysteresis loop of Fig. 7, this means few power consumption.
Fig. 8 (A) shows the conversion characteristic corresponding to the desirable MTJ that applies of magnetic flux Heasy and magnetic flux Hhard.When magnetic flux Heasy is HME (Oe) or when magnetic flux Hhard is HMH (Oe), realize writing.In addition, the curve B DL representative in each quadrant writes MTJ, promptly changes the Heasy of magnetic moment direction of free magnetic layer of MTJ and the minimum combination of Hhard.Thereby, write the outside that regional WR is positioned at curve B DL, and read the inside that region R R is positioned at curve B DL.Desirable MTJ can be written into reliably at the P1 point, and magnetic flux Heasy is 20 oersteds herein, and magnetic flux Hhard is 20 oersteds.
In order to contrast with desirable MTJ, Fig. 8 (B) has shown the converting characteristic of conventional MTJ.As shown, desirablely write flux P2 (Heasy=Hhard=20 oersted) and under most of occasions, will not change the magnetic moment of the free magnetic layer of conventional MTJ.More suitably be to need Heasy and Hhard to be the magnetic flux of 40 oersteds to write MTJ reliably.
Further, shown in Fig. 8 (B), conventional MTJ is characterised in that wide deviation (writevariation) 1W that writes.This can simulate with the desirable MTJ of two shown in Fig. 9, and wherein Li Mian MTJ1 is corresponding to the inner boundary that writes deviation 1W, and the MTJ2 of outside is corresponding to the outer boundary that writes deviation 1W.In order to write the MTJ2 of outside reliably, need one shown in the P3 point, to write flux.Yet such one writes flux considerably beyond HME ' and the HMH ' of internal transistor MTJ1.For interior transistor MTJ1, this can cause write error.
In a word, the magnetic defective of conventional magnetic tunnel-junction can cause the power consumption and the operating troubles that increase.
Summary of the invention
According to a first aspect of the present invention, a kind of magnetic tunnel device is proposed, it comprises magnetic free magnetic layer able to programme (magnetically programmable free magnetic layer), and wherein this free magnetic layer comprises at least two ferromagnetic layers and is clipped in the lamination in the middle layer of one deck at least between these at least two ferromagnetic layers.
According to another aspect of the present invention, a kind of magnetic tunnel device is proposed, it comprises an antiferromagnetic pinning layer, ferromagnetic nailed layer and the free magnetic layer of a tunnel layer, between this antiferromagnetic pinning layer and this tunnel layer.This free magnetic layer comprises at least two ferromagnetic layers and is clipped in this lamination in the middle layer of one deck at least between the two ferromagnetic layers at least.
According to one side more of the present invention, a kind of memory device is proposed, it is included in longitudinal extension on the first direction and is positioned at first lead on the substrate, with at second lead that crosses longitudinal extension on the second direction of this first direction, this second lead and this first lead overlap to define an overlapping region betwixt.This memory device also comprises the magnetic tunnel device that is arranged in the crossover region between this first lead and second lead.This magnetic tunnel device has the magnetic free magnetic layer able to programme between first electrode and second electrode, and this free magnetic layer comprises at least two ferromagnetic layers and is clipped in this lamination in the middle layer of one deck at least between the two ferromagnetic layers at least.This memory device also comprises a transistor, and this transistor comprises a gate electrode and first and second source/drain regions, and wherein this first source/drain regions is electrically connected with first electrode of this magnetic tunnel device.
According to another aspect of the present invention, a kind of magnetic tunnel device is proposed, it comprises magnetic free magnetic layer able to programme, and wherein this free magnetic layer comprises the lamination of at least three material layers.
Description of drawings
With reference to accompanying drawing, by the following detailed description, above-mentioned and other aspects of the present invention and feature will become and be easy to understand, wherein:
Fig. 1 is the rough schematic view of magnetic tunnel-junction (MTJ), and it is in one of low-resistance logical zero magnetic state and high resistant logical one magnetic state;
Fig. 2 is the comparatively detailed view of a conventional MTJ;
Fig. 3 (A) and 3 (B) illustrate a conventional mram memory cell, and wherein Fig. 3 (B) is the sectional view along the I-I ' line intercepting of Fig. 3 (A);
Fig. 4 illustrates a conventional MRAM array;
Fig. 5 (A) is the schematic cross-section that comprises the transistorized mram cell of the logic state that is used for reading unit, and Fig. 5 (B) is its circuit diagram;
Fig. 6 (A) and 6 (B) are the synoptic diagram of explaining the influence of the domain wall of magnetic free layer among the MTJ;
Fig. 7 is a magnetic hysteresis loop, and the characteristic of desirable MTJ and conventional MTJ is described;
Fig. 8 (A) shows the conversion characteristic of desirable MTJ, and Fig. 8 (B) shows the conversion characteristic of conventional MTJ;
Fig. 9 shows the conversion characteristic with a conventional MTJ of two desirable MTJ simulations;
Figure 10 (A) is the schematic sectional view of the conventional free magnetic layer of MTJ;
Figure 10 (B) is the schematic sectional view of free magnetic layer according to an embodiment of the invention;
Figure 11 is the schematic sectional view of MTJ according to an embodiment of the invention;
Figure 12 is the schematic sectional view of mram cell according to an embodiment of the invention;
Figure 13 shows the magnetic hysteresis loop feature of conventional MTJ and the contrast between the magnetic hysteresis loop feature of MTJ according to an embodiment of the invention;
Figure 14 (A) and 14 (B) are curve maps, show the slope and the slope of the magnetic hysteresis loop feature of MTJ according to an embodiment of the invention of the magnetic hysteresis loop feature of conventional MTJ respectively; And
Figure 15 illustrates the schematic sectional view of the magnetic free layer of one alternative embodiment according to the present invention.
Embodiment
Below with reference to some preferred but the embodiment of indefiniteness describes the present invention in detail.
At least Partial Feature of the present invention is to comprise the magnetic tunnel-junction (MTJ) of multilayer free magnetic layer (multi-laminated freemagnetic layer).Referring to Figure 10 (A) and 10 (B), it has shown the contrast between the multilayer free magnetic layer of conventional free magnetic layer and one embodiment of the invention.
Shown in Figure 10 (A), conventional free magnetic layer is made of the layer of Ni Fe that is stacked on the CoFe layer.These layers are thicker.For example, about 10 dusts of CoFe bed thickness, about 30 dusts of NiFe bed thickness, the thickness of the free magnetic layer that the result is total is about 40 dusts.As previously explained, these thick-layers of MTJ, especially NiFe layer contain big and irregular crystal grain (grain), and these crystal grain form and reduce the inhomogeneity a large amount of domain walls of magnetization.
In contrast, shown in Figure 10 (B), the multilayer free magnetic layer of illustrated embodiment comprises CoFe and NiFe thin layer multiple and that replace.The thickness of bottom CoFe is about 5 dusts, and the thickness of remaining CoFe layer is about 1 dust.The thickness of every layer of NiFe is about 5 dusts.Here, gross thickness 40 dusts and conventional free magnetic layer is identical.The rhythmo structure of present embodiment has prevented the growth of crystal grain in the process of low-power sputter-deposited thin films layer.The little crystallite dimension of gained reduces to minimum with every layer magnetic domain number, or reduces to single domain with every layer.Because the domain wall decreased number, so the magnetic characteristic of free magnetic layer is improved, this will be in following explanation.
Figure 11 is the schematic sectional view that contains the magnetic tunnel device of multilayer free magnetic layer according to an embodiment of the invention.As shown, this routine device comprises a magnetoresistive element 51 that is positioned on inter-level dielectric (ILD) 53 and the substrate 51.This magnetoresistive element comprises a magnetic tunnel-junction 75 that is clipped between top electrode 77 and the bottom electrode 55.
Magnetic tunnel-junction 75 is sandwich constructions, and this sandwich construction comprises: be positioned at pinning layer 57 on the bottom electrode 55, be positioned at nailed layer 64 on the pinning layer 57, be positioned at tunnel barriers 65 on the nailed layer 64, be positioned at the free magnetic layer 73 on the insulation course 65 and under the top electrode 77.
Pinning layer 57 is made of an inverse ferric magnetosphere.Example comprises PtMn, IrMn and FeMn.
Pinned magnetosphere 64 constitutes by three layers, i.e. lower ferromagnetic layer 59, metal level 61 and upper ferromagnetic layer 63.Upper and lower ferromagnetic layer 59 and an example of 63 are CoFe, and an example of metal level 61 is Ru.
Free magnetic layer 73 is according to constituting with reference to the identical mode of the described mode of Figure 10 (B) with above.That is, with reference to Figure 11, free magnetic layer 73 comprises the CoFe bottom 67a that thickness is about 5 dusts.Be stacked on layer 67a is respectively NiFe and CoFe multiple layer 67 and 71.The thickness of each NiFe layer 67 is about 5 dusts, and the thickness of each CoFe layer is about 1 dust.In the present embodiment, the gross thickness of free magnetic layer is about 40 dusts.
Figure 12 is the schematic sectional view of mram cell according to an embodiment of the invention.The mram cell of present embodiment is structurally described identical in conjunction with Fig. 5 (A) with the front, and difference is that the MTJ75 of Fig. 5 (A) is replaced by the multilayer free magnetic layer 73A in the embodiments of the invention.What for example, the multilayer free magnetic layer can be with shown in Figure 10 (B) is identical.The element of identical numbering is identical among the every other element of Figure 12 and Fig. 5 (A), for fear of repeating to omit its detailed description here.
Figure 13 illustrates the measurement result of average magnetic hysteresis loop of the mtj structure sample (sample size is 100ea) of conventional mtj structure sample (sample size is 100ea) and one embodiment of the invention.In two sampling devices, same pinning layer structure (CoFe 30 dusts, Ru 8 dusts, CoFe 34 dusts) and tunnel barriers structure (Al have been adopted
2 O
312 dusts).In addition, the level cross-sectionn of each sample identical (0.8 micron * 0.4 micron).
The free magnetic layer of tested conventional mtj structure is made of one deck CoFe (10 dust) and layer of Ni Fe (30 dust), and gross thickness is 40 dusts.See Figure 10 (A).
The free magnetic layer of the MTJ of tested present embodiment structure is a sandwich construction, and it is by CoFe ground floor (5 dust) and NiFe subsequently (5 dust) and CoFe (1 dust) alternating layer formation, and gross thickness is 40 dusts.See Figure 10 (B).
There is not Hard Magnetic field (hard magnetic field) when measuring.Solid line 103 shows the average measurement result of the MTJ of present embodiment, and dotted line 101 shows the measurement result of conventional MTJ.The resistance of MTJ is normalized to 1.0 among Figure 13.
Obviously as seen, the test result of the test result more conventional MTJ relevant with present embodiment has better symmetry among Figure 13.In addition, obtaining minimum and maximum resistance needs littler magnetic flux, and therefore needs littler power.
Figure 14 (A) has shown that change in resistance is with respect to the ratio (dR/dH) of magnetic flux Heasy variation among the conventional MTJ.Black line 105a shows the situation that does not have Hard Magnetic flux Hhard (being the Hhard=0 oersted).Gray line 107a shows the situation that has 30 oersted Hard Magnetic flux Hhard.Obviously find out that from Figure 14 (A) have big overlapping region OR1, the magnetic spin of free magnetic layer is rotated by magnetic flux Heasy when not having magnetic flux Hhard in this zone.The result is the possibility that has increased write error.
Figure 14 (B) has shown the ratio (dR/dH) that change in resistance changes with respect to magnetic flux Heasy among the MTJ of the embodiment of the invention.Black line 105b shows the situation that does not have Hard Magnetic flux Hhard (being the Hhard=0 oersted).Gray line 107b shows the situation that has 30 oersted Hard Magnetic flux Hhard.Obviously find out that from Figure 14 (B) only have minimized overlapping region OR2, the magnetic spin of free magnetic layer is rotated by magnetic flux Heasy when not having magnetic flux Hhard in this zone.So, compare with conventional MTJ, the possibility of write error reduces greatly.
In accompanying drawing and explanation, ordinary priority embodiment of the present invention is disclosed, although and only proposed specific example, they only are used to general and descriptive purpose rather than the purpose in order to limit.For example, among the embodiment in front, a CoFe layer thickness is about 5 dusts, and the thickness of all the other CoFe layers is about 1 dust, and the thickness of NiFe layer is about 5 dusts, and the gross thickness of free magnetic layer is about 40 dusts.The invention is not restricted to these thickness, same the present invention also is not limited to these materials.Further, the invention is not restricted to the number of plies described among the embodiment of front.Yet for minimizing domain wall, preferably each layer thickness of (but not being necessary) free magnetism layer laminate is less than 10 dusts.In addition, referring to Figure 15, it shows some alternative embodiments 1501 to 1504 of free magnetic layer of the present invention.
As shown in the figure, free magnetic layer 1501 is made up of the ferromagnetic layer 1 and 2 that replaces.Only as example ground, ferromagnetic layer 1 is one of CoFe or NiFe, and ferromagnetic layer 2 is another NiFe, and ferromagnetic layer 1 is as the bottom.
As shown in the figure, free magnetic layer 1502 is made up of ferromagnetic layer 1 that replaces and amorphous iron magnetosphere 3.Only as example ground, ferromagnetic layer 1 is one of CoFe or NiFe, and amorphous iron magnetosphere 3 is CoFeB, and ferromagnetic layer 1 is as the bottom.
As shown in the figure, free layer 1504 is made up of ferromagnetic layer 1 that replaces and non-ferromagnetic layer 4.Only as example ground, ferromagnetic layer 1 is one of CoFe or NiFe, and non-ferromagnetic layer 4 is Ta, and ferromagnetic layer 1 is as the bottom.
Embodiments herein (comprise among Figure 15 those) only is example, and will be appreciated that therefore scope of the present invention explained by claims, explains and can't help exemplary embodiment.
Claims (46)
1. a magnetic tunnel device has magnetic free magnetic layer able to programme, and described free magnetic layer comprises the lamination of at least three material layers, and wherein, described at least three material layers comprise the alternately overlapped layers of at least two kinds of different materials.
2. device as claimed in claim 1, wherein a kind of in these two kinds of different materials is ferromagnetic, the another kind in these two kinds of different materials is non-ferromagnetic.
3. device as claimed in claim 2, wherein this ferromagnetic material is CoFe or NiFe, this nonferromagnetic material is Ta.
4. device as claimed in claim 3, wherein the thickness of Ta layer is less than the layer thickness of NiFe or CoFe layer.
5. device as claimed in claim 1, wherein these two kinds of different materials the two be ferromagnetic.
6. device as claimed in claim 5, wherein lower ferromagnetic layer is the NiFe layer, and upper ferromagnetic layer is the CoFe layer.
7. device as claimed in claim 6, wherein the thickness of this NiFe layer is greater than the thickness of this CoFe layer.
8. device as claimed in claim 7, wherein the thickness of this NiFe layer is less than about 10 dusts, and the thickness of this CoFe layer is less than about 5 dusts.
9. device as claimed in claim 6 also comprises an initial CoFe layer that contacts with foot NiFe layer.
10. device as claimed in claim 9, wherein the thickness of this initial CoFe layer is identical with the thickness of this foot NiFe layer.
11. device as claimed in claim 10, wherein one of this ferromagnetic material is the amorphous ferromagnetic layer.
12. device as claimed in claim 11, wherein this amorphous iron magnetosphere is CoFeB.
13. a magnetic tunnel device has magnetic free magnetic layer able to programme, described free magnetic layer comprises:
Be positioned at the initial CoFe layer of one on the Semiconductor substrate;
Be positioned at the alternating N iFe layer on this initial CoFe layer and the lamination of CoFe layer, wherein the foot NiFe layer of this lamination is positioned on this initial CoFe layer, and wherein this lamination comprises five layers of NiFe layer and five layers of CoFe layer; And
Last NiFe layer is positioned on the topmost CoFe layer of this lamination.
14. device as claimed in claim 13, wherein the thickness of the thickness of this initial CoFe layer and last NiFe layer is about 5 dusts, and the thickness of each NiFe layer is about 5 dusts in this lamination, and the thickness of each CoFe layer is about 1 dust in this lamination.
15. a magnetic tunnel device comprises:
Pinning layer on the Semiconductor substrate;
Nailed layer on this pinning layer;
Tunnel barrier layer on this nailed layer; And
The free layer that comprises the lamination of at least three material layers, wherein these at least three material layers comprise the alternately overlapped layers of at least two kinds of different materials on this tunnel barrier layer.
16. device as claimed in claim 15, wherein these at least two kinds of different material layers comprise a ferromagnetic layer and a non-ferromagnetic layer, and this tunnel barrier layer contacts with this ferromagnetic layer.
17. device as claimed in claim 16, wherein this ferromagnetic layer is NiFe layer or CoFe layer, and this non-ferromagnetic layer is the Ta layer.
18. device as claimed in claim 17, wherein the thickness of this NiFe layer or this CoFe layer is greater than the thickness of this Ta layer.
19. device as claimed in claim 15, wherein these at least two kinds of different material layers comprise a upper ferromagnetic layer and a bottom ferromagnetic layer.
20. device as claimed in claim 19, wherein this lower ferromagnetic layer is the NiFe layer, and this upper ferromagnetic layer is the CoFe layer.
21. device as claimed in claim 20, wherein the thickness of this NiFe layer is less than about 10 dusts, and the thickness of this CoFe layer is less than about 5 dusts.
22. device as claimed in claim 20 also comprises the initial CoFe layer between foot NiFe layer and this tunnel barrier layer.
23. device as claimed in claim 19, wherein a kind of this ferromagnetic layer is the amorphous ferromagnetic layer.
24. device as claimed in claim 23, wherein this amorphous iron magnetosphere is the CoFeB layer.
25. device as claimed in claim 15, wherein this pinning layer comprises an inverse ferric magnetosphere.
26. device as claimed in claim 15, wherein this nailed layer comprises a ferromagnetic layer.
27. device as claimed in claim 15, wherein this tunnel barrier layer comprises a metal oxide.
28. a magnetic tunnel device comprises:
Pinning layer on the Semiconductor substrate;
Nailed layer on this pinning layer;
Tunnel barrier layer on this nailed layer; And
One free layer, comprise and be positioned at the initial CoFe layer of one on the Semiconductor substrate, be positioned at the lamination of alternating N iFe layer on this initial CoFe layer and CoFe layer and be positioned at last NiFe layer on the topmost CoFe layer of this lamination, wherein the foot NiFe layer of this lamination is positioned on this initial CoFe layer, and wherein this lamination comprises five layers of NiFe layer and five layers of CoFe layer.
29. device as claimed in claim 28, wherein the thickness of the thickness of this initial CoFe layer and this last NiFe layer is about 5 dusts, and the thickness of each NiFe layer of this lamination is about 5 dusts, and the thickness of each CoFe layer of this lamination is about 1 dust.
30. a MAGNETIC RANDOM ACCESS MEMORY unit comprises:
One access transistor, it comprises one source pole district, a drain region and cross the word line of extension above the raceway groove between this source area and this drain region;
A bottom electrode that is electrically connected with this drain region;
Be positioned at a top electrode of this bottom electrode top;
Be electrically connected and be positioned at a bit line of this word line top with this top electrode;
A data line that is parallel to this word line; And
One magnetic tunnel device, it insulate between this bottom electrode and this top electrode and with this data line, wherein this magnetic tunnel device comprises magnetic free magnetic layer able to programme, described free magnetic layer comprises the lamination of at least three material layers, and wherein said at least three material layers comprise the alternately overlapped layers of at least two kinds of different materials.
31. MAGNETIC RANDOM ACCESS MEMORY as claimed in claim 30 unit, wherein a kind of in these two kinds of different materials is ferromagnetic, and the another kind in these two kinds of different materials is non-ferromagnetic.
32. MAGNETIC RANDOM ACCESS MEMORY as claimed in claim 31 unit, wherein this ferromagnetic material is CoFe or NiFe, and this nonferromagnetic material is Ta.
33. MAGNETIC RANDOM ACCESS MEMORY as claimed in claim 32 unit, wherein the thickness of this Ta layer is less than the layer thickness of this NiFe or CoFe layer.
34. MAGNETIC RANDOM ACCESS MEMORY as claimed in claim 30 unit, wherein these two kinds of different materials the two be ferromagnetic.
35. MAGNETIC RANDOM ACCESS MEMORY as claimed in claim 34 unit, wherein lower ferromagnetic layer is the NiFe layer, and upper ferromagnetic layer is the CoFe layer.
36. MAGNETIC RANDOM ACCESS MEMORY as claimed in claim 35 unit, wherein the thickness of this NiFe layer is greater than the thickness of this CoFe layer.
37. MAGNETIC RANDOM ACCESS MEMORY as claimed in claim 35 unit, wherein the thickness of this NiFe layer is less than about 10 dusts, and the thickness of this CoFe layer is less than about 5 dusts.
38. MAGNETIC RANDOM ACCESS MEMORY as claimed in claim 35 unit also comprises an initial CoFe layer that contacts with foot NiFe layer.
39. MAGNETIC RANDOM ACCESS MEMORY as claimed in claim 38 unit, wherein the thickness of this initial CoFe layer is identical with the thickness of this foot NiFe layer.
40. MAGNETIC RANDOM ACCESS MEMORY as claimed in claim 39 unit, wherein a kind of in this ferromagnetic material is the amorphous ferromagnetic layer.
41. MAGNETIC RANDOM ACCESS MEMORY as claimed in claim 40 unit, wherein this amorphous iron magnetosphere is CoFeB.
42. a MAGNETIC RANDOM ACCESS MEMORY unit comprises:
One access transistor comprises one source pole district, a drain region and cross the word line of extension above the raceway groove between this source area and this drain region;
A bottom electrode that is electrically connected with this drain region;
Be positioned at a top electrode of this bottom electrode top;
Be electrically connected and be positioned at a bit line of this word line top with this top electrode;
A data line that is parallel to this word line; And
One magnetic tunnel device, it insulate between this bottom electrode and this top electrode and with this data line, and wherein this magnetic tunnel device comprises a pinning layer, a nailed layer, a tunnel barrier layer and a free layer;
Wherein this free layer comprises and is positioned at the initial CoFe layer of one on this bottom electrode, is positioned at the lamination of alternating N iFe layer on this initial CoFe layer and CoFe layer and is positioned at last NiFe layer on the topmost CoFe layer of this lamination, wherein the foot NiFe layer of this lamination is positioned on this initial CoFe layer, and wherein this lamination comprises five layers of NiFe layer and five layers of CoFe layer.
43. MAGNETIC RANDOM ACCESS MEMORY as claimed in claim 42 unit, wherein the thickness of the thickness of this initial CoFe layer and this last NiFe layer is about 5 dusts, and the thickness of each NiFe layer of this lamination is about 5 dusts, and the thickness of each CoFe layer of this lamination is about 1 dust.
44. MAGNETIC RANDOM ACCESS MEMORY as claimed in claim 42 unit, wherein this pinning layer comprises an inverse ferric magnetosphere.
45. MAGNETIC RANDOM ACCESS MEMORY as claimed in claim 42 unit, wherein this nailed layer comprises a ferromagnetic layer.
46. MAGNETIC RANDOM ACCESS MEMORY as claimed in claim 42 unit, wherein this tunnel barrier layer comprises a metal oxide.
Applications Claiming Priority (5)
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KR1020030055895A KR100548997B1 (en) | 2003-08-12 | 2003-08-12 | Magnetic tunnel junction structures having a laminated free layer and magnetic random access memory cells employing the same |
KR55895/2003 | 2003-08-12 | ||
KR55895/03 | 2003-08-12 | ||
US10/851,387 | 2004-05-24 | ||
US10/851,387 US7378698B2 (en) | 2003-08-12 | 2004-05-24 | Magnetic tunnel junction and memory device including the same |
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CN1591673A true CN1591673A (en) | 2005-03-09 |
CN1591673B CN1591673B (en) | 2011-06-22 |
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CN200410056683.9A Expired - Lifetime CN1591673B (en) | 2003-08-12 | 2004-08-12 | Magnetic tunnel junction and memory device including the same |
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CN (1) | CN1591673B (en) |
DE (1) | DE102004039978B4 (en) |
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CN103633093A (en) * | 2012-08-27 | 2014-03-12 | 三星电子株式会社 | Semiconductor devices including metal-silicon-nitride patterns and methods of forming the same |
CN103971726A (en) * | 2013-01-29 | 2014-08-06 | 三星电子株式会社 | Voltage assisted spin transfer torque magnetic random access memory write scheme |
CN106025063A (en) * | 2016-05-19 | 2016-10-12 | 华为技术有限公司 | Magnetic tunnel junction and magnetic memory |
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US11121174B2 (en) | 2019-11-21 | 2021-09-14 | International Business Machines Corporation | MRAM integration into the MOL for fast 1T1M cells |
US11087811B1 (en) | 2020-05-28 | 2021-08-10 | International Business Machines Corporation | NVM synaptic element with gradual reset capability |
CN113725353B (en) * | 2021-09-03 | 2024-05-03 | 广东省大湾区集成电路与系统应用研究院 | MTJ device, manufacturing method thereof and MRAM |
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JPH1041132A (en) * | 1996-07-18 | 1998-02-13 | Sanyo Electric Co Ltd | Magnetic resistance effect film |
DE60025146T2 (en) * | 1999-06-18 | 2006-08-24 | Koninklijke Philips Electronics N.V. | METHOD OF MANUFACTURING A MAGNETIC FENDER ARRANGEMENT |
JP2003526911A (en) * | 2000-03-09 | 2003-09-09 | コーニンクレッカ フィリップス エレクトロニクス エヌ ヴィ | Magnetic devices with tie layers and methods of making and operating such devices |
US6767655B2 (en) * | 2000-08-21 | 2004-07-27 | Matsushita Electric Industrial Co., Ltd. | Magneto-resistive element |
JP3618654B2 (en) * | 2000-09-11 | 2005-02-09 | 株式会社東芝 | Magnetoresistive element, magnetic head, and magnetic recording / reproducing apparatus |
JP2002150512A (en) * | 2000-11-08 | 2002-05-24 | Sony Corp | Magnetoresistive element and magnetoresistive magnetic head |
JP3807254B2 (en) * | 2001-05-30 | 2006-08-09 | ソニー株式会社 | Magnetoresistive effect element, magnetoresistive effect type magnetic sensor, and magnetoresistive effect type magnetic head |
JP3565268B2 (en) * | 2001-06-22 | 2004-09-15 | 株式会社東芝 | Magnetoresistive element, magnetic head, and magnetic reproducing device |
JP3590006B2 (en) * | 2001-06-22 | 2004-11-17 | 株式会社東芝 | Magnetoresistive element, magnetic head, and magnetic reproducing device |
JP2003152239A (en) * | 2001-11-12 | 2003-05-23 | Fujitsu Ltd | Magnetoresistive effect element and read head and drive having the same |
JP2003243631A (en) * | 2002-02-18 | 2003-08-29 | Mitsubishi Electric Corp | Thin film magnetic storage device and radio chip, distribution management system and manufacturing process management system using the same |
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2004
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- 2004-08-12 CN CN200410056683.9A patent/CN1591673B/en not_active Expired - Lifetime
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Cited By (7)
Publication number | Priority date | Publication date | Assignee | Title |
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CN103633093A (en) * | 2012-08-27 | 2014-03-12 | 三星电子株式会社 | Semiconductor devices including metal-silicon-nitride patterns and methods of forming the same |
CN103633093B (en) * | 2012-08-27 | 2018-07-03 | 三星电子株式会社 | Semiconductor devices including metal-silicon-nitride pattern and forming method thereof |
CN103971726A (en) * | 2013-01-29 | 2014-08-06 | 三星电子株式会社 | Voltage assisted spin transfer torque magnetic random access memory write scheme |
CN103971726B (en) * | 2013-01-29 | 2018-02-09 | 三星电子株式会社 | Voltage assisted spin transfer torque magnetic random access memory write scheme |
CN106953003A (en) * | 2015-09-25 | 2017-07-14 | 三星电子株式会社 | Magnetic memory device and the method for manufacturing the magnetic memory device |
CN106025063A (en) * | 2016-05-19 | 2016-10-12 | 华为技术有限公司 | Magnetic tunnel junction and magnetic memory |
CN106025063B (en) * | 2016-05-19 | 2019-11-19 | 华为技术有限公司 | Magnetic tunnel-junction and magnetic memory |
Also Published As
Publication number | Publication date |
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DE102004039978A1 (en) | 2005-06-23 |
DE102004039978B4 (en) | 2009-08-20 |
TWI250651B (en) | 2006-03-01 |
CN1591673B (en) | 2011-06-22 |
TW200520223A (en) | 2005-06-16 |
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