CN1581115A - A data transferring apparatus for transferring liquid ejection data and a liquid ejecting apparatus - Google Patents
A data transferring apparatus for transferring liquid ejection data and a liquid ejecting apparatus Download PDFInfo
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- CN1581115A CN1581115A CNA031553087A CN03155308A CN1581115A CN 1581115 A CN1581115 A CN 1581115A CN A031553087 A CNA031553087 A CN A031553087A CN 03155308 A CN03155308 A CN 03155308A CN 1581115 A CN1581115 A CN 1581115A
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- G06—COMPUTING; CALCULATING OR COUNTING
- G06K—GRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
- G06K15/00—Arrangements for producing a permanent visual presentation of the output data, e.g. computer output printers
- G06K15/02—Arrangements for producing a permanent visual presentation of the output data, e.g. computer output printers using printers
- G06K15/10—Arrangements for producing a permanent visual presentation of the output data, e.g. computer output printers using printers by matrix printers
- G06K15/102—Arrangements for producing a permanent visual presentation of the output data, e.g. computer output printers using printers by matrix printers using ink jet print heads
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Abstract
An apparatus for transferring liquid ejection data, to realize a high-speed development processing of compressed data, and a high speed data transferring to a liquid ejection apparatus, and thereby to dramatically increase a liquid ejection executing speed of the liquid ejection apparatus, compared with conventional ones. Recording data developed in a decoding circuit 28 are stored word by word for each clock in a face A of a line buffer 281. After eight words (D0 to D7) are stored in the face A, a face to store the developed recording data is switched from the face A to a face B, and at the same time, a face to transfer by DMA the developed recording data to a local memory 29 is switched from the face B to the face A. The recording data developed in the decoding circuit 28 is stored in the face B of the line buffer 281. Eight words (D8 to D15) are stored in the face B, while the recording data (D0 to D7) stored in the face A after developed is transferred by DMA to the local memory 29.
Description
Technical field
The present invention relates to be used for being input to from jet head liquid to the liquid ejection data of the liquid injection apparatus of liquid such as injected medium injection ink to the data transmission device of the liquid ejection data of jet head liquid transmission with have the liquid injection apparatus of the data transmission device of this liquid ejection data.
Here, liquid injection apparatus is not limited to be recorded the injection of material ink from record-header to recording chart etc. and carries out pen recorders such as inkjet recording device, duplicating machine and facsimile recorder to the record that is recorded material, also comprise the replacement ink, to being equivalent to be recorded the injected material ejection liquid corresponding of material, make liquid from the jet head liquid that is equivalent to described record-header attached to the device on the injected material with special-purpose.In addition, as jet head liquid, except described record-header, the test portion that can list biological organism injector head that electrode material (conductive paste) injector head, biochip that the color material injector head, OLED display and the surface light emitting display motors such as (FED) that use in the manufacturing of color filter of LCD etc. use in forming use in making, sprays as the test portion of accurate suction pipe sprays first-class.
Background technology
Spray ink, recording image data etc. from record-header to recording chart etc. as the so-called inkjet recording device of liquid injection apparatus.Is data compression that the view data of feasible expansion is gone expansion, expands into bitmap images, and a plurality of nozzle arrays from the women's head-ornaments that are configured in record-header spray the polychrome ink droplets, form the bitmap images that launches on the record surface of recording chart.By the polychrome ink droplet is sprayed to record surface, form a plurality of ink dots, on recording chart, form image.In addition, the packed data of feasible expansion for example is the packed data based on the run length compress mode that generally is widely known by the people, and is based on the packed data of the compress mode that can launch successively with byte unit.
Generally, such inkjet recording device has: from external device (ED)s such as personal computer input data compression is the view data of feasible expansion, the capable expansion of packed data (decompression) of input, the bitmap images that launches is carried out after data necessary handles, the data transmission device of these data to the register transfer of record-header.General data transmission device in the past for example adopts structure shown in Figure 13.
Be stored in compression recording data in the packed data memory block of RAM12 via system bus SB one byte one byte successively to microprocessor 11 transmission (circuit of representing with symbol A), by decompression step based on the packed data of program, after one byte, one byte decompresses successively, again via system bus SB to RAM12 transmission (circuit of representing with symbol B), be stored in the required bitmap images district of RAM12.The moment of in bitmap images district, all having stored expanding data at RAM12, the expanding data in the bitmap images district via system bus SB to the transmission of register (not shown) byte one byte of a control part 13 inside (circuit of representing with symbol C), according to this bitmap images, spray ink to recording chart from each nozzle array of record-header 62.
In addition, as an example of the conventional art of data transmission and processing high speed, independently bus such as two of system bus and local buss etc. is set as everyone knows, between system bus and local bus, has disposed the technology of two controllers.In data transmission device, when being connected the primary memory of system bus one side by the bus controller visit of carrying out a side, the opposing party's bus controller visit is connected the parallel processing of the local storage of local bus one side, make data transmission and processing high speed (for example, with reference to patent documentation 1).
[patent documentation 1]
No. 3251053 communique of patent
In the data transmission device 10 of the liquid injection apparatus in the past that adopts structure shown in Figure 13, in order to improve the execution speed that liquid sprays, promptly in inkjet recording device, faster in order to make writing speed, following problem becomes obstacle.
At first, because the record data of compression launch (decompression) by program one byte one byte with software, so can't a large amount of packed data of high speed processing.If using can be with the microprocessor with high throughput 11 of high-frequency clock work, just can high speed, if but the microprocessor 11 of high price like this is installed, then produce the problem that the cost of data transmission device 10 increases substantially.
In addition, all undertaken to the data transmission of RAM12 with from the data transmission of RAM12 by microprocessor 11, so when microprocessor 11 is carried out other data processing and computing etc., for example microprocessor 11 is when the RAM12 program fetch, allow data awaiting transmission sometimes, in view of the above, produce data transfer delay, so can't realize the data transmission rate high speed.
By system bus SB from the access line of microprocessor 11 to RAM12 and from RAM12 to the record-header 62 data transmission link public, so occupy system bus SB during microprocessor 11 visit RAM12, at this moment can't carry out the data transmission of RAM12 to record-header 62.Therefore, produce data transfer delay, can't realize the high speed of data transmission rate record-header 62.
In addition, in the conventional art of in described patent documentation 1, describing, be the record data that launch (decompression) compression with software by program one byte one byte after all, so can't launch to handle a large amount of packed datas at a high speed.Therefore, compression recording data from signal conditioning package output is being launched, transmit to record-header, in the liquid injection apparatus such as the pen recorder of executive logging, even can carry out the structure of data transmission and processing at a high speed, the processing that launches packed data is still slow, so can't improve the execution speed that liquid sprays.
Summary of the invention
The present invention proposes in view of described situation, its purpose is: the high speed that realizes packed data is launched to handle and to the high speed data transfer of jet head liquid, make the execution speed that the liquid of liquid injection apparatus is sprayed compared with the past, have tremendous raising.
In order to solve described problem, first form of the present invention is a kind of data transmission device of liquid ejection data, has decoding unit, and this decoding unit comprises: can be with hardware the decoding scheme of the liquid ejection data expansion that is compressed to feasible expansion; The row cache device of the liquid ejection data that launches with described decoding scheme with the storage of word unit; Be compressed to the packed data input media of the liquid ejection data of feasible expansion to described decoding scheme transmission from the outside; It is characterized in that: described decoding unit has following structure: described row cache device has the buffer area that can store the expanding data of given number of words on the two sides, in the one side side liquid ejection data that is launched by decoding scheme is stored successively, in the moment of the expanding data of having stored given number of words, the liquid ejection data that launches is continued to store into successively the another side side by described decoding scheme; When the liquid ejection data that is launched by decoding scheme stored in one side side 1 word 1 word, simultaneously the liquid ejection data that launches to finish in the another side side is transmitted to described external memory storage 1 word 1 word.
The buffer area that given number of words is arranged by the row cache utensil of the liquid ejection data of decoding scheme expansion (decoding) with the storage of word unit.Here, the one side side is represented the face of any one party in the buffer area on two sides, and the another side side is represented the different face of described one side side in the buffer area with the two sides, below same.Liquid ejection data after the one side side of buffer area is stored expansion successively, when the moment of having stored the liquid ejection data of given number of words in the one side side, the buffer area of the liquid ejection data after storage launches switches to the another side side from the one side side, continues the data after the another side side is stored expansion continuously.
Then,, the buffer area of the liquid ejection data after the storage expansion is switched to the one side side again from the another side side, continue the data after the one side side is stored expansion continuously when the moment of having stored the liquid ejection data of given number of words in the another side side.Like this, for the row cache device of the buffer area with two sides, every given number of words is just alternately switched the face of storing data, the liquid ejection data that storage is launched by decoding scheme.Therefore, can unrestrictedly carry out the processing that launches the liquid ejection data of the feasible expansion of boil down to by decoding scheme continuously.
In addition, be stored in the liquid ejection data in the row cache device, when liquid ejection data 1 word 1 word that is launched by decoding scheme stores the one side side into, meanwhile, be stored in liquid ejection data 1 word 1 word after the expansion of another side side to outside memory transfer.Promptly the data storage face of one side side as the liquid ejection data after launching, as the data transmission face of liquid ejection data, the liquid ejection data after 1 word, 1 word launches simultaneously is to the storage of data storage face and be stored in the data transmission of the liquid ejection data in the data transmission face the one side side.Therefore, under perfect condition, when the moment of the liquid ejection data that is launched by decoding scheme of having stored given number of words in the data storage face, the data transmission that is stored in the liquid ejection data of the given number of words in the data transmission face is all over.And, at this constantly, the face of the data storage face of liquid ejection data becomes the data transmission face of liquid ejection data after the expansion of change sky, the face that launches the data transmission face of back liquid ejection data becomes the data storage face that launches the back liquid ejection data, and the liquid ejection data after 1 word, 1 word launches simultaneously once more is to the storage of row cache device and be stored in liquid ejection data in the row cache device to the data transmission of external memory storage.
Therefore, can launch the processing of liquid ejection data of the feasible expansion of boil down to and the processing of the liquid ejection data that launches to outside memory transfer simultaneously, parallel processing continuously, so can launch the liquid ejection data of the feasible expansion of boil down to, energy efficiency is carried out the processing to outside memory transfer data highly.And under perfect condition, the loss the during switching of 2 buffer area is 0, and the liquid ejection data that can launch the feasible expansion of boil down to is carried out the processing to outside memory transfer data midway incessantly continuously.
In view of the above, data transmission device according to the liquid ejection data shown in first form of the present invention, can launch to be compressed to the liquid ejection data of feasible expansion, energy efficiency is carried out the processing to outside memory transfer data highly, so in liquid injection apparatus, the high speed that can carry out packed data launch to be handled and to the high speed data transfer of jet head liquid, it is compared with the past that the liquid of jet head liquid sprays execution speed, has tremendous raising.
The present invention's second form is the data transmission device according to the liquid ejection data of described first form, it is characterized in that: described decoding unit has following structure: comprise the device of the liquid ejection data that launches to finish in described row cache device to described external memory storage 1 word 1 word DMA transmission, the expanding data of 1 word store the action of the one side side of described row cache device successively into, launch the liquid ejection data finish in the another side side synchronous to the action and the work clock of described external memory storage 1 word 1 word DMA transmission, in per 1 clock, carry out simultaneously.
By carrying out the transmission of the liquid ejection data that is stored in the row cache device with DMA transmission to external memory storage, can be after the transmission of 1 clock high speed be stored in expansion in the row cache device in the decoding part liquid ejection data.DMA (Direct Memory Access) transmission is if set transmission sources and transmission objectives address or transmission quantity in given register, then later on by microprocessor, can carry out the well-known transmission mode of data transmission with hardware at a high speed.In view of the above, can carry out at a high speed with launch to outside memory transfer after the decoding carried out simultaneously of the processing of liquid ejection data based on decoding scheme handle, launch handling property so can bring into play to greatest extent based on the data that can carry out the decoding scheme that expanding compressed data at a high speed handles.Promptly because can be with the liquid ejection data of 1 clock after the expansion of outside memory transfer 1 word, thus can be in 1 clock, 1 word, 1 word handle by the expansion of decoding scheme expansion after liquid ejection data store to the row cache device.Therefore, liquid ejection data 1 word 1 word that can carry out action that the expanding data of 1 word is stored successively to the one side side of row cache device simultaneously and launch in the another side side to finish in 1 clock is to the action of external memory storage DMA transmission, can carry out the compressed liquid jet data that in per 1 clock, launches 1 word, to the processing of outside memory transfer.
The present invention's the 3rd form is according to the data transmission device of the liquid ejection data of described second form, it is characterized in that: described decoding unit has: switch liquid ejection data that the expansion of buffer area face, the storage of the liquid ejection data that storage launches by the described decoding unit circuit of described row cache device the finishes buffer area face switching device shifter to the buffer area face of described external memory storage DMA transmission with clock.
As mentioned above, under perfect condition, stored moment of given number of words in the one side side, be all in the data transmission of the liquid ejection data of the given number of words of another side side storage at the liquid ejection data that launches by decoding scheme.And the face of the data storage face of the liquid ejection data after the expansion becomes the data transmission face of liquid ejection data, and the face of the data transmission face of liquid ejection data becomes the data storage face of the liquid ejection data after the expansion.Promptly the liquid ejection data that is launched by decoding scheme is stored given number of words in the one side side, in the moment that the data transmission of the given number of words liquid ejection data of another side side storage finishes fully, is necessary two buffer area faces of switch line buffer.At this moment, by switch the buffer area face with 1 clock, the data transfer delay that the switching owing to the buffer area face is produced is a Min..
The present invention's the 4th form is the data transmission device according to the liquid ejection data of described second form or the 3rd form, it is characterized in that: described decoding unit has: when the moment of having launched the liquid ejection data of given number of words in the one side side, confirm that with clock the data transmission of launching the liquid ejection data that finishes in the another side side from given number of words to described external memory storage DMA that transmitted confirms device.
As mentioned above, under perfect condition, stored moment of given number of words in the one side side, be all in the data transmission of the liquid ejection data of the given number of words of another side side storage at the liquid ejection data that launches by decoding scheme.; because all essential factors such as visit wait to external memory storage; stored moment of given number of words at the liquid ejection data that launches by decoding scheme in the one side side, also may finish fully in the data transmission that the another side side stored the liquid ejection data of given number of words.Therefore, stored moment of given number of words in the one side side, confirmed that the data transmission DMA of liquid ejection data of the given number of words of another side side storage has transmitted given number of words at the liquid ejection data that launches by decoding scheme.In view of the above, can prevent from reliably to be stored in that record data DMA is covered by other record data before being transferred to external memory storage after the expansion in the row cache device.
The present invention's the 5th form is the liquid injection apparatus with data transmission device of the described liquid ejection data of any form in described first form～the 4th form.
The liquid injection apparatus shown in the 5th form according to the present invention sprays in the dress at liquid, can obtain the action effect of the described invention of any form in described first form～the 4th form.
Description of drawings
Fig. 1 is the general view of inkjet recording device of the present invention.
Fig. 2 is the summary side elevation of inkjet recording device of the present invention.
Fig. 3 is the block diagram of inkjet recording device of the present invention.
Fig. 4 is the block diagram of expression data transmission device structure.
The sequential chart of the flow process of Fig. 5 is modal representation record data.
Fig. 6 is expression DECU and the block diagram that receives the structure of buffer memory portion.
Fig. 7 is the block diagram of the structure of expression title analysis piece.
Fig. 8 is the block diagram that expression launches the inner structure of processing controller.
Fig. 9 is the sequential chart of the data transmission of expression row cache device.
The figure that Figure 10 has been a modal representation launches the situation till the compression recording data.
The figure that Figure 11 has been a modal representation launches the situation till the compression recording data.
The record data that Figure 12 has been a modal representation after launching.
Figure 13 is a block diagram of representing data transmission device schematic configuration in the past.
Among the figure: 4-ASIC; 4-ASIC; The 10-data transmission device; 21-ROM; 22-RAM; 24-MPU; The 27-interface portion; The 28-decoding scheme; The 29-local storage; 33-control part; 41-DECU (decoding unit); The 42-reception buffer; The 50-inkjet recording device; The 51-sliding framework guide shaft; 52-lettering pressing plate; 53-feed drive roller; 54-carries driven voller; 55-row paper driven roller; 56-row paper driven voller; The 57-paper supply tray; The 57b-paper feed roller; The 61-balladeur train; The 62-record-header; 63-paper detecting device; The 100-recording control part; The 200-signal conditioning package; 281-row cache device; 282-buffer area face switching device shifter; The 283-data transmission is confirmed device; 411-the one I-DMA controller; 415-the 2nd I-DMA controller; The 421-I-DMA controller; 412-launches processing controller; The 413-L-DMA controller; 414-local storage controller; 422-switching controls piece; 423-title analysis piece; 424-Data Transmission Controlling piece; The 425-FIFO storer; The 426-command storing register; 427-data separating piece; The X-main scanning direction; The Y-sub scanning direction; The SB-system bus; The LB-local bus; IB1-first private bus; IB2-second private bus; IB3-the 3rd private bus.
Embodiment
Below, with reference to the description of drawings embodiments of the invention.
At first, schematic configuration as the inkjet recording device of " liquid injection apparatus " of the present invention is described.Fig. 1 is the general view of inkjet recording device of the present invention, and Fig. 2 is its side view.
In inkjet recording device 50,, be provided with axle and be supported on the sliding framework guide shaft 51, the balladeur train 61 that on main scanning direction X, moves as pen recorder to recording chart P executive logging.On balladeur train 61, dispose the record-header 62 of the conduct " jet head liquid " of writing down to recording chart P injection ink.Relative with record-header 62, be provided with the lettering pressing plate 52 at the interval of the women's head-ornaments of regulation record-header 62 and recording chart P.And, by alternately repeat the action that recording chart P is carried with given operational throughput at sub scanning direction Y and in record-header 62 is during main scanning direction X round trip from record-header 62 to the action that recording chart P sprays ink, on recording chart P, carried out record.
As the recording paper conveying device of recording chart P, be provided with feed drive roller 53 and carry driven voller 54 in sub scanning direction Y conveying.Feed drive roller 53 is by the rotary driving force control rotation of stepper motor etc., by the rotation of feed drive roller 53, to sub scanning direction Y feeding recordable paper P.
Be provided with a plurality of conveying driven vollers 54, rely on feed drive roller 53 respectively, during rotation feeding recordable paper P by feed drive roller 53,, rotate along with the conveying of recording chart P on one side on one side by recording chart P.On the surface of feed drive roller 53, form diaphragm with high frictional resistance.Surperficial frictional resistance is close on the surface of feed drive roller 53 by this by the lip-deep recording chart P at feed drive roller 53 by carrying driven voller 54, carries to sub scanning direction Y by the rotation of feed drive roller 53.
In addition, the paper detecting device 63 of well-known technology between paper feed roller 57b and feed drive roller 53, disposing based on conventional art.Paper detecting device 63 is to have the automatic recovery property of being paid to upright posture, and can only rotate at the recording chart throughput direction, the bar that under state outstanding in the conveying circuit of recording chart P, is supported by axle, by the top of this bar is pressed on recording chart P, bar rotates, in view of the above, form the detecting device of the structure of detection record paper P.Paper detecting device 63 the starting end position of the recording chart P that is provided by paper feed roller 57b is provided and is finished end position, with this detection position coupling, decision recording areas, executive logging.
And device, the row of being provided with paper driven roller 55 and the row's paper driven voller 56 of the recording chart P that has write down as discharge.Row's paper driven roller 55 is by the rotary driving force control and the rotation of stepper motor etc., and by the rotation of row's paper driven roller 55, recording chart P discharges to sub scanning direction Y.Row's paper driven voller 56 has a plurality of teeth around, becomes the band discaling roll with acute angle tooth that the top of each tooth contacts with the record millet cake of recording chart P.A plurality of row's paper driven vollers 56 are the row's of relying on paper driven roller 55 respectively, when discharging recording chart P by the rotation of row's paper driven roller 55, with recording chart P to being close to, rotate along with the discharge of recording chart P.
And, rotate the not shown rotation that drives paper feed roller 57b or feed drive roller 53 and arrange paper driven roller 55 and drive with motor, control and drive by recording control part 100 with motor in the not shown sledge drive of main scanning direction driving balladeur train 61.In addition, record-header 62 has recording control part 100 controls too, to the jet surface ink of recording chart P.
Fig. 3 is the schematic block diagram of inkjet recording device 50 of the present invention.
When executive logging, signal conditioning package 200 becomes main frame one side, comprise the record control data (liquid injection control data) of the record data (below be called compression recording data) of the feasible expansion of boil down to from signal conditioning package 200 output, inkjet recording device 50 is from interface portion 27 input record control datas.After decoding scheme 28 usefulness hardware launch compression recording data, the record data after launching are stored to row cache device 281.Be stored in record data after the expansion in the row cache device 281 by the data of every given number of words, store local storage 29 into by local bus LB after, by local bus LB, from the beginning the register of control part 33 inside is to record-header 62 transmission.33 pairs of record-headers 62 of control part are controlled, and a plurality of nozzle arrays from the women's head-ornaments that are configured in record-header 62 spray each chromatic ink to the record surface of recording chart P.
Fig. 4 is the block diagram of expression as the data transmission device structure of " data transmission device of liquid ejection data " of the present invention.The sequential chart of the record data flow process of Fig. 5 is modal representation data transmission device.
Order is by system bus SB, and MPU24 visits reception buffer 42, carries out name and analyzes (symbol COM).In next data transfer cycle, DECU41 launches from the next compression recording data (symbol T3) of buffer 42 DMA transmission, become moment of certain data volume at the record data that launch, with the transmission of system bus SB one side data non-synchronously via the bit map area DMA transmission (symbol T4) of local bus LB to local storage 29.As the record data of the data bitmap of the bit map area that stores local storage 29 into again via local bus LB to DECU41 DMA transmission (symbol T5).DECU41 transmits (symbol T6) to these record data to a control part 33 DMA via the 3rd private bus IB3, is stored in the register of a control part 33 inside.Control part 33 is being stored in record data in the register to record-header 62 DMA transmission (symbol T7).
Fig. 6 is the block diagram of the inner structure of expression DECU41 and reception buffer 42.Fig. 7 is the block diagram of structure of the title analysis piece of expression reception buffer 42.Then, be described in detail in DECU41 and the reception buffer 42 that constitutes in the ASIC.
If begun the data transmission of the record control data of 50 of signal conditioning package 200 and inkjet recording devices, then the record control data of interface portion 27 receptions transmits to reception buffer 42 DMA by the first private bus IB1.DMA is transferred to switching controls piece 422 transmission of the record control data of reception buffer 42 to the data transmission link of the record control data that switches reception buffer 42 inside.Switching controls piece 422 is the piece of the record control data that comes from interface portion 27 DMA transmission to any one transmission of title analysis piece 423, data delivery controll block 424 or command storing register 426, title analysis piece 423 these data transmission links of control.When the beginning data transmission, the data transmission link of switching controls piece 422 becomes title analysis piece 423, at first carries out the analysis of title at title analysis piece 423.
Data communication format among this embodiment is the title of additional 6 bytes in record control data, and title is stored in the 6 byte registers 431 of title analysis piece 423, and analyzed.The structure of title is that beginning 2 bytes are passage, 2 bytes then are length, 2 bytes of following again are the data of using in the negotiation of data communication, are between interface portion 27 and the signal conditioning package 200, are used to confirm to determine the communication condition on the hardware and the data of communication protocol.Passage represents that then the following data of title are order or compression recording data, if be 00H or 02H, is exactly order, if 40H just becomes remote command and compression recording data.Upper byte is represented to receive, and low byte is represented to send.Length is the quantity (byte number) that has comprised the data of title.Order is the control command that is used for executive logging control at inkjet recording device 50, for example is the paper supply control of recording chart P, the control commands such as drive controlling of carrying control, discharge control, balladeur train 61.
In the title analysis piece 423, passage analysis block 432 is analyzed beginning 2 bytes of title, when the data below the title are order, the data transmission link of switching controls piece 422 switches to command storing register 426, and the data storage of the byte number of analyzing with length analysis block 433 is arrived command storing register 426.In addition, passage analysis block 432 is analyzed beginning 2 bytes of title, when the data below the title are remote command and compression recording data, the data transmission link of switching controls piece 422 switches to data delivery controll block 424, the byte number notification data of analyzing with length analysis block 433 is carried controll block 424, the data of this byte number are transmitted to data delivery controll block 424.
For example, when storing data shown in Figure 7 in the title, passage is 40H, length is FFH, so it is 255 bytes that remote command and compression recording data comprise title, promptly 249 byte remote command and compression recording datas are arranged later on, so 249 later byte datas of title are transmitted to data delivery controll block 424 at title.
The order of storing command storing register 426 into is by system bus SB visit MPU24, fill order analysis.The remote command and the compression recording data that are transferred to data delivery controll block 424 store FIFO storer 425 into.Store the remote command of FIFO storer 425 and compression recording data into according to data transmission requirement, transmit to DECU41 DMA by the second private bus IB2 from DECU41.At this moment, in data separating piece 427, the MPU24 monitoring data when being remote command, is analyzed remote command with MPU24, to the DECU41 transmission, when just thinking to be compression recording data, does not transmit to DECU41 DMA.In addition, when the data communication format of 27 of signal conditioning package 200 and interface portion is untitled data communication format, not carrying out the title of title analysis piece 423 resolves, after the data that interface portion 27 is received remain untouched and store in the FIFO storer 425, separate remote command, carried out the analysis of remote command with MPU24.
DECU41 has an I-DMA controller 411, the 2nd I-DMA controller 415 and the L-DMA controller 413 as " DMA transmitting device ".By the first private bus IB1 that the DMA that controls the second private bus IB2, one side transmits, compression recording data 1 word 1 word of storage is to launching processing controller 412 DMA transmission in the FIFO storer 425 of reception buffer 42.Launch processing controller 412 and be built-in with decoding scheme 28 and row cache device 281.By the expansion of decoding scheme 28 usefulness hardware 1 word 1 word, the record data of expansion store in the row cache device 281 from the compression recording data of the FIFO storer 425 1 words one word DMA of reception buffer 42 transmission.
The DMA transmission of L-DMA controller 413 control local bus LB one side.In addition, the local storage 29 of local storage controller 414 control linkages on local bus LB reading and writing.And, the moment of record data after the expansion of having stored given byte number in the buffer 281 of being expert at, record data pass through local storage controller 414 by L-DMA controller 413 after being stored in the expansion in the row cache device 281, via local bus LB, non-synchronously transmit to local storage 29 DMA with the DMA transmission of system bus SB one side.The record data storage was in the given bit map area of local storage 29 after DMA was transferred to the expansion of local storage 29.The DMA transmission of the 2nd I-DMA controller 415 controls the 3rd private bus IB3 one side.Record data are by the 2nd I-DMA controller 415 after being stored in the expansion in the bit map area of local storage 29, by local storage controller 414, via local bus LB and the 3rd private bus IB3, transmit to a control part 33 DMA, after storing in the internal register of control part 33 to the end, transmit to record-header 62 DMA.
In addition, 29 DMA transmission is by L-DMA controller 413 burst transmissions from row cache device 281 to local storage, and 62 DMA transmits the 2nd I-DMA and controls 415 burst transmissions from local storage 29 to record-header.As mentioned above, burst transmissions is when transmitting continuous data, by the steps such as appointment of address are omitted a part, before the whole end of transmissions of the data of given data block, occupies the data transfer mode that bus is transmitted.L-DMA controller 413 is expert at moment of the record data after the expansion of having stored given byte number in the buffer 281,1 word of the record data after the expansion of given byte number, 1 word before local storage 29 DMA have transmitted given byte number, occupy local bus LB, carry out burst transmissions.The 2nd I-DMA controller 415 the expansion in the bit map area that is stored in local storage 29 after record data by the data block of each given byte number, 1 word, 1 word occupied local bus LB to a data block before record-header 62 DMA end of transmissions, carry out burst transmissions.
And, 29 burst transmissions is when when 62 burst transmissions is conflicted from local storage 29 to record-header from row cache device 281 to local storage, 62 burst transmissions is preferential from local storage 29 to record-header, 62 burst transmissions from local storage 29 to record-header, temporarily stop from row cache device 281 to local storage 29 burst transmissions, can not disconnect midway based on the ink jet action from record-header 62 nozzle arrays of 62 record data from local storage 29 to record-header.By record-header 62 having been transmitted before the data of given data block, occupying local bus LB transmits, can not take place because the requirement of the MPU24 of system bus SB one side and can't carry out the drawback of data transmission, so can carry out transmission at a high speed to the record data of record-header 62.
Fig. 8 is the block diagram that expression launches the inner structure of processing controller 412.
When the record data of decoding scheme 28 expansion are used in the storage of A face one side one word one word, simultaneously record data after the expansion that is stored in B face one side are transmitted to local storage 29 DMA as external memory storage by L-DMA controller 413 1 words one word, be stored in the given bit map area of local storage 29.Equally, when the record data of decoding scheme 28 expansion are used in the storage of B face one side one word one word, simultaneously the record data after the expansion that is stored in A face one side are transmitted to local storage 29 1 words one word DMA by L-DMA controller 413, be stored in the given bit map area of local storage 29.Switch by buffer area face switching device shifter 282, make the face of the opposite side of face of the record data that the record data after launching are always launched by decoding scheme 28 with storage to the face of local storage 29 DMA transmission.In addition, launch processing controller 412 and have the moment of transmit expanding data of the face of having stored 8 word expanding datas at DMA, affirmation has only been carried out the data transmission that DMA transmits necessary data number and has but been recognized device.
Like this, row cache device 281 for buffer area with 2 in A face and B face etc., per 8 words to the record data that launch with decoding scheme 28, alternately switch the face of storage data, the record data that storage launches launch the processing of the record data of the feasible expansion of boil down to so can unrestrictedly carry out continuously with decoding scheme 28.In addition, with parallel the processing of record data row cache device 281 storages that launch by decoding scheme 28, with the face of storing by the opposite side of face of the record data of decoding scheme 28 expansion in after the expansion of having stored record data transmit to local storage 29 DMA.Therefore, parallel processing simultaneously launches a processing and a processing that the record data that launch transmit to local storage 29 DMA of the record data of the feasible expansion of boil down to, so can carry out the record data that launch the feasible expansion of boil down to extreme efficiency, to the processing of local storage 29 DMA transmission.
Fig. 9 is that expression is from the sequential chart of row cache device 281 to the timing of local storage 29 transmission log data.
CLK is the work clock of ASIC4.The record data (symbol D0) that launched by decoding scheme 28 are in per 1 clock, and each 1 word stores the A face of row cache device 281 successively into, store 8 words (symbol D0～D7) in the A face into.The A face of buffer 281 has been stored record data after the expansion of 8 words (symbol D0～D7) if be expert at, then in next clock (symbol C1), confirm that by data transmission device 283 confirms (during symbol D0～D7), whether the 8 word record data that have been stored in B face one side of row cache device 281 have been transmitted by L-DMA controller 413 DMA for record data after the storage of A face launches.At first, the B face of buffer 281 of being expert at is not stored the record data after the expansion, so then in next clock (symbol C2), by buffer area face switching device shifter 282 face of storage by the record data of decoding scheme 28 expansion switched from A towards the B face, simultaneously the face of the record data after launching to local storage 29 DMA transmission is switched to the A face from the B face.
The record data that launched by decoding scheme 28 are then in each clock, and each 1 word is successively to the storage of the B of row cache device 281 face, store 8 words (symbol D8～D15) at the B face.Simultaneously, with in each clock, each 1 word is parallel to the record data that the storage of the B of row cache device 281 face launches successively, (the symbol D0～D7) transmit to local storage 29 DMA by L-DMA controller 413 of the record data after the expansion of storing in the A face.In addition, in this embodiment, row cache device 281 is ASIC internal SRAM (Static RAM), always just can carry out reading and writing data with 1 clock, and local storage 29 is SDRAM (Synchronous Dynamic RAM), and the initial visit of reading and writing data just needs 3 clocks.Therefore, record data (symbol D0～D7) is in the DMA of local storage 29 transmission, and initial 1 word record data (symbol D0) just need 3 clocks, below same.
The B face of buffer 281 has been stored record data after 8 words launch (symbol D8～D15) if be expert at, then in next clock (symbol C11), confirm that by data transmission device 283 confirms that the record data after the storage of B face launches (during symbol D8～D15), have been stored in 8 word record data (the symbol D0～D7) whether transmitted 8 words by L-DMA controller 413 DMA of A face one side of row cache device 281.In the moment of clock C11, (symbol D0～D7) also do not transmitted 8 words to local storage 29 DMA is not so at this constantly, carry out the switching of the A face and the B face of row cache device 281 to be stored in record data after the expansion of A face one side.Then, moment of next clock (symbol C12) too, again in the moment of next clock (symbol C13), (symbol D0～full DMA of 8 words D7) is transferred to the state of local storage 29 to become record data after the expansion that is stored in A face one side.Then, in next clock (symbol C14), by buffer area face switching device shifter 282 face of storing the record data that launched by decoding scheme 28 is switched to the A face from the B face, simultaneously the face of the record data after local storage 29 DMA transmission expansion is switched to the B face from the A face.
Then in per 1 clock, 1 time 1 word stores the A face of row cache device 281 into to the record data that launched by decoding scheme 28 successively, stores 8 words (symbol D16～D23) in the A face into.Simultaneously, with in each clock, each 1 word is parallel to the record data that the storage of the A of row cache device 281 face launches successively, (the symbol D8～D15) transmit to local storage 29 DMA by L-DMA controller 413 of the record data after the expansion of storing in the B face.The A face of buffer 281 has been stored record data after 8 words launch (symbol D16～D23) if be expert at, then in next clock (symbol C21), confirm that by data transmission device 283 confirms that the record data after the storage of A face launches (during symbol D16～D23), have been stored in 8 word record data (the symbol D8～D15) whether transmitted 8 words by L-DMA controller 413 DMA of B face one side of row cache device 281.In the moment of clock C21, (symbol D8～D15) also do not transmitted 8 words to local storage 29 DMA is not so at this constantly, carry out the switching of the A face and the B face of row cache device 281 to be stored in record data after the expansion of B face one side.Then, moment of next clock (symbol C22) too, again in the moment of next clock (symbol C23), (symbol D8～full DMA of 8 words D15) is transferred to the state of local storage 29 to become record data after the expansion that is stored in B face one side.Then, in next clock (symbol C24), by buffer area face switching device shifter 282 face of storing the record data that launched by decoding scheme 28 is switched to the B face from the A face, simultaneously the face of the record data after local storage 29 DMA transmission expansion is switched to the A face from the B face.
Then in per 1 clock, 1 time 1 word stores the B face of row cache device 281 into to the record data that launched by decoding scheme 28 successively, stores 8 words (symbol D24～D31) in the B face into.Simultaneously, with in each clock, each 1 word is parallel to the record data that the storage of the B of row cache device 281 face launches successively, (the symbol D16～D23) transmit to local storage 29 DMA by L-DMA controller 413 of the record data after the expansion of storing in the A face.Below, by repeating same operation, parallel carrying out the record data that launch by decoding scheme 28 to the action of row cache device 281 storages with the action of the record data after the expansion that is stored in the row cache device 281 to local storage 29 DMA transmission.
Like this, can carry out simultaneously the record data after the expansion of 1 word to action that the one side side of row cache device 281 is stored successively and the action of the record data after launching being transmitted to local storage 291 1 words one word DMA in the another side side with 1 clock, can carry out in each clock the compression recording data of 1 word is launched, to the processing of local storage 29 transmission.In addition, by the buffer area face (A face and B face) with 1 clock switch line buffer 281, the data transfer delay that the switching owing to the buffer area face is produced is a Min..When the moment that the one side side of the buffer 281 of being expert at has been stored the record data that 8 words launch by decoding scheme, confirming to be stored in the 8 word record data of another side side of row cache device 281, whether DMA has transmitted 8 words.In view of the above, can prevent from reliably to be stored in that record data DMA is covered by other record data before being transferred to local storage 29 after the expansion in the row cache device 281.
Figure 10 and Figure 11 pattern ground have represented that in DECU41 inside compression recording data is launched by decoding scheme 28 usefulness hardware, to 281 storages of row cache device.In addition, represented to Figure 12 pattern the record data after launching are transmitted and storage to local storage 29 from row cache device 281.
In this embodiment, compression recording data is compressed by the run length compress mode.The run length compress mode is well-known data compression mode, following simple declaration.The run length packed data is the packed data of byte boundary, and counting (1 byte) and data (1 byte or multibyte) become 1 group.Be that the run length packed data becomes at first be counting, necessarily have the structure of data then.Count value is that (negative constant) is 80H when above more than 128, mean the data of next byte of repetition and launch, by deducting the number that count value obtains from 257, repeat this counting next byte data and launch.And when count value be to be 7FH when following below 127, mean and after this counting, do not repeat that what follow is the data that remain untouched and launch, add 1 byte number of obtaining by this count value, do not repeat and remain untouched and launch the later data of this counting.
Below, enumerate an example of run length packed data, illustrate that this packed data is launched by decoding scheme 28, store in the row cache device 281, store record data stream the local storage 29 into from row cache device 281.
In the FIFO of reception buffer 42 storer 425 (primary memory), as shown in the figure, storing the record data of 24 words (48 byte) the run length compression that begins from FEH.Record data one word one word of run length compression i.e. 2 bytes, 2 bytes transmits to decoding scheme 28 DMA via the second private bus IB2, after being launched by hardware, stores in the row cache device 281.In this embodiment, the start address data of run length packed data is an even address, and the start address data of the data bitmap (view data) of local storage 29 1 sides is an even address.In addition, be 16 bytes from row cache device 281 to the byte number (byte number of 1 row) of local storage 29 DMA data block transmitted.In addition, in the row cache device 281 of primary memory shown in Figure 10, DECU41 inside, the local storage 29 shown in Figure 12, left upper end is an even address, from left to right, becomes the high address in order.
Below, a word one word illustrates in order.At first, from the FIFO storer 425 of reception buffer 42, (FEH is 01H) to decoding scheme 28 DMA of DECU41 inside transmission (transmission S1) for the compression recording data of 1 initial word.FEH is a counting, and 01H is data.The value FEH=254 of counting, because be more than 128, so 257-254=3 time, repeating data 01H and launching, a byte one byte is stored in A face one side of row cache device 281 successively.Then, to be transferred to the run length packed data in the decoding scheme 28 be 03H, 02H (transmission S2) to DMA.03H is a counting, and 02H is data.The value 03H=3 of counting is because be below 127, so begin to have the 3+1=4 byte not repeat and the data launched from next data of this counting.Promptly count the later data 02H of 03H, 78H, 55H, 44H and do not repeat, the expansion of remaining untouched, be stored in successively in the A face of row cache device 281 (transmission S2～S4).The FBH of a high position one side (odd address one side) of the digital data of DMA transmission is a counting in transmission S4, and the data of next byte repeat six times (257-251=6) and launch.
Then, the record data that are transferred to the compression of decoding scheme 28 from FIFO storer 425 DMA are FFH, FEH (transmission S5).The FFH of low order address one side (even address one side) is data, is the data of counting FBH before.Therefore, repeat FFH six times and launch, store A face one side of row cache device 281 successively into.In addition, the FEH of high address one side (odd address one side) is a counting, repeats the data 3 times (257-254=3) of next byte and launches.
Then, the record data that are transferred to the compression of decoding scheme 28 from FIFO storer 425 DMA are 11H, 06H (transmission S6).The 11H of low order address one side (even address one side) is data, is the data of counting FEH before.Therefore, repeat 11H three times and launch, store A face one side of row cache device 281 successively into.In addition, the 06H of high address one side (odd address one side) is a counting, data of 7 bytes (6+1=7) (66H, 12H, 77H, 45H, 89H, 10H, 55H) after not repeating and intactly launching store B face one side (the transmission S7～S10) of row cache device 281 successively into.
And launch moment (transmitting the moment of S6) of processing controller 412 record data after the i.e. expansion of 16 bytes of byte number that A face one side of the buffer 281 of being expert at has been stored 1 row, the data block of 16 bytes as 1 row, 1 word, 1 word transmits to local storage 29 DMA.At this moment, L-DMA controller 413 record data after the expansion of 1 row occupied local bus LB before local storage 29 DMA end of transmissions, carry out burst transmissions (transmission W1).The record data that are transferred to 1 row of local storage 29 are beginning with the even address, from low order address are, 1 word, 1 word stores in the given bit map area of local storage 29 (Figure 12 (a)) successively.
Then, the record data that are transferred to the compression of decoding scheme 28 from FIFO storer 425 DMA are 10H, FAH (transmission S11).The 10H of low order address one side (even address one side) is data, is the data of counting FBH before.Therefore, repeat 10H six times and launch, store B face one side of row cache device 281 successively into.In addition, the FAH of high address one side (odd address one side) is a counting, repeats the data 7 times (257-250=7) of next byte and launches.Then, the record data that are transferred to the compression of decoding scheme 28 from FIFO storer 425 DMA are 20H, 08H (transmission S12).The 20H of low order address one side (even address one side) is data, is the data of counting FAH before.Therefore, repeat 20H seven times and launch, store B face one side of row cache device 281 successively into.In addition, the 08H of high address one side (odd address one side) is a counting, data of 9 bytes (8+1=9) (12H, 13H, 14H, 15H, 16H, 17H, 18H, 19H, 20H) after not repeating and intactly launching store A face one side (the transmission S13 of Figure 11～S17) of row cache device 281 successively into.
And be expert at moment (moment of transmission S12) of record data after the i.e. expansion of 16 bytes of byte number that B face one side of buffer 281 stored 1 row when launching processing controller 412, the data block of 16 bytes as 1 row, 1 word, 1 word transmits to local storage 29 DMA.At this moment, L-DMA controller 413 record data after the expansion of 1 row occupied local bus LB before local storage 29 DMA end of transmissions, carry out burst transmissions (transmission W2).The record data that are transferred to 1 row of local storage 29 are beginning with the even address, from low order address are, 1 word, 1 word stores in the given bit map area of local storage 29 (Figure 12 (b)) successively.
Then, the record data that are transferred to the compression of decoding scheme 28 from FIFO storer 425 DMA are 11H, 02H (transmission S18).The 11H of low order address one side (even address one side) is data, is the data of counting FDH before (high address one side of transmission S17).Therefore, repeat 11H three times (257-254=3) and launch, store A face one side of row cache device 281 successively into, reach moment of 16 bytes in the storage data of A face one side, remaining data store B face one side successively into.In addition, the 02H of high address one side (odd address one side) is a counting, data of 3 bytes (2+1=3) (98H, B0H, F2H) the repetition after and intactly launching, and B face one side that stores row cache device 281 successively into (is transmitted S19～S20).
And launch moment (transmitting the moment of S18) of processing controller 412 record data after the i.e. expansion of 16 bytes of byte number that A face one side of the buffer 281 of being expert at has been stored 1 row, the data block of 16 bytes as 1 row, 1 word, 1 word transmits to local storage 29 DMA.At this moment, L-DMA controller 413 (Fig. 6) record data after the expansion of 1 row occupied local bus LB before local storage 29 DMA end of transmissions, carry out burst transmissions (transmission W3).The record data that are transferred to 1 row of local storage 29 are beginning with the even address, from low order address are, 1 word, 1 word stores in the given bit map area of local storage 29 (Figure 12 (c)) successively.
Then, the record data that are transferred to the compression of decoding scheme 28 from FIFO storer 425 DMA are ABH, 03H (transmission S21).The ABH of low order address one side (even address one side) is data, is the data of counting FCH before (high address one side of transmission S20).Therefore, repeat ABH five times (257-252=5) and launch, store B face one side of row cache device 281 successively into.In addition, the 03H of high address one side (odd address one side) is a counting, data of 4 bytes (3+1=3) (FFH, FEH, FCH, FDH) the repetition after and intactly launching, and B face one side that stores row cache device 281 successively into (is transmitted S22～S23).
Then, the record data that are transferred to the compression of decoding scheme 28 from FIFO storer 425 DMA are FEH, FFH (transmission S24).The FEH of low order address one side (even address one side) is a counting, and high address one side (odd address one side) FFH is the data of counting FEH.Therefore, repeat FFH three times (257-254=3) and launch, store B face one side of row cache device 281 successively into.And after the i.e. expansion of 16 bytes of byte number that B face one side of the buffer 281 of being expert at has been stored 1 row the moment (moment of transmission S24) of record data, as 1 capable data block, 1 word, 1 word transmits to local storage 29 DMA 16 bytes.At this moment, L-DMA controller 413 record data after the expansion of 1 row occupied local bus LB before local storage 29 DMA end of transmissions, carry out burst transmissions (transmission W4).
The record data that are transferred to 1 row of local storage 29 are beginning with the even address, from low order address are, 1 word, 1 word stores in the given bit map area of local storage 29 (Figure 12 (d)) successively.And, when in local storage 29, having stored 1 main sweep circulation, spraying the record data of data bitmap part of ink, transmit to record-header 62 DMA from local storage 29.
At this moment, the 2nd I-DMA controller 415 occupied local bus LB and carries out burst transmissions before the record data that transmitted the data bitmap part of spraying ink in 1 main sweep circulation to a control part 33 DMA.
Like this, by launched by decoding scheme 28 usefulness hardware by the processing of program in the past, can carry out the expansion of the record data of compression at a high speed and handle with the record data of software expansion compression.In addition, because the compression recording data that launches by program 1 byte 1 byte is launched with word unit's (2 byte) in the past, the expansion of the record data that can compress is more at a high speed handled.And, by have 2 of system bus SB and local bus LB etc. independently bus, be connected the structure of the local storage 29 on the local bus LB, can carry out from local storage 29 to record-header 62 data transmission with system bus SB one side in local bus LB one side asynchronously.In view of the above, can not take place because from MPU24 to ROM21 or the visit of RAM22 etc., be interrupted to the transmission of the record data of record-header 62, produce the transmission delay of record data, the record execution speed descends.By the DMA transmission, more high-speed data transmission becomes possibility.
In addition, undertaken by reception buffer 42: handled with the title analysis of the record control data of software processes by program in the past; , from the record control data separation order order is stored to command storing register 426 according to the title analysis result, the processing of compression recording data to 425 storages of FIFO storer.And, interface portion 27 is transmitted to reception buffer 42 by the record control data that the first private bus IB1 receives, the record control data in the FIFO storer 425 that is stored in reception buffer 42 by the second private bus IB2 is separated into remote command and compression recording data.And, only compression recording data is transmitted to DECU41, the record data after being launched by decoding scheme 28 are transmitted to a control part 33 by the 3rd private bus IB3.Analyze order and remote command with MPU24.In view of the above, can reduce the data transmission load of system bus SB and the processing load of MPU24 significantly, so the data transmission extremely low to the interdependency of MPU24 becomes possibility, make between interface portion 27 and the reception buffer 42, the high speed more of the data transmission and processing between reception buffer 42 and the DECU41, between DECU41 and the record-header 62.
DECU41 is for the row cache device 281 with two sides buffer areas such as A face and B faces, per 8 words to the record data that launch by decoding scheme 28, alternately switch the face of storage data, the record data that storage launches launch the processing of the record data of the feasible expansion of boil down to so can unrestrictedly carry out continuously by decoding scheme 28.In addition, parallel with the processing of the record data that launch by decoding scheme 28 to row cache device 281 storage, with the face of storage by the opposite side of face of the record data of decoding scheme 28 expansion in record data after the expansion of having stored transmit to local storage 29 DMA.Therefore, can simultaneously parallelly continuously launch the processing of record data of the feasible expansion of boil down to and the processing of the record data that launch to local storage 29 DMA transmission, so can carry out the record data that launch the feasible expansion of boil down to extreme efficiency, to the processing of local storage 29 DMA transmission.
Like this, because can realize that the high speed of packed data launch to be handled and,, tremendous raising be arranged so the record execution speed of inkjet recording device 50 is compared with the past to the high speed data transfer of record-header 62.In addition,, then no matter carry out what kind of high speed data transfer, also can only obtain the record execution speed of the data-handling capacity of record-header 62, so be necessary to dispose record-header 62 certainly with enough processing poweies if the data-handling capacity of record-header 62 is low.
In addition, the present invention is not limited to described embodiment, in the invention scope of describing in the scope of claim, various distortion can be arranged, and they are also contained in the scope of the present invention certainly.
Claims (5)
1. the data transmission device of a liquid ejection data comprises decoding unit, and this decoding unit has:
Can be with hardware the decoding scheme of the liquid ejection data expansion that is compressed to feasible expansion;
The row cache device of the liquid ejection data that launches by described decoding scheme with the storage of word unit;
Be compressed to the packed data input media of the liquid ejection data of feasible expansion to described decoding scheme transmission from the outside,
It is characterized in that:
Described decoding unit has following structure: described row cache device has the buffer area that can store the expanding data of given number of words on the two sides, in the one side side liquid ejection data that is launched by decoding scheme is stored successively, in the moment of the expanding data of having stored given number of words, will continue to store into successively the another side side by the liquid ejection data that described decoding scheme launches;
When the liquid ejection data that is launched by decoding scheme stored in one side side 1 word 1 word, simultaneously the liquid ejection data that launches to finish in the another side side is transmitted to described external memory storage 1 word 1 word.
2. the data transmission device of liquid ejection data according to claim 1 is characterized in that:
Described decoding unit has following structure: comprise the device of the liquid ejection data that launches to finish in described row cache device to described external memory storage 1 word 1 word DMA transmission, the expanding data of 1 word is stored into the action, synchronous to the action and the work clock of described external memory storage 1 word 1 word DMA transmission the liquid ejection data that launches in the another side side to finish of the one side side of described row cache device successively, in per 1 clock, carry out simultaneously.
3. the data transmission device of liquid ejection data according to claim 2 is characterized in that:
Described decoding unit has: switch liquid ejection data that the expansion of buffer area face, the storage of the liquid ejection data that storage launches by the described decoding unit circuit of described row cache device the finishes buffer area face switching device shifter to the buffer area face of described external memory storage DMA transmission with clock.
4. according to the data transmission device of claim 2 or 3 described liquid ejection datas, it is characterized in that:
Described decoding unit has: when the moment of having launched the liquid ejection data of given number of words in the one side side, confirm that with clock the data transmission of launching the liquid ejection data that finishes in the another side side from given number of words to described external memory storage DMA that transmitted confirms device.
5. liquid injection apparatus with data transmission device of any described liquid ejection data in the claim 1～4.
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2003207085 | 2003-08-11 | ||
| JP2003207085 | 2003-08-11 |
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| CN1581115A true CN1581115A (en) | 2005-02-16 |
| CN1310158C CN1310158C (en) | 2007-04-11 |
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| Application Number | Title | Priority Date | Filing Date |
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| CNB031553087A Expired - Fee Related CN1310158C (en) | 2003-08-11 | 2003-08-26 | A data transferring apparatus for transferring liquid ejection data and a liquid ejecting apparatus |
| CNU032053894U Expired - Lifetime CN2655535Y (en) | 2003-08-11 | 2003-08-26 | Data transmission apparatus of liquid injecting data, liquid injecting apparatus |
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| CNU032053894U Expired - Lifetime CN2655535Y (en) | 2003-08-11 | 2003-08-26 | Data transmission apparatus of liquid injecting data, liquid injecting apparatus |
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| Country | Link |
|---|---|
| US (1) | US7188197B2 (en) |
| EP (1) | EP1507213B1 (en) |
| CN (2) | CN1310158C (en) |
| AT (1) | ATE344945T1 (en) |
| DE (1) | DE60309588T2 (en) |
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| JP2007101687A (en) * | 2005-09-30 | 2007-04-19 | Fujifilm Corp | Drawing device, drawing method, data structure and recording medium, and data processing device and processing method |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4520455A (en) * | 1982-05-10 | 1985-05-28 | Xerox Corporation | Printing system |
| JPS5980063A (en) * | 1982-10-30 | 1984-05-09 | Nec Corp | Coding circuit of facsimile |
| EP0229379A3 (en) * | 1985-12-23 | 1989-12-20 | Nec Corporation | Digital picture signal coding/decoding circuit |
| US4918624A (en) * | 1988-02-05 | 1990-04-17 | The United States Of America As Represented By The United States Department Of Energy | Vector generator scan converter |
| JP3251053B2 (en) * | 1992-05-29 | 2002-01-28 | 富士通株式会社 | Data communication method |
| US5604846A (en) * | 1994-10-13 | 1997-02-18 | Brother Kogyo Kabushiki Kaisha | Printer and method for developing print data |
| US5937152A (en) * | 1996-04-16 | 1999-08-10 | Brother Kogyo Kabushiki Kaisha | Printer with buffer memory |
| US5884050A (en) * | 1996-06-21 | 1999-03-16 | Digital Equipment Corporation | Mechanism for high bandwidth DMA transfers in a PCI environment |
| US6526518B1 (en) * | 1997-05-22 | 2003-02-25 | Creative Technology, Ltd. | Programmable bus |
| AUPP702498A0 (en) * | 1998-11-09 | 1998-12-03 | Silverbrook Research Pty Ltd | Image creation method and apparatus (ART77) |
-
2003
- 2003-08-26 CN CNB031553087A patent/CN1310158C/en not_active Expired - Fee Related
- 2003-08-26 AT AT03018741T patent/ATE344945T1/en not_active IP Right Cessation
- 2003-08-26 EP EP03018741A patent/EP1507213B1/en not_active Expired - Lifetime
- 2003-08-26 DE DE60309588T patent/DE60309588T2/en not_active Expired - Lifetime
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| EP1507213B1 (en) | 2006-11-08 |
| EP1507213A2 (en) | 2005-02-16 |
| EP1507213A3 (en) | 2005-09-07 |
| DE60309588D1 (en) | 2006-12-21 |
| CN2655535Y (en) | 2004-11-10 |
| US7188197B2 (en) | 2007-03-06 |
| DE60309588T2 (en) | 2007-09-13 |
| CN1310158C (en) | 2007-04-11 |
| ATE344945T1 (en) | 2006-11-15 |
| US20050038929A1 (en) | 2005-02-17 |
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