CN1570737A - Circuit layout method of polycrystalline silicon thin-film transistor (p-SiTFT) liquid crystal display - Google Patents
Circuit layout method of polycrystalline silicon thin-film transistor (p-SiTFT) liquid crystal display Download PDFInfo
- Publication number
- CN1570737A CN1570737A CN 03147277 CN03147277A CN1570737A CN 1570737 A CN1570737 A CN 1570737A CN 03147277 CN03147277 CN 03147277 CN 03147277 A CN03147277 A CN 03147277A CN 1570737 A CN1570737 A CN 1570737A
- Authority
- CN
- China
- Prior art keywords
- drive circuit
- data line
- polycrystalline sitft
- clock signal
- circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Images
Abstract
A circuit layout method for polysilicon thin film transistor LCD display which comprises a panel, multiple display units; time sequence control circuit generating time sequence signals and multiple logic circuits which can control the operations of display units according to time sequence signals. The method in this invention determines the position formed by time sequence circuit in the panel to make the time lag is less than 10#+[-6] seconds from time sequence signals to multiple logic circuits.
Description
Technical field
The present invention is about a kind of circuit arrangement method of polycrystalline SiTFT LCD, refer in particular to a kind of position of sequential control circuit in liquid crystal panel that determines the polycrystalline SiTFT LCD, with the method for the image display quality that promotes this polycrystalline SiTFT LCD.
Background technology
LCD has that external form is light, thin, power consumption is few and characteristic such as radiationless pollution, be widely used on the portable information products such as mobile computer (notebook), PDA(Personal Digital Assistant), even existing cathode-ray tube (CRT) (cathode ray tube, CRT) trend of monitor that replaces traditional desktop PC gradually.Because liquid crystal molecule is under different ordered states, light had different polarizations or refraction effect, therefore can control the transmission amount of light via the liquid crystal molecule of different ordered states, further produce the output light of varying strength, and LCD promptly is to utilize this specific character of liquid crystal molecule to produce red, blue, the green glow of different gray scales, further makes LCD produce abundant image.
LCD on the market can be divided into amorphous silicon film transistor LCD (amorphous silicon Thin Film Transistor Liquid Crystal Display mostly at present, a-TFT LCD) with polycrystalline SiTFT LCD (polysilicon Thin Film Transistor Liquid CrystalDisplay, polysilicon TFT LCD) these two kind, and because of the polycrystalline SiTFT LCD has display characteristic preferably than amorphous silicon film transistor LCD, so the polycrystalline SiTFT LCD often is used on the occasion that display quality is had higher requirements.Traditionally, the driving circuit that is used to control the operation of polycrystalline SiTFT LCD is to make with integrated circuit, and is pressed together on its liquid crystal panel.Yet, improvement along with manufacturing technology, present driving circuit and interface circuit that can the polycrystalline SiTFT LCD is relevant, all the form with the polycrystalline SiTFT liquid crystal is integrated on the panel, and also reduces the production cost of polycrystalline SiTFT LCD whereby significantly.
Generally, usually include a sequential control circuit (timing control circuit) as above-mentioned this complete or collected works' accepted way of doing sth polycrystalline SiTFT LCD, be used to control the operation of the various logic circuitry on the polycrystalline SiTFT LCD, yet because of the position of its sequential control circuit of polycrystalline SiTFT LCD in liquid crystal panel of routine optimization not, so its shown image quality is easily because of clock signal asynchronous (clock skew) deterioration.Please refer to Fig. 1, Fig. 1 is the synoptic diagram of conventional polycrystalline SiTFT LCD 10.Polycrystalline SiTFT LCD 10 includes a panel 12, and polycrystalline SiTFT LCD 10 relevant driving circuit and interface circuits are formed in the panel 12.Polycrystalline SiTFT LCD 10 also includes a viewing area 14, one first data line drive circuit 16A, one second data line drive circuit 16B, one scan line drive circuit 18, altogether with electrode drive circuit 20, one sequential control circuit 22, one interface circuit 24 and a Connection Element 26, wherein the viewing area 14, the first data line drive circuit 16A, the second data line drive circuit 16B, scan line drive circuit 18, common electrode drive circuit 20, sequential control circuit 22 and interface electricity 24 all are formed in the panel 12 with the form of polycrystalline SiTFT, and Connection Element 26 then is connected to panel 12.
Polycrystalline SiTFT LCD 10 receives picture signal Si by Connection Element 26 from the external world, picture signal Si can be sent to other logical circuits of polycrystalline SiTFT LCD 10 via interface circuit 24 afterwards, so that viewing area 14 demonstrates the image that is comprised among the picture signal Si.Viewing area 14 includes a plurality of visualization unit, each visualization unit is a pixel (pixel) or one pixel (sub-pixel) that is used for constituting picture, and visualization unit is subjected to the driving of the first data line drive circuit 16A, the second data drive circuit 16B and scan line drive circuit 18.In addition, common electrode drive circuit 20 is used to provide uses voltage altogether, to accelerate the renewal speed of the shown picture in viewing area 14, and sequential control circuit 22 is used to produce a clock signal SA, and wherein the first data line drive circuit 16A, the second data line drive circuit 16B, scan line drive circuit 18 and interface circuit 24 are operated according to the clock signal SA that sequential control circuit 22 is produced.Yet, as mentioned above, because of the position of sequential control circuit 22 in panel 12 optimization not, so the shown image quality of polycrystalline SiTFT LCD 10 is easily because of the asynchronous deterioration of clock signal.Please refer to Fig. 1 and Fig. 2, Fig. 2 is the sequential chart of the clock signal SA of Fig. 1 polycrystalline SiTFT LCD 10, and wherein Fig. 2 represents respectively that from top to bottom clock signal SA is at sequential control circuit 22 places, at the first data line drive circuit 16A place and at the waveform at the second data line drive circuit 16B place.As shown in Figure 1, clock signal SA is sent to the first data line drive circuit 16A via one first transmission line 28A, and be sent to the second data line drive circuit 16B via one second transmission line 28B, yet because of the length of the first transmission line 28A length greater than the second transmission line 28B, so as shown in Figure 2, clock signal SA be passed to the first data line drive circuit 16A time delay (delay time) T1 and clock signal SA be passed to the second data line drive circuit 16B time delay T2 can be by institute's difference, and when time delay, T1 and T2 time delay difference t between the two were greater than a certain permissible time interval, then can make viewing area 14 shown pictures produce the phenomenon of flicker.
Summary of the invention
Therefore, purpose of the present invention promptly is to provide a kind of circuit arrangement method of polycrystalline SiTFT LCD, to solve the above problems.
The polycrystalline SiTFT LCD of implementing according to method of the present invention includes the sequential control circuit that a panel, a plurality of display unit, are used to produce clock signal, and a plurality of logical circuit.Display unit, sequential control circuit and logical circuit all are formed in the panel, and logical circuit can be controlled the operation of display unit according to clock signal.Method of the present invention is to be formed on position in the panel by the decision sequential control circuit so that clock signal be passed to each logical circuit time delay difference therebetween less than 10
-6Second.Therefore, compare with the polycrystalline SiTFT LCD of routine, the polycrystalline SiTFT LCD of implementing according to method of the present invention is difficult for the nonsynchronous situation of clock signal takes place, and then can promote the image quality of polycrystalline SiTFT LCD.
Description of drawings
Fig. 1 is the synoptic diagram of conventional polycrystalline SiTFT LCD.
Fig. 2 is the sequential chart of the clock signal of Fig. 1 polycrystalline SiTFT LCD.
Fig. 3 is the synoptic diagram according to the polycrystalline SiTFT LCD of method enforcement of the present invention.
Fig. 4 is the circuit diagram of the viewing area of Fig. 3 polycrystalline SiTFT LCD.
Fig. 5 is the sequential chart of the clock signal of Fig. 3 polycrystalline SiTFT LCD.
The reference numeral explanation
10,50 polycrystalline SiTFT LCD, 12,52 panels
14,54 pixel formula 16A, 56A first data line drive circuit
16B, 56B second data line drive circuit 18,58 scan line drive circuits
20,60 common electrode drive circuit, 22,62 sequential control circuits
24,64 interface circuits, 26,66 Connection Elements
The 68A first transmission line 68B second transmission line
First group of 70 visualization unit, 72 data line
Second group of 76 sweep trace of 74 data lines
78 data lines
Embodiment
Please refer to Fig. 3 and Fig. 4, Fig. 3 is that Fig. 4 is the circuit diagram of the viewing area 54 of Fig. 3 polycrystalline SiTFT LCD 50 according to the synoptic diagram of the polycrystalline SiTFT LCD 50 of method enforcement of the present invention.Identical with conventional polycrystalline SiTFT LCD 10, polycrystalline SiTFT LCD 50 also includes a panel 52, and polycrystalline SiTFT LCD 50 relevant driving circuit and interface circuits are formed in the panel 52.Polycrystalline SiTFT LCD 50 also includes a viewing area 54, one first data drive circuit 56A, one second data drive circuit 56B, one scan line drive circuit 58, altogether with electrode drive circuit 60, one sequential control circuit 62, one interface circuit 64 and a Connection Element 66, wherein the viewing area 54, the first data line drive circuit 56A, the second data line drive circuit 56B, scan line drive circuit 58, common electrode drive circuit 60, sequential control circuit 62 and interface circuit 64 all are formed in the panel 52 with the form of polycrystalline SiTFT, and Connection Element 66 then is connected to panel 52.
Polycrystalline SiTFT LCD 50 can receive picture signal Si by Connection Element 66 from the external world, picture signal Si can be sent to other logical circuits of polycrystalline SiTFT LCD 50 by interface circuit 64 afterwards, so that viewing area 54 demonstrates the image that is comprised among the picture signal Si.As shown in Figure 4, viewing area 54 includes a plurality of visualization unit 70, each visualization unit 70 is a pixel (pixel) or one pixels (sub-pixel) that are used for constituting picture, and each visualization unit 70 includes a polycrystalline SiTFT Tr and a liquid crystal cell 80, and liquid crystal cell 80 can change its video picture characteristic because of the conduction status of polycrystalline SiTFT Tr.In addition, polycrystalline SiTFT LCD 50 also includes multi-strip scanning line (scan lines) 76 and many data lines (data lines) 78, and all sweep traces 76 and data line 78 all are connected to display unit 70.Data line 78 is divided into one first group 72 and 1 second group 74, wherein the data line 78 in first group 72 is connected to the first data line drive circuit 56A, and the data line 78 in second group 74 then is connected to the second data line drive circuit 56B and arranges alternately with first group 72 data line 78.As shown in Figure 4, the data line 78 that is denoted as DAm, DAm+1 belongs to first group 72, and the data line 78 that is denoted as DBm, DBm+1 belongs to second group 74.In addition, sweep trace 76 is connected to scan line drive circuit 58, scan line drive circuit 58 can be controlled the conducting of polycrystalline SiTFT Tr by sweep trace 76, and when polycrystalline SiTFT Tr conducting, the liquid crystal cell 80 of visualization unit 70 promptly can show corresponding display characteristic because of the voltage on the data line 78 that is connected.In addition, common electrode drive circuit 60 is used to provide altogether, and electricity consumption is pressed on visualization unit 70, speed when changing imaging modality to accelerate visualization unit 70, sequential control circuit 62 then is to be used to produce a clock signal SA, and wherein the first data line drive circuit 56A, the second data line drive circuit 56B, scan line drive circuit 58 and the interface circuit 64 clock signal SA that can be produced according to sequential control circuit 62 operates.
Different with conventional polycrystalline SiTFT LCD 10 is, the position of sequential control circuit 62 in panel 52 of polycrystalline SiTFT LCD 50 is through considering especially and calculating, and the clock signal SA that makes sequential control circuit 62 be produced be passed to other logical circuits in the panel 52 time delay difference therebetween less than a predetermined time interval, with the position of optimization sequential control circuit 62 in panel 52.In addition, meet the demand of high image quality for making polycrystalline SiTFT LCD 50, above-mentioned predetermined time interval is to be set at 10
-6Second.For this point is described, please refer to Fig. 3 and Fig. 5, Fig. 5 is the sequential chart of the clock signal SA of Fig. 3 polycrystalline SiTFT LCD 50, and wherein Fig. 5 has represented respectively that from top to bottom clock signal SA is at sequential control circuit 62 places, at the first data line drive circuit 56A place and at the waveform at the second data line drive circuit 56B place.As shown in Figure 3, sequential control circuit 62 is arranged between the first data line drive circuit l6A and the second data line drive circuit 16B, and be connected to the first data line drive circuit 16A and the second data line drive circuit l6B by one first lead 68A and one second lead 68B respectively, and wherein the first lead 68A and one second lead 68B are almost isometric, so as shown in Figure 5, clock signal SA be passed to the first data line drive circuit 56A time delay T1 and clock signal SA to be passed to T2 time delay of the second data line drive circuit 56B almost equal.Therefore, polycrystalline SiTFT LCD 50 can't as conventional polycrystalline SiTFT LCD 10 can because of time delay T1 and T2 time delay difference t between the two excessive, and the situation of generation film flicker.
What need special instruction is, clock signal SA can cause the reason of delay when transmitting be that the transmission line (as: transmission line 68A, 68B) that transmits clock signal SA itself has resistance value, add its two ends and can produce stray capacitance (parasite capacitor), so can make transmission line can produce so-called resistance capacitance (RC) effect, and cause the delay phenomenon of clock signal SA.In addition; calculate time delay that transmission line may cause for convenient; usually can be represented with the equivalent resistance (equivalent resistance) and the equivalent capacitance value (equivalent capacitance) of transmission line, and unit ohm (Ω) of resistance multiply by electric capacity unit farad (F) back gained unit for second.Generally, if the product of the equivalent resistance of transmission line and equivalent capacitance value is big more, the clock signal SA that it caused time delay will be long more.When the product difference therebetween of the equivalent resistance of each transmission line and equivalent capacitance value less than 10
-6Second the time, then clock signal SA be passed to each logical circuit (as: the first data line drive circuit 56A, the second data line drive circuit 56B) in each panel 52 time delay difference therebetween also can be less than 10
-6Second, and its result can make image quality be not easy because of the asynchronous deterioration of clock signal.So when decision sequential control circuit 62 is formed on position in the panel 52, except can deciding, also can be determined by the equivalent resistance and the equivalent capacitance value of transmission line by the length of transmission line.
Compare with the polycrystalline SiTFT LCD of routine, the position of its sequential control circuit of polycrystalline SiTFT LCD in panel of implementing according to the inventive method can be given optimization, so the clock signal that produced of this sequential control circuit be passed to a plurality of logical circuits in this panel time delay difference therebetween less than a predetermined time interval, so the image quality of polycrystalline SiTFT LCD is difficult for because clock signal is asynchronous deterioration, also thereby can show the picture that image quality is preferable.
The above only is preferred embodiment of the present invention, and all equivalences of making according to claim of the present invention change and revise, and all should belong to covering scope of the present invention.
Claims (5)
1. the circuit arrangement method of a polycrystalline SiTFT LCD, this polycrystalline SiTFT LCD includes:
One panel;
A plurality of display units, each display unit includes at least one polycrystalline SiTFT;
One sequential control circuit is used to produce a clock signal;
A plurality of logical circuits are used for controlling according to this clock signal the operation of these a plurality of display units;
This method includes:
Form these a plurality of display units in this panel;
Form these a plurality of logical circuits in this panel;
Determine this sequential control circuit to be formed on the position in the panel so that this clock signal be passed to these a plurality of logical circuits time delay difference therebetween less than 10
-6Second.
2. the method for claim 1, wherein this clock signal is to be sent to this a plurality of logical circuits by plurality of transmission lines respectively, and the product of the equivalent resistance of each transmission line and equivalent capacitance value difference therebetween is less than 10
-6Second.
3. the method for claim 1, wherein this polycrystalline SiTFT LCD also includes multi-strip scanning line and many data lines, this multi-strip scanning line and these a plurality of data lines all are connected to this a plurality of display units, and these a plurality of logical circuits include:
The one scan line drive circuit is connected to this multi-strip scanning line;
One first data line drive circuit is connected to one first group data line of many data lines;
One second data line drive circuit be connected to one second group data line of many data lines, and this data line of first group is to be staggered with this data line of second group.
4. method as claimed in claim 3, wherein this clock signal is to be sent to this first data line drive circuit and this second data line drive circuit by one first transmission line and second transmission line respectively, and wherein the difference between the product of the equivalent resistance of the product of the equivalent resistance of this first transmission line and equivalent capacitance value and this second transmission line and equivalent capacitance value is less than 10
-6Second.
5. the method for claim 1, wherein these a plurality of logical circuits include an interface circuit, are used for receiving and transmit a view data, so that these a plurality of display units are according to this manipulation of image data.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNB03147277XA CN1296753C (en) | 2003-07-11 | 2003-07-11 | Circuit layout method of polycrystalline silicon thin-film transistor (p-SiTFT) liquid crystal display |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNB03147277XA CN1296753C (en) | 2003-07-11 | 2003-07-11 | Circuit layout method of polycrystalline silicon thin-film transistor (p-SiTFT) liquid crystal display |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN1570737A true CN1570737A (en) | 2005-01-26 |
| CN1296753C CN1296753C (en) | 2007-01-24 |
Family
ID=34471889
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CNB03147277XA Expired - Lifetime CN1296753C (en) | 2003-07-11 | 2003-07-11 | Circuit layout method of polycrystalline silicon thin-film transistor (p-SiTFT) liquid crystal display |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN1296753C (en) |
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101369400B (en) * | 2007-03-28 | 2010-11-10 | 联咏科技股份有限公司 | Driving device used for display and its correlation method |
| CN103236241A (en) * | 2013-04-18 | 2013-08-07 | 京东方科技集团股份有限公司 | Display panel driving method, driving device and display device |
| CN103903571A (en) * | 2012-12-27 | 2014-07-02 | 乐金显示有限公司 | Backlight driver of liquid crystal display device and method of driving the same |
| CN104464663A (en) * | 2014-11-03 | 2015-03-25 | 深圳市华星光电技术有限公司 | Low-temperature polycrystalline silicon thin film transistor GOA circuit |
| WO2024000228A1 (en) * | 2022-06-29 | 2024-01-04 | 京东方科技集团股份有限公司 | Display apparatus, signal synchronization method therefor, and pixel circuit |
Family Cites Families (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP0382567B1 (en) * | 1989-02-10 | 1996-05-29 | Sharp Kabushiki Kaisha | Liquid crystal display device and driving method therefor |
| KR0163931B1 (en) * | 1995-12-05 | 1999-03-20 | 김광호 | A lcd driving circuit |
| JP4188457B2 (en) * | 1998-07-21 | 2008-11-26 | 三菱電機株式会社 | Liquid crystal display |
| KR100796787B1 (en) * | 2001-01-04 | 2008-01-22 | 삼성전자주식회사 | Liquid crystal display system, panel and method for compensating gate line delay |
-
2003
- 2003-07-11 CN CNB03147277XA patent/CN1296753C/en not_active Expired - Lifetime
Cited By (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101369400B (en) * | 2007-03-28 | 2010-11-10 | 联咏科技股份有限公司 | Driving device used for display and its correlation method |
| CN103903571A (en) * | 2012-12-27 | 2014-07-02 | 乐金显示有限公司 | Backlight driver of liquid crystal display device and method of driving the same |
| US9218772B2 (en) | 2012-12-27 | 2015-12-22 | Lg Display Co., Ltd. | Backlight driver of liquid crystal display device and method of driving the same |
| CN103903571B (en) * | 2012-12-27 | 2016-04-06 | 乐金显示有限公司 | The backlight driver of liquid crystal indicator and driving method thereof |
| CN103236241A (en) * | 2013-04-18 | 2013-08-07 | 京东方科技集团股份有限公司 | Display panel driving method, driving device and display device |
| CN103236241B (en) * | 2013-04-18 | 2015-05-27 | 京东方科技集团股份有限公司 | Display panel driving method, driving device and display device |
| CN104464663A (en) * | 2014-11-03 | 2015-03-25 | 深圳市华星光电技术有限公司 | Low-temperature polycrystalline silicon thin film transistor GOA circuit |
| WO2024000228A1 (en) * | 2022-06-29 | 2024-01-04 | 京东方科技集团股份有限公司 | Display apparatus, signal synchronization method therefor, and pixel circuit |
Also Published As
| Publication number | Publication date |
|---|---|
| CN1296753C (en) | 2007-01-24 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN100388331C (en) | Method for driving display, driving circuit therefor, display, and electronic apparatus | |
| US8248340B2 (en) | Liquid crystal display capable of split-screen displaying and computer system using same | |
| CN101329484B (en) | Drive circuit and drive method of LCD device | |
| CN101393718B (en) | Gate driver and method of driving display apparatus having the same | |
| US9070332B2 (en) | Display device with a power saving mode in which operation of either the odd-line gate driver or the even-line gate driver is halted | |
| US8456400B2 (en) | Liquid crystal device and electronic apparatus | |
| CN106898324B (en) | A kind of display panel and display device | |
| CN102385205B (en) | Pixel structure | |
| TWI404048B (en) | Flat panel display | |
| CN1916706A (en) | Liquid crystal display device and driving method | |
| CN2627538Y (en) | Image signal supply circuit and electrooptical panel | |
| KR101361956B1 (en) | Liquid Crystal Display | |
| CN105931591B (en) | A kind of adjustment method of display panel | |
| CN109509446A (en) | Display module and display device | |
| US9972261B2 (en) | Liquid crystal display device and GOA circuit | |
| US20080158126A1 (en) | Liquid crystal display and driving method thereof | |
| CN105047155A (en) | Liquid crystal display apparatus and GOA scanning circuit | |
| CN1700294A (en) | Field sequential liquid crystal display and a driving method thereof | |
| CN1904678A (en) | LCD and its method | |
| CN1296753C (en) | Circuit layout method of polycrystalline silicon thin-film transistor (p-SiTFT) liquid crystal display | |
| CN101673526B (en) | Liquid crystal display device and related drive method | |
| CN100380189C (en) | Method for displaying liquid crystal display panel dynamic image | |
| CN102087447B (en) | Liquid crystal display device with double-gate-electrode drive architecture | |
| CN113035141A (en) | Display screen, display screen driving method and device, electronic equipment and storage medium | |
| CN101655626A (en) | Pixel structure |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| CX01 | Expiry of patent term | ||
| CX01 | Expiry of patent term |
Granted publication date: 20070124 |