CN1476017A - Rapid memory for loading transistor read out data using grid mutual coupling driving - Google Patents
Rapid memory for loading transistor read out data using grid mutual coupling driving Download PDFInfo
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- CN1476017A CN1476017A CNA021305293A CN02130529A CN1476017A CN 1476017 A CN1476017 A CN 1476017A CN A021305293 A CNA021305293 A CN A021305293A CN 02130529 A CN02130529 A CN 02130529A CN 1476017 A CN1476017 A CN 1476017A
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Abstract
In the storage, each memory unit can store one bit data and provide a driving current according it; the detective load unit can generate a detection voltage according to the driving current and a voltage; a reference voltage is generated by reference load unit as per the driving voltage; the big or small of the driving voltage is controlled by control circuit to drive abovesaid two load units for maintaining the detection voltage or the reference voltage at a certain value not to change following with the driving current; the value of abovesaid two voltage are compared by the comparator and bit data stored in memory unit can be judged according to it.
Description
Technical field
The invention provides a kind of storer, refer to especially in a kind of detecting amplifier that the transistor that drives with grid mutual coupling is as load and the short-access storage of reading of data.
Background technology
In the modernized information society of high development, can deal with data, the various microprocessor systems of integrate information, become the important foundation of information construction.And, can store numerical data with the storer that the electronics mode operates, and and where necessary the data of storage are read for microprocessor system utilization, be undoubtedly in the various microprocessor systems most important circuit knot and one of build.Especially short-access storage (flashmemory), it can store data in non-volatile mode, also only needing the electronics mode just to operate can read the data of storage fast efficiently, also wants the running ability access data of cooperative mechanical unlike light or magnetic storage media (similarly being magnetic disc or laser disc).Therefore, compact, the easy to operate efficient short-access storage of volume has been widely used in the various microprocessor systems; Such as various application chip system, mobile phone, personal digital aid (PDA), PC, camera or the like have all used short-access storage at large.
Please refer to Fig. 1.Fig. 1 is the circuit diagram of a known short-access storage 10.Storer 10 is provided with a memory array 14, is provided with a plurality of mnemons (drawing two mnemon 12A, 12B among Fig. 1 as representative) in the memory array 14, and each mnemon is used to store a collection of bit data; Corresponding to each mnemon, also be provided with a transistor Q5 as reference cell in the storer 10.And metal oxide semiconductor transistor Q1, Q2 in the storer 10, Q3, Q4, phase inverter 16A, 16B and comparer 18 then are organized as one and detect amplification module, are used for reading the data that each mnemon is stored.Wherein, as the transistor Q5 of reference cell, its grid drives biasing with the control voltage V0 of definite value, so that a fixing reference current Ip2 is provided between its source electrode, drain electrode.Transistor Q3 cooperates phase inverter 16A, with the grid voltage of the Voltage Feedback oxide-semiconductor control transistors Q3 of node Np3; In like manner, transistor Q4 also comes the grid voltage of FEEDBACK CONTROL transistor Q4 with phase inverter 16B.And transistor Q1, Q2 are used as load unit with the connection of diode form respectively, and wherein transistor Q1 detects load unit as one, and its drain electrode is electrically connected to memory array 14 in node Np1 by transistor Q3 with grid; Transistor Q2 then as a benchmark load unit, is electrically connected to transistor Q5 in node Np2 by transistor Q4.18 of comparers can be realized with a differential amplifier, two differential input terminal (indicating with "+", "-" among Fig. 1) is connected to node Np1, Np2, with the size of comparison node Np1, Np2 voltage, and read signal Sr by what its output terminal was exported a correspondence according to relatively result.In the storer 10 with bias voltage Vd as direct current biasing, low bias voltage Vg one is lower than another direct current biasing of bias voltage Vd; Low bias voltage Vg can hold the voltage (voltage of zero level just) of (ground) with being.
Each mnemon in storer 10 has identical basic circuit structure, with mnemon 12A is that example illustrates, in mnemon 12A, transistor Qm1 one has the metal oxide semiconductor transistor of a floating grid, controls its gate bias by a control voltage Vw1; Transistor Qa1 is then as an access transistor, and controls its gate bias by another control voltage Vb1.When transistor Qm1 storage data, the floating grid among the transistor Qm1 can be injected into the electric charge of different amounts, with the different data of correspondence.For instance, when the electric charge that injects transistor Qm1 floating grid more for a long time, can regard the bit data that it has stored " 1 " as; If it is less to inject the electric charge of transistor Qm1 floating grid, can regard the bit data that it has stored " 0 " as.The electric charge of injection transistor Qm1 floating grid how much, can influence the threshold voltage (threshold voltage) of transistor Qm1; With the example among Fig. 1, more as if the negative charge that is injected into p type metal oxide semiconductor transistor Qm1 floating grid, the absolute value of transistor Qm1 threshold voltage will diminish; And keep under certain situation at the control voltage Vw1 of transistor Qm1 grid, the negative charge in the floating grid is more, and the conducting degree of transistor Qm1 also can be bigger, and also just big more by the electric current between transistor Qm1 source electrode, drain electrode.In other words, Vw1 keeps under certain situation at transistor Qm1 grid-control voltage, and the size of current of transistor Qm1 institute energy conducting between its source electrode, drain electrode has just been represented the bit data of storing among the transistor Qm1.
When storer 10 will read the data of each mnemon, the size of current that can provide according to the transistor that has floating grid in each mnemon was exactly judged and is read this mnemon institute data bit stored.Be example once again with Fig. 1, suppose that storer 10 will read the bit data of storing among the mnemon 12A now, control voltage Vb1 will be with access transistor Qa1 conducting (turn on), and transistor Qm1 is under the gate bias of control voltage Vw1, will between its source electrode, drain electrode, provide a drive current Ip1 according to its floating grid stored charge amount; And drive current Ip1 will be injected into node Np3 by the access transistor Qa1 of conducting.At the same time, other mnemon (similarly being mnemon 12B) then can not provide electric current in memory array 14; With the mnemon 12B among Fig. 1 is example, and control voltage Vb21 can turn-off (turn off) with access transistor Qa2, makes mnemon 12B can not provide current to node Np3 and influences the data read to mnemon 12A.
After drive current Ip1 that mnemon 12A provides is injected into node Np3, can be injected into transistor Q1 by transistor Q3., after node Np1 accepts drive current Ip1, will set up one at node Np1 and detect voltage Vp1 as the transistor Q1 that detects load unit.In like manner, the transistor Q2 as the benchmark load unit then can set up a reference voltage V p2 in node Np2 behind the reference current Ip2 that receiving crystal pipe Q5 provides.Please continue reference map 2 (and while reference map 1).Fig. 2 is the voltage of two load units among Fig. 1, the synoptic diagram of current relationship, and its transverse axis is voltage swing, and the longitudinal axis then is a size of current.In the ordinary course of things, as the transistor Q1 that detects load unit and as the transistor Q2 of benchmark load unit transistor for coupling, after the connection configuration of these two transistors through the diode form, each transistor is separately in the voltage of its drain electrode (just node Np1, Np2) and the relation of drain current, just shown in curve 20.As previously mentioned, when mnemon 12A stored different bit data respectively, mnemon 12A can also provide the drive current that varies in size Ip1 respectively; As electric current I p1 (A), the Ip1 (B) that indicates among Fig. 2, just represent different bit data to distinguish two kinds of corresponding drive currents that size is different.And the drive current Ip1 (A) that varies in size, when Ip1 (B) is injected into transistor Q1 by node Np1, transistor Q1 just can follow the current-voltage relation of curve 20 and set up out detection voltage Vp1 (A) and the Vp1 (B) that varies in size at node Np1 respectively.Two kinds that may occur corresponding to node Np1 are detected voltage Vp1 (A), Vp2 (B), transistor Q5 then drives its grid with the control voltage V0 of definite value, so the reference current Ip2 of its generation sets up the reference voltage V p2 of definite value at node Np2 with regard to energy driving transistors Q2.Comparer 18 is detection voltage Vp1 (B) greater than reference voltage V p2 at the voltage of comparison node Np1 on earth, or behind the detection voltage Vp1 (A) less than reference voltage V p2, just can judge that the drive current Ip1 that mnemon 12A is provided is big or little equally, also just can judge the bit data of storing among the mnemon 12A, and produce the corresponding signal Sr that reads, reach the purpose of reading of data.
As for the transistor Q3 among Fig. 1, phase inverter 16A and transistor Q4, phase inverter 16B, then be respectively applied for the load effect of isolating memory array 14 and reference cell.Being electrically connected to the transistor Q3 between node Np1, Np3, the function of transistor Q3 is that the voltage with node Np3 is maintained at certain value as far as possible, is not subjected to node Np1 to detect the influence of change in voltage.Concerning transistor Q3 and detection amplification module, each mnemon in the memory array 14 is equivalent to a big equivalent capacity C0 (indicating as Fig. 1); If the voltage of node Np3 can change with node Np1, be equivalent to and discharge and recharge equivalent capacitor C 0.And by the drive current that mnemon provided, certainly will will tell one part of current to go equivalent capacitor C 0 is discharged and recharged, could change the voltage of node Np3; Thus, not only can influence data read, also will elongate the time that the process of reading is carried out, finish to wait for equivalent capacity C0 charging and discharging process.Therefore, the function of transistor Q3 is exactly to keep the voltage of node Np3, prevents that the heavy load of memory array equivalent capacity C0 from causing above-mentioned negative effect.And the principle of work of transistor Q3 can be summarized as follows.When the voltage of node Np3 raise, phase inverter 16A can reduce the gate bias of transistor Q3 accordingly, and the conducting degree of p type metal oxide semiconductor transistor Q3 is increased, and dragged down the voltage of node Np3.Relatively, if the voltage of node Np3 reduces, then phase inverter 16A can increase the gate bias of transistor Q3, allows the conducting degree of transistor Q3 reduce, and increases the voltage of node Np3.Via the FEEDBACK CONTROL of phase inverter 16A, the voltage of node Np3 just can roughly be maintained at certain value.
The shortcoming of known storer 10 can outline as follows.At first, because transistor Q1 and Q2 form respectively with the diode connected mode to detect load unit and benchmark load unit.Just as shown in Figure 2, concerning these two load units, its current-voltage curve is to present parabolic curve 20, its curve recessed to up (direction of arrow A 1 indication in as Fig. 2), even two kinds of different driving electric current I p1 (A) that this representative mnemon can provide, suitable current value difference is arranged between the Ip1 (B), correspond to detection voltage Vp1 (A) respectively through curve 20, behind the Vp1 (B), two voltage differences that detect between voltages are also not too large, make these two differences that detect voltages and reference voltage V p2 (the voltage difference dV1 that indicates among Fig. 2 just jointly, dV2) also can't enlarge.Because depending on comparer 18, the data read process of storer 10 can know the voltage swing that compares between detection voltage Vp1 and reference voltage V p2, if voltage difference dV1, dV2 are little, the noise immunity that reads in the process will reduce, and makes data read process to be subjected to noise easily and causes misreading.For instance, if voltage difference dV1 is too small, as long as there are some noises to invade node Np1, the detection voltage Vp1 (A) less than reference voltage V p2 will invade mistakenly greater than reference voltage V p2 because of noise originally, and causes comparer 18 to misread data among the mnemon 12A.
In addition, in known short-access storage 10, transistor Q1 and Q2 as load unit, its grid is subjected to the driven of node Np1, Np2 respectively, the driving situation of two transistor is isolated respectively, make these two transistors can be subjected to different noise effects respectively, make the comparer 18 of differential driving suffer dual noise effect easily.For instance, suppose that mnemon 12A provides drive current Ip1 (A), but node Np1 is subjected to a positive voltage interference of noise, makes the detection voltage Vp1 of node Np1 greater than the driving voltage Vp1 (A) that marks among Fig. 2; At the same time, node Np2 then is subjected to a negative voltage interference of noise, makes the reference voltage of node Np2 less than the reference voltage V p2 that marks among Fig. 2; So, reference voltage V p2 just probably becomes less than driving voltage Vp1, causes comparer 18 to think that data among the mnemon 12A are corresponding to drive current Ip1 (B) by mistake.
As previously mentioned, short-access storage generally has been used in various microprocessor systems.And in different microprocessor systems, the dc offset voltage Vd that can be supplied to short-access storage is difference to some extent also; In some computer system, may be able to supply the direct current biasing of 6 volts (volt), in other portable apparatus, may only can supply and be lower than 2 volts direct current biasing.Allow identical reservoir designs be applicable under the different bias operation environment, also just become one of target that the information industry makes great efforts.And one of shortcoming of known storer 10 is difficult to adapt to different operating environments exactly.For the explanation this point, please continue with reference to figure 3.Basically, shown in Figure 3 is exactly storer 10 among Fig. 1, but further comparer 18 and the exemplary embodiment of phase inverter 16A is drawn in the lump among Fig. 3.In Fig. 3, phase inverter 16A forms with the CMOS (Complementary Metal Oxide Semiconductor) transistor (CMOS) of n-type metal oxide semiconductor transistor Q11 and p type metal oxide semiconductor transistor Q12 tissue respectively; It is right that comparer 18 is then formed differential input by n-type metal oxide semiconductor transistor Q7, Q8, the current source 22 differential input that is used to setover is right, p type metal oxide semiconductor transistor Q9, Q10 read signal Sr then as active load in the single-ended taking-up of node Np6.And phase inverter 16A, comparer 18 also setover with dc offset voltage Vd and low dc offset voltage Vg.
As previously mentioned, the voltage of node Np3 can be maintained at certain value by transistor Q3, but because the size of this fixed value voltage is relevant with the biasing of memory array 14, no matter the size of bias voltage Vd why, the voltage of common node Np3 all only can be offset to certain value.But for the transistor Q12 among the phase inverter 16A, its gate bias is for fixing, but the bias voltage Vd of its source-biased can change with operating environment is different.So, under different bias operation environment, transistor Q12 also has significantly in each interpolar biasing situation and changes, and is difficult to phase inverter 16A is offset in the preferable biasing scope; And phase inverter 16B also has similar situation generation.In like manner, under different bias operation environment, the reference voltage V p2 of detection voltage Vp1, the node Np2 of node Np1 also roughly can remain in the certain limit and (can change even detect voltage Vp1, its change scope is the difference between different bias voltages under the various operating environments, and is still much smaller).Therefore, in comparer 18, it is certain that the biasing situation of transistor Q7, Q8 also can roughly keep.Relatively, by transistor Q9, the Q10 of its biasing of bias voltage Vd master control, the bias condition of its each utmost point will have violent change because of the different operating environment, also makes comparer 18 be difficult to be maintained at preferable biasing under different operating environments.More than all factors, make all that the design of known storer 10 is difficult to adapt to diverse operating environment; At specific operating environment, redesign specific circuit and just can make known storer operate as normal.Thus, will expend the time and the resource of more circuit design, manufacturing, the development that is unfavorable for short-access storage is with universal.
Summary of the invention
Therefore, fundamental purpose of the present invention is to provide a kind of storer of having grid mutual coupling service load unit in detecting amplification module, to overcome the shortcoming of known technology.
In the detection amplification module of known technology storer, be to be used as load unit with the transistor that the diode form connects, the electric current that provides according to mnemon and reference cell is set up out detection voltage and reference voltage respectively, and relatively detect voltage and reference voltage by comparer, with reading of data.Its current-voltage relation of the load unit that the diode form is formed by connecting is more undesirable, makes the voltage difference that detects between voltage and reference voltage be difficult for widening, and has reduced operation and noise immunity.And two load units that are connected to memory array and reference cell are isolated mutually, cause the double influence of noise easily.And known storer is relatively poor to the control ability of each node bias, makes known storer be difficult to one size fits all under different bias operation environment.
In storer of the present invention, then be that altogether the transistor of coupling is as load unit with two grids, the electric current that provides according to mnemon and reference cell is set up out detection voltage and reference voltage respectively, and relatively detects voltage and reference voltage with a comparer.Wherein the biasing of also setting up according to a load unit with a control circuit in addition comes the voltage of FEEDBACK CONTROL two load unit grids, is maintained at a predeterminated voltage with the voltage that a load unit is set up.The load unit of mutual coupling grid can be set up voltage with the current-voltage curve under the commonsource amplifier, and making to detect between voltage and reference voltage to have bigger gap, increases operation and noise immunity.The load unit of grid mutual coupling can make noise turn to common mode (common mode) noise, and when driving the comparer of differential input, common-mode noise is eliminated.And control circuit can ACTIVE CONTROL among the present invention storer and make storer of the present invention be applicable to different operating environments easily in the biasing of each node.
Description of drawings
Fig. 1 is the circuit diagram of a known short-access storage.
Fig. 2 is the current-voltage relation synoptic diagram of load unit among Fig. 1.
Fig. 3 be among Fig. 1 storer than the detail circuits synoptic diagram.
Fig. 4 is the circuit diagram of storer first embodiment among the present invention.
Fig. 5 A, Fig. 5 B are the current-voltage curve synoptic diagram of related load unit among Fig. 4.
Fig. 6 is the circuit diagram of storer second embodiment of the present invention.
Fig. 7 is the current-voltage curve synoptic diagram of related load unit among Fig. 6.
Fig. 8 be among Fig. 4 storer than the detail circuits synoptic diagram.
Fig. 9 is the circuit diagram of storer the 3rd embodiment among the present invention.
Figure 10 is the circuit diagram of storer the 4th embodiment among the present invention.The reference numeral explanation
10,30,50,60,70 storeies
12A-12B, 32A-32B, 62A-62B mnemon
14,34,64 memory arrays
16A, 16B phase inverter
18,36,38,66,68 comparers
20,40A-40B, 41A-41B, 48 curves
22,23A, 23B current source
42,72 voltage generators
46,56,76,86 control circuits
Ip2, I2, I20 reference current
The Vd bias voltage
The Vg low bias voltage
A1, A2 arrow
The C0 equivalent capacity
DV1, dV2 voltage difference
V4, V40 predeterminated voltage
Sr, Sa, Sa0 read signal
V3, V30 driving voltage
Vp1, Vp1 (A), Vp1 (B), V1, V1 (A), V1 (B), V10 detect voltage
Ip1, Ip1 (A), Ip1 (B), I1, I1 (A), I1 (B), I10 drive current
Vp1, V2, V2 (A), V2 (B), V20 reference voltage
Q1-Q12, Qm1-Qm2, Qa1-Qa2, M1-M12, Sa1-Sa2, S1-S2, T1-T3, Ta1-Ta2, Tm1-Tm2 transistor
V0, Vb1, Vb2, Vw1, Vw2, Vr, Vr0, Vb10, Vb20, Vw10, Vw20 control voltage
Np1-Np7, N1-N5, N10, N20, N30 node
Embodiment
Please refer to Fig. 4.Fig. 4 is the circuit diagram of storer one embodiment 30 of the present invention.Include a memory array 34 in the storer 30, then be provided with a plurality of mnemons (drawing two mnemon 32A, 32B among Fig. 4 as representative) in the memory array 34, each mnemon is used to store the one digit number certificate.In the present invention, the circuit structure of memory array 34 and each mnemon can be memory array and the mnemon the same with known storer 10, or the mnemon of other kinds; Then be with the memory array identical, the embodiment that mnemon is used as specifying among Fig. 4 with circuit structure in the storer 10.With mnemon 32A is example, and it is provided with a metal oxide semiconductor transistor S1 with a floating grid, and an access transistor Sa1; Control voltage Vw1 and Vb1 are respectively applied for the grid voltage of oxide-semiconductor control transistors S1 and Sa1.As a short-access storage, the principle of each mnemon storage bit number certificate in the storer 40 is just identical with the principle that each mnemon of storer 10 operates among Fig. 1; With mnemon 32A is example, when the floating grid of transistor S1 is injected into the electric charges of different amounts and when storing different bit data, transistor S1 just can provide the drive current that varies in size under the gate bias of fixing control voltage Vw1.Corresponding to each mnemon in the memory array 34, also be provided with p type metal oxide semiconductor transistor M3 in the storer 30 as reference cell, its grid is with the control voltage Vr control of definite value, so that the reference current of certain value to be provided; Transistor M3 one has the transistor of floating grid, but charge stored can keep definite value in this floating grid.Storer 30 also provides biasing with dc offset voltage Vd; And magnitude of voltage is lower than the direct current low bias voltage Vg of bias voltage Vd, then the voltage that can hold (voltage of zero level just) with being.
One of most important improvement of storer of the present invention is that the present invention has used new detection amplification module configuration.As shown in Figure 4, storer is except memory array 34, also constitute one with n-type metal oxide semiconductor transistor M1 and M2, comparer 38 and a control circuit 46 in addition and detect amplification module, be used for reading the bit data of memory array 34 each mnemon storage.Wherein, transistor M1 detects load unit as one, and it drains and is electrically connected to memory array 34 in node N1, and its grid is electrically connected to control circuit 46 in node N3; When reading the data of a mnemon, the drive current that this mnemon provides just can be injected into transistor M1 by node N1, sets up one by transistor M1 at node N1 and detects voltage V1.Have the transistor of floating grid corresponding to each mnemon in the memory array 34, the grid of transistor M3 is then by the control voltage Vr control of direct current, makes the transistor M3 can the fixed-size reference current I2 of conducting and be injected into node N2; The transistor M2 that drain electrode is electrically connected to node N2 is then as a benchmark load unit, its grid also with the same node N3 that is electrically connected to of grid of transistor M1.Behind the reference current I2 of receiving node N2, transistor M2 just can set up a reference voltage V 2 at node N2.And comparer 38 is used for relatively detecting the size of voltage V1 and reference voltage V 2, and produces the corresponding signal Sa that reads according to relatively result.Then be provided with another comparer 36 and a voltage generator 42 in the control circuit 46, wherein voltage generator 42 is used to produce the predeterminated voltage V4 of certain value; In preferred embodiment of the present invention, voltage generator 42 is a voltage follower (voltage follower), can produce a definite value predeterminated voltage V4 who is lower than bias voltage Vd; For instance, predeterminated voltage V4 can be the fixed value voltage that is lower than two threshold voltages of bias voltage Vd.And comparer 36 has two input ends (indicating with "+", "-") in Fig. 4, is electrically connected to node N1 and voltage generator 42 respectively; The output terminal of comparer 36 then is electrically connected to node N3, to produce the gate bias that a driving voltage V3 comes synchro control transistor M1, M2.In the present invention, comparer 36 can be realized with a differential amplifier, its objective is according to the difference that detects between voltage V1 and predeterminated voltage V4, with driving voltage V3 feedback driving transistors M1 (and M2), can make the detection voltage V1 of node N1 consistent at last with the definite value predeterminated voltage V4 that voltage generator 42 generates.In other words, control circuit 46 can be in the mode of driving transistors M1, and the detection voltage V1 of node N1 is maintained at certain value (just identical with predeterminated voltage V4 definite value).
The principle that storer 30 of the present invention carries out the mnemon data read can be described below.For instance, when storer 30 will read the bit data of mnemon 32A, transistor S1 will be injected into the transistor M1 of node N1 via the transistor Sa1 of conducting according to the drive current I1 that bit data provided.Please continue with reference to figure 5A and Fig. 5 B.Fig. 5 A and Fig. 5 B are respectively the synoptic diagram of the current-voltage curve (I-V curve) of transistor M1, M2, the transverse axis of two figure is voltage swing (being the voltage between each transistor drain-source electrode), and the longitudinal axis is size of current (being the electric current between each transistor drain-source electrode); Because the source electrode of transistor M1, M2 all is connected to low bias voltage Vg, the transverse axis among Fig. 5 A, the 5B also can be respectively applied for the voltage of representation node N1, N2; And the electric current of the longitudinal axis is the electric current that is injected into node N1, N2 respectively just also among Fig. 5 A, the 5B.As previously mentioned, the bit data of being stored according to mnemon 32A may be position " 0 " or position " 1 ", and the drive current I1 that mnemon 32A can provide also may be the drive current I1 (A) or the I1 (B) of big or small inequality, such as among Fig. 5 A sign.Because the comparer 36 in the control circuit 46 can be maintained at predeterminated voltage V4 with the voltage of node N1, if injecting the drive current of transistor M1 is I1 (A), comparer 36 will come the grid of driving transistors M1 at node N3 with driving voltage V3 (A), make the current-voltage curve of transistor M1 become curve 40A among Fig. 5 A, with meet electric current I 1 (A), node N1 voltage is the bias condition of predeterminated voltage V4.Relatively, if the drive current that mnemon 32A provides is bigger drive current I1 (B), in order to make the voltage conforms predeterminated voltage V4 of node N1,36 of comparers can rise to the driving voltage of node N3 V3 (B), make that this moment, the current-voltage curve of transistor M1 became curve 40B.
Comparer 36 in control circuit 46 is at different drive current I1 (A), I1 (B) and with different driving voltage V3 (A), when V3 (B) comes the grid of driving transistors M1, also can drive the benchmark load unit by node N3 with identical driving voltage simultaneously, just transistor M2.Shown in Fig. 5 B, when the grid voltage of transistor M2 was respectively driving voltage V3 (A), V3 (B), the current-voltage curve of transistor M2 correspondence just was respectively curve 41A, 41B.Because the transistor M3 of reference cell is injected into transistor M2 with fixing reference current I2 via node N2, so when transistor M2 was driven to curve 41A, 41B along with the difference of drive current I1 (A), I1 (B), the reference voltage V 2 of node N2 also can be changed into reference voltage V 2 (A) and V2 (B) thereupon.The reference voltage V 2 of comparer 38 comparison node N2 is greater than the reference voltage V 2 (A) that detects voltage V1 or less than after the reference voltage V 2 (B) that detects voltage V1, the same drive current that just can judge mnemon 32A and originally provided is I1 (A) or I1 (B), also just can read the bit data of storing among the mnemon 32A.In summary, in storer 30, even it may be drive current I1 (A) or I1 (B) that mnemon is injected into the drive current of transistor M1, but the detection voltage V1 of node N1 still can be maintained at definite value (being predeterminated voltage V4) by the driving to transistor M1 by Be Controlled circuit 46; Relatively, by the driving of control circuit 46, drive current I1 (A), I1 (B) that transistor M2 then can react mnemon respectively and provided with different reference voltage V 2 (A), V2 (B) at node N2, and the bit data in the mnemon can be read out.
Please refer to Fig. 6.Fig. 6 is the circuit diagram of the storer 50 of another embodiment of the present invention.For convenience of description, in the storer 50 with storer 30 in the label components identical, has identical function, similarly be in the memory array 34 can according to the bit data of being stored provide drive current mnemon, be used to produce the transistor M3 of fixed reference electric current 12, and detect in the amplification module as detect load unit with set up the transistor M1 that detects voltage V1, as the benchmark load unit with the transistor M2 that sets up reference voltage V 2, according to detecting voltage V1, reference voltage V 2 reading of data, producing the comparer 38 that reads signal Sa.Also be provided with the driving voltage V3 of a control circuit 56 in the storer 50, then be provided with the voltage generator 42 that produces definite value predeterminated voltage V4 in the control circuit 56 with Control Node N3, and another comparer 36.Relatively the storer 50 among the storer 30 of the present invention in Fig. 4 and Fig. 6 as can be known, different on circuit structure of storer 50 and storer 30 be in, be that the input end that 36 liang of comparers are denoted as "+", "-" is electrically connected to voltage generator 42 and node N2 respectively in the storer 50.In other words, in storer 50, comparer 36 can come driving transistors M2 with the driving voltage V3 of node N3, makes the reference voltage V 2 of node N2 can be maintained at certain value (predeterminated voltage V4 just).
Read the operation principles of mnemon meta data about storer among Fig. 6 50, please continue with reference to figure 7 (and simultaneously with reference to figure 6).Curve 48 shown in Figure 7 is the current-voltage curve between transistor M1 drain electrode-source electrode, and wherein the transverse axis of Fig. 7 is a voltage swing, and the longitudinal axis then is a size of current; Similarly, because the source electrode of transistor M11 is electrically connected to fixing low bias voltage Vg in the storer 50, so the voltage of Fig. 7 transverse axis also can be considered the detection voltage V1 of node N1.Because the reference voltage 12 that reference cell M3 provides to node N2 was exactly the electric current of certain value originally, the driving voltage V3 that comparer 36 needs only node N3 is maintained at certain value, just transistor M2 can be maintained at certain value in the reference voltage V 2 of node N2.Suppose that present storer 50 will read the data of mnemon 32A, mnemon 32A will provide size different drive current I1 (A) or I1 (B) to node N1 according to its bit data of storing difference; Because control circuit 56 can be maintained at certain value with the driving voltage V3 of node N3, so the current-voltage curve of transistor M1 also can be maintained the curve 48 among Fig. 7.The drive current that corresponding mnemon provides transistor M1 is I1 (A) or I1 (B), and transistor M1 will follow curve 48 and set up detection voltage V1 (A) or V1 (B) at node N1.If transistor M2 and transistor M1 mate and make the current-voltage curve of transistor M2 be similar to curve 48, then the reference current I2 of size of current between between drive current I1 (A), I1 (B) also can set up between the reference voltage V 2 that detects voltage V1 (A), V1 (B) at node N2.The detection voltage of comparer 38 comparison node N1 is the detection voltage V1 (A) less than node N2 reference voltage V 2, or greater than the detection voltage V1 (B) of reference voltage V 2, same also just can differentiate the drive current that mnemon provides, and the bit data of reading in the mnemon to be stored.Please note, in the present invention, transistor M1, M2 can also be mutual unmatched two transistors, as long as transistor M2 can utilize reference current I2 to setover out between the reference voltage V 2 that detects between voltage V1 (A), the V1 (B), just can cooperate above-mentioned data read principle to read the bit data of storing in the mnemon, even the size of reference current I2 can also be between drive current I1 (A), I1 (B).
Advantage of the present invention can outline as follows.At first, can find out by Fig. 5 and Fig. 7, because the transistor as load unit (comprise and detect load unit or benchmark load unit) in the storer of the present invention all is to operate with the configuration that grid, drain electrode are separately setovered, be similar to the configuration of common source (common source) amplifier, recessed the current-voltage curve of (direction of arrow A 2 indications in as Fig. 7) strengthens the gap that detects between voltage, reference voltage to down so can utilize two transistor, makes that the detection amplification module in the storer of the present invention can have bigger operation and noise immunity.In comparison, known storer 10 among Fig. 1 is to come as load unit with the transistor that the diode form connects, only can utilize Fig. 2 concave to set up different detection voltage to current-voltage curve up, detect difficult increasing of gap between voltage, reference voltage, the noise immunity that causes operating and reading can't effectively promote.
Moreover, because the grid of two load units (being transistor M1, M2) is that unification comes drive controlling by control circuit among the present invention, even the grid of two load units has noise to invade, the drain electrode (just node N1, N2) that also can become at two transistor forms common mode (common mode) noise, through behind the comparer 38 of differential driving, common-mode noise is understood by effectively filtering, and can not influence the data read running of storer of the present invention.For instance, if one positive-going noise is arranged and the driving voltage V3 of node N3 is raise at node N3, but driving voltage V3 synchronous driving transistors M1 of meeting and M2, so the voltage of node N1, N2 can reduce synchronously, make the gap that detects voltage V1, reference voltage V 2 can also continue to keep, and by comparer 38 correctly judge both magnitude relationship and sense data.In comparison, two transistors in the known storer 10 as load unit, its three extremely all isolation mutually, the intrusion of noise tends to cause the double influence of noise.
In addition, detect the configuration of amplification module in the storer of the present invention, to the biasing of each node stronger control can be arranged, and the design of storer of the present invention is widely used under the different bias operation environment.With storer 30 of the present invention (please refer to Fig. 4) is example, control circuit 46 can be maintained at the voltage locking of node N1 the voltage swing of predeterminated voltage V4, and the voltage swing of node N2 also can be maintained in the certain limit (being between reference voltage V 2 (A) and the reference voltage V 2 (B)) jointly.The present invention can be maintained at the voltage of node N1 given definite value, can not only isolate the load effect of memory array 34, can also cooperate the size of bias voltage Vd that the comparer 36,38 in the storer 30 can be offset in the suitable scope.As previously mentioned, concerning detecting amplification module, being electrically connected to the memory array 34 of node N1, can be a big electric capacity equally; Storer 30 can be maintained at definite value with the voltage of node N1 by the driving of control circuit 46, and the drive current that is provided by mnemon just needn't read the load effect that process also can not be subjected to this equivalent electric capacity to the big capacitor charge and discharge of this equivalence.In addition, the biasing to memory array 34 also has preferable control; If will adapt to the different different operating environment of direct current biasing Vd, as long as suitably adjust the predeterminated voltage V4 that voltage generator 42 produces, the just biasing of energy ACTIVE CONTROL node N1 (and N2).
The setting of control circuit can also be strengthened detecting the biasing control of the comparer 36,38 in the amplification module.Please refer to Fig. 8.Be the storer 30 among Fig. 4 shown in the circuit diagram of Fig. 8, but drawn comparer 36, the 38 typical circuit of implementing among Fig. 8 in more detail.Make the comparer 36,38 of biasing with dc offset voltage Vd, it is right to form differential input with n-type metal oxide semiconductor transistor M5, M6, M9, M10 respectively, and with p type metal oxide semiconductor transistor M7, M8, M11 and M12 as the active load; Current source 23A, the 23B differential input that then is used to setover is right.Because the scope that can come Control Node N1, N2 variation in voltage with the predeterminated voltage V4 that voltage generator 42 produces among the present invention, as long as predeterminated voltage V4 is adjusted synchronously with bias voltage Vd, the biasing that just can make n-type metal oxide semiconductor transistor in the comparer 36,38 is along with bias voltage Vd adjusts, so that cooperate the p type metal oxide semiconductor transistor of setovering with bias voltage Vd in the comparer 36,38, and make each transistor can not change because of bias voltage Vd changes have significantly in the biasing scope of each utmost point.As previously mentioned, in preferred embodiment of the present invention, voltage generator 42 is a voltage follower, can produce voltage (Vd-Vc) as predeterminated voltage V4; That is to say, can produce the predeterminated voltage V4 that is lower than bias voltage Vd one fixed voltage value Vc.So, when reservoir designs of the present invention will extend to multiple different bias operation environment, even bias voltage Vd changes, control circuit also can be according to the predeterminated voltage that changes synchronously with bias voltage, synchronous adjustment is done in the biasing of node N1, N2, make that the biasing of n type in the comparer 36,38, each utmost point of p transistor npn npn is also whole together with step, allow these transistors under the operating environment of different bias voltages, the voltage difference of each interpolar still can be maintained in certain preferred range, does not have significantly to change.In comparison, in the known storer 10 of Fig. 3, no matter be transistor in phase inverter 16A, 16B or the comparer 18, the biasing of each n transistor npn npn can't freely be set along with bias voltage Vd.Because the bias conditions of each p transistor npn npn mainly is to be decided by bias voltage Vd, when the design of known storer 10 will be applied to different bias operation environment, the bias conditions that the bias conditions of each n transistor npn npn just can't be followed the p transistor npn npn changes, cause the voltage difference of each each interpolar of transistor under different bias operation environment, to have significantly changing and be difficult to operate as normal, also make the design of known storer 10 can't one size fits all in different bias operation environment.
Please refer to Fig. 9.Fig. 9 is the circuit diagram of another embodiment 60 of storer of the present invention.Storer 30 among storer 60 and Fig. 4 of the present invention comes implementation data to read according to identical control principle, but the design of storer 30 is the mnemon that is used to cooperate the p transistor npn npn, and storer 60 is the mnemon that is used to cooperate the n transistor npn npn.Storer 60 among Fig. 9 is provided with memory array 64, and memory array 64 also comprises a plurality of mnemons (drawing two mnemon 62A, 62B among Fig. 9 as representative), and each mnemon is used to write down the one digit number certificate.With mnemon 62A is example, be to come record data in this mnemon with n-type metal oxide semiconductor transistor Tm1 with a floating grid, and as a current absorption source (current sink), with the different absorption driving forces that provide the different drive current I10 of size of data according to its record.Transistor T a1 then is an access transistor.Corresponding to memory array 64, be a n-type metal oxide semiconductor transistor as 3 of the transistor Ts of reference cell, with the reference current I20 that drives certain value (transistor T 3 can also be one have the transistor of floating grid).Transistor T 1 in the storer 60, T2, comparer 68 and control circuit 76 then form one and detect amplification module; Wherein transistor T 1, T2 as detecting load unit and benchmark load unit, detect voltage V10 and reference voltage V 20 to set up respectively at node N10, N20 respectively.Voltage generator 72 in the control circuit 76 is used to produce the predeterminated voltage V40 of certain value, and 66 of comparers can be by the grid of node N30 with driving voltage V30 oxide-semiconductor control transistors T1 and T2, and make the detection voltage V10 of node N10 fixedly be maintained at predeterminated voltage V40.Comparer 68 just can be read the data in the mnemon after the detection voltage V10 of comparison node N10, N20, reference voltage V 20, and produces the corresponding signal Sa0 that reads.The operation principles of storer 60 is similar to the operation principles of storer 30, can get by analogizing among Fig. 4, Fig. 5 A, the 5B and in the related description, and the advantage of circuit design is also consistent; Not hindering under the disclosed situation of the technology of the present invention, repeat no more.
Please continue with reference to Figure 10.Figure 10 is the circuit diagram of another embodiment 70 of storer of the present invention.Storer 70 is similar with storer 60, all is that for the purpose of simplifying the description, label components identical among each label and Fig. 9 has identical functions among Figure 10 for cooperation n transistor npn npn mnemon designs.Storer 70 and storer 60 bigger not being both, in the control circuit 86 of storer 70, comparer 66 is the driving voltage V30 that produce node N30 according to the reference voltage V 20 of node N20, so that reference voltage V 20 is maintained at the predeterminated voltage V40 of definite value.The operation principles and the storer among Fig. 6 50 of storer 70 are similar, can get by analogizing in Fig. 7 and the related description, repeat no more in this.
In the detection amplification module of known storer, be with the transistor that the diode form connects come as detect, the benchmark load unit detects voltage, reference voltage to set up respectively, and reads data in the mnemon according to detecting voltage and reference voltage.Because the characteristic limitations of its current-voltage curve of load unit that the diode form connects, the configuration of isolating mutually between two load units, add known storer and can't ACTIVE CONTROL detect the biasing of interdependent node in the amplification module, make that noise, the operation window of known storer are limited, easily affected by noise, its design also can't be widely used in the operating environment of different bias voltages.In comparison, the present invention is unified by the next common control detection of a control circuit, the transistorized grid of benchmark load unit, and keep according to a predeterminated voltage of freely setting and to detect voltage or reference voltage is a certain value, so the current-voltage curve that can utilize similar common source to amplify configuration increases the difference between reference voltage, detection voltage.And grid is total to two load units that coupling drives, and its noise also can present the common mode form, can be offset and the minimizing noise effect by the comparer of differential driving.Control circuit also can strengthen detecting the biasing control in the amplification module, make transistor and the phase inverter that load isolation need be set in the storer of the present invention, also can make the design of storer of the present invention just can extend to the operating environment of different bias voltages at an easy rate, reduce the cost of reservoir designs, manufacturing.
The above only is preferred embodiment of the present invention, and all equivalences of doing according to claim of the present invention change and improve, and all should belong to covering scope of the present invention.
Claims (31)
1. storer, it includes:
At least one mnemon, each mnemon is used to store the one digit number certificate, and can provide a drive current according to this bit data, makes that the drive current size that this mnemon provides also changes thereupon when the bit data of this mnemon storage changes;
One detects load unit, be used to receive drive current and one first driving voltage that a mnemon provides, and export one according to the size of this drive current and this first driving voltage and detect voltage, make that this detection voltage also can change thereupon when this drive current or the change of this first driving voltage;
One benchmark load unit is used to receive one second driving voltage, and produces a reference voltage according to the size of this second driving voltage;
One control circuit, be used to change the size of this first driving voltage, make when the size of this drive current changes, this detection voltage is maintained constant, and this control circuit can produce this second driving voltage according to this first driving voltage in addition, make that when this first driving voltage changed, this second driving voltage also changed thereupon; And
One comparer is used for the difference according to this detection voltage and this reference voltage, judges the bit data of storing in this mnemon.
2. storer as claimed in claim 1, wherein when this drive current increased, this control circuit can increase this first driving voltage, so that this detection voltage is maintained at certain value.
3. storer as claimed in claim 1, wherein this control circuit includes:
One voltage generator is used to produce a predeterminated voltage;
One second comparer is used for changing this first driving voltage according to the voltage difference between this detection voltage and this predeterminated voltage, and it is equal with this predeterminated voltage to make this detection voltage be able to.
4. storer as claimed in claim 3, wherein this storer is offset to the bias voltage of a direct current, and this voltage generator is a voltage follower, is used for producing this predeterminated voltage according to this bias voltage.
5. storer as claimed in claim 1, wherein second driving voltage of this control circuit generation is to equate with this first driving voltage.
6. storer as claimed in claim 1, wherein include a metal oxide semiconductor transistor in this detection load unit, this transistorized grid is electrically connected to this control circuit to receive this first driving voltage, this transistor drain then is electrically connected to the mnemon of this storer, is used to receive the drive current that is provided by each mnemon.
7. storer as claimed in claim 6, wherein this transistor drain is electrically connected to this control circuit and this comparer in addition, is used to export this detection voltage.
8. storer as claimed in claim 1, wherein this benchmark load unit includes a metal oxide semiconductor transistor, and this transistorized grid is electrically connected to this control circuit, is used to receive this second driving voltage; This transistor drain then is electrically connected to this comparer, is used to export this reference voltage.
9. storer as claimed in claim 8, it includes a reference cell in addition, is used to produce a reference current; And the transistor in this benchmark load unit, its drain electrode is electrically connected to this reference cell in addition, and this transistor must be setovered by this reference current.
10. storer as claimed in claim 1, wherein each mnemon includes a metal oxide semiconductor transistor with floating grid.
11. a storer, it includes:
At least one mnemon, each mnemon is used to store the one digit number certificate, and can provide a drive current according to this bit data, makes that the drive current size that this mnemon provides also changes thereupon when the bit data of this mnemon storage changes;
One detects load unit, be used to receive drive current and one first driving voltage that a mnemon provides, and export one according to the size of this drive current and this first driving voltage and detect voltage, make that this detection voltage also can change thereupon when this drive current or the change of this first driving voltage;
One benchmark load unit is used to receive one second driving voltage, and produces a reference voltage according to the size of this second driving voltage, makes that when this second driving voltage changed, this reference voltage also changed thereupon;
One control circuit is used to control the size of this second driving voltage, and this reference voltage is maintained in certain value;
This control circuit can produce this first driving voltage according to the size of this second driving voltage in addition, makes under the unaltered situation of this second driving voltage, and this first driving voltage can not change with this drive current size; And
One comparer is used for the difference according to this detection voltage and this reference voltage, judges the bit data of storing in this mnemon.
12. storer as claimed in claim 11, wherein this control circuit includes:
One voltage generator is used to produce a predeterminated voltage;
One second comparer is used for changing this second driving voltage according to the voltage difference between this reference voltage and this predeterminated voltage, and it is equal with this predeterminated voltage to make this reference voltage be able to.
13. storer as claimed in claim 12, wherein this storer is the bias voltage that is offset to a direct current, and this voltage generator is a voltage follower, is used for producing this predeterminated voltage according to this bias voltage.
14. storer as claimed in claim 11, wherein first driving voltage of this control circuit generation is to equate with this second driving voltage.
15. storer as claimed in claim 11, wherein include a metal oxide semiconductor transistor in this detection load unit, this transistorized grid is electrically connected to this control circuit to receive this first driving voltage, this transistor drain then is electrically connected to the mnemon of this storer, is used to receive the drive current that is provided by each mnemon.
16. storer as claimed in claim 11, wherein this benchmark load unit includes a metal oxide semiconductor transistor, and this transistorized grid is electrically connected to this control circuit, is used to receive this second driving voltage; This transistor drain then is electrically connected to this comparer, is used to export this reference voltage.
17. storer as claimed in claim 16, wherein this transistor drain is electrically connected to this control circuit in addition, is used for exporting this reference voltage to this control circuit.
18. storer as claimed in claim 17, it includes a reference cell in addition, is used to produce a reference current; And the transistor in this benchmark load unit, its drain electrode is electrically connected to this reference cell in addition, makes this transistor be able to be setovered by this reference current.
19. storer as claimed in claim 11, wherein each mnemon includes a metal oxide semiconductor transistor with floating grid.
20. a storer, it includes:
At least one mnemon, each mnemon is used to store the one digit number certificate, and can provide a drive current according to this bit data, makes that the drive current size that this mnemon provides also changes thereupon when the bit data of this mnemon storage changes;
One detects load unit, be used to receive drive current and one first driving voltage that a mnemon provides, and export one according to the size of this drive current and this first driving voltage and detect voltage, make that this detection voltage also can change thereupon when this drive current or the change of this first driving voltage;
One benchmark load unit is used to receive one second driving voltage, and produces a reference voltage according to the size of this second driving voltage, makes that when this second driving voltage changed, this reference voltage also changed thereupon;
One control circuit is used for synchronously controlling the size of this first driving voltage and this second driving voltage, makes when this first driving voltage changes, and this second driving voltage is change thereupon also; And keep one regularly when this first driving voltage, this second driving voltage is also kept necessarily; And
One comparer is used for the difference according to this detection voltage and this reference voltage, judges the bit data of storing in this mnemon.
21. storer as claimed in claim 20, wherein this control circuit is to control this first driving voltage and this second driving voltage according to this detection voltage, make when this drive current size changes, this first driving voltage and this second driving voltage also change thereupon, are maintained at certain value should detect voltage.
22. storer as claimed in claim 21, wherein this control circuit includes:
One voltage generator is used to produce a predeterminated voltage;
One second comparer is used for changing this first driving voltage according to the voltage difference between this detection voltage and this predeterminated voltage, and it is equal with this predeterminated voltage to make this detection voltage be able to.
23. storer as claimed in claim 22, wherein this storer is the bias voltage that is offset to a direct current, and this voltage generator is a voltage follower, is used for producing this predeterminated voltage according to this bias voltage.
24. storer as claimed in claim 20, wherein this control circuit is to control this first driving voltage and this second driving voltage according to this reference voltage, so that this reference voltage is maintained at certain value.
25. storer as claimed in claim 24, wherein this control circuit includes:
One voltage generator is used to produce a predeterminated voltage;
One differential amplifier is used for changing this second driving voltage according to the voltage difference between this reference voltage and this predeterminated voltage, and it is equal with this predeterminated voltage to make this reference voltage be able to.
26. storer as claimed in claim 25, wherein this storer is the bias voltage that is offset to a direct current, and this voltage generator is a voltage follower, is used for producing this predeterminated voltage according to this bias voltage.
27. storer as claimed in claim 20, wherein this control circuit is that to make this first driving voltage be to equate with this second driving voltage.
28. storer as claimed in claim 20, wherein include a metal oxide semiconductor transistor in this detection load unit, this transistorized grid is electrically connected to this control circuit to receive this first driving voltage, this transistor drain then is electrically connected to the mnemon of this storer, is used to receive the drive current that is provided by each mnemon.
29. storer as claimed in claim 28, wherein this transistor drain is electrically connected to this comparer in addition, is used to export this detection voltage.
30. storer as claimed in claim 20, wherein this benchmark load unit includes a metal oxide semiconductor transistor, and this transistorized grid is electrically connected to this control circuit, is used to receive this second driving voltage; This transistor drain then is electrically connected to this comparer, is used to export this reference voltage.
31. storer as claimed in claim 30, it includes a reference cell in addition, is used to produce a reference current; And the transistor in this benchmark load unit, its drain electrode is electrically connected to this reference cell in addition, makes this transistor be able to be setovered by this reference current.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNB021305293A CN1326148C (en) | 2002-08-14 | 2002-08-14 | Rapid memory for loading transistor read out data using grid mutual coupling driving |
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| CNB021305293A CN1326148C (en) | 2002-08-14 | 2002-08-14 | Rapid memory for loading transistor read out data using grid mutual coupling driving |
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| CN1476017A true CN1476017A (en) | 2004-02-18 |
| CN1326148C CN1326148C (en) | 2007-07-11 |
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Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1937071B (en) * | 2005-09-22 | 2010-10-13 | 中芯国际集成电路制造(上海)有限公司 | High-performance read-out amplifier for memory system and corresponding method |
| CN104778976A (en) * | 2014-01-10 | 2015-07-15 | 力旺电子股份有限公司 | Non-volatile memory |
| CN102394096B (en) * | 2004-12-28 | 2015-09-02 | 斯班逊有限公司 | There is the sensing amplifier of high voltage swing |
| CN105741864A (en) * | 2016-02-03 | 2016-07-06 | 上海磁宇信息科技有限公司 | Sense amplifier and MRAM chip |
| CN105761745A (en) * | 2016-02-03 | 2016-07-13 | 上海磁宇信息科技有限公司 | Reading-out amplifier and MRAM (Magnetic Random Access Memory) chip |
Family Cites Families (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS63104290A (en) * | 1986-10-21 | 1988-05-09 | Nec Corp | Semiconductor memory |
| NL8901376A (en) * | 1989-05-31 | 1990-12-17 | Philips Nv | INTEGRATED MEMORY CIRCUIT WITH A READING AMPLIFIER. |
-
2002
- 2002-08-14 CN CNB021305293A patent/CN1326148C/en not_active Expired - Lifetime
Cited By (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102394096B (en) * | 2004-12-28 | 2015-09-02 | 斯班逊有限公司 | There is the sensing amplifier of high voltage swing |
| CN1937071B (en) * | 2005-09-22 | 2010-10-13 | 中芯国际集成电路制造(上海)有限公司 | High-performance read-out amplifier for memory system and corresponding method |
| CN104778976A (en) * | 2014-01-10 | 2015-07-15 | 力旺电子股份有限公司 | Non-volatile memory |
| CN104778976B (en) * | 2014-01-10 | 2018-11-09 | 力旺电子股份有限公司 | Nonvolatile memory |
| CN105741864A (en) * | 2016-02-03 | 2016-07-06 | 上海磁宇信息科技有限公司 | Sense amplifier and MRAM chip |
| CN105761745A (en) * | 2016-02-03 | 2016-07-13 | 上海磁宇信息科技有限公司 | Reading-out amplifier and MRAM (Magnetic Random Access Memory) chip |
| CN105761745B (en) * | 2016-02-03 | 2018-05-22 | 上海磁宇信息科技有限公司 | A kind of sense amplifier and MRAM chip |
| CN105741864B (en) * | 2016-02-03 | 2018-08-21 | 上海磁宇信息科技有限公司 | A kind of sense amplifier and MRAM chip |
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|---|---|
| CN1326148C (en) | 2007-07-11 |
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