CN1475027A - Semiconductor structure having high dielectric constant material - Google Patents
Semiconductor structure having high dielectric constant material Download PDFInfo
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- CN1475027A CN1475027A CNA018188613A CN01818861A CN1475027A CN 1475027 A CN1475027 A CN 1475027A CN A018188613 A CNA018188613 A CN A018188613A CN 01818861 A CN01818861 A CN 01818861A CN 1475027 A CN1475027 A CN 1475027A
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- 239000004065 semiconductor Substances 0.000 title claims abstract description 60
- 239000000463 material Substances 0.000 title claims abstract description 30
- 229910052784 alkaline earth metal Inorganic materials 0.000 claims abstract description 60
- 239000000758 substrate Substances 0.000 claims abstract description 57
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 claims abstract description 18
- 229910052712 strontium Inorganic materials 0.000 claims description 51
- 238000005516 engineering process Methods 0.000 claims description 35
- 229910052788 barium Inorganic materials 0.000 claims description 31
- CIOAGBVUUVVLOB-UHFFFAOYSA-N strontium atom Chemical compound [Sr] CIOAGBVUUVVLOB-UHFFFAOYSA-N 0.000 claims description 30
- 239000013078 crystal Substances 0.000 claims description 26
- 239000010936 titanium Substances 0.000 claims description 24
- 150000001342 alkaline earth metals Chemical class 0.000 claims description 22
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 18
- 229910052710 silicon Inorganic materials 0.000 claims description 17
- 229910052719 titanium Inorganic materials 0.000 claims description 16
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims description 15
- 239000010703 silicon Substances 0.000 claims description 14
- 229910001218 Gallium arsenide Inorganic materials 0.000 claims description 10
- DSAJWYNOEDNPEQ-UHFFFAOYSA-N barium atom Chemical compound [Ba] DSAJWYNOEDNPEQ-UHFFFAOYSA-N 0.000 claims description 10
- 238000001451 molecular beam epitaxy Methods 0.000 claims description 10
- -1 InAlAs Inorganic materials 0.000 claims description 9
- 235000012239 silicon dioxide Nutrition 0.000 claims description 9
- 239000000377 silicon dioxide Substances 0.000 claims description 9
- 238000005229 chemical vapour deposition Methods 0.000 claims description 8
- 150000001875 compounds Chemical class 0.000 claims description 8
- JBRZTFJDHDCESZ-UHFFFAOYSA-N AsGa Chemical compound [As]#[Ga] JBRZTFJDHDCESZ-UHFFFAOYSA-N 0.000 claims description 7
- 229910052732 germanium Inorganic materials 0.000 claims description 6
- 229910000577 Silicon-germanium Inorganic materials 0.000 claims description 5
- 238000002360 preparation method Methods 0.000 claims description 5
- 150000002500 ions Chemical class 0.000 claims description 4
- 238000003877 atomic layer epitaxy Methods 0.000 claims description 3
- 238000000224 chemical solution deposition Methods 0.000 claims description 3
- GNPVGFCGXDBREM-UHFFFAOYSA-N germanium atom Chemical compound [Ge] GNPVGFCGXDBREM-UHFFFAOYSA-N 0.000 claims description 3
- 229910052751 metal Inorganic materials 0.000 claims description 3
- 239000002184 metal Substances 0.000 claims description 3
- 238000004211 migration-enhanced epitaxy Methods 0.000 claims description 3
- 238000004549 pulsed laser deposition Methods 0.000 claims description 3
- 239000012535 impurity Substances 0.000 claims description 2
- 230000007704 transition Effects 0.000 claims description 2
- 230000026267 regulation of growth Effects 0.000 claims 7
- 229910008310 Si—Ge Inorganic materials 0.000 claims 3
- 229910000980 Aluminium gallium arsenide Inorganic materials 0.000 claims 2
- 229910000530 Gallium indium arsenide Inorganic materials 0.000 claims 2
- 239000000126 substance Substances 0.000 claims 2
- LEVVHYCKPQWKOP-UHFFFAOYSA-N [Si].[Ge] Chemical compound [Si].[Ge] LEVVHYCKPQWKOP-UHFFFAOYSA-N 0.000 claims 1
- 229910052783 alkali metal Inorganic materials 0.000 claims 1
- 150000001340 alkali metals Chemical class 0.000 claims 1
- 239000002019 doping agent Substances 0.000 claims 1
- 229910003465 moissanite Inorganic materials 0.000 claims 1
- 229910010271 silicon carbide Inorganic materials 0.000 claims 1
- 238000000034 method Methods 0.000 abstract description 14
- 229910002938 (Ba,Sr)TiO3 Inorganic materials 0.000 abstract 1
- 229910002367 SrTiO Inorganic materials 0.000 description 15
- WOIHABYNKOEWFG-UHFFFAOYSA-N [Sr].[Ba] Chemical compound [Sr].[Ba] WOIHABYNKOEWFG-UHFFFAOYSA-N 0.000 description 11
- 229910002113 barium titanate Inorganic materials 0.000 description 11
- JRPBQTZRNDNNOP-UHFFFAOYSA-N barium titanate Chemical compound [Ba+2].[Ba+2].[O-][Ti]([O-])([O-])[O-] JRPBQTZRNDNNOP-UHFFFAOYSA-N 0.000 description 11
- IATRAKWUXMZMIY-UHFFFAOYSA-N strontium oxide Inorganic materials [O-2].[Sr+2] IATRAKWUXMZMIY-UHFFFAOYSA-N 0.000 description 9
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 7
- 238000000576 coating method Methods 0.000 description 7
- 229910052760 oxygen Inorganic materials 0.000 description 7
- 239000001301 oxygen Substances 0.000 description 7
- 230000008901 benefit Effects 0.000 description 6
- 239000011248 coating agent Substances 0.000 description 6
- 229910052738 indium Inorganic materials 0.000 description 6
- APFVFJFRJDLVQX-UHFFFAOYSA-N indium atom Chemical compound [In] APFVFJFRJDLVQX-UHFFFAOYSA-N 0.000 description 6
- 230000008569 process Effects 0.000 description 6
- 229910021421 monocrystalline silicon Inorganic materials 0.000 description 5
- GYHNNYVSQQEPJS-UHFFFAOYSA-N Gallium Chemical compound [Ga] GYHNNYVSQQEPJS-UHFFFAOYSA-N 0.000 description 4
- 229910052733 gallium Inorganic materials 0.000 description 4
- 238000004519 manufacturing process Methods 0.000 description 3
- 238000005240 physical vapour deposition Methods 0.000 description 3
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 description 2
- 229910000287 alkaline earth metal oxide Inorganic materials 0.000 description 2
- 238000004871 chemical beam epitaxy Methods 0.000 description 2
- 238000006243 chemical reaction Methods 0.000 description 2
- 238000000151 deposition Methods 0.000 description 2
- 239000000428 dust Substances 0.000 description 2
- 229910052735 hafnium Inorganic materials 0.000 description 2
- VBJZVLUMGGDVMO-UHFFFAOYSA-N hafnium atom Chemical compound [Hf] VBJZVLUMGGDVMO-UHFFFAOYSA-N 0.000 description 2
- MRELNEQAGSRDBK-UHFFFAOYSA-N lanthanum(3+);oxygen(2-) Chemical compound [O-2].[O-2].[O-2].[La+3].[La+3] MRELNEQAGSRDBK-UHFFFAOYSA-N 0.000 description 2
- 238000001741 metal-organic molecular beam epitaxy Methods 0.000 description 2
- 229910052698 phosphorus Inorganic materials 0.000 description 2
- 239000011574 phosphorus Substances 0.000 description 2
- 229910016066 BaSi Inorganic materials 0.000 description 1
- MYMOFIZGZYHOMD-UHFFFAOYSA-N Dioxygen Chemical compound O=O MYMOFIZGZYHOMD-UHFFFAOYSA-N 0.000 description 1
- 229910004122 SrSi Inorganic materials 0.000 description 1
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 description 1
- 230000008859 change Effects 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 230000008021 deposition Effects 0.000 description 1
- 238000005137 deposition process Methods 0.000 description 1
- 229910001882 dioxygen Inorganic materials 0.000 description 1
- 235000013399 edible fruits Nutrition 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 230000005611 electricity Effects 0.000 description 1
- 239000003344 environmental pollutant Substances 0.000 description 1
- 229910001938 gadolinium oxide Inorganic materials 0.000 description 1
- 229940075613 gadolinium oxide Drugs 0.000 description 1
- CMIHHWBVHJVIGI-UHFFFAOYSA-N gadolinium(iii) oxide Chemical compound [O-2].[O-2].[O-2].[Gd+3].[Gd+3] CMIHHWBVHJVIGI-UHFFFAOYSA-N 0.000 description 1
- 229910052746 lanthanum Inorganic materials 0.000 description 1
- 230000006911 nucleation Effects 0.000 description 1
- 238000010899 nucleation Methods 0.000 description 1
- 230000003647 oxidation Effects 0.000 description 1
- 238000007254 oxidation reaction Methods 0.000 description 1
- 231100000719 pollutant Toxicity 0.000 description 1
- 230000000630 rising effect Effects 0.000 description 1
- 229910052706 scandium Inorganic materials 0.000 description 1
- SIXSYDAISGFNSX-UHFFFAOYSA-N scandium atom Chemical compound [Sc] SIXSYDAISGFNSX-UHFFFAOYSA-N 0.000 description 1
- 238000004088 simulation Methods 0.000 description 1
- 238000003746 solid phase reaction Methods 0.000 description 1
- 238000010671 solid-state reaction Methods 0.000 description 1
- 238000000038 ultrahigh vacuum chemical vapour deposition Methods 0.000 description 1
- LSGOVYNHVSXFFJ-UHFFFAOYSA-N vanadate(3-) Chemical compound [O-][V]([O-])([O-])=O LSGOVYNHVSXFFJ-UHFFFAOYSA-N 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L28/00—Passive two-terminal components without a potential-jump or surface barrier for integrated circuits; Details thereof; Multistep manufacturing processes therefor
- H01L28/40—Capacitors
- H01L28/55—Capacitors with a dielectric comprising a perovskite structure material
- H01L28/56—Capacitors with a dielectric comprising a perovskite structure material the dielectric comprising two or more layers, e.g. comprising buffer layers, seed layers, gradient layers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/43—Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
- H01L29/49—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET
- H01L29/51—Insulating materials associated therewith
- H01L29/516—Insulating materials associated therewith with at least one ferroelectric layer
Abstract
A semiconductor structure (400) and method for forming a semiconductor structure including a high dielectric constant material includes a monocrystalline semiconductor substrate (401), one or more layers of a stoichiometric monocrystalline, high dielectric constant material (404), and one or more layers of a non-stoichiometric, high dielectric constant material (405). The high dielectric constant material may include a monocrystalline alkali earth metal titanate, such as (Ba,Sr)TiO3. Semiconductor devices fabricated in accordance with the present invention exhibit reduced leakage current density.
Description
Invention field
The present invention relates generally to semiconductor structure and device and manufacture method thereof, more specifically, the oxide that relates to semiconductor structure and device and semiconductor structure, device and comprise non-stoichiometry, high-k is with the manufacturing and the use of the integrated circuit that reduces leakage current density.
Background of invention
Epitaxial growth monocrystalline oxide film is in a lot of device application on silicon---for example, ferro-electric device, non-volatile high-density memory device and MOS device of future generation---in all very important.And in the preparation of these films, key is will be on silicon face to be subsequently monocrystalline oxide---for example, perovskite---growth set up regular transition zone or resilient coating.
In these oxides some---for example BaO and BaTiO
3---be to utilize BaSi
2(cube phase) template upward forms at silicon (100) being higher than 850 ℃ temperature deposit 1/4th individual layer Ba by utilize molecular beam epitaxy on silicon (100).See, for example, R.McKeeet al., Appl.Phys.Lett.59 (7), p.782-784 (12 Aug.1991); R.McKee etal., Appl.Phys.Lett.63 (20), p.2818-2820 (15 Nov.1993); R.McKee etal., Mat.Res.Soc.Symp.Proc., Vol.21, p.131-135 (1991); U.S.PatentNo.5,225,031, issued July 6,1993, entitled " PROCESS FORDEPOSITING AN OXIDE EPITAXIALLY ONTO A SILICONSUBSTRATE AND STRUCTURES PREPARED WITH THEPROCESS "; And U.S.Patent No.5,482,003, issued January 9,1996, entitled " PROCESS FOR DEPOSITING EPITAXIAL ALKALINEEARTH OXIDE ONTO A SUBSTRATE AND STRUCTURESPREPARED WITH THE PROCESS. " proposes a kind of silication strontium (SrSi with c (4 * 2) structure
2) INTERFACE MODEL.See, for example, R.McKee et al., Phys.Rev.Lett.81 (14), 3014 (5 Oct.1998).Yet, the simulation of the atomic scale of this structure is shown that at high temperature it is likely unsettled.
Realized the SrTiO that utilizes the SrO resilient coating on silicon (100), to carry out
3Growth.See, for example, T.Tambo et al., Jpn.J.Appl.Phys., Vol.37, p.4454-4459 (1998).Yet SrO resilient coating thicker (100 dust), thus limited application aspect the transistor film, and in growth course, can not keep degree of crystallinity.
In addition, utilized the thick oxide layers (60-120 dust) of SrO and the TiO SrTiO that on silicon, grown
3See, for example, B.K.Moon et al., Jpn.J.Appl.Phys., Vol.33, p.1472-1477 (1994).Yet these thick resilient coatings can limit their application aspect transistor.
In CMOS used, these oxide skin(coating)s utilized molecular oxygen to make and do thinlyyer (that is, less than 50 dusts).Therefore because oxygen defect or room, can cause normal occur that high electricity leaks the leakage film arranged.In addition, these films need be annealed in oxygen after growth is finished to reduce to pass the leakage current density of oxide skin(coating).
Therefore, need a kind of method of on semiconductor structure, making high dielectric constant oxide with low-leakage current density.
An object of the present invention is to provide a kind of method, utilize the titanate of non-stoichiometric alkaline-earth metal to make the semiconductor device structure of high-k, thereby reduce leakage current density.
The accompanying drawing summary
The present invention illustrates by embodiment, is not limited to accompanying drawing, element like the similar reference number representation class in the accompanying drawing, wherein:
Fig. 1 is a cross section, schematically illustrates the semiconductor structure that a certain embodiment is made according to the present invention;
Fig. 2 is a cross section, schematically illustrates the semiconductor structure that alternate embodiment is made according to the present invention;
Fig. 3 is a cross section, schematically illustrates the structure of making according to yet another embodiment of the invention;
Fig. 4 is a cross section, schematically illustrates according to the present invention the semiconductor device structure that an embodiment is made again;
Fig. 5 is a cross section, schematically illustrates the semiconductor device structure of making according to another embodiment of the invention.
Those skilled in the art can understand, and the element among the figure is not drawn in proportion all for simple and clear and explanation like this.For example, can be with respect to the size of some element in other element enlarged drawing, promote understanding with this to embodiment of the present invention.
Accompanying drawing describes in detail
The following examples illustrate the technology of a certain embodiment according to the present invention, are used to make the semiconductor structure with low-leakage current density.This technology at first provides the single crystal semiconductor substrate that comprises silicon and/or germanium.The a certain embodiment according to the present invention, this Semiconductor substrate are the silicon chip of (100) direction.The substrate direction can be vertically or off-axis to 0.5 ° at the most.At least a portion substrate surface is exposed, although the other parts of substrate as below can comprise other structure described.Term " exposes " surface that means this part of substrate in the text and has been cleaned and removes all oxides, pollutant or other impurity material.As everyone knows, exposed silicon activity is very high, is easy to form natural oxide.Term " exposes " and should comprise such natural oxide.Also can be wittingly on Semiconductor substrate the thin silicon dioxide of growth, although such grown oxide is not that this technology is necessary according to the present invention.For epitaxial growth monocrystalline oxide layer on single crystalline substrate, at first to remove natural oxide to expose the crystal structure of underlying substrate.Although also can be used for wherein as those other technologies that outline below according to the present invention, technology is subsequently undertaken by molecular beam epitaxy (MBE) usually.Can pass through the at first combination of heat deposition skim strontium, barium, strontium and barium in MBE equipment, or natural oxide is removed in the combination of other alkaline-earth metal or alkaline-earth metal.Then, in the situation of using strontium, substrate is heated to about 750 ℃, makes the reaction of strontium and natural silicon dioxide layer.Strontium is used to reduce the surface that silicon dioxide stays no silicon dioxide.As a result, such surface---is 2 * 1 orderly structures---and comprises strontium, oxygen and silicon.2 * 1 orderly structures form the template of the ordering growth of monocrystalline oxide upper caldding layer.Template provides and has made necessary chemistry of upper caldding layer crystal growth nucleation and physical characteristic.
The alternate embodiment according to the present invention, by utilize MBE to deposit alkaline earth oxide at low temperatures at substrate surface---for example strontium oxide strontia, strontium oxide strontia barium or barium monoxide---and this structure is heated to about 750 ℃ subsequently, convertible natural silicon dioxide, substrate surface can be ready to the growing single-crystal oxide skin(coating).Under this temperature, solid-state reaction takes place between strontium oxide strontia and natural silicon dioxide, nature silicon dioxide is reduced, remaining remained on surface has orderly 2 * 1 structures of strontium, oxygen and silicon.
After substrate surface is removed silicon dioxide, a certain embodiment according to the present invention is cooled to about 200-800 ℃ with substrate, and by molecular beam epitaxy one deck strontium titanates of on template layer, growing.In MBE technology, at first open the shutter in the MBE equipment, expose strontium, titanium and oxygen source.Ratio between strontium and the titanium is approximately 1: 1.At first the dividing potential drop with oxygen is made as minimum value, with the growth rate of the about per minute 0.3-0.5nm stoichiometric strontium titanates of growing.After the strontium titanates that begins to grow, the dividing potential drop of rising oxygen makes it be higher than initial minimum value.
Above-mentioned description of the process be used to utilize molecular beam epitaxial process to form the technology of the semiconductor structure that comprises silicon substrate and last capping oxidation layer.This technology also can be undertaken by following technology: chemical vapor deposition (CVD), metal organic chemical vapor deposition (MOCVD), migration enhanced epitaxy (MEE), atomic layer epitaxy (ALE), physical vapor deposition (PVD), chemical solution deposition (CSD), pulsed laser deposition (PLD) etc.In addition, by similar method, other monocrystalline of also can growing, the for example titanate of alkaline-earth metal, zirconates, Hafnium hydrochlorate, tantalates, vanadate, ruthenate and niobates, perovskite structure oxide, for example alkaline earth metal tin-based perovskite, lanthanum aluminate, lanthana scandium, and gadolinium oxide.
Fig. 1 is a cross section, schematically illustrates the structure 100 of a certain embodiment according to the present invention.Structure 100 can be for example MOS device or the used such device of grid dielectric element of any high-k device.Structure 100 comprises single crystal semiconductor substrate 101.Substrate 101 can comprise any suitable single-crystal semiconductor material, for example, and silicon (Si), germanium (Ge), SiGe (Si-Ge), GaAs (GaAs), indium gallium arsenic (InGaAs), indium aluminium arsenic (InAlAs), gallium aluminium arsenic (AlGaAs) and indium gallium phosphorus (InGaP).Preferably, substrate 101 comprises monocrystalline silicon piece.
On substrate 101, form monocrystalline oxide layer 103.In a certain embodiment, the monocrystalline oxide material of monocrystalline oxide layer 103 for selecting because of the compatibility of itself and underlying substrate and upper strata compound semiconductor materials.In this embodiment, layer 103 can comprise, for example, and stoichiometric titanates of alkali-earth metals, for example barium titanate (BaTiO
3), strontium titanates (SrTiO
3) or barium strontium (Sr
zBa
1-zTiO
3, 0＜z＜1).In the ratio of alkaline-earth metal and titanium is can obtain stoichiometric titanates of alkali-earth metals at 1: 1 o'clock.In a certain embodiment, layer 103 is approximately the stoichiometric SrTiO that 2-10 individual layer and thickness are preferably about 5 individual layers for thickness
3Layer.
On layer 103, form additional monocrystalline oxide layer 104.In a certain embodiment, the monocrystalline oxide material of monocrystalline oxide layer 104 for selecting because of itself and the crystal compatibility of layer 103.In this embodiment, layer 104 can comprise, for example, and non-stoichiometric titanates of alkali-earth metals, for example barium titanate, strontium titanates and barium strontium.Ratio at alkaline-earth metal and titanium can obtain non-stoichiometric titanates of alkali-earth metals greater than 1: 1 o'clock, can be by setting up different alkaline-earth metal flow velocitys and the titanium flow velocity obtains non-stoichiometric titanates of alkali-earth metals in the process that forms the titanates of alkali-earth metals layer.For example, if the flow velocity of alkaline-earth metal greater than the flow velocity of titanium, the ratio that side can form alkaline-earth metal and titanium was greater than 1: 1 non-stoichiometric titanates of alkali-earth metals.Preferably, the ratio of alkaline-earth metal and titanium is less than or equal to about 1.8: 1.In a certain embodiment, layer 104 is non-stoichiometric SrTiO
3Layer, thickness can be about 2-10 individual layer, is preferably about 5 individual layers.Preferably, the oxide thickness comprehensive of equal value of layer 103 and 104 is less than or equal to about 1.5nm.
According to this embodiment of the present invention, on layer 104, form the 3rd monocrystalline oxide layer 105.Layer 105 can comprise, for example, and stoichiometric titanates of alkali-earth metals, for example barium titanate (BaTiO
3), strontium titanates (SrTiO
3) or barium strontium (Sr
zBa
1-zTiO
3, 0＜z＜1).In a certain embodiment middle level 105 is stoichiometric SrTiO
3Layer, thickness can be about 2-10 individual layer, is preferably about 5 individual layers.Comprise the gate dielectric that is used for the high-k semiconductor device as fruit structure 100,, can on layer 105, form the conductive gate electrode (not shown) then according to the known technology of those skilled in the art.
Fig. 2 is a cross section, schematically illustrates semiconductor device structure 200 according to another embodiment of the invention.Device architecture 200 can be the device as for example MOS device or any high-k device.Structure 200 comprises single crystal semiconductor substrate 201, is preferably monocrystalline silicon piece.
On substrate 201, form monocrystalline oxide layer 203.Monocrystalline oxide layer 203 is preferably the monocrystalline oxide material of selecting because of the crystal compatibility of itself and underlying substrate and upper strata compound semiconductor materials.In this embodiment, layer 203 can comprise, for example, and non-stoichiometric titanates of alkali-earth metals, for example barium titanate (Ba
xTi
1-xO
3), strontium titanates (Sr
xTi
1-xO
3) or barium strontium ((Sr
zBa
1-z)
xTi
1-xO
3, 0＜x＜1,0＜z＜1).In a certain embodiment, layer 203 is non-stoichiometric SrTiO
3Layer, thickness can be about 2-10 individual layer, is preferably about 5 individual layers.On layer 203, form additional monocrystalline oxide layer 204.Monocrystalline oxide layer 204 is preferably the monocrystalline oxide material of selecting because of itself and the crystal compatibility of layer 203.In this embodiment, layer 204 can comprise, for example, and stoichiometric titanates of alkali-earth metals, for example barium titanate, strontium titanates or barium strontium.In a certain embodiment, layer 204 is stoichiometric SrTiO
3Layer, thickness can be about 2-10 individual layer, is preferably about 5 individual layers.This embodiment in a certain respect in, layer 203 and 204 oxide thickness comprehensive of equal value is less than or equal to about 1.5nm.
In this embodiment, the gate dielectric that layer 203 and 204 comprises jointly and is used for the high-k semiconductor device---for example MOS device---.According to the known technology of those skilled in the art, can on layer 204, form conductive gate electrode 205 to finish device architecture.Can continue to make according to standard production technology then, form the integrated circuit of finishing substantially that comprises device architecture of the present invention, for example illustrated in fig. 2.
Fig. 3 is a cross section, schematically illustrates the structure 300 according to yet another embodiment of the invention.Structure 300 can be a picture, for example, is used for the such structure of grid dielectric element of MOS device or any high-k device.Structure 300 comprises single crystal semiconductor substrate 301, is preferably monocrystalline silicon piece.
On substrate 301, form monocrystalline oxide layer 302.In a certain embodiment, monocrystalline oxide layer 302 is for because of itself and the monocrystalline oxide material of selecting with the crystal compatibility of underlying substrate and upper strata compound semiconductor materials.In this embodiment, layer 302 can comprise, for example, and non-stoichiometric titanates of alkali-earth metals, for example barium titanate (Ba
xTi
1-xO
3), strontium titanates (Sr
xTi
1-xO
3) or barium strontium ((Sr
zBa
1-z)
xTi
1-xO
3, 0＜x＜1,0＜z＜1).On layer 302, form additional monocrystalline oxide layer 303.Monocrystalline oxide layer 303 is preferably the monocrystalline oxide material of selecting because of itself and the crystal compatibility of layer 302.In this embodiment, layer 303 can comprise, for example, and stoichiometric titanates of alkali-earth metals, for example barium titanate, strontium titanates or barium strontium.
According to this embodiment of the present invention, on layer 303, form the alternating layer of many non-stoichiometric titanates of alkali-earth metals and stoichiometric titanates of alkali-earth metals.As long as these layer conversion between non-stoichiometry and stoichiometry as this structure forms, the stoichiometry/non-stoichiometry character of layer 302,303 and extra play is not critical.That is to say, preferably, on stoichiometric titanates of alkali-earth metals layer, do not form another stoichiometric titanates of alkali-earth metals layer, on non-stoichiometric titanates of alkali-earth metals layer, do not form another non-stoichiometric titanates of alkali-earth metals layer.As shown in Figure 3, on layer 303, form the 3rd monocrystalline oxide layer 304.Layer 304 can comprise, for example, and non-stoichiometric titanates of alkali-earth metals.On layer 304, form the 4th monocrystalline oxide layer 305 at last.Layer 305 can comprise, for example, and stoichiometric titanates of alkali-earth metals.The gate dielectric that in this preferred embodiment, layer 302,303,304 and 305 comprises jointly and is used for the high-k semiconductor device---for example MOS device---.This embodiment in a certain respect in, alternately each layer thickness in the monocrystalline oxide layer is about 1-2nm.
Fig. 4 is a cross section, schematically illustrates the semiconductor device structure 400 that a certain alternate embodiment is made according to the present invention, and wherein semiconductor device structure 400 comprises the MOS device.Structure 400 comprises single crystal semiconductor substrate 401, is preferably monocrystalline silicon piece.---for example ion injects---forms drain region 402 and source region 403 at substrate 401 to utilize the known technology of those skilled in the art.Between zone 402 and 403, determined channel region 408 as substrate 401 parts by drain region 402 and source region 403.
Contiguous channel region 408 places form monocrystalline oxide layer 404 on substrate 401.Layer 404 is preferably the monocrystalline oxide material of selecting because of the crystal compatibility of itself and underlying substrate and any upper strata compound semiconductor materials.In this embodiment, layer 404 can comprise, for example, and stoichiometric titanates of alkali-earth metals, for example barium titanate (BaTiO
3), strontium titanates (SrTiO
3) or barium strontium (Sr
zBa
1-zTiO
3, 0＜x＜1,0＜z＜1).In a certain embodiment, layer 404 is stoichiometric SrTiO
3Layer, thickness can be about 2-10 individual layer, is preferably about 5 individual layers.
In this embodiment, on layer 404, form second monocrystalline oxide layer 405.Layer 405 is preferably the monocrystalline oxide layer of selecting because of itself and the crystal compatibility of layer 404.In the embodiment that illustrates, layer 405 can comprise, for example, and non-stoichiometric titanates of alkali-earth metals, for example barium titanate, strontium titanates and barium strontium.In a certain embodiment, layer 405 is non-stoichiometric Sr
xTi
1-xO
3Layer, 0＜x＜1 wherein, its thickness can be about 2-10 individual layer, is preferably about 5 individual layers.
According to this embodiment of the present invention, on layer 405, form the 3rd monocrystalline oxide layer 406.Layer 406 can comprise, for example, and stoichiometric titanates of alkali-earth metals, for example barium titanate (BaTiO
3), strontium titanates (SrTiO
3) or barium strontium (Sr
zBa
1-zTiO
3, 0＜x＜1,0＜z＜1).In this embodiment, layer 406 is stoichiometric SrTiO
3Layer, thickness can be about 2-10 individual layer, is preferably about 5 individual layers.On layer 406, form conductive gate electrode 407 to finish the MOS device architecture according to the known technology of those skilled in the art then.
Fig. 5 is a cross section, schematically illustrates according to the present invention the semiconductor device structure 500 that an embodiment is made again, and wherein semiconductor device structure 500 comprises the MSO device.Structure 500 comprises single crystal semiconductor substrate 501, is preferably monocrystalline silicon piece.---for example ion injects---forms drain region 502 and source region 503 at substrate 501 to utilize the known technology of those skilled in the art.Between zone 502 and 503, determined channel region 510 as substrate 501 parts by drain region 502 and source region 503.
On substrate 501, form monocrystalline oxide layer 504.In a certain embodiment, the monocrystalline oxide material of layer 504 for selecting because of the crystal compatibility of itself and underlying substrate and upper strata compound semiconductor material layer 505.In this embodiment, layer 504 can comprise, for example, and titanates of alkali-earth metals, Jian Tu Jin Shu Hafnium hydrochlorate or alkaline earth metal zirconate.In representative embodiment, layer 504 is (Ba, Sr) TiO
3Layer, thickness can be about 2-10 individual layer.Compound semiconductor layer 505 can comprise, for example, and SiGe (Si-Ge), GaAs (GaAs), indium gallium arsenic (InGaAs), indium aluminium arsenic (InAlAs), gallium aluminium arsenic (AlGaAs) or indium gallium phosphorus (InGaP).
On layer 505 and channel region 510, form monocrystalline oxide layer 506 then.Layer 506 is preferably the monocrystalline oxide material of selecting because of itself and the crystal compatibility of layer 505.In the illustrated embodiment, layer 506 can comprise, for example, and stoichiometric titanates of alkali-earth metals, for example barium titanate, strontium titanates or barium strontium.In a certain embodiment, layer 506 is stoichiometric SrTiO
3Layer, thickness is about 5 individual layers.According to the embodiment of the present invention, on layer 506, form second monocrystalline oxide layer 507.Layer 507 can comprise, for example, non-stoichiometric titanates of alkali-earth metals, wherein the ratio of alkaline-earth metal and titanium was greater than 1: 1.In a certain embodiment, layer 507 is non-stoichiometric Sr
xTi
1-xO
3Layer, thickness is about 5 individual layers.Further, according to the embodiment of the present invention, on layer 507, form the 3rd monocrystalline oxide layer 508.Layer 508 can comprise, for example, and stoichiometric titanates of alkali-earth metals.In a certain embodiment, layer 508 is stoichiometric SrTiO
3Layer, thickness is about 5 individual layers.Altogether, according to this embodiment in a certain respect, the synthetic band gap of layer 506,507 and 508 is greater than about 3.2eV.On layer 508, form conductive gate electrode 509 to finish the MOS device architecture according to the known technology of those skilled in the art then.
Therefore, disclosed is the method for making the high-k semiconductor device that has reduced leakage current density.As disclosed, each of semiconductor device layer available various growth deposition process form, comprising, but be not limited to molecular beam epitaxy (MBE), chemical beam epitaxy (CBE), metal organic molecular beam epitaxy (MOMBE), high vacuum chemical vapour deposition (CVD) (UHVCVD), physical vapor extension (PVD), metal organic vapor (MOCVD) etc.
In above stated specification, the present invention has been described with reference to particular.Yet those skilled in the art can both understand, and only otherwise depart from the scope of the present invention that proposes in the following claim, can carry out various adjustment and change.Therefore, should regard as these explanations and accompanying drawing illustrative and nonrestrictive, all such adjustment all will be included in the field of the invention.
On regard to particular and described benefit, other advantage and way to solve the problem.Yet, these benefits, advantage, way to solve the problem, and any key element that can make any benefit, advantage or solution generation or become clearer and more definite is not key, necessary or the basic feature or the key element that will be interpreted as any or all claim.Herein, term " comprises ", " by ... constitute " and any variant be will cover nonexcludability to comprise, like this, the technology, method, project or the equipment that comprise a row key element not only comprise those key elements, and also can comprise does not have clear list or with such technology, method, project or equipment other key element of inner link is arranged.Further, not having which key element described herein is basic for implementation of the present invention, unless they very clearly are described as " basic " or " necessary ".
Claims (43)
1. high-k device architecture comprises:
Single crystal semiconductor substrate has a surface;
The stoichiometric monocrystalline titanates of alkali-earth metals of ground floor covers this surface; And
The non-stoichiometric monocrystalline titanates of alkali-earth metals of the second layer covers this surface.
2. according to the structure of claim 1, wherein the second layer ratio that comprises alkaline-earth metal and titanium was greater than 1: 1 material.
3. according to the structure of claim 2, wherein ground floor comprises the alkaline-earth metal that is selected from following group: barium, strontium, and barium and strontium.
4. according to the structure of claim 2, wherein the second layer comprises the alkaline-earth metal that is selected from following group: barium, strontium, and barium and strontium.
5. according to the structure of claim 4, wherein ratio is less than or equal to 1.8: 1.
6. according to the structure of claim 1, wherein the silicon dioxide thickness comprehensive of equal value of the ground floor and the second layer is less than or equal to about 1.5nm.
7. according to the structure of claim 1, wherein Semiconductor substrate comprises and is selected from following semi-conducting material: Si, Ge, Si-Ge, GaAs, InP, and SiC.
8. according to the structure of claim 1, further comprise to small part and be formed on semiconductor device structure in the substrate.
9. structure according to Claim 8, wherein the ground floor and the second layer form the gate dielectric of semiconductor device structure jointly.
10. according to the structure of claim 9, further comprise the dielectric conductive gate electrode of covering gate.
11. according to the structure of claim 1, wherein the second layer is formed the covering ground floor.
12. according to the structure of claim 14, further comprise the 3rd layer of stoichiometric monocrystalline titanates of alkali-earth metals, cover this second layer.
13. according to the structure of claim 1, wherein ground floor is formed the covering second layer.
14. a high-k device architecture comprises:
Single crystal semiconductor substrate;
The alternating layer of a plurality of stoichiometry monocrystalline titanates of alkali-earth metals and non-stoichiometry monocrystalline titanates of alkali-earth metals covers this substrate.
15. according to the structure of claim 14, each layer in wherein a plurality of alternating layers comprises (Ba, Sr) TiO
3
16. according to the structure of claim 15, wherein the non-stoichiometry monocrystalline titanates of alkali-earth metals layer ratio that comprises barium or strontium or barium and strontium and titanium was greater than 1: 1 material.
17. according to the structure of claim 15, each layer thickness in wherein a plurality of alternating layers is about 1-2nm.
18. a semiconductor device structure comprises:
Single crystal semiconductor substrate;
Source disconnected from each other and drain region are formed in the substrate, have determined channel region between them;
Ground floor monocrystalline non-stoichiometric (Ba, Sr) TiO
3, cover this channel region; And conductive gate electrode, cover this ground floor and this channel region.
19., further comprise (Ba, Sr) TiO of second layer monocrystal chemical metering according to the device architecture of claim 18
3, cover this channel region.
20. according to the device architecture of claim 19, wherein the second layer covers ground floor.
21., further comprise (Ba, Sr) TiO of the 3rd layer of monocrystal chemical metering according to the device architecture of claim 20
3, it is under ground floor.
22. according to the device architecture of claim 19, wherein substrate comprises and is selected from following material: Si, Ge, Si-Ge, GaAs, SiC, and InP.
23. device architecture according to claim 19, wherein substrate comprises the single crystalline layer that is selected from following compound semiconductor materials: GaAs, InGaAs, InAlAs, AlGaAs, and InGaP, covering comprises the body single crystalline substrate that is selected from following material: Si, Ge, Si-Ge, GaAs, InP, and SiC.
24. according to the device architecture of claim 23, further comprise the oxide monocrystal layer, under the compound semiconductor materials single crystalline layer.
25. a semiconductor device structure comprises:
Single crystal semiconductor substrate;
Semiconductor device is formed in the substrate to small part; And
(Ba, Sr) TiO
3Single crystalline layer, band gap are greater than about 3.2eV, and it covers semiconductor device.
26. according to the device architecture of claim 25, wherein the single crystalline layer ratio that comprises Ba or Sr or Ba and Sr and Ti was greater than 1: 1 non-stoichiometric (Ba, Sr) TiO
3Layer.
27. according to the device architecture of claim 25, wherein single crystalline layer comprises many sublayers, wherein one deck is that the ratio of Ba or Sr or Ba and Sr and Ti was greater than 1: 1 non-stoichiometric (Ba, Sr) TiO at least
3
28. a technology of making the high-k device architecture comprises the following step:
The preparation single crystal semiconductor substrate;
Growth regulation one deck monocrystalline titanates of alkali-earth metals covers this substrate; And
Growth second layer monocrystalline titanates of alkali-earth metals covers this ground floor, and wherein a layer in the ground floor and the second layer comprises non-stoichiometric titanates of alkali-earth metals.
29. technology according to claim 28, wherein per step of step of the growth regulation one deck and the growth second layer all comprises to utilize and is selected from the growth that following technology is carried out: molecular beam epitaxy, chemical vapour deposition (CVD), metal organic chemical vapor deposition, migration enhanced epitaxy, atomic layer epitaxy, physical vapor extension, chemical solution deposition, and pulsed laser deposition.
30. according to the technology of claim 28, wherein per step of step of the growth regulation one deck and the growth second layer all comprises the growth that utilizes molecular beam epitaxy to carry out.
31. according to the technology of claim 30, wherein one of step of the growth regulation one deck and the growth second layer comprises the step of the ratio of growth one deck alkaline-earth metal and titanium greater than 1: 1 titanates of alkali-earth metals.
32. according to the technology of claim 31, wherein the step of growth regulation one deck comprises the step of setting up the first alkaline-earth metal flow and the second titanium flow.
33. according to the technology of claim 32, the step of the second layer of wherein growing comprises the step that keeps the first alkaline-earth metal flow and set up the Tritanium/Trititanium flow that is different from second flow.
34. according to the technology of claim 32, the step of the second layer of wherein growing comprises the step that keeps the second titanium flow and set up the 4th alkaline-earth metal flow that is different from first flow.
35. according to the technology of claim 30, the step that the step of the second layer of wherein growing is included in the growth second layer stops the step of growth regulation one deck before beginning.
36., further be included in the step that forms the transition zone that comprises 1-2 individual layer between the ground floor and the second layer according to the technology of claim 30.
37. according to the technology of claim 28, wherein per step of step of the growth regulation one deck and the growth second layer all comprises growth and comprises (Ba, Sr) TiO
3Step.
38. according to the technology of claim 28, the step of wherein preparing single crystal semiconductor substrate comprises the step that preparation comprises the substrate that is selected from following material: silicon, germanium, silicon-germanium and GaAs.
39. according to the technology of claim 28, the step of wherein preparing single crystal semiconductor substrate comprises the step that preparation is selected from the single crystalline layer of following material: GaAs, InGaAs, InAlAs, AlGaAs, and InGaP.
40. a technology of making semiconductor device comprises the following step:
Preparation comprises the single crystalline substrate of silicon, and this substrate has a surface;
The ion implanted impurity dopant ion is to form source disconnected from each other and drain region on the surface;
Molecular beam epitaxial growth comprises (Ba, Sr) TiO
3Single crystalline layer, cover this surface, this layer comprises the sublayer of band gap greater than 3.2eV; And
Form conductive electrode and cover this layer, and this electrode is between source and drain region.
41. according to the technology of claim 40, wherein the molecular beam epitaxial growth step comprises (Ba, Sr) TiO that growth comprises rich alkaline-earth metal
3First sublayer and comprise stoichiometric (Ba, Sr) TiO
3Second sublayer, second sublayer covers first sublayer.
42. according to the technology of claim 40, wherein the molecular beam epitaxial growth step comprises growth and comprises stoichiometric (Ba, Sr) TiO
3First sublayer, comprise (Ba, Sr) TiO of rich alkaline-earth metal
3And cover second sublayer of first sublayer, and comprise stoichiometric (Ba, Sr) TiO
3And cover the 3rd sublayer of second sublayer.
43. according to the technology of claim 40, wherein molecular beam epitaxial growth comprises growth rich alkali-metal (Ba, Sr) TiO
3With stoichiometric (Ba, Sr) TiO
3Alternately sublayer.
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US71242500A | 2000-11-14 | 2000-11-14 | |
| US09/712,425 | 2000-11-14 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN1475027A true CN1475027A (en) | 2004-02-11 |
Family
ID=24862055
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CNA018188613A Pending CN1475027A (en) | 2000-11-14 | 2001-10-15 | Semiconductor structure having high dielectric constant material |
Country Status (7)
| Country | Link |
|---|---|
| EP (1) | EP1338029A1 (en) |
| JP (1) | JP2004514288A (en) |
| KR (1) | KR20030051820A (en) |
| CN (1) | CN1475027A (en) |
| AU (1) | AU2002213173A1 (en) |
| TW (1) | TW507317B (en) |
| WO (1) | WO2002041371A1 (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN107342318A (en) * | 2011-06-27 | 2017-11-10 | 科锐 | For the wet chemistry method for the semiconductor devices for manufacturing channel mobility enhancing |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2003063227A2 (en) * | 2002-01-22 | 2003-07-31 | Massachusetts Institute Of Technology | A method of fabrication for iii-v semiconductor surface passivation |
| US6791125B2 (en) * | 2002-09-30 | 2004-09-14 | Freescale Semiconductor, Inc. | Semiconductor device structures which utilize metal sulfides |
| TW200720499A (en) | 2005-11-24 | 2007-06-01 | Univ Nat Tsing Hua | Manufacturing method of substrate used for forming MOSFET device and products thereof |
| US20100072531A1 (en) * | 2008-09-22 | 2010-03-25 | Imec | Method for Forming a Memory Cell Comprising a Capacitor Having a Strontium Titaniumoxide Based Dielectric Layer and Devices Obtained Thereof |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| JP2643833B2 (en) * | 1994-05-30 | 1997-08-20 | 日本電気株式会社 | Semiconductor memory device and method of manufacturing the same |
| US5780886A (en) * | 1996-05-30 | 1998-07-14 | Oki Electric Industry Co., Ltd. | Non-volatile semiconductor memory cell and method for production thereof |
| JPH11330411A (en) * | 1998-05-13 | 1999-11-30 | Matsushita Electric Ind Co Ltd | Semiconductor storage device and its manufacture |
| US6241821B1 (en) * | 1999-03-22 | 2001-06-05 | Motorola, Inc. | Method for fabricating a semiconductor structure having a crystalline alkaline earth metal oxide interface with silicon |
-
2001
- 2001-10-15 AU AU2002213173A patent/AU2002213173A1/en not_active Abandoned
- 2001-10-15 CN CNA018188613A patent/CN1475027A/en active Pending
- 2001-10-15 EP EP01981536A patent/EP1338029A1/en not_active Withdrawn
- 2001-10-15 WO PCT/US2001/031990 patent/WO2002041371A1/en not_active Application Discontinuation
- 2001-10-15 JP JP2002543681A patent/JP2004514288A/en active Pending
- 2001-10-15 KR KR10-2003-7006563A patent/KR20030051820A/en not_active Application Discontinuation
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN107342318A (en) * | 2011-06-27 | 2017-11-10 | 科锐 | For the wet chemistry method for the semiconductor devices for manufacturing channel mobility enhancing |
| CN107342318B (en) * | 2011-06-27 | 2021-02-02 | 科锐 | Wet chemical method for manufacturing semiconductor device with enhanced channel mobility |
Also Published As
| Publication number | Publication date |
|---|---|
| JP2004514288A (en) | 2004-05-13 |
| EP1338029A1 (en) | 2003-08-27 |
| KR20030051820A (en) | 2003-06-25 |
| AU2002213173A1 (en) | 2002-05-27 |
| WO2002041371A1 (en) | 2002-05-23 |
| TW507317B (en) | 2002-10-21 |
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