CN1459848A - Hood curtain type read-only memory low heat budget making technology - Google Patents
Hood curtain type read-only memory low heat budget making technology Download PDFInfo
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- CN1459848A CN1459848A CN02120307.5A CN02120307A CN1459848A CN 1459848 A CN1459848 A CN 1459848A CN 02120307 A CN02120307 A CN 02120307A CN 1459848 A CN1459848 A CN 1459848A
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- Prior art keywords
- conductor layer
- low heat
- curtain type
- making technology
- heat budget
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- 230000015654 memory Effects 0.000 title claims description 45
- 239000004020 conductor Substances 0.000 claims abstract description 59
- 238000004519 manufacturing process Methods 0.000 claims abstract description 32
- 239000000758 substrate Substances 0.000 claims abstract description 26
- 239000010410 layer Substances 0.000 claims description 98
- 229920002120 photoresistant polymer Polymers 0.000 claims description 17
- 150000002500 ions Chemical class 0.000 claims description 14
- 238000000059 patterning Methods 0.000 claims description 10
- 229910052751 metal Inorganic materials 0.000 claims description 8
- 239000002184 metal Substances 0.000 claims description 8
- 229910021332 silicide Inorganic materials 0.000 claims description 8
- FVBUAEGBCNSCDD-UHFFFAOYSA-N silicide(4-) Chemical compound [Si-4] FVBUAEGBCNSCDD-UHFFFAOYSA-N 0.000 claims description 8
- 150000001875 compounds Chemical class 0.000 claims description 6
- 239000013078 crystal Substances 0.000 claims description 6
- 239000007943 implant Substances 0.000 claims description 6
- 229910052710 silicon Inorganic materials 0.000 claims description 6
- 239000010703 silicon Substances 0.000 claims description 6
- 239000011247 coating layer Substances 0.000 claims description 5
- 239000000463 material Substances 0.000 claims description 5
- 239000002019 doping agent Substances 0.000 claims description 4
- 229910052785 arsenic Inorganic materials 0.000 claims description 3
- RQNWIZPPADIBDY-UHFFFAOYSA-N arsenic atom Chemical compound [As] RQNWIZPPADIBDY-UHFFFAOYSA-N 0.000 claims description 3
- 229910052796 boron Inorganic materials 0.000 claims description 3
- WQJQOUPTWCFRMM-UHFFFAOYSA-N tungsten disilicide Chemical compound [Si]#[W]#[Si] WQJQOUPTWCFRMM-UHFFFAOYSA-N 0.000 claims description 3
- 229910021342 tungsten silicide Inorganic materials 0.000 claims description 3
- 238000005468 ion implantation Methods 0.000 claims 3
- HAYXDMNJJFVXCI-UHFFFAOYSA-N arsenic(5+) Chemical compound [As+5] HAYXDMNJJFVXCI-UHFFFAOYSA-N 0.000 claims 1
- -1 boron ion Chemical class 0.000 claims 1
- 230000020169 heat generation Effects 0.000 abstract 1
- 230000035755 proliferation Effects 0.000 description 8
- 238000002513 implantation Methods 0.000 description 5
- 238000000034 method Methods 0.000 description 5
- 239000000428 dust Substances 0.000 description 3
- 239000004065 semiconductor Substances 0.000 description 3
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical group [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 description 2
- 229910052581 Si3N4 Inorganic materials 0.000 description 2
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 2
- 230000015572 biosynthetic process Effects 0.000 description 2
- 238000009792 diffusion process Methods 0.000 description 2
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 2
- 239000011248 coating agent Substances 0.000 description 1
- 238000000576 coating method Methods 0.000 description 1
- 238000005530 etching Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 1
- 229920005591 polysilicon Polymers 0.000 description 1
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Abstract
A process for preparing mask ROM with low heat generation includes such steps as providing a substrate with a gate oxide layer, generating the first conductor layer, generating several bit lines in substrate, generating the second conductor layer on the first one, and generating several read-only codes in substrate.
Description
Technical field
The invention relates to a kind of mask-type ROM (mask read only memory is called for short Mask ROM) manufacture craft, and particularly relevant for a kind of hood curtain type read-only memory low heat budget (thermal budget) manufacture craft.
Background technology
Mask-type ROM is the most basic a kind of read-only memory.Known mask-type ROM manufacture craft all is to form embedded type bit line (bit line) earlier, and then forms gate oxide (gate oxide), grid layer (gate layer) etc.Yet the formation temperature of gate oxide is usually more than 800 degree Celsius, so the so hot manufacture craft of the admixture in the bit line (dopant) Chang Yinwei and the problem of horizontal proliferation (lateral diffusion) takes place.And along with constantly dwindling of dimensions of semiconductor devices, the horizontal proliferation problem that above-mentioned hot manufacture craft caused will be more serious.
So, a kind of so-called " behind gate oxide (post-gate oxide) " mask-type ROM manufacture craft is proposed again at present, mainly in substrate, form gate oxide earlier.Then, on gate oxide, form the grid layer, on the grid layer, form the silicon nitride layer of one deck again as curtain layer of hard hood.Then, carry out etching process, to remove part silicon nitride layer and grid layer.At last, utilize ionic-implantation to form embedded type bit line.
Yet, above-mentioned " behind gate oxide " though the horizontal proliferation problem that manufacture craft can avoid hot manufacture craft to cause, the more known method complexity that forms earlier bit line is many, and increases many manufacturing costs and manufacture craft time.
Summary of the invention
Therefore, purpose of the present invention just provides a kind of hood curtain type read-only memory low heat budget making technology, to reduce the problem of the bit line horizontal proliferation that causes because of hot manufacture craft.
Another purpose of the present invention provides a kind of hood curtain type read-only memory low heat budget making technology, to simplify the mask-type ROM manufacture craft.
A further object of the present invention provides a kind of hood curtain type read-only memory low heat budget making technology, can obtain bigger memory cell device nargin (device window).
According to above-mentioned and other purpose, the present invention proposes a kind of hood curtain type read-only memory low heat budget making technology, provide and have gate oxide substrate thereon, on gate oxide, form one first conductor layer again, form several bit lines then in substrate, wherein the thickness of first conductor layer is significantly less than second conductor layer.Then, on first conductor layer, form one second conductor layer, in substrate, form several read-only memory codes (ROM code) subsequently.
The present invention proposes a kind of hood curtain type read-only memory low heat budget making technology in addition, prior to forming a gate oxide in the substrate, forms one first conductor layer again on gate oxide, utilizes ionic-implantation to form several bit lines then in substrate.Then, on first conductor layer, form one second conductor layer, on second conductor layer, form one deck metal silicide layer again.Subsequently, utilize ionic-implantation in substrate, to form several read-only memory codes.
Because the present invention forms gate oxide earlier, rely on ionic-implantation to form bit line again, so can reduce heat budget, avoid known technology because form bit line earlier, and the problem of horizontal proliferation takes place when gate oxide forms.
And the present invention takes to form earlier the first thin conductor layer of one deck thereon after gate oxide forms, thus can the grill-protected oxide layer, avoid gate oxide to be subjected to the pollution of photoresist layer.
Then, the present invention also utilizes photoresist layer as the cover curtain after the first thin conductor layer forms, and carries out ion and implants manufacture craft to form bit line, forms second layer conductor layer again, to finish the making of grid layer.Therefore, the present invention's more known " behind gate oxide " manufacture craft is more oversimplified.
In addition, because the present invention can avoid bit line generation horizontal proliferation,, help the development of semiconductor device miniaturization so can obtain bigger memory cell device nargin.
For above and other objects of the present invention, feature and advantage can be become apparent, preferred embodiment cited below particularly, and cooperate appended graphicly, be described in detail below:
Description of drawings
Figure 1A to Fig. 1 F is according to the manufacturing process profile of a kind of hood curtain type read-only memory low heat budget making technology of a preferred embodiment of the present invention.Label declaration:
100: substrate 102: gate oxide
Conductor layer 106,118 in 104: the first: photoresist layer
108,122: ion is implanted manufacture craft 110: bit line
116: grid layer 120: opening
124: read-only memory code
Embodiment
Figure 1A to Fig. 1 F is according to the manufacturing process profile of a kind of mask-type ROM (maskread only memory is called for short Mask ROM) low heat budget (thermal budget) manufacture craft of the embodiment of the invention.
Please refer to Figure 1A, form a gate oxide (gate oxide) 102 earlier in a substrate 100, wherein the thickness of gate oxide 102 is about 30 dusts for example.Then, form one first conductor layer 104 on gate oxide 102, its thickness is for example between 50 dust to 200 dusts, and its material for example is compound crystal silicon (polysilicon).
Then, please refer to Figure 1B, in substrate 100, form one first patterning photoresist layer 106, and expose part first conductor layer 104.In addition, before photoresist layer 106 forms, can be at the bottom of forming one deck earlier on first conductor layer 104 reflection coating layer (bottom antireflection coating is called for short BARC).
Subsequently, please refer to Fig. 1 C, carry out an embedded type bit line (buried bit line) ion and implant manufacture craft 108, in substrate 100, to form embedded type bit line 110, admixture (dopant) ion that its intermediate ion is implanted for example is arsenic (arsenic), and the energy that ion is implanted for example is between 40KeV to 100KeV.
Then, please refer to Fig. 1 D, remove photoresist layer 106, on first conductor layer 104, form one deck second conductor layer 112 again, to form the grid layer of being formed by first conductor layer 104 and second conductor layer 112 116, wherein the thickness of second conductor layer 112 is for example between 400 dust to 700 dusts, and its material for example is a compound crystal silicon.And before second conductor layer 112 forms, can also comprise a prerinse manufacture craft (pre-clean process), to clean the surface of first conductor layer 104.Subsequently, can form one deck metal silicide layer 114 on second conductor layer 112, its thickness is between 750 dust to 1500 dusts, and its material for example is a tungsten silicide.
, please refer to Fig. 1 E, in substrate 100, form photoresist layer 118 with opening 120 thereafter.In addition, before photoresist layer 118 forms, can be at the bottom of forming one deck earlier on the metal silicide layer 114 reflection coating layer (not illustrating).
Then, please refer to Fig. 1 F, carry out a read-only memory code (ROM code) ion and implant manufacture craft 122, in substrate 100, to form doped region as read-only memory code 124, the dopant ion that its intermediate ion is implanted for example is boron (boron), and the energy that ion is implanted for example is between 40KeV to 100KeV.
By the preferred embodiment of the invention described above as can be known, apply the present invention to and have following advantage less:
1, the present invention relies on ionic-implantation to form bit line because form gate oxide earlier again, so can reduce known because of forming the heat budget that gate oxide produced, to avoid the problem of bit line generation horizontal proliferation (lateral diffusion).
2, the present invention is after gate oxide forms, and takes to form earlier the first thin conductor layer of one deck thereon, thus can the grill-protected oxide layer, avoid it to be polluted.
3, the present invention forms gate oxide earlier, forms the first thin conductor layer again, then forms bit line, forms second layer conductor layer again, to finish the making of grid layer.Therefore, the present invention needn't adopt and be known in the hard cover screen (hard mask) in the manufacture craft (post-gate oxide process) behind the gate oxide, can reach the purpose that reduces heat budget, so can simplify manufacture craft.
4, invention relies on the method for gate oxide than the first formation of bit line, and can avoid bit line generation horizontal proliferation, and then can obtain bigger memory cell device nargin, helps the development of semiconductor device miniaturization.
Though the present invention with preferred embodiment openly as above; right its is not in order to limiting the present invention, anyly is familiar with this skill person, without departing from the spirit and scope of the present invention; when can being used for a variety of modifications and variations, so protection scope of the present invention is as the criterion when looking claims.
Claims (23)
1, a kind of hood curtain type read-only memory low heat budget making technology is characterized in that: comprising:
One substrate is provided, has a gate oxide in this substrate;
On this gate oxide, form one first conductor layer;
In this substrate, form plurality of bit lines;
On this first conductor layer, form one second conductor layer;
In this substrate, form a plurality of read-only memorys.
2, hood curtain type read-only memory low heat budget making technology as claimed in claim 1 is characterized in that: wherein this first conductor layer comprises compound crystal silicon.
3, hood curtain type read-only memory low heat budget making technology as claimed in claim 1 is characterized in that: wherein form this step of those bit lines in this substrate, comprising:
On this first conductor layer, form a patterning photoresist layer;
Carry out an ion and implant manufacture craft;
Remove this patterning photoresist layer.
4, hood curtain type read-only memory low heat budget making technology as claimed in claim 3 is characterized in that: wherein the admixture of this ion implantation manufacture craft comprises arsenic ion.
5, hood curtain type read-only memory low heat budget making technology as claimed in claim 3 is characterized in that: before wherein forming this step of this patterning photoresist layer on this first conductor layer, also be included in and form an end reflection coating layer on this first conductor layer.
6, hood curtain type read-only memory low heat budget making technology as claimed in claim 1 is characterized in that: wherein this second conductor layer comprises compound crystal silicon.
7, hood curtain type read-only memory low heat budget making technology as claimed in claim 1 is characterized in that: wherein the thickness of this second conductor layer is greater than the thickness of this first conductor layer.
8, hood curtain type read-only memory low heat budget making technology as claimed in claim 1 is characterized in that: also be included in and form a metal silicide layer on this second conductor layer.
9, hood curtain type read-only memory low heat budget making technology as claimed in claim 8 is characterized in that: wherein the material of this metal silicide layer comprises tungsten silicide.
10, hood curtain type read-only memory low heat budget making technology as claimed in claim 1 is characterized in that: wherein before forming this second conductor layer on this first conductor layer, also comprise a prerinse manufacture craft.
11, hood curtain type read-only memory low heat budget making technology as claimed in claim 1 is characterized in that: wherein form this step of those read-only memorys in this substrate, comprising:
On this second conductor layer, form a patterning photoresist layer;
Carry out an ion and implant manufacture craft;
Remove this patterning photoresist layer.
12, hood curtain type read-only memory low heat budget making technology as claimed in claim 11 is characterized in that: wherein the admixture of this ion implantation manufacture craft comprises the boron ion.
13, hood curtain type read-only memory low heat budget making technology as claimed in claim 11, it is characterized in that: before wherein on this second conductor layer, forming this step of this patterning photoresist layer, also be included in and form an end reflection coating layer on this second conductor layer.
14, a kind of hood curtain type read-only memory low heat budget making technology is characterized in that: comprising:
One substrate is provided, has a gate oxide in this substrate;
On this gate oxide, form one first conductor layer;
In this substrate, form plurality of bit lines;
On this first conductor layer, form one second conductor layer.
15, hood curtain type read-only memory low heat budget making technology as claimed in claim 14 is characterized in that: wherein this first conductor layer comprises compound crystal silicon.
16, hood curtain type read-only memory low heat budget making technology as claimed in claim 14 is characterized in that: wherein form this step of those bit lines in this substrate, comprising:
On this first conductor layer, form a patterning photoresist layer;
Carry out an ion and implant manufacture craft;
Remove this patterning photoresist layer.
17, hood curtain type read-only memory low heat budget making technology as claimed in claim 16 is characterized in that: wherein the dopant ion of this ion implantation manufacture craft comprises arsenic.
18, hood curtain type read-only memory low heat budget making technology as claimed in claim 16, it is characterized in that: before wherein on this first conductor layer, forming this step of this patterning photoresist layer, also be included in and form an end reflection coating layer on this first conductor layer.
19, hood curtain type read-only memory low heat budget making technology as claimed in claim 14 is characterized in that: wherein this second conductor layer comprises compound crystal silicon.
20, hood curtain type read-only memory low heat budget making technology as claimed in claim 14 is characterized in that: wherein the thickness of this second conductor layer is greater than the thickness of this first conductor layer.
21, hood curtain type read-only memory low heat budget making technology as claimed in claim 14 is characterized in that: wherein before forming this second conductor layer on this first conductor layer, more comprise a prerinse manufacture craft.
22, hood curtain type read-only memory low heat budget making technology as claimed in claim 14 is characterized in that: be included in and form a metal silicide layer on this second conductor layer.
23, hood curtain type read-only memory low heat budget making technology as claimed in claim 22 is characterized in that: wherein the material of this metal silicide layer comprises tungsten silicide.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN02120307.5A CN1279610C (en) | 2002-05-22 | 2002-05-22 | Hood curtain type read-only memory low heat budget making technology |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN02120307.5A CN1279610C (en) | 2002-05-22 | 2002-05-22 | Hood curtain type read-only memory low heat budget making technology |
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CN1459848A true CN1459848A (en) | 2003-12-03 |
CN1279610C CN1279610C (en) | 2006-10-11 |
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CN02120307.5A Expired - Fee Related CN1279610C (en) | 2002-05-22 | 2002-05-22 | Hood curtain type read-only memory low heat budget making technology |
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Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN102810516A (en) * | 2011-06-02 | 2012-12-05 | 无锡华润上华半导体有限公司 | ROM (read only memory) device and manufacturing method thereof |
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2002
- 2002-05-22 CN CN02120307.5A patent/CN1279610C/en not_active Expired - Fee Related
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN102810516A (en) * | 2011-06-02 | 2012-12-05 | 无锡华润上华半导体有限公司 | ROM (read only memory) device and manufacturing method thereof |
CN102810516B (en) * | 2011-06-02 | 2015-02-04 | 无锡华润上华半导体有限公司 | ROM (read only memory) device and manufacturing method thereof |
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CN1279610C (en) | 2006-10-11 |
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