CN1434594A - Shortened viterbi decoding method and decoder thereof - Google Patents

Abstract

Viterbi decode is a classical decode method to convolutional code. Limitted by time and space, the viterbi decode should be cut short on realization, so its performance is reduced slightly. This invention fully utilizes the tail bit information of convolutional code to change the traditional backtract method and put forward an even precise backtrack process method to increase performance without increasing original time and space complexity.

Description

Shortened viterbi decoding method and decoder thereof

Technical field

The present invention relates to a kind of interpretation method and decoder thereof of CDMA mobile telecommunication applied technical field, particularly relate to the decoder of a kind of shortened viterbi decoding method and this method of realization.

Background technology

Convolutional encoding and Viterbi decoding are a kind of methods of effective forward error correction, and it is widely used in wireless communication field.This Viterbi decoding algorithm is a kind of maximum likelihood decoding algorithm that is used for convolution code decoding.This note convolution code is that (m), then code rate is k/n for n, k, and each moment encoding state number is 2 ^mIn 3GPP, adopt 1/2,1/3 convolution code, i.e. (2,1,8), (3,1,8) convolution code, m is 8, expression register number; During the convolution coding of 3GPP 80 additional bits are arranged, be commonly referred to as the tail bit.

Please shown in Figure 1 in conjunction with consulting, have traditional non-brachymemma Viterbi decoding algorithm general introduction now and be described as follows:

1, supposition i each state constantly all has a corresponding survivor path, and its cumulative metrics is respectively R _j ⁽ⁱ⁾(j=0 ..., 2 ^m-1).

2, establish i+1 constantly certain state j two branch roads of state s and t constantly from i are arranged, the note path metric be respectively r (s, j), r (t, j), 0≤S, t≤2 ^M-1

3, calculate the cumulative metrics that i+1 arrives two possible paths of state j constantly, relatively big or small then, preserve the bigger path (survivor path) of cumulative metrics value, leave out the less path of cumulative metrics value, and upgrade cumulative metrics value (adding) than choosing.Promptly $\mathrm{if}(R_s^{\left(i\right)}+r(s,j)>{R_t}^{\left(i\right)}+r(t,j))$ $R_j^{(i+1)}=R_s^{\left(i\right)}+r(s,j);$ elseR _j ⁽ⁱ⁺¹⁾＝R _t ⁽ⁱ⁾+r(t，j)。

4, in like manner can obtain i+1 constantly other 2 ^mThe cumulative metrics value of-1 state and corresponding survivor path.

5, calculate constantly since m,, recall the output decoding data from nought state then until handle encoding block data.

But when reality realizes, consider and to reduce decoding time of delay and save hardware resource, the general viterbi coding method that all adopts brachymemma does not promptly wait the data that harvest a code block just to begin to decipher the output data, its decoding step compare with non-brachymemma decoding be exactly the above-mentioned the 5th go on foot different.For brachymemma decoding, suppose that decoding depth is L, the 5th step of then above-mentioned non-brachymemma decoding is revised as:

5 ', constantly calculate since m, when arriving L the moment of decoding depth but also not arriving the code block end, from current 2 ^mPick out a state in the individual state and recall the position, recall a decoding output bit of output L-1 position, front as decoding.The condition that this state must satisfy is: it has maximum cumulative metrics; When L of arrival decoding depth constantly arrives the code block end simultaneously, directly recall the Bit data of the whole decoding depth L of output from nought state.

Brachymemma is deciphered the 5th one recall and is also had following several method on position selecting method (be decoder decision and export the method for the first segment information unit) conventional method:

(1), from 2 ^mOptional one is stayed the routing footpath in the paths, and its first segment information unit is exported as decoder.

(2), take out all 2 ^mThe first segment information unit in path is by big number criterion judgement output.

(3), the metric in path is made a thresholding, the thresholding when a certain path surpasses this value (if minimum distance criterion is then less than thresholding), just exports the first segment information unit in this path.

The sort of brachymemma interpretation method no matter all has a common advantage traditionally, and promptly non-relatively brachymemma interpretation method has reduced decoding time of delay and saved the resource of hardware memory; But a common shortcoming is also arranged,, does not make full use of all relevant informations of a code block of convolution code during decoding promptly because taked brachymemma, thus on performance with respect to non-brachymemma interpretation method effect less better.This shows that above-mentioned existing traditional brachymemma interpretation method still has defective, and the assistant officer treats further to be improved.

Because the defective that above-mentioned existing traditional brachymemma interpretation method exists, the inventor is actively studied innovation, through constantly studying, designing based on abundant practical experience and professional knowledge, and, create the present invention who has practical value finally through repetition test and after improving.

Summary of the invention

Technical problem underlying to be solved by this invention is, overcomes the defective that existing traditional brachymemma interpretation method exists, and provides a kind of maintenance decoding depth and hardware store resource constant, and can make the more excellent novel brachymemma interpretation method of its performance.

Another technical problem to be solved by this invention is, a kind of decoder of realizing above-mentioned maintenance decoding depth and the novel brachymemma interpretation method that the hardware store resource is constant, performance is more excellent is provided.

The present invention solves its technical problem underlying and realizes by the following technical solutions.A kind of shortened viterbi decoding method according to the present invention proposes may further comprise the steps:

(1), read in the decoding input of quantification, calculate two kinds of possible path metrics of each state;

(2), according to the result of calculation of two kinds of possible path metrics, calculate two kinds of possible path cumulative metrics values of each state;

(3), according to the path cumulative metrics value of being calculated, pick out the higher value of two kinds of possible path cumulative metrics values of each state, the position of preserving its leading state;

(4), then, judge whether current time reaches the code block end,, then recall the Bit data of the remaining final stage decoding depth L of code block of output, if do not reach the code block end, then from 0 state if reach the code block end

(5), further judge whether to reach decoding depth L,, then get back to step (1) and continue decoding if do not reach decoding depth L, if reach decoding depth L, judge whether to reach preceding t the moment position at code block end, wherein t represents the number among 0＜t＜m, and m is the register number; If judged result negates, then from 2 ^mSelect the state of maximum path cumulative metrics correspondence in the individual state, and from then on state is recalled several L-1 1 Bit datas of positions constantly of output forward, gets back to step (1) then and continues decoding, if judge it is sure, then

(6), from 2 ^tSelect the state of maximum path cumulative metrics correspondence in the individual state, and from then on state is recalled several L-1 the Bit datas of positions constantly of output forward, get back to step 1 then and proceed decoding and handle.

The present invention solves its another technical problem and realizes by the following technical solutions.According to a kind of brachymemma viterbi decoder that the present invention proposes, it comprises: the branch metric arithmetic unit is used to receive the demodulating data of quantification, to calculate decoding path branches tolerance; The cumulative metrics arithmetic unit calculates decoding path cumulative metrics according to branch metric arithmetic unit result calculated, and the cumulative metrics that will obtain survivor path stores in the state measurement memory; The state measurement memory, the cumulative metrics that is used to store survivor path; Recall the location finding device, be used for from 2 of m register of cumulative metrics arithmetic unit output ^mSelect the state and the corresponding cumulative metrics value that participate in ordering in the cumulative metrics value of individual state, find out maximum cumulative metrics value and corresponding state, and when decoding constantly arrives the tail sign indicating number, from 2 ^tSelect and find out maximum path cumulative metrics value and corresponding states in the individual state, wherein t represents the number among 0＜t＜m; With recall processor, be used to handle maximum path cumulative metrics value and the corresponding states of recalling location finding device output, and the output decoding data.

The present invention solves its technical problem and can also adopt following technical measures further to realize.

Aforesaid brachymemma viterbi decoder, wherein saidly recall the location finding device and comprise: a state selector is used for from 2 of m register of cumulative metrics arithmetic unit output ^mSelect the state and the corresponding cumulative metrics value that participate in ordering in the cumulative metrics value of individual state; A finite state sorting unit, the state and the corresponding cumulative metrics that are used for the participation ordering selected from the state selector are found out maximum cumulative metrics value and corresponding state; A conservator is preserved each the maximum cumulative metrics value and the corresponding state of the output of finite state sorting unit.

The present invention compared with prior art has tangible advantage and beneficial effect.By above technical scheme as can be known, the present invention compares with existing traditional brachymemma interpretation method, and it has following advantage and beneficial effect at least:

1, owing to increased and judged that decoding reaches the preceding t at code block end constantly (during the position of the individual moment of 0＜t＜m), from 2 ^mSelect the state of maximum path cumulative metrics correspondence in the individual state, and from then on state is recalled several L-1 1 Bit datas of positions constantly of output forward, in littler state range, search out the state position of recalling, avoided the dried of noise states to scratch, reduced the number that to recall state to be searched, improve the search precision of recalling the state position, thereby reduced hard-wired computational complexity, also improved decoding performance simultaneously.

2, decoder of the invention process is applied to the 3GPP communication system, and it is compared with existing traditional brachymemma interpretation method, does not increase the complexity of the time and space, yet has but improved decoding performance greatly, thereby be suitable for practicality more.

In sum, shortened viterbi decoding method of the present invention and decoder thereof have effectively overcome the defective that existing traditional brachymemma interpretation method exists, and it not only can keep decoding depth and hardware store resource constant, and can make its more excellent performance.No matter it is all having bigger improvement on method, on the structure or on the function, and have large improvement technically, and produced handy and practical effect, and have the effect of enhancement really, thereby being suitable for practicality more, really is a new and innovative, progressive, practical new design.

Above-mentioned explanation only is the general introduction of technical solution of the present invention, for can clearer understanding technological means of the present invention, and can be implemented according to the content of specification, below with preferred embodiment of the present invention and conjunction with figs. describe in detail as after.

Description of drawings

Fig. 1 calculates schematic diagram for the Viterbi decoding cumulative metrics.

Fig. 2 is a brachymemma Viterbi decoding flow chart of the present invention.

Fig. 3 is decoder architecture figure of the present invention.

Fig. 4 be recall location finding device internal structure and with the interface relationship figure of its external devices.

Embodiment

Below in conjunction with accompanying drawing and preferred embodiment, to shortened viterbi decoding method and its embodiment of decoder, structure, feature and the effect thereof that foundation the present invention proposes, describe in detail as after.

See also Fig. 3, shown in Figure 4, shortened viterbi decoding method of the present invention and decoder thereof, it only is an one exemplary embodiment in the present embodiment, what it adopted is 1/3 convolution code, and m is 8, and the tail bit is 8, decoding input data is quantified as 6 bits, and coding block length C is 264, and decoding depth L is 60.

In the present embodiment, brachymemma viterbi decoder 9 of the present invention, it comprises:

Branch metric arithmetic unit 1 is used to receive the demodulating data of quantification, to calculate decoding path branches tolerance;

Cumulative metrics arithmetic unit 2 calculates decoding path cumulative metrics according to branch metric arithmetic unit result calculated, and the cumulative metrics that will obtain survivor path stores in the state measurement memory;

State measurement memory 6, the cumulative metrics that is used to store survivor path;

Recall location finding device 3, be used for from 2 of m register of cumulative metrics arithmetic unit output ^mSelect the state and the corresponding cumulative metrics value that participate in ordering in the cumulative metrics value of individual state, find out maximum cumulative metrics value and corresponding state, and when decoding constantly arrives the tail sign indicating number, from 2 ^tSelect and find out maximum path cumulative metrics value and corresponding states in the individual state, wherein t represents the number among 0＜t＜m; With

Recall processor 5, be used to handle maximum path cumulative metrics value and the corresponding states of recalling the output of location finding device, and the output decoding data.

In the present embodiment, the present invention adopts 1/3 convolution code, each reads in 3 demodulating datas that are quantified as 6 bits constantly, enter branch metric arithmetic unit 1 and decipher the path branches metric calculation, in cumulative metrics arithmetic unit 2, decipher the path cumulative metrics and calculate, and the cumulative metrics of storage survivor path is to state measurement memory 6; When determine and take which type of search strategy in recalling location finding device 3, to search for the decoding buffer status position of recalling by counter 7 and controller 8; Branch metric arithmetic unit 1, cumulative metrics arithmetic unit 2, recall location finding device 3 and constitute ACS (Add CompareSelect, add than choosing) unit 4, but realize with common to recall the location finding device different because recall the inside of location finding device 3, therefore the also ACS of non-ordinary meaning of ACS unit 4 herein, specifically, this is recalled location finding device 3 and comprises:

A state selector is used for from 2 of m register of cumulative metrics arithmetic unit 2 output ^mSelect the state and the corresponding cumulative metrics value that participate in ordering in the cumulative metrics value of individual state;

A finite state sorting unit, the state and the corresponding cumulative metrics that are used for the participation ordering selected from the state selector are found out maximum cumulative metrics value and corresponding state;

A conservator is preserved each the maximum cumulative metrics value and the corresponding state of the output of finite state sorting unit.

Implement present embodiment, in the down link from the base station to the terminal, decoding input data is quantified as 6 bits, and coding block length C is 264, and decoding depth L is 60, and then deciphering the buffer status number has 256 kinds, represents with 0～255.

When decoding reaches decoding depth L constantly promptly before 60, do not recall, reach and begin to search for 1 bit of recalling the position and recalling preceding 59 positions of output after 60 and 60, constantly reached before 257 in decoding, the processing of ACS is the same with general A CS, be engraved between 257～263 when decoding, need do special processing of the present invention, when decoding constantly reached 257: the position was recalled in search in 128 kinds of states 2 * (0～127);

When decoding constantly reached 258: the position was recalled in search in 64 attitudes 4 * (0～63);

When decoding constantly reached 259: the position was recalled in search in 32 kinds of states 8 * (0～31);

When decoding constantly reached 260: the position was recalled in search in 16 kinds of states 16 * (0～15);

When decoding constantly reached 261: the position was recalled in search in 8 kinds of states 32 * (0～7);

When decoding constantly reached 262: the position was recalled in search in 4 kinds of states 64 * (0～3);

When decoding constantly reached 263: the position was recalled in search in 2 kinds of states 128 * (0～1).

When decoding reaches the module end constantly during 264 moment, in recalling processor 5,, so far finish whole decode procedure directly from the disposable data of recalling output final stage decoding depth L (being 60) bit long of nought state.

Described shortened viterbi decoding method of the present invention, its implementation method as shown in Figure 2.

Concrete implementation is as follows:

(1), carries out flow process 1, to 2 ^mIndividual decoding buffer status is composed the initial value of cumulative metrics.

(2), carry out flow process 2, read in the RAKE data after demodulating buffer memory of 2 or 3 quantifications.If 1/2 convolution code is then read in 2 data after the RAKE demodulation, if 1/3 convolution code is then read in 3 data after the RAKE demodulation;

(3), because current time 2 ^mEach state in the individual state has only two kinds of possible leading states, has only two so be carved into the branch road that reaches a certain state of current time for the moment in the past, only needs to calculate these two possible path metrics.Promptly carry out flow process 3;

(4), utilize the result of flow process 3, carry out flow process 4, calculate two kinds of possible path cumulative metrics values of each state;

(5), utilize the result of flow process 4, carry out this flow process 5, pick out the higher value of two kinds of possible path cumulative metrics values of each state, the position of preserving its leading state, cast out the position of another leading state, and then the follow-up flow process of flow process 5 is to carry out flow process 6;

(6), judge whether current time reaches the code block end, if reach the code block end, then from flow process 11 execution; If do not reach the code block end, then carry out from flow process 7;

(7), further judge whether to reach decoding depth L,, then get back to flow process 2 and continue decoding if do not reach decoding depth; If reach decoding depth L, then carry out from flow process 8;

(8), judge whether to reach preceding t (the individual moment position of 0＜t＜m) at code block end, for example establishing code block length is C, initial time is since 1 counting, judge whether current time reaches C-(m-1), C-(m-2), C-(m-3), C-(m-4), ... C-1 is the position constantly, if judged result is a "No", then carries out from flow process 9; If judged result is a "Yes", then carry out from flow process 10;

(9), from 2 ^mSelect the state of maximum path cumulative metrics correspondence in the individual state, and from then on state is recalled 1 Bit data of exporting preceding L-1 moment position, the follow-up flow process of flow process 9 is a flow process 2;

(10), from 2 ^tSelect the state of maximum path cumulative metrics correspondence in the individual state, and from then on state is recalled several L-1 1 Bit datas of positions constantly of output forward.The follow-up flow process of flow process 10 is a flow process 2;

(11), recall the Bit data of the remaining final stage decoding depth L of code block of output from 0 state; Flow process 11 executes, and then whole decode procedure finishes;

Flow process 8 is key points of the present invention with flow process 10.At this flow process 10 is described further again.We know, and the decoding buffer status is the m bit, each b _i, i=0 ... the m-1 value is 0 or 1, can represent altogether all 2 ^mIndividual state, as shown in table 1.Table 1 is decoding buffer status 2 system tables.

b0

?b1

…

?bm-1

Table 1

The decoding register left side is a low level, and the right be a high position, then 2 ^mIndividual state represents to be 0～2 with 10 systems ^m-1, for example complete 0 o'clock is 0, and complete 1 o'clock is 2 ^m-1,

When decoding constantly reached C-(m-1) position of the individual moment, this moment, the hypothesis code registers state of decoder inside did not have 2 ^mIndividual, because have 1 tail bit, 0 input, i.e. b this moment ₀=0, so only remain 2 ^m-1 state, recall 3 need of location finding device to tolerance arithmetic unit 2 send here 2 ^mIn the individual state cumulative metrics value 2 ^m(10 systems of corresponding state are expressed as 2 to-1 state cumulative metrics value ¹* (0～(2 ^M-1-1))) sorts, find out 10 systems of maximum rating cumulative metrics value and corresponding state and represent, and 10 systems of state are represented to give recall processor 5.

When decoding constantly reaches C-(m-2) position of the individual moment, existing 2 tail bits, 0 input, i.e. b ₀=0, b ₁=0 this moment decoder inside hypothesis code registers state only surplus 2 ^M-2Individual, recall 3 need of location finding device to tolerance arithmetic unit 2 send here 2 ^mIn the individual state cumulative metrics value wherein 2 ^M-2(10 systems of corresponding state are expressed as 2 to individual state cumulative metrics value ²* (0～(2 ^M-2-1))) sorts, find out 10 systems of maximum rating cumulative metrics value and corresponding state and represent, and 10 systems of state are represented to give recall processor 5.

When decoding constantly reaches C-(m-3) position of the individual moment, existing 3 tail bits, 0 input, i.e. b ₀=0, b ₁=0, b ₂=0 this moment decoder inside hypothesis code registers state only surplus 2 ^M-3Individual, recall 3 need of location finding device to tolerance arithmetic unit 2 send here 2 ^mIn the individual state cumulative metrics value wherein 2 ^M-3(10 systems of corresponding state are expressed as 2 to individual state cumulative metrics value ³* (0～(2 ^M-3-1))) sorts, find out 10 systems of maximum rating cumulative metrics value and corresponding state and represent, and 10 systems of state are represented to give recall processor 5.When decoding constantly reaches C-1 constantly during the position, existing (m-1) individual tail bit 0 is imported, i.e. b ₀=0, b ₁=0, b ₂=0 ... b _M-2=0, this moment, the hypothesis code registers state of decoder inside only remained 2 ^l=2, recall 3 need of location finding device to tolerance arithmetic unit 2 send here 2 ^m(10 systems of corresponding state are expressed as for wherein 2 state cumulative metrics values in the individual state cumulative metrics value ${10}^{2^{m-1}}\×(0~1)$ ) sort, find out 10 systems of maximum rating cumulative metrics value and corresponding state and represent, and 10 systems of state are represented to give recall processor 5.

The structure chart of this section description such as Fig. 4.During the convolution coding of 3GPP 80 additional bits are arranged, be commonly referred to as the tail bit.Can make full use of this information when therefore we decipher.Improve traditional brachymemma interpretation method, traditional interpretation method does not have flow process 8 and 10, does not make full use of the tail bit information.

Just because of the tail bit has contained above-mentioned information, so the present invention is when implementing brachymemma decoding, increasing a judgement is flow process 8, searches out the state position of recalling in conjunction with flow process 10 in littler state range, avoid the dried of noise states to scratch, thereby improved decoding performance.Traditional relatively brachymemma interpretation method has just increased a judgment mechanism simultaneously, has changed the part searching method, does not increase hard-wired time complexity and space complexity; In WCDMA third generation wide-band communication system, the signal after the demodulation inputs to decoder of the present invention and deciphers the performance that can improve system.

Key point of the present invention is the flow process 8 and flow process 10 in the flow chart 2, and is embedded in special among the ACS4 among Fig. 3 and recalls location finding device 3, sees Fig. 4.

Under identical condition (translational speed of the wireless propagation environment of Rayleigh fading, two propagation paths, user terminal is lower), the decoding technique that adopts the present invention respectively and mentioned and traditional decoding technique carry out the full link simulation of down link, obtain simulation performance checking result as shown in table 2 below.

The used decoding technique of table 2 the present invention and traditional decoding technique simulation performance comparison

Different technologies	Unit	????DPCH-EC/Ior
			Decoding technique of the present invention	DB	????-17.45
Traditional decoding technique	DB	????-17.4

The decoder that table 2 has illustrated short interpretation method provided by the invention and realized this method had both kept decoding depth and hardware store resource constant, and performance is more excellent.

The above, it only is preferred embodiment of the present invention, be not that the present invention is done any pro forma restriction, every foundation technical spirit of the present invention all still belongs in the scope of technical solution of the present invention any simple modification, equivalent variations and modification that above embodiment did.

Claims (3)

1, a kind of shortened viterbi decoding method may further comprise the steps:

(1) decoding of reading in quantification is imported, and calculates two kinds of possible path metrics of each state;

(2), calculate two kinds of possible path cumulative metrics values of each state according to result of calculation to two kinds of possible path metrics;

(3), pick out the higher value of two kinds of possible path cumulative metrics values of each state, the position of preserving its leading state according to the path cumulative metrics value of being calculated;

(4) then, judge whether current time reaches the code block end,, then recall the Bit data of the remaining final stage decoding depth L of code block of output, if do not reach the code block end, then from 0 state if reach the code block end

(5) further judge whether to reach decoding depth L,, then get back to step (1) and continue decoding if do not reach decoding depth L, if reach decoding depth L, judge whether to reach preceding t the moment position at code block end, wherein t represents the number among 0＜t＜m, and m is the register number; If judged result negates, then from 2 ^mSelect the state of maximum path cumulative metrics correspondence in the individual state, and from then on state is recalled several L-1 1 Bit datas of positions constantly of output forward, gets back to step (1) then and continues decoding, if judge it is sure, then

(6) from 2 ^tSelect the state of maximum path cumulative metrics correspondence in the individual state, and from then on state is recalled several L-1 the Bit datas of positions constantly of output forward, get back to step 1 then and proceed decoding and handle.

2, a kind of brachymemma viterbi decoder of using in a kind of shortened viterbi decoding method comprises:

The branch metric arithmetic unit is used to receive the demodulating data of quantification, to calculate decoding path branches tolerance;

The cumulative metrics arithmetic unit calculates decoding path cumulative metrics according to branch metric arithmetic unit result calculated, and the cumulative metrics that will obtain survivor path stores in the state measurement memory;

The state measurement memory, the cumulative metrics that is used to store survivor path;

Recall the location finding device, be used for from 2 of m register of cumulative metrics arithmetic unit output ^mSelect the state and the corresponding cumulative metrics value that participate in ordering in the cumulative metrics value of individual state, find out maximum cumulative metrics value and corresponding state, and when decoding constantly arrives the tail sign indicating number, from 2 ^tSelect and find out maximum path cumulative metrics value and corresponding states in the individual state, wherein t represents the number among 0＜t＜m; With

Recall processor, be used to handle maximum path cumulative metrics value and the corresponding states of recalling the output of location finding device, and the output decoding data.

3, a kind of brachymemma viterbi decoder of using in a kind of shortened viterbi decoding method according to claim 2 is characterized in that: describedly recall the location finding device and comprise:

A state selector is used for from 2 of m register of cumulative metrics arithmetic unit output ^mSelect the state and the corresponding cumulative metrics value that participate in ordering in the cumulative metrics value of individual state;

A finite state sorting unit, the state and the corresponding cumulative metrics that are used for the participation ordering selected from the state selector are found out maximum cumulative metrics value and corresponding state;

A conservator is preserved each the maximum cumulative metrics value and the corresponding state of the output of finite state sorting unit.

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