CN1741614A - Method and system for decoding video, voice, and speech data using redundancy - Google Patents
Method and system for decoding video, voice, and speech data using redundancy Download PDFInfo
- Publication number
- CN1741614A CN1741614A CN 200510091262 CN200510091262A CN1741614A CN 1741614 A CN1741614 A CN 1741614A CN 200510091262 CN200510091262 CN 200510091262 CN 200510091262 A CN200510091262 A CN 200510091262A CN 1741614 A CN1741614 A CN 1741614A
- Authority
- CN
- China
- Prior art keywords
- bit sequence
- decoding
- reception bit
- algorithm
- physical constraint
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Images
Landscapes
- Error Detection And Correction (AREA)
Abstract
A method and system for decoding video, voice, and/or speech data using redundancy and physical constraints are presented. Video, voice, and/or speech bit sequences may be decoded in a multilayer process based on a decoding algorithm and at least one physical constraint. Fog voice applications, the decoding algorithm may be based on the Viterbi algorithm. At least one estimated bit sequence may be selected by performing searches that start from trellis junctions determined during by the decoding algorithm. The estimated bit sequences may be selected based on corresponding redundancy verification parameters. At least one physical constraint test may be performed on the selected estimated bit sequences to select a decoded output bit sequence.
Description
Technical field
The present invention relates to be used for wireless and receiver line communication system, relate to a kind of redundant method and system that video, audio frequency, speech data are decoded that uses particularly.
Background technology
Some traditional receivers are improved and need make a large amount of modifications to system, and the cost of this modification is very expensive, in some cases, even may be unpractical.Determine that the suitable scheme of improving target that can reach depends on optimization to receiver system, this optimization to receiver system is at a kind of specific modulation type and/or at being undertaken by the different types of noise that transmission channel causes.For example, the optimization of receiver system can be depending on whether the signal (normally continuation character or continuous information bit) that is receiving is complementary.For example, the signal that is received from convolution coder is complementary signal, that is to say, signal has memory.From this respect, convolution coder can produce NRZI or Continuous Phase Modulation (CPM), and it is normally based on the finite state machine operation.
In the receiver system that the convolutional encoding data are decoded, a kind of method of input or algorithm are maximum-likelihood sequence estimation (MLSE).MLSE is the algorithm that a kind of process that is used for minimizing the sequence of mesh spacing tolerance (metric) in search is carried out soft-decision, and wherein said grid has characterized the memory or the complementary feature of transmission signals.From this respect, can utilize operation based on Viterbi (Viterbi) algorithm, so that when receiving new signal, reduce the sequence number in the grid search.
Method or algorithm that another kind carries out input to the convolutional encoding data are to adopt maximum a posteriori probability (MAP) to estimate that it connects a character ground to character of signal and judges.The MAP optimization Algorithm is based on and minimizes character mistake probability.Under many circumstances, because the computational complexity of MAP algorithm makes it be difficult to use.
Be used to the to decode improvement of optimization receiver aspect design and realization of convolutional encoding data need be revised MLSE algorithm, viterbi algorithm and/or MAP algorithm application according to the modulation system that is adopted in the signal transmission.
For the ordinary skill in the art, when with the present invention described below, as to combine legend in system when comparing, restriction and the disadvantage with traditional method commonly used is conspicuous.
Summary of the invention
The invention provides a kind of redundant method and/or system that video, audio frequency and/or speech data are decoded that use.This method and/or system shown in disclosed in accompanying drawing and/or the description carried out in conjunction with a width of cloth accompanying drawing at least and in the more fully elaboration of claim.
According to an aspect of the present invention, provide a kind of method for processing signals, comprising:
Reception bit sequence at adopting decoding algorithm to decode produces corresponding redundant validation parameter;
Verify the reception bit sequence of described decoding based on corresponding redundant validation parameter;
If the reception bit sequence authentication failed of described decoding, then in the process of using described decoding algorithm to decode, by forcing at least one physical constraint described reception bit sequence is decoded, wherein, described physical constraint is relevant with the data type of described reception bit sequence.
Preferably, described decoding algorithm comprises viterbi algorithm.
Preferably, described method also comprises: the mesh node of selecting at least one to be produced by described viterbi algorithm.
Preferably, described method also comprises: select at least one to estimate bit sequence by beginning to search for from each described at least one mesh node that is selected, choose when wherein said at least one estimation bit sequence is verified by corresponding redundant validation parameter.
Preferably, described method also comprises: estimate bit sequence and at least one for each selected at least one simultaneously and review pointer (trace back pointer) and produce corresponding redundant validation parameter that the wherein said pointer of reviewing is used to carry out the search that begins from each described at least one mesh node of choosing.
Preferably, described method also comprises: estimate to carry out on the bit sequence at least one physical constraint test in described at least one that choose.
Preferably, described method also comprises: based at least one physical constraint test of described execution, estimate to select the bit sequence one as decoding carry-out bit sequence from described at least one that choose.
According to an aspect of the present invention, a kind of machine readable memory is provided, store computer program in the described memory, have a code segment that is used to carry out signal processing in the described computer program at least, described at least one code segment can be carried out so that machine is carried out following steps by machine:
Reception bit sequence at adopting decoding algorithm to decode produces corresponding redundant validation parameter;
Verify the reception bit sequence of described decoding based on corresponding redundant validation parameter;
If the reception bit sequence authentication failed of described decoding, then in the process of using described decoding algorithm to decode, by forcing at least one physical constraint described reception bit sequence is decoded, wherein, described physical constraint is relevant with the data type of described reception bit sequence.
Preferably, described decoding algorithm comprises viterbi algorithm.
Preferably, described machine readable memory also comprises: be used to select at least one code by the mesh node of described viterbi algorithm generation.
Preferably, described machine readable memory also comprises: be used for the code of selecting at least one to estimate bit sequence by beginning to search for from each described at least one mesh node that is selected, wherein said at least one estimate to choose when bit sequence is verified by corresponding redundant validation parameter.
Preferably, described machine readable memory also comprises: be used for estimating bit sequence and at least one for each selected at least one simultaneously and review the code that pointer (trace back pointer) produces corresponding redundant validation parameter, the wherein said pointer of reviewing is used to carry out the search that begins from each described at least one mesh node of choosing.
Preferably, described machine readable memory also comprises: be used for estimating to carry out on the bit sequence code that at least one physical constraint is tested in described at least one that choose.
Preferably, described machine readable memory also comprises: be used at least one the physical constraint test based on described execution, estimate to select the bit sequence code as decoding carry-out bit sequence from described at least one that choose.
According to one aspect of the present invention, a kind of signal processing system is provided, comprising:
At least one processor is used for producing corresponding redundant validation parameter at the reception bit sequence that adopts decoding algorithm to decode;
Described at least one processor is verified the reception bit sequence of described decoding based on corresponding redundant validation parameter;
If the reception bit sequence authentication failed of described decoding, described at least one processor is then in the process of using described decoding algorithm to decode, by forcing at least one physical constraint described reception bit sequence is decoded, wherein, described physical constraint is relevant with the data type of described reception bit sequence.
Preferably, described decoding algorithm comprises viterbi algorithm.
Preferably, at least one mesh node that produces by described viterbi algorithm of described at least one processor selection.
Preferably, described at least one processor selects at least one to estimate bit sequence by beginning to search for from each described at least one mesh node that is selected, and chooses when wherein said at least one estimation bit sequence is verified by corresponding redundant validation parameter.
Preferably, described at least one processor is estimated bit sequence and at least one for each selected at least one and reviews the corresponding redundant validation parameter of pointer (trace back pointer) generation that the wherein said pointer of reviewing is used to carry out the search that begins from each described at least one mesh node of choosing simultaneously.
Preferably, described at least one processor estimates to carry out on the bit sequence at least one physical constraint test in described at least one that choose.
Preferably, described at least one processor estimates to select the bit sequence one as decoding carry-out bit sequence based at least one physical constraint test of described execution from described at least one that choose.
These or other advantage of the present invention, feature and innovation are described together with details wherein, in conjunction with following explanation and legend the time, will be better understood.
Description of drawings
Figure 1A is the schematic block diagram that is used to improve the multilayer system of decoding according to an embodiment of the invention.
Figure 1B is the schematic block diagram that has the multilayer system that is used to improve process of decoding device and memory according to an embodiment of the invention.
Fig. 2 is according to one embodiment of the invention, the schematic diagram of the scrambling that the audio frame medium pitch links up.
Fig. 3 is the schematic diagram of error code image effect in DCT coefficient decoding that can be used for the embodiment of the invention.
Fig. 4 A is according to one embodiment of the invention, the flow chart of the example steps of redundancy application in multilayer is handled.
Fig. 4 B is according to one embodiment of the invention, is applied to the flow chart of the bounding algorithm example steps of received frame.
Fig. 5 A is according to one embodiment of the invention, satisfies the example steps flow chart of the T hypothesis search procedure of CRC constraint.
Fig. 5 B is according to one embodiment of the invention, the schematic diagram of typical bumper content in the search procedure shown in Fig. 5 A.
Fig. 5 C is according to one embodiment of the invention, in the search procedure shown in Fig. 5 A, and when calculating CRC simultaneously and reviewing pointer, the schematic diagram of typical bumper content.
Fig. 6 is the sequence sets schematic diagram that satisfies CRC and voice constraint according to an embodiment of the invention.
Embodiment
Examples more of the present invention provide a kind of method and system that uses redundant decode video, audio frequency, music and/or speech data.Video, audio frequency, music and/or speech bits sequence can handled decoding based on the multilayer of decoding algorithm and at least one physical constraint.Concerning voice applications, decoding algorithm can be based on viterbi algorithm.At least one search of estimating that bit sequence can begin by the mesh node that execution determines from the use decoding algorithm be selected.Can select to estimate bit sequence based on corresponding redundant validation parameter.On the selected bits sequence, can carry out at least one physical constraint test, to select a decoding carry-out bit sequence.
Figure 1A is the schematic block diagram that is used to improve the multilayer system of decoding according to an embodiment of the invention.Receiver 100 has been shown, comprising burst process module 102, deinterlacer 104, frame processing module 106 among Fig. 1.Frame processing module 106 can comprise channel decoder 108 and media decoder 110.Receiver 100 can comprise suitable logic, circuit and/or code, so that receiver is worked in wired or wireless mode.Receiver 100 is suitable for using the complementary signal of redundant decode, for example, comprises the signal of convolutional encoding data.Receiver 110 also can use the multilayer processing method to improve the decoding of complementary signal or memory signal.From this point, when the complementary signal that receives was handled, receiver 100 can be used for carrying out burst process and frame is handled.The multilayer processing method of finishing by receiver 100 can with a lot of modulation standard compatibilities.
Frame about decoder 110 is handled operation, and the canonical solution code method of convolutional encoding data is maximum-likelihood sequence estimation (MLSE) of seeking bit sequence.This method can comprise, for example uses viterbi algorithm, searches for a sequence X, and the conditional probability P in this sequence X (X/R) is maximum, and wherein X is a transfer sequence, and R is a receiving sequence.In some cases, received signal R may comprise the intrinsic redundancy that is produced by the signal source encoding process.By developing a kind of MLSE algorithm that satisfies at least some physical constraints of signal source, this intrinsic redundancy can be used for decoding process.Use physical constraint to be expressed as in MLSE and seek conditional probability P (X/R) maximum, wherein sequence X satisfies one group of physical constraint C (X), and physical constraint C (X) can be dependent on the type and the application in source.With regard to this point, Source Type can be audio frequency, music and/or video source type.
For example, concerning voice application, physical constraint may comprise between flatness in gain continuity and interframe or the frame, audio frame or the tone continuity in the frame and/or be used to characterize the continuity of linear spectral (LSF) parameter of spectrum envelope.
Figure 1B is the schematic block diagram that has the multilayer system that is used to improve process of decoding device and memory according to an embodiment of the invention.Processor 112 has been shown, memory 114, burst process module 102, deinterlacer 104, channel decoder 108 and media decoder 110 among Figure 1B.Processor 112 may comprise suitable logic, and circuit and/or code can be used for finishing and calculate and/or bookkeeping.Processor 112 also can be used for the part operation at least of communication and/or control impuls processing module 102, deinterlacer 104, channel decoder 108 and/or media decoder 110.Memory 114 may comprise suitable logic, circuit and/or code, can be used for storing data and/or control information.Memory 114 can be used for stored information, and these information can be utilized and/or generation by burst process module 102, deinterlacer 104, channel decoder 108 and media decoder 110.In this regard, information can be transferred in the memory 114 by processor 112, and perhaps the information in the memory 114 can be come out by processor 112 transmission.
Fig. 2 is according to one embodiment of the invention, the schematic diagram of the scrambling that the audio frame medium pitch links up.Lagger index (lag index) or tone continuity (pitchcontinuity) as the frame number function have been shown, because non-natural tone appears in error code in frame 485 among Fig. 2.May comprise under the situation of continuity problem in the voice that cause owing to physical constraint at lagger index, physical constraint is applied to can reduce decoding error to the decode operation of lagger index.
For example, concerning some data formats, the intrinsic redundancy of physical constraint may come from the generative process of packing data and redundant validation parameter, such as the cyclic redundancy checking (CRC) of packing data.And, also can satisfy inherent constraint to decoding by the data of entropy coder or variable-length encoding (VLC) operation generation.For example, VLC manipulates the statistical coding technology, and use short code word is used to explain the value of frequent appearance in this technology, and long code word is used to explain the value that does not often occur.
In Video Applications, video information is divided into frame, piece and/or macro block, typical case's constraint can comprise the continuity of facing the DC component of interblock such as the continuity between discrete cosine transform (DCT) block boundary, mutually, the continuity of interblock low frequency and/or by the consistency of VLC operation coded data.
Fig. 3 is the schematic diagram of error code image effect in DCT coefficient decoding that can be used for the embodiment of the invention.Illustrated among Fig. 3 when the DCT coefficient is decoded and occurred under the situation of error code, a plurality of error codes that in the image of reconstruct, occur, wherein said DCT coefficient is used in the Video Decoder image is carried out inverse transformation.From this point, constraint can reduce decoding error to the decode operation Applied Physics of DCT coefficient.
In audio transmission applications, such as EFR among the GSM or AMR, physical constraint similar in normal speech is used.Physical constraint in the GSM application can comprise between the interior flatness of gain continuity and interframe or frame, audio frame or the tone continuity in the frame and/or linear spectral frequency (LSF) parameter and the continuity that is used to represent the amplitude position (format locations) of voice.And GSM uses can use redundancy, as CRC, as physical constraint.For example, in GSM used, the EFR coding can use 8 and 3 CRC, and the AMR coding can use 6 CRC, and GSM half rate (GSM-HR) coding can use 3 CRC.For example, in WCDMA used, adaptive multi-rate (AMR) coding can use 12 CRC.
Frame about decoder 100 is handled operation, and the other method that the convolutional encoding data are decoded is maximum a posteriori probability (MAP) algorithm.This method is used the priori statistics to the position, source, therefore can produce an one dimension prior probability P (bi), and bi is corresponding to the present bit in the bit sequence that will be encoded here.In order to determine the maximum a posteriori probability sequence, need to revise Viterbi transform matrix calculations result.Complicated and be separated by when far away as i and j when physical constraint, under the situation that the correlation between bi position and the bj position may be difficult for determining, this method may be difficult to realization.Under the high situation of parameter field correlation, the MAP algorithm may be difficult to realize.And when intrinsic redundancy, such as CRC, when being physical constraint a part of, the MAP algorithm can not use.
The maximum-likelihood sequence estimation of bit sequence (MLSE) may be a better choice concerning decoding convolutional encoding data.When R satisfied certain group physical constraint C (X), the peaked universal method of conditional probability P (X/R) may still be difficult to realize concerning MLSE.Put from this, effectively solution may need a sub-optimum solution, and this scheme will be considered the complexity and the enforcement of physical constraint.Following example shows the application of multilayer solution, and it is applied to physical constraint in the decoding processing of voice data of GSM effectively.
Fig. 4 A is according to one embodiment of the invention, the flow chart of the example steps of redundancy application in multilayer is handled.According to Fig. 4 A, after beginning step 402, enter step 404, the receiver among Figure 1A can use viterbi algorithm decoding received frame in frame processing module 106.In step 406,, can determine a redundant validation parameter such as CRC at decoded frame.In step 408, receiver 100 can determine whether the CRC validation test is successful.After CRC checking decoded frame, receiver 100 can carry out step 412, accepts decoded frame.After step 412, receiver proceeds to end step 414.
Return step 408, if the CRC validation test of decoded frame failure, receiver 100 can proceed to step 410, in step 410, receiver 100 is carried out redundant arithmetic, compared with the standard of use viterbi algorithm, utilizes this redundant arithmetic can obtain equating or decoding error still less.After the step 410, receiver can proceed to end step 414.
For example, GSM is used, redundant arithmetic can comprise that search also satisfies the MLSE of CRC condition and voice constraint.From this point, k bit sequence collection S1, S2 ..., Sk} can determine from the MLSE that satisfies the CRC constraint.In case the k sequence sets determines that an optimal sequence Sb who also satisfies GSM audio frequency or voice constraint also is determined.
Fig. 4 B is according to one embodiment of the invention, is applied to the flow chart of the bounding algorithm example steps of received frame.According to Fig. 4 B, when step 408 in Fig. 4 A li during to the CRC authentication failed of decoded frame, the receiver 100 among Figure 1A can proceed to step 422.In step 422, will suppose that counter is set to initial count value to indicate first hypothesis, for example, is considered.For example, the initial value at step 422 counter can be 0.After step 422, iteration count is set to the initial count value of step 424, to indicate first maximum likelihood solution.For example, the initial count value of step 424 can be 0.In step 426, determine the CRC of decoded frame.
In step 428, receiver 100 determines whether the CRC validation test is successful under current hypothesis.When the CRC checking is unsuccessful, proceed to step 432.In step 432, the iteration count counting increases.After the step 432, in step 434, receiver 100 judges that whether the value of iteration count is less than preset limit value.When iteration count value during more than or equal to preset limit value, proceed to step 446, produce a bad frame indication.When iteration count value during less than preset limit value, proceed to step 436, determine next maximum likelihood solution.After the step 436, proceed to 426, determine the CRC of decoded frame according to the maximum likelihood solution of determining in the step 426.
Get back to step 428, when CRC is proved to be successful, proceed to step 430.In step 430, suppose that the rolling counters forward value increases.In step 438, receiver 100 determines that whether the hypothesis counter is less than preset limit value afterwards.When supposing Counter Value less than preset limit value, proceed to step 424, the iteration count value is changed to initial value.When the hypothesis Counter Value equals preset limit value, carry out step 440, the best hypothesis of intrafascicular approximately selection from the source.
After the step 440, in step 442, receiver 100 determines whether the best hypothesis of selecting is abundant when receiving decoded frame in step 440.When selected hypothesis is enough abundant, in the time of accepting decoded frame, proceed to step 444, receive decoded frame.When the hypothesis of selecting is abundant inadequately, proceed to step 446, produce a bad frame indication.After step 444 or the step 446, proceed to the end step 414 among Fig. 4 A.
Fig. 5 A is according to one embodiment of the invention, satisfies the example steps flow chart of the T hypothesis search procedure of CRC constraint.According to Fig. 5 A, search tree 500 is relevant with the exemplary sequence search procedure, and the estimation bit sequence collection of the simplification that this process can produce from the Viterbi operation is initial.From this point, lastrow is corresponding to N the mesh node collection that can be produced by the Viterbi operation. and chief series tolerance (metric) and chief series node are measured and can be obtained from Viterbi calculating.The tolerance of other sequence can from source (parent) sequence measurement and node tolerance and obtain.Each mesh node all represents with oblique line, and corresponding to the estimation bit sequence that obtains from the Viterbi operation.The estimation bit sequence of lastrow does not satisfy the CRC constraint.In redundant arithmetic, estimation bit sequence collection can be chosen from first row.As shown in the figure, can from N mesh node, choose 10 and estimate bit sequence.Choose 10 estimate that bit sequences add stain in the ending of oblique line and represent.From this point, select to can be depending on tolerance (metric) parameter, in some cases, metric parameter can comprise channel metrics part and physical constraint tolerance part.
The T hypothesis search procedure that satisfies the CRC be used for GSM or redundant validation parameter may be from selecting have the mesh node of maximal metric value.In this example, node 6 has maximum metric, and therefore from then on the process of searching for puts beginning.Node 6 can generate the new branch or the row of search tree 500, and reviews pointer and can be used for reviewing search operation.New branch or row can finally generate 3 additional estimation bit sequences or 3 node 11-13.The result is, will be at the minimum node of three metrics of lastrow by jettisoning, and standardized little thick stick is represented on the stain of oblique line ending.Next, new branch or row are that CRC is proved to be successful.As shown in the figure, the CRC authentication failed of new branch, from node with maximal metric value or shown in node 12 produce next branch.In this example, satisfy the CRC constraint, and search procedure can turn back to next maximal metric value node in the lastrow from the branch that node 12 produces.The estimation bit sequence relevant with node 12 can be selected as the k sequence sets S1, S2 ..., one of bit sequence of Sk}.
Fig. 5 B is according to one embodiment of the invention, the schematic diagram of typical bumper content in the search procedure shown in Fig. 5 A.Content of buffer 510 has been shown among Fig. 5 B, and it is relevant with the mark of the node considered in the search procedure.For example, initial 10 nodes are relevant in state 512 and the search operation.From this point, node 6 is (highlighted) that give prominence to, and indicating it corresponding to the highest metric, and it is the starting point of new branch or row.State 514 is corresponding to next 10 nodal sets.In this example, node 3,9 and 10 is replaced by the node 11,12 in the branch that is generated by node 6 and 13.Node 12 is given prominence to, and to indicate it corresponding to the highest metric, is the starting point of new branch or row.State 516 is corresponding to next 10 nodal sets.Node 4 is given prominence to, and to indicate it corresponding to the highest metric, is the starting point of new branch or row.Calculate to review search procedure reviewing pointer at each state.
Fig. 5 C is according to one embodiment of the invention, in the search procedure shown in Fig. 5 A, and when calculating CRC simultaneously and reviewing pointer, the schematic diagram of typical bumper content.Content of buffer 520 among Fig. 5 C is corresponding to the mark of the node of considering in the search procedure and calculate corresponding to CRC.Shown in Fig. 5 C, but content of buffer 520 is according to current state changing content.For state 522, state 524 and state 526, its content is corresponding to the current node of being considered, respectively with Fig. 5 B in the content of state 512, state 514 and state 516 be identical.Yet, in order to simplify the search procedure of T hypothesis, the CRC of these states and review pointer and may be calculated simultaneously.This method is possible, because the form that CRC can summation (biRi) is calculated.Here Ri is the remainder of xi/g (x), and g (x) is the generator polynomial of CRC, and bi is the value of an i.The CRC metric of each sequence can be held or be stored in the content of buffer 520.The CRC metric can obtain with the form of the summation of biRi value the position to the end from node, and also can source (parent) sequence C RC metric summation and the form of the summation of biRi value from node to its source (parent) node determine.If the CRC metric equates that with the summation of biRi value from first to node then sequence satisfies the CRC condition.For example, the value of Ri can exist in the question blank.
In case k sequence sets { S1, S2, Sk} determines by following as the search procedure described in Fig. 5 A-5C, redundant arithmetic can need the receiver 100 among Fig. 1 to select a bit sequence as optimum bit sequence Sb, and Sb is corresponding to the bit sequence of the physical constraint that satisfies CRC constraint and top secret level here.This optimum bit sequence also can be described as the decoding carry-out bit sequence that multilayer is handled.
To the k sequence sets S1, S2 ..., each the candidate bit sequence among the Sk}, carry out the test of a different set of physical constraint Test (j) ..., Test (T1) }.Physical constraint test is corresponding to the test to the quantization characteristic of the type of the received data of concrete application.The mark of the physical constraint test of i bit sequence, T_SC (i, j) ... T_SC (I, T1) }, can be used for determining that whether this bit sequence is by a fc-specific test FC.For example, (i j)＞0 o'clock, illustrates that i bit sequence failed in j physical constraint test, and (i j)＜=0 o'clock, illustrates that i bit sequence passed through j physical constraint and tested as T_SC as T_SC.In some concrete instances, the value of test result hour, the reliability of mark increases.
In case physical constraint test is used to candidate's estimation bit sequence, can follow following demonstration methods: when mark on the occasion of the time, the candidate bit sequence is rejected; For specific physical constraint, can find candidate bit sequence with the best or minimum score value; The most repeatedly testing mid-score all is that best candidate bit sequence is chosen as optimum bit sequence Sb.
[51] table 1 is an an example of the present invention, uses the test set { Test (1), Test (2), Test (3) and Test (4) } of 4 physical constraints to test 5 candidates' bit sequence collection { S1, S2, S3, S4 and S5} here.Mark is listed in the form, whether to identify each candidate bit sequence by different tests.In this example because the value of corresponding Test (2) and Test (4) be on the occasion of, so S2 and S4 are rejected.Bit sequence S3 is minimum at test Test (1), Test (3) and Test (4) mid-score, therefore is chosen as optimum bit sequence Sb.
| The candidate bit sequence | Test(1) | Test(2) | Test(3) | Test(4) |
| S1 | Mark (1,1)＜0 | Mark (1,2)＜0 | Mark (1,3)＜0 | Mark (1,4)＜0 |
| S2 | Mark (2,1)＜0 | Mark (2,2)＞0 | Mark (2,3)＜0 | Mark (2,4)＜0 |
| S3 | Mark (3,1)＜0 | Mark (3,2)＜0 | Mark (3,3)＜0 | Mark (3,4)＜0 |
| S4 | Mark (4,1)＜0 | Mark (4,2)＜0 | -mark (4,3)＜0 | Mark (4,4)＞0 |
| S5 | Mark (5,1)＜0 | -mark (5,2)＜0 | Mark (5,3)＜0 | Mark (5,4)＜0 |
| Minimum score value bit sequence | S3 | S5 | S3 | S3 |
Table 1.
Some feature physical constraint tests (for example can be used by adaptive multi-rate coding (AMR)) are LSF parameter, gain and/or tone.Concerning the LSF parameter, some tests can based on distance between two formants or continuously LSF frame or subframe variation, and threshold values on the influence of channel metrics value.For example, the channel metrics value is more little, and it is difficult more to satisfy threshold values.About using gain as a physical constraint test, standard may be the flatness or the consistency of successive frame and subframe.As for tone, standard may be the difference in interframe and the frame.
Fig. 6 is the sequence sets schematic diagram that satisfies CRC and voice constraint according to an embodiment of the invention.Fig. 6 shows the result of redundant arithmetic.For example, the possible result of search procedure of the hypothesis of the T shown in Fig. 5 A-5C is bit sequence collection { S1, S2, S3, S4 and a S5}.These bit sequences are to check according to their metric with by CRC to select.This group bit sequence also needs the test by physical constraint described herein.In this example, bit sequence S3 satisfies CRC checking and physical constraint test, so it can be chosen as optimum bit sequence Sb.
Method described herein is compared with the standard of use viterbi algorithm can reduce the decoded bit mistake.Be optimized design at receiver,, can realize use effectively redundant information by on the result's who draws by viterbi algorithm a part, adding at least one physical constraint to the convolutional encoding data that are used for decoding.
The present invention can pass through hardware, software, and perhaps soft, combination of hardware realizes.The present invention can realize with centralized system at least one computer system, perhaps be realized with dispersing mode by the different piece in the computer system that is distributed in several interconnection.Anyly can realize that the computer system of described method or miscellaneous equipment all are applicatory.The combination of software and hardware commonly used can be the general-purpose computing system that computer program is installed, and by installing and carry out described program-con-trolled computer system, it is moved by described method.In computer system, utilize processor and memory cell to realize described method.
The present invention can also implement by computer program, and described program comprises whole features that can realize the inventive method, when it is installed in the computer system, by operation, can realize method of the present invention.Computer program in the presents refers to: one group of any expression formula of instructing that can adopt any program language, coding or symbol to write, this instruction group makes system have information processing capability, with direct realization specific function, or after carrying out following one or two step, a) convert other Languages, coding or symbol to; B) reproduce with different forms, realize specific function.
The present invention describes by several specific embodiments, it will be appreciated by those skilled in the art that, without departing from the present invention, can also carry out various conversion and be equal to alternative the present invention.In addition, at particular condition or concrete condition, can make various modifications to the present invention, and not depart from the scope of the present invention.Therefore, the present invention is not limited to disclosed specific embodiment, and should comprise the whole execution modes that fall in the claim scope of the present invention.
Claims (10)
1. method for processing signals comprises:
Reception bit sequence at adopting decoding algorithm to decode produces corresponding redundant validation parameter;
Verify the reception bit sequence of described decoding based on corresponding redundant validation parameter;
If the reception bit sequence authentication failed of described decoding, then in the process of using described decoding algorithm to decode, by forcing at least one physical constraint described reception bit sequence is decoded, wherein, described physical constraint is relevant with the data type of described reception bit sequence.
2, method for processing signals according to claim 1 is characterized in that, described decoding algorithm comprises viterbi algorithm.
3, method for processing signals according to claim 2 is characterized in that, also comprises the mesh node of selecting at least one to be produced by described viterbi algorithm.
4, method for processing signals according to claim 3, it is characterized in that, also comprise by beginning to search for and select at least one to estimate bit sequence, choose when wherein said at least one estimation bit sequence is verified by corresponding redundant validation parameter from each described at least one mesh node that is selected.
5, a kind of machine readable memory stores computer program in the described memory, has a code segment that is used to carry out signal processing in the described computer program at least, and described at least one code segment can be carried out so that machine is carried out following steps by machine:
Reception bit sequence at adopting decoding algorithm to decode produces corresponding redundant validation parameter;
Verify the reception bit sequence of described decoding based on corresponding redundant validation parameter;
If the reception bit sequence authentication failed of described decoding, then in the process of using described decoding algorithm to decode, by forcing at least one physical constraint described reception bit sequence is decoded, wherein, described physical constraint is relevant with the data type of described reception bit sequence.
6, machine readable memory according to claim 5 is characterized in that, described decoding algorithm comprises viterbi algorithm.
7, a kind of signal processing system comprises:
At least one processor is used for producing corresponding redundant validation parameter at the reception bit sequence that adopts decoding algorithm to decode;
Described at least one processor is verified the reception bit sequence of described decoding based on corresponding redundant validation parameter;
If the reception bit sequence authentication failed of described decoding, described at least one processor is then in the process of using described decoding algorithm to decode, by forcing at least one physical constraint described reception bit sequence is decoded, wherein, described physical constraint is relevant with the data type of described reception bit sequence.
8, the described signal processing system of claim 7 is characterized in that, described decoding algorithm comprises viterbi algorithm.
9, the described signal processing system of claim 8 is characterized in that: at least one mesh node that is produced by described viterbi algorithm of described at least one processor selection.
10, the described signal processing system of claim 9, it is characterized in that: described at least one processor selects at least one to estimate bit sequence by beginning to search for from each described at least one mesh node that is selected, and chooses when wherein said at least one estimation bit sequence is verified by corresponding redundant validation parameter.
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US60314804P | 2004-08-20 | 2004-08-20 | |
| US60/603,148 | 2004-08-20 | ||
| US11/189,509 | 2005-07-26 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN1741614A true CN1741614A (en) | 2006-03-01 |
| CN100433836C CN100433836C (en) | 2008-11-12 |
Family
ID=36093812
Family Applications (2)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN 200510091261 Expired - Fee Related CN1744475B (en) | 2004-08-20 | 2005-08-19 | Method and system for processing signals through redundancy and iterative processing |
| CNB2005100912624A Expired - Fee Related CN100433836C (en) | 2004-08-20 | 2005-08-19 | Method and system for decoding video, voice, and speech data using redundancy |
Family Applications Before (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN 200510091261 Expired - Fee Related CN1744475B (en) | 2004-08-20 | 2005-08-19 | Method and system for processing signals through redundancy and iterative processing |
Country Status (1)
| Country | Link |
|---|---|
| CN (2) | CN1744475B (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1988431B (en) * | 2005-12-21 | 2010-12-08 | 美国博通公司 | Signal processing method and system |
Families Citing this family (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7877674B2 (en) * | 2006-07-25 | 2011-01-25 | Broadcom Corporation | Method and system for redundancy-based decoding of voice content in a wireless LAN system |
| US8948309B2 (en) | 2005-07-26 | 2015-02-03 | Broadcom Corporation | Method and system for redundancy-based decoding of video content in a wireless system |
| US8207875B2 (en) * | 2009-10-28 | 2012-06-26 | Motorola Mobility, Inc. | Encoder that optimizes bit allocation for information sub-parts |
| CN102710943B (en) * | 2012-05-29 | 2014-10-29 | 罗天明 | Real-time video transmission method based on forward error correction encoding window expanding |
Family Cites Families (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5208816A (en) * | 1989-08-18 | 1993-05-04 | At&T Bell Laboratories | Generalized viterbi decoding algorithms |
| US5289276A (en) * | 1992-06-19 | 1994-02-22 | General Electric Company | Method and apparatus for conveying compressed video data over a noisy communication channel |
| US5566206A (en) * | 1993-06-18 | 1996-10-15 | Qualcomm Incorporated | Method and apparatus for determining data rate of transmitted variable rate data in a communications receiver |
| US6094465A (en) * | 1997-03-21 | 2000-07-25 | Qualcomm Incorporated | Method and apparatus for performing decoding of CRC outer concatenated codes |
| FR2821217B1 (en) * | 2001-02-21 | 2003-04-25 | France Telecom | METHOD AND SYSTEM FOR ITERATIVE CODING-DECODING OF DIGITAL DATA STREAMS ENCODED BY SPATIO-TEMPORAL COMBINATIONS, IN MULTIPLE TRANSMISSION AND RECEPTION |
| JP2003249918A (en) * | 2002-02-25 | 2003-09-05 | Matsushita Electric Ind Co Ltd | Receiver and receiving method |
-
2005
- 2005-08-19 CN CN 200510091261 patent/CN1744475B/en not_active Expired - Fee Related
- 2005-08-19 CN CNB2005100912624A patent/CN100433836C/en not_active Expired - Fee Related
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1988431B (en) * | 2005-12-21 | 2010-12-08 | 美国博通公司 | Signal processing method and system |
Also Published As
| Publication number | Publication date |
|---|---|
| CN1744475A (en) | 2006-03-08 |
| CN100433836C (en) | 2008-11-12 |
| CN1744475B (en) | 2011-08-10 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN1101997C (en) | Method and apparatus for rate determination in communication system | |
| CN1132320C (en) | Optimal soft-output decoder for tail-biting trellis codes | |
| CN1168237C (en) | Component decoder and method thereof in mobile communication system | |
| US8359523B2 (en) | Method and system for decoding video, voice, and speech data using redundancy | |
| US8751907B2 (en) | Joint encoding and decoding methods for improving the error rate performance | |
| US9214958B2 (en) | Method and decoder for processing decoding | |
| US8081719B2 (en) | Method and system for improving reception in wired and wireless receivers through redundancy and iterative processing | |
| CN101047472A (en) | Decoding method for tail-biting CC using search deep viterbi algorithm | |
| CN1770639A (en) | Concatenated iterative and algebraic coding | |
| US20070266303A1 (en) | Viterbi decoding apparatus and techniques | |
| CN1241329C (en) | Method and arrangement for decoding convolutionally encoded codeword | |
| CN1853350A (en) | Unified viterbi/turbo decoder for mobile communication systems | |
| CN1187718A (en) | Digital transmission system and method comprising punctured product code combined with quadrature amplitude modulation | |
| CN1534879A (en) | Decoding device and method of cascade convolution and grouping coding signal | |
| CN1741614A (en) | Method and system for decoding video, voice, and speech data using redundancy | |
| CN1731686A (en) | VCP and ACS circuit for VCP | |
| CN101060341A (en) | Post-viterbi error correction method and apparatus for the same | |
| GB2403106A (en) | a turbo type decoder which performs decoding iterations on sub-blocks to improve convergence | |
| CN1155161C (en) | Tebo code decoder and its decoding method | |
| CN1574651A (en) | Turbo decoder and dynamic decoding method used for same | |
| CN1129257C (en) | Maximum-likelihood decode method f serial backtracking and decoder using said method | |
| CN1738229A (en) | Woven convolutional code error detection and correction coder, encoder in TD-SCDMA system | |
| CN1148006C (en) | Method and decoder for decoding turbo code | |
| CN1182657C (en) | Method used to reduce storage content needed and complexity by product code decode | |
| CN111262590B (en) | Underwater acoustic communication information source and channel joint decoding method |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20081112 |
|
| CF01 | Termination of patent right due to non-payment of annual fee |