CN1326055C - Buffer region early-release method and its related media access control chip - Google Patents
Buffer region early-release method and its related media access control chip Download PDFInfo
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- CN1326055C CN1326055C CNB2003101046860A CN200310104686A CN1326055C CN 1326055 C CN1326055 C CN 1326055C CN B2003101046860 A CNB2003101046860 A CN B2003101046860A CN 200310104686 A CN200310104686 A CN 200310104686A CN 1326055 C CN1326055 C CN 1326055C
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Abstract
The present invention relates to a buffer zone early-release method and a corresponding media access control chip thereof. The buffer zone early-release method comprises the following steps: a self-source connecting port receives Ethernet packs; the buffer zone provide with a plurality of buffers is configured for storing the Ethernet packs; the buffers are orderly woven and connected in series to begin to transmit the Ethernet packs out of a target connecting port; if the target connecting port is in a full-duplex transmission mode, the buffers are immediately released when the transmission of the buffers is completed, wherein the Ethernet packs can be unicast packs, multicast packs and even broadcasting packs; if the target connecting port is in a half-duplex transmission mode, the buffers of which the transmission is well completed can only be released when the transmission of the Ethernet packs with the length of 128 bytes is completed.
Description
(1) technical field
The present invention is particularly to the method and the relevant Ethernet medium access control chip thereof in early stage buffer release district in a kind of Ethernet interchanger about the method and the related media access control chip thereof of a kind of early stage release (early release) buffer zone.
(2) background technology
The Ethernet interchanger can provide the network connections of multiport, and each port can supply linear velocity (linespeed) 10M/100M/1000M (1M=10
6) full-duplex data pass to receive.The core of Ethernet interchanger is medium access controller (medium access controller, be called for short MAC controller), typically be responsible for the second layer and the work of part more than the 3rd layer in seven layers of running of network, medium access controller couples physical layer (physical layer, be called for short PHY), so that the network connections of multiport to be provided, be responsible for receiving with the biography of remote entity signal.The packet data that earlier temporary all connectivity ports of medium access controller are received, transfer to the purpose connectivity port of appointment again, medium access controller utilizes the finite memory of plug-in memory chip or built-in integration to carry out the temporary of packet data usually, the static RAM of for example built-in 1M position (being equivalent to the 128K byte), and the Ethernet interchanger typically is 8 ports/16 ports/24 ports, limited storage space will be simultaneously for the data of a plurality of connectivity ports temporary with pass on, so storer effectively utilize extremely important.
The package that the Ethernet interchanger receives can be divided into clean culture (uni-cast) package, multicast (multi-cast) package and broadcasting (broadcast) package, the clean culture package wherein passes on away from the another port port reception back from the Ethernet interchanger, the multicast package wherein passes on away from other a plurality of ports port reception back from the Ethernet interchanger, and broadcasting packages is wherein passed on away from other all of the port port reception back from the Ethernet interchanger.Generally speaking, the maximum length of Ethernet package is 1522 byte longs, and 9.6K (1K=10 is more arranged in the NAS/SAN system
3) application of speciality package (jumbo packet) of byte long, such speciality package needs only and severally just can occupy built-in 1M position and deposit, and causes congested ((congestion) of network switch.
Medium access controller utilize plug-in or built-in storage to cushion temporary packet data, medium access controller comprises forward control unit, formation control module, impact damper control module and connectivity port control module (not shown).The impact damper control module plans just that in initial phase this plug-in or built-in storer is to set up suitable data structure and form, in order to follow-up utilization.
Fig. 1 shows the structure of Ethernet package 100, Ethernet package 100 comprises destination address (DMAC) 110, address, source (SMAC) 120, payload (payload) 130, and Cyclical Redundancy Check sign indicating number (cyclicredundant code, be called for short CRC) 140, the Ethernet package 100 of being come in by the outside reception of Ethernet interchanger (not shown) is a unit with impact damper (buffer), the impact damper control module is kept in from the suitably big or small buffer zone of memory configurations, buffer zone comprises one or more impact damper, for example, each impact damper is defined as 128 byte longs, when the Ethernet package 100 of one 256 byte long enters in the Ethernet interchanger, need occupy the space of two impact dampers of temporary storage, just its buffer size is 256 byte longs; And when the Ethernet package 100 of one 260 byte long enters in the Ethernet interchanger, then needing to occupy the space of three impact dampers of temporary storage, its buffer size is 384 byte longs; And when the Ethernet package 100 of one 1522 byte long enters in the Ethernet interchanger, then needing to occupy the space of 12 impact dampers of temporary storage, its buffer size is 1536 byte longs; Form corresponding buffer region between the impact damper by suitable node (node) braiding (stitch).Prior art when Ethernet package 100 is passed on finish after, the buffer zone that disposed can be discharged.
Fig. 2 shows the structure of typical case in order to the buffer zone of temporary Ethernet package, this buffer zone comprises a plurality of impact dampers 200,210,220,230, these impact dampers 200 ~ 230th weave serial connection (stitch) in order, these impact dampers have junction nodes (link node) 202 respectively, 212,222,232, first impact damper 200 points to second impact damper 210 by its junction nodes 202, second impact damper 210 points to the 3rd impact damper (not shown) by its junction nodes 212, point to N-1 impact damper 220 in regular turn, N-1 impact damper 220 points to N impact damper 230 by its junction nodes 222, wherein the numbering of second impact damper 210 is write the junction nodes 202 of first impact damper 200, make the impact damper 200 of winning point to second impact damper 210 by its junction nodes 202, this action is called the braiding serial connection, for example, built-in 1M bit memory, and be that 128 bytes are utilized with each impact damper with the Ethernet interchanger, then can cook up 1024 impact dampers altogether for using, therefore utilize ten numberings that just can point out each impact damper.
(3) summary of the invention
The present invention discloses the method in a kind of early stage buffer release district, comprise the following step: the source connection mouth receives the Ethernet package from the beginning, configuration has the buffer zone of a plurality of impact dampers to store the Ethernet package, and these impact dampers are to weave serial connection in order, the Ethernet package is begun to pass on the purpose connectivity port, and if the purpose connectivity port is to be full-duplex transmission mode, then when finishing the passing on of each impact damper, just discharge this each impact damper immediately, wherein the Ethernet package can be clean culture package, multicast package even broadcasting packages; If the purpose connectivity port is to be the half-duplex transmission pattern, then preferably when the passing on of at least 128 byte longs of finishing the Ethernet package, can discharges and transmit the impact damper of finishing.
The present invention further discloses a kind of medium access control chip, comprises: a plurality of connectivity ports control module, in order to couple the physical layer control chip; Forward control unit is coupled to the connectivity port control module; The formation control module couples forward control unit and connectivity port control module; And the impact damper control module, in order to couple a memory buffer and these connectivity port control modules; Wherein, each connectivity port control module has in order to the counter of counting the package length that has transmitted and in order to write down the transmission mode buffer of transmittability, the connectivity port control module is according to transmission mode buffer and counter, and sender impact damper control module discharges the space of this memory buffer in early days; When the connectivity port control module receives the Ethernet package, by having the buffer zone of a plurality of impact dampers to store this Ethernet package in the impact damper control module configuration memory buffer, if the transmission mode buffer shows that the connectivity port control module is the full duplex operating mode, then when the connectivity port control module is just transmitting N impact damper, just can discharge (N-1) individual impact damper immediately, wherein N is for greater than 1 positive integer; And control module is the half-duplex operating mode if the transmission mode buffer shows the connectivity port, then when the connectivity port control module is just transmitting N impact damper, just can discharge (N-1) individual impact damper immediately, and wherein N is for greater than 1 positive integer.
For further specifying above-mentioned purpose of the present invention, design feature and effect, the present invention is described in detail below with reference to accompanying drawing.
(4) description of drawings
Fig. 1 is the structure that shows the Ethernet package;
Fig. 2 shows the structure of typical case in order to the buffer zone of temporary Ethernet package;
Fig. 3 shows the method flow diagram according to early stage buffer release of the present invention district; And
Fig. 4 shows the specific embodiment according to block hardware diagram of the present invention.
(5) embodiment
Fig. 3 shows the method flow diagram according to early stage buffer release of the present invention district, illustrate as embodiment with Ethernet interchanger with a plurality of connectivity ports and temporary storage, from step 300, step 310, receive the Ethernet package from the connectivity port, a source of these connectivity ports; Step 320, the Ethernet interchanger is according to the size of Ethernet package, dispose suitable buffer zone to store the Ethernet package, the Ethernet interchanger is that the impact damper according to fixed size is a unit utilization temporary storage, impact damper is numbered management respectively and woven serial connection according to suitable mode, for example the mode according to Fig. 2 weaves serial connection, the buffer zone that makes the Ethernet package be associated and dispose comprises a plurality of impact dampers 200,210,220,230, to keep in the data of Ethernet package in regular turn, the Ethernet package can be divided into clean culture, multicast, and broadcasting packages, present embodiment is understood named place of destination location and address, source with the clean culture package as an illustration in the clean culture package; Step 330 begins to pass on the Ethernet package, and in this embodiment, Ethernet package meeting origin source connection mouth is transferred to the purpose connectivity port of appointment; Step 340 checks whether the purpose connectivity port is full duplex, if full duplex then continues step 350, otherwise then continues step 360; Step 350, for carrying out early stage buffer release device in full duplex purpose connectivity port, the Ethernet interchanger is transfer buffering device 200 in regular turn, 210,220,230, when the purpose connectivity port is a full duplex, passing on impact damper 200, then begin transfer buffering device 210, just buffer release device 200 immediately, when beginning transfer buffering device 220, just buffer release device 210 immediately is because pass under the receipts pattern being confirmed to be the full duplex running, the situation that does not have packet collision takes place, therefore when beginning to pass on N impact damper, just can discharge (N-1) individual impact damper immediately, wherein N is the positive integer greater than 1; Step 360, for carrying out early stage buffer release device in half-duplex purpose connectivity port, the Ethernet interchanger passes on the 1st in regular turn, 2,3, (N-2), (N-1), N impact damper, when the purpose connectivity port is half-duplex, when determining to finish the passing on of predetermined length impact damper, can begin to carry out the early stage release of impact damper, preferably, when confirming to send 128 hyte length, can begin the buffer release device, for example, the size of supposing each impact damper is 128 bytes, passing on the 1st impact damper, then begin to pass on the 2nd impact damper, can discharge the 1st impact damper, also promptly when beginning to pass on N impact damper, just can discharge (N-1) individual impact damper immediately, wherein N is the positive integer greater than 1, because in this embodiment, the size of each impact damper is 128 bytes, and in the Ethernet, according to the CSMA/CD transmission standard, must guarantee between transmission 64 byte time length, can not bump on the transmission channel, if actual transmissions is violated the CSMA/CD transmission standard, so-called " collision (late collision) late " can take place, usually occur between 64 to the 128 hyte length, so be confirmed to be under the half-duplex running biography receipts pattern, preferably when beginning to pass on the 2nd impact damper, (if define the size of each impact damper is 64 bytes can to discharge the 1st impact damper, in the time of then must beginning to pass on the 3rd impact damper by the time, can discharge the 1st and 2 impact damper, defined buffer sizes when operating according to hardware and different), the transmission channel that the 2nd impact damper can guarantee to occupy this purpose connectivity port is confirmed to begin to transmit in the purpose connectivity port, after determining successfully transmission, when beginning to pass on N impact damper, just can discharge (N-1) individual impact damper immediately, wherein N is the positive integer greater than 1.When actual hardware is implemented, can be according to the size of Ethernet each impact damper that interchanger defines, for impact damper is 64 bytes, transmit in the buffer sizes process by counting is each, whether transmitted and reached 128 bytes, passing the receipts pattern for full duplex transmits each impact damper and half-duplex and passes the receipts pattern and transmit for each impact damper after the 2nd impact damper, just can discharge immediately and determine to have transmitted the impact damper that finishes, the impact damper that is released just can provide the Ethernet package of coming in after a while temporary, with the utilization of the temporary storage that reaches full blast.If " the super slow collision " of 128 byte time length takes place to surpass, preferably carry out the action that abandons (drop) package transmission, to increase the hardware utilization rate, and can't implement to transmit again, because previous impact damper has been discharged in early days, such situation is bright few the generation, because super slow collision is seriously to violate the transmission standard standard.
Fig. 4 shows the specific embodiment according to block hardware diagram of the present invention, interior medium access control (the media access control that mainly comprises of Ethernet interchanger, be called for short MAC) chip 500, and physical layer control (physical layer control, be called for short PHY) chip 580, preferably, medium access control chip 500 couples physical layer control chip 580 by simplifying medium separate interface (reduced medium independentinterface is called for short RMII).Medium access control chip 500 comprises control (port control) unit 510 to 517, connectivity port, and (with aforementioned eight port ethernet cross winding parallel operations is example, respectively corresponding port 0 is to port 7), pass on control (forwarding control) unit 520, formation and control (queue control) unit 530, impact damper control module 550 and memory buffer 560, connectivity port control module 510 couples forward control unit 520, formation control module 530 and impact damper control module 550, and impact damper control module 550 couples memory buffer 560.Physical layer control chip 580 is responsible for the biography of the external entity electrical signal of Ethernet interchanger and is received, above disclosed flow and method is then relevant with the running design of medium access control chip 500 inside, port 0 received packet data by the Ethernet interchanger, at first arrive connectivity port control module 510 via physical layer control chip 580, produce the corresponding port shielding by forward control unit 520, for example, produce the corresponding port shielding by lookup table mode (look-up table), and by impact damper control module 550 in the suitable buffer sizes of memory buffer 560 configuration (allocate) temporary for this packet data, setting up formation by formation control module 530 according to portmask then links, formation control module 530 can be judged the situation of each connectivity port Xiao Mao memory buffer 560 according to the output queue length of each port, and sender suitably carries out congested control (congestion control) for connectivity port control module 510; Connectivity port control module 510 to 517 has the transmission mode buffer respectively.
Further, when the Ethernet interchanger has just begun in each connectivity port to set up link, can carry out automatic synchronization mechanism and utilize the transmission mode buffer to write down the other side's transmittability, and each connectivity port control module has the counter of the package length that has transmitted in order to counting, for each connectivity port control module, new package of each transmission just can restart to utilize its counter to count, for example, connectivity port control module 517 has in order to the counter 518 of the package length that transmitted of counting and in order to the transmission mode buffer 519 of record the other side's transmittability, preferably, connectivity port control module 517 is when the new Ethernet package of one of each transmission, just can restart to utilize its counter 518 to count, when counting down to 64 or 128, then learn the actual transmissions pattern of the present connectivity port 517 of being write down by transmission mode buffer 519, comprise that full-duplex/half-duplex passes the receipts pattern: if when counting down to 64, transmission mode buffer 519 shows that this connectivity port 517 is full duplex transmission at present, and at present the be associated portmask of (associated) of the Ethernet package that transmits shows that connectivity port 517 is last connectivity port that should transmit, then can discharge the impact damper that has transmitted immediately; If when counting down to 128, transmission mode buffer 519 shows that this connectivity port 517 is half-duplex transmission at present, and at present the be associated portmask of (associated) of the Ethernet package that transmits shows that connectivity port 517 for last connectivity port that should transmit, can discharge the impact damper that has transmitted.Especially for the speciality package in the NAS/SAN system (jumbo packet), more can show the advantage in early stage buffer release district, avoid package to occupy the long time of limited storage space.
The embodiment of Fig. 4 can have in various degree integration embodiment according to the progress of processing procedure, for example, memory buffer 560 can be integrated among the medium access control chip 500 or plug-in chip, according to the access speed difference can be static RAM (SRAM), Synchronous Dynamic Random Access Memory (SDRAM), perhaps DDR dynamic RAM or the like, physical layer control chip 580 is because processing procedure is special and need provide the physical layer of a plurality of ports to control, usually belong to plug-in chip, but also might be integrated among the medium access control chip 500 along with following degree of integration improves.
Indulge the above, the present invention discloses the method in a kind of early stage buffer release district, comprise the following step: the source connection mouth receives the Ethernet package from the beginning, configuration has the buffer zone of a plurality of impact dampers to store the Ethernet package, and these impact dampers are to weave serial connection in order, the Ethernet package is begun to pass on the purpose connectivity port, and if the purpose connectivity port is to be full-duplex transmission mode, then when finishing the passing on of each impact damper, just discharge this each impact damper immediately, wherein the Ethernet package can be clean culture package, multicast package even broadcasting packages; If the purpose connectivity port is to be the half-duplex transmission pattern, then when the passing on of at least 128 byte longs of finishing the Ethernet package, can discharges and transmit the impact damper of finishing.
The present invention further discloses a kind of medium access control chip, comprises: a plurality of connectivity ports control module, in order to couple the physical layer control chip; Forward control unit is coupled to the connectivity port control module; The formation control module couples forward control unit and connectivity port control module; And the impact damper control module, in order to couple a memory buffer and these connectivity port control modules; Wherein, each connectivity port control module has in order to the counter of counting the package length that has transmitted and in order to write down the transmission mode buffer of transmittability, the connectivity port control module is according to transmission mode buffer and counter, and sender impact damper control module discharges the space of this memory buffer in early days; When the connectivity port control module receives the Ethernet package, by having the buffer zone of a plurality of impact dampers to store this Ethernet package in the impact damper control module configuration memory buffer, if the transmission mode buffer shows that the connectivity port control module is the full duplex operating mode, then when the connectivity port control module is just transmitting N impact damper, just can discharge (N-1) individual impact damper immediately, wherein N is for greater than 1 positive integer, no matter and the size of each impact damper; And if the transmission mode buffer shows that the connectivity port control module is the half-duplex operating mode, then when the connectivity port control module is just transmitting N impact damper, just can discharge (N-1) individual impact damper immediately, wherein N is for greater than 1 positive integer, surpasses 128 byte longs and each buffer sizes is an essence; And if each buffer sizes is that essence is less than 128 byte longs, preferably when this each connectivity port control module is just transmitting N impact damper of these impact dampers, just can discharge (N-2) individual impact damper of these impact dampers immediately, wherein N is for greater than 2 positive integer.
Though the present invention describes with reference to current specific embodiment, but those of ordinary skill in the art will be appreciated that, above embodiment is used for illustrating the present invention, under the situation that does not break away from spirit of the present invention, also can make the variation and the modification of various equivalences, therefore, as long as variation, the modification to the foregoing description all will drop in the scope of claims of the present invention in connotation scope of the present invention.
Claims (10)
1. the method in an early stage buffer release district comprises the following step:
Receive an Ethernet package from connectivity port, a source;
Dispose a buffer zone to store this Ethernet package, this buffer zone comprises a plurality of impact dampers, and these impact dampers are to weave serial connection in order;
This Ethernet package is begun to pass on a purpose connectivity port; And
If this purpose connectivity port is to be full-duplex transmission mode, then when finishing the passing on of each impact damper, discharge this each impact damper immediately; If this purpose connectivity port is to be the half-duplex transmission pattern, then when the passing on of predetermined length data of finishing this Ethernet package, begins to discharge and transmitted the impact damper of finishing.
2. the method for claim 1 is characterized in that this Ethernet package is to be a clean culture package.
3. the method for claim 1 is characterized in that this Ethernet package is to be a multicast package.
4. the method for claim 1 is characterized in that each impact damper is to be 128 bytes.
5. the method for claim 1 is characterized in that these predetermined length data are to be 64 byte longs.
6. the described method of claim 1 is characterized in that these predetermined length data are to be 128 byte longs.
7. medium access control chip comprises:
A plurality of connectivity ports control module is in order to couple a physical layer control chip;
One forward control unit is coupled to these connectivity port control modules;
One formation control module couples this forward control unit and these connectivity port control modules; And
One impact damper control module is in order to couple a memory buffer and these connectivity port control modules;
Wherein, each connectivity port control module has a counter and the transmission mode buffer in order to the record transmittability in order to the package length that transmitted of counting, this each connectivity port control module is according to this transmission mode buffer and this counter, and this impact damper control module of sender discharges the space of this memory buffer in early days; Wherein:
This each connectivity port control module receives an Ethernet package, and disposes in this memory buffer one by this impact damper control module and have the buffer zone of a plurality of impact dampers to store this Ethernet package;
This each connectivity port control module is according to this transmission mode buffer and this counter, this impact damper control module of sender, make if this transmission mode buffer shows that this each connectivity port control module is the full duplex operating mode, then when this each connectivity port control module is just transmitting a N impact damper of these impact dampers, just can discharge one (N-1) individual impact damper of these impact dampers immediately, wherein N is for greater than 1 positive integer; And
This each connectivity port control module is according to this transmission mode buffer and this counter, this impact damper control module of sender, make if this transmission mode buffer shows that this each connectivity port control module is the half-duplex operating mode, then when this each connectivity port control module is just transmitting a N impact damper of these impact dampers, just can discharge one (N-1) individual impact damper of these impact dampers immediately, wherein N is for greater than 1 positive integer, and each buffer sizes is to surpass 128 byte longs.
8. medium access control chip as claimed in claim 7, it is characterized in that this each connectivity port control module is according to this transmission mode buffer and this counter, this impact damper control module of sender, make if this transmission mode buffer shows that this each connectivity port control module is the half-duplex operating mode, then when this each connectivity port control module is just transmitting a N impact damper of these impact dampers, just can discharge one (N-2) individual impact damper of these impact dampers immediately, wherein N is for greater than 2 positive integer, and each buffer sizes is less than 128 byte longs.
9. medium access control chip as claimed in claim 7, it is characterized in that this each connectivity port control module is according to this transmission mode buffer and this counter, this impact damper control module of sender, make if this transmission mode buffer shows that this each connectivity port control module is the half-duplex operating mode, then when this each connectivity port control module has transmitted predetermined length data of this Ethernet package, can begin to discharge one and be transmitted the impact damper that finishes.
10. medium access control chip as claimed in claim 9 is characterized in that these predetermined length data are to be 128 byte longs.
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| CNB2003101046860A CN1326055C (en) | 2003-10-30 | 2003-10-30 | Buffer region early-release method and its related media access control chip |
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| Application Number | Priority Date | Filing Date | Title |
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| CNB2003101046860A CN1326055C (en) | 2003-10-30 | 2003-10-30 | Buffer region early-release method and its related media access control chip |
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| CN1612121A CN1612121A (en) | 2005-05-04 |
| CN1326055C true CN1326055C (en) | 2007-07-11 |
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Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5905870A (en) * | 1996-09-11 | 1999-05-18 | Advanced Micro Devices, Inc | Arrangement for initiating and maintaining flow control in shared-medium, full-duplex, and switched networks |
| JP2002164914A (en) * | 2000-11-28 | 2002-06-07 | Mitsubishi Electric Corp | Packet switch |
| CN1444358A (en) * | 2002-03-13 | 2003-09-24 | 威盛电子股份有限公司 | Ethernet exchange controller and its congestion control method |
-
2003
- 2003-10-30 CN CNB2003101046860A patent/CN1326055C/en not_active Expired - Fee Related
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5905870A (en) * | 1996-09-11 | 1999-05-18 | Advanced Micro Devices, Inc | Arrangement for initiating and maintaining flow control in shared-medium, full-duplex, and switched networks |
| JP2002164914A (en) * | 2000-11-28 | 2002-06-07 | Mitsubishi Electric Corp | Packet switch |
| CN1444358A (en) * | 2002-03-13 | 2003-09-24 | 威盛电子股份有限公司 | Ethernet exchange controller and its congestion control method |
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| Publication number | Publication date |
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| CN1612121A (en) | 2005-05-04 |
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