CN1320158C - Process for high concentration plasma chemical vapour phase deposition by multi-step deposition - Google Patents
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- CN1320158C CN1320158C CNB031510248A CN03151024A CN1320158C CN 1320158 C CN1320158 C CN 1320158C CN B031510248 A CNB031510248 A CN B031510248A CN 03151024 A CN03151024 A CN 03151024A CN 1320158 C CN1320158 C CN 1320158C
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Abstract
The present invention relates to a method for high concentration plasma chemical vapor phase deposition by multi-step deposition. The present invention is used for forming a thin film on a semiconductor substrate which has a gap and fully filling the gap. The gap can be a transistor valve, or an inner connecting line, or an etching groove, the depth-width ratio is larger than 4, and the width is from 0.1 to 0.2 mu m. The method comprises at least two high concentration plasma chemical vapor phase deposition steps, D/S values of the deposition steps are different, the first D/S value is from 7 to 20, and the second D/S value is from 2.5 to 8. Because extra etch is not required, two or more than two deposition steps of different D/S parameter values are adopted, and the good filling capacity can be obtained. The present invention obviously shortens the time required by operation, reduces the production cost and enhances the efficiency.
Description
Technical field
The present invention relates to technical field of manufacturing semiconductors, especially a kind of high density plasma chemical vapor deposition process (HDPCVD) with many deposition steps of better gap filling ability (gap-fill ability).
Background technology
Current, integrated circuit technique has marched toward very large scale integration (ULSI) epoch, one of important step in the semiconductor production is exactly to deposit the last layer film by the mode of chemical gas reaction on a semiconducter substrate---be chemical gaseous phase depositing process (chemical vapordeposition, CVD); Development along with technology, plasma enhanced chemical vapor deposition method (plasma enhanced chemical vapordeposition has appearred on traditional CVD basis, PECVD), this method is used radio frequency energy (radio-frequency, RF) promote exciting and/or decomposing of reactant gases, this has just reduced the energy that reacts required than traditional CVD method, thereby does not need too high temperature of reaction; Above-mentioned advantage is further at high density Plasma Enhanced Chemical Vapor Deposition (PECVD) (high-density-plasma chemical vapor deposition, HDPCVD) inherit in, and the high density plasma that low vacuum pressure produced in the HDPCVD method has the bigger ability that excites.
Above-mentioned several CVD method all can be used for the deposition of the conductive film or the insulation film of unicircuit, in calking (gap-fill) processing procedure, obtained widespread use especially, the kind in the gap on the semiconducter substrate (opening) comprises tft gate (transistor gate), intraconnections (line) and etching bath (etched trench) etc., shallow trench isolation wherein is from (shallow trench isolation STI) is exactly a kind of typical etching bath.
Calking generally comprises following key step: at first, form above-mentioned a kind of gap on semiconducter substrate; Then, deposit thin film on the whole surface of semiconducter substrate, this layer film is the gap on the filling semiconductor substrate simultaneously; At last, (CMP) carries out planarization process to this thin film layer with chemically machinery polished, and the film polishing that will be higher than the gap is to required height; At last, tft gate, metal interconnecting or be used for insulating etching bath etc. have just been formed.Certainly, in actual production, between above-mentioned key step, also can comprise other steps, as making of lining etc., because of little, so repeat no more with relation of the present invention.
In above-mentioned calking process, a very important performance is exactly that hole (void) can not be arranged in the gap of being filled, and our usually said good gap filling ability promptly will be arranged.
Why important gap filling ability is, be because: along with component number contained in the chip constantly increases, the characteristic dimension of unicircuit has been reduced to 0.13 μ m at present, the numerical value of the depth-width ratio in gap (gap) (aspect ratio) has had very big raising, that is to say, present gap is not only dark but also thin mostly, and the thinnest width value has reached below the 0.15 μ m, and depth-width ratio has reached more than 6; And how that these are dark and thin the greatest problem that is faced be exactly gap completely filled, and requiring does not again have hole, otherwise can influence the performance of element.
Because the gap filling ability of HDPCVD technology is best, thereby be widely used in the calking processing procedure of thin film deposition.See also Fig. 1, Fig. 1 be comprise the present invention the HDPCVD technology the synoptic diagram of the equipment 10 that usually adopts, therefore be necessary at first to be introduced.
HDPCVD equipment 10 comprises reaction chamber 13, vacuum system 70, source plasma system 80A, inclined to one side plasma system 80B, air supply system 33 and plasma cleaning system 50.
The top of reaction chamber 13 is a vault 14, and its below is plasma reaction district 16, and the below is exactly a silicon chip pedestal 18 again, is loaded with on the silicon chip pedestal 18 and wants processed semiconducter substrate 17.The bottom of reaction chamber 13 is connected with vacuum system 70, and vacuum system 70 is carried out accurate and stable control by more than one valve (not shown) to the pressure in the airtight reaction chamber 13.
Source plasma system 80A comprises top winding 29 and the side coil 30 that is loaded on the vault 14, and top winding 29 is by top radio frequency generating unit 32A supply power, and side coil 30 is by sidepiece radio frequency generating unit 32B supply power.Plasma system 80B comprises inclined to one side radio frequency generating unit 32C partially, and the effect of plasma system 80B is to add the ionic mobility that intense source plasma system 80A is produced partially.
Air supply system 33 comprises several sources of the gas of 34A～34E, and they are by in annular air inlet circle (gasring) 37 and/or the top inlet mouth 45 input reaction chambers 13.Annular air inlet circle 37 is provided with a lot of air inlet ports, visible one of them source gas air inlet port 39 and an oxygen air inlet port 40 among the figure.
In addition, cleaning system 50 is responsible for reaction chamber 13 and is finished the reacted cleaning of electroless plating, and Controlling System 60 is then controlled the operation of whole HDP equipment 10.
Why the HDPCVD technology has best gap filling ability, be because in the HDPCVD deposition step, argon (argon) or other sputter media (sputteringagent) except deposition gases, have also been added, make deposition gases and sputter gas produce deposition and two kinds of effects of sputter simultaneously on semiconducter substrate, therefore HDPCVD also is called " deposition/etch process " (simultaneousdep/etch process).In fill in the HDPCVD gap, sedimentary effect mainly acts on the filling of gap deep inside, splash effect then mainly acts on the thin film deposition of the opening edge that reduces the gap, thereby avoid being closed earlier before the completely filled of gap and leaving hole, so just can obtain preferable filling shape.
Shown in three synoptic diagram of Fig. 2, in sedimentary effect and splash effect,, then make the gap shape that is filled shown in Fig. 2 (a) if splash effect is too much; And, then make the gap shape that is filled shown in Fig. 2 (b) if splash effect is very few; Have only sedimentary effect and splash effect to average out, then just can obtain the gap shape shown in Fig. 2 (c); The parameter of above-mentioned sedimentary effect and splash effect being carried out balancing control is D/S value (deposition/sputter ratio), and the definition of D/S value is:
D/S=(pure deposition+total sputtering raste)/total sputtering raste
In the above-mentioned formula, " pure deposition " is meant the deposition when deposition and sputter take place simultaneously, and " total sputtering raste " is meant sputtering raste measured when not having deposition gases to exist in the reaction chamber.
From above-mentioned formula, be not difficult to find out, want in the bigger gap of depth-width ratio, to obtain the ideal filling effect, D/S is a very important parameters, if the D/S value is low excessively, mean that then sputtering raste is too high, such filling effect please see Figure shown in 2 (a), causes incomplete filling easily, causes product leakage current to occur; And if the D/S value is too high, then mean the sputter deficiency, such filling effect please see Figure shown in 2 (b), makes that the sedimentary film in clearance opening place is too many, and forms the hole in the gap in the deposition of next step easily, and the insulation effect of product is reduced; The ideal filling effect should be sought a kind of balance between deposition and sputter shown in Fig. 2 (c), the shape that makes the clearance opening acquisition can either be filled fully again and can not produced hole.
But, in actual production, because the gap on the semiconducter substrate is not only dark but also thin mostly, if include only a deposition step, promptly the D/S value in this major sedimentary step is changeless, so just be difficult to guarantee that this D/S value obtains best gap filling shape, because the parameter among the HDPCVD is numerous, being difficult to seek a fixed D/S value makes it keep balance between deposition and sputter, therefore caused otherwise the D/S value too high, the present situation that the D/S value is low excessively makes to occur two kinds of above-mentioned filling defects in the actually operating easily, has especially reached more than 6 in depth-width ratio, simultaneously live width is less than even more serious in 0.15 μ m or the following calking.
Thus, application number is divided into D/S value different two deposition steps by adding an etching step with the HDPCVD deposition manufacture process for the United States Patent (USP) of " 20020040764 ", the key step of this patent is: a) carry out the deposition first time, (comprise gap location) and form the first layer film on whole semiconducter substrate, this first layer film does not fill up the gap fully; B) cool off this semiconducter substrate; C) carry out etching, the material etching that is positioned at the thin-film material comparison bottom at top, gap in the etching atom pairs the first layer film gets more; D) carry out the deposition second time, form second layer film on semiconducter substrate, this second layer film covers the gap fully.
In the above-mentioned patent, the required reaction conditions of twice deposition is basic identical, and all in the scope of 5-20, just sedimentary D/S value is greater than the sedimentary D/S value second time for the first time for twice sedimentary D/S value; This patent utilization adds etching step and prevents to occur in the calking hole in sedimentary process.
But, the shortcoming that exists in the above-mentioned technology is: owing to added etching program, make and after depositing for the first time, have to cool off earlier semiconducter substrate, will be increased in the operation steps in the HDPCVD reaction chamber (chamber) like this, all want the gas in the emptying reaction chamber in the front and back of etching step, therefore both prolong the operating time, increased cost of manufacture again.
Summary of the invention
For overcoming above-mentioned the deficiencies in the prior art, the special high density plasma chemical vapor deposition process that proposes many deposition steps of the present invention, its main purpose is, the step that can simplify the operation in the processing procedure of the semi-conductor calking with large ratio of height to width numerical value and little width can obtain gap filling ability preferably again, and reduces production costs.
For reaching above-mentioned purpose, a technical scheme of the present invention is:
A kind of high density plasma chemical vapor deposition process of many deposition steps, be used for having formation film and this gap of completely filled on the semiconducter substrate in gap, described gap comprises tft gate, intraconnections and etching bath, and depth-width ratio is greater than 4, and width is 0.1-0.2 μ m; This method comprises secondary high density PCVD step at least, and wherein sedimentary each time D/S value is different, does not have extra etching step between wherein per twice deposition step.
Comprise secondary high density PCVD step in one embodiment of the invention, wherein the first time, sedimentary D/S value was greater than the described second time of sedimentary D/S value, the one D/S value is 7-20, the 2nd D/S value is 2.5-8, and concrete steps are: (a) feed first reactant gases and first rare gas element in reaction chamber; (b) carry out the deposition first time, produce first plasma with a D/S value from first rare gas element, form the first layer film on semiconducter substrate, this first layer film is filled the gap portion on the semiconducter substrate; (c) in reaction chamber, feed second reactant gases and second rare gas element; (d) carry out the deposition second time, produce second plasma with the 2nd D/S value from second rare gas element, form second layer film on above-mentioned the first layer film, this second layer film is with the gap completely filled on the semiconducter substrate.
Wherein first reactant gases and second reactant gases are SiH
4And O
2, described first rare gas element and second rare gas element are Ar, He or H
2
Another technical scheme of the present invention is:
The isolated making method of a kind of shallow trench of many deposition steps, comprise secondary high density PCVD step, wherein wherein there is not extra etching step in sedimentary D/S value between twice deposition step greater than the described second time of sedimentary D/S value for the first time.The step that this method comprises is: (a) semiconducter substrate that etches groove is put into reaction chamber; (b) in reaction chamber, feed first reactant gases and first rare gas element; (c) carry out the deposition first time, produce first plasma with a D/S value from first rare gas element, form the first layer insulation film on semiconducter substrate, this first layer film is filled the trench portions on the semiconducter substrate; (d) carry out the deposition second time, produce second plasma with the 2nd D/S value from second rare gas element, form second layer insulation film on the first layer insulation film, this second layer film is with the groove completely filled on the semiconducter substrate; (e) second layer insulation film is carried out chemically machinery polished.
Wherein a D/S value can be 7-20, and the 2nd D/S value can be 2.5-8.First reactant gases and second reactant gases comprise SiH
4And O
2, described first rare gas element and second rare gas element are Ar, He or H
2Wherein the depth-width ratio of groove is greater than 4, and width is 0.1-0.2 μ m.
Because do not need extra etching, and only adopt the deposition step of two or more different D/S parameter values just can obtain preferable filling capacity, the present invention has obviously shortened the operation required time, has reduced production cost, has improved efficient.
Description of drawings
Fig. 1 is the synoptic diagram of HDPCVD equipment;
Fig. 2 is the synoptic diagram of the formed different gap filling shape of D/S value different in the HDPCVD deposition manufacture process;
Fig. 3 is a method flow diagram of the present invention;
Fig. 4 is the microphotograph of the sti trench groove of method made of the present invention.
Embodiment
The present invention is divided into two or more steps with the HDPCVD deposition, in these deposition steps, adopt different reaction parameters respectively, adopt different D/S parameter values, in the deposition step of beginning, adopt higher D/S value, to obtain preferable depths, gap filling capacity especially respectively; In deposition step subsequently, then adopt lower D/S value, to obtain preferable corner, gap shape; Thereby make the preferable gap filling ability of the final acquisition of the present invention.
To describe the high density plasma chemical vapor deposition process of many deposition steps of the present invention by specific embodiment in detail below, it is more than 4 that this method is particularly useful for depth-width ratio and width is gap between the 0.1-0.2 μ m.This specific embodiment is to be example with semiconducter substrate 17 that has etched the sti trench groove, and this semiconducter substrate 17 comprises two-layer, promptly on silicon layer silicon oxide layer, silicon nitride layer or silicon oxynitride layer can be arranged; In addition, those of ordinary skill in the art should know, method of the present invention is filled also applicable to the gap filling of all kinds except the sti trench groove, such as: tft gate (transistor gate), intraconnections (line) and etching bath (etched trench), or the like, just corresponding to different gap kinds, the reactant gases difference that is adopted, these chemical reactions all are well-known in the field, do not repeat them here, but their making method is all identical with present embodiment, so all should be within the scope of the present invention.
See also Fig. 3, be method flow diagram of the present invention, and the while is with reference to the equipment synoptic diagram of figure 1.Wherein, top radio frequency (top RF), sidepiece radio frequency (side RF), inclined to one side radio frequency (biasRF) they are to add by top radio frequency generating unit 32A, sidepiece radio frequency generating unit 32B among Fig. 1 and inclined to one side radio frequency generating unit 32C respectively, and reactant gases SiH
4Two air inlet ports are arranged: side gas air inlet port 39 (SiH
4-side) and top inlet mouth 45 (SiH
4-top), O
2Then feed from oxygen air inlet port 40, the rare gas element argon gas feeds (Ar-side) from side gas air inlet port 39.
As shown in Figure 3, method of the present invention comprises 5 key steps:
A, semiconducter substrate is inserted in the reaction chamber;
Gas flow and radio frequency parameter in B, the setting reaction chamber to determine one the one D/S value, feed reactant gases SiH in reaction chamber
4And O
2With rare gas element Ar, produce plasma body, and carry out deposition reaction and etching reaction;
C, carry out first time deposition,,, be 7-20, can strengthen sedimentary effect like this and weaken splash effect so a D/S value is set greatlyyer because will obtain the inner filling effect of groove preferably with a D/S value; Through this deposition reaction for the first time formed film on semiconducter substrate, only the trench portions on the semiconducter substrate is filled, and leave a bigger opening, so that next step continues to fill;
D, set gas flow and radio frequency parameter in the reaction chamber once more, adjust the reactant gases SiH that feeds in the reaction chamber
4And O
2With the flow of rare gas element Ar, produce plasma body and carry out deposition reaction and etching reaction, determine one the 2nd D/S value;
E, carry out second time deposition with the 2nd D/S value, purpose is the hole of the groove opening completely filled will not being boxed out, so make the 2nd D/S value less than a D/S value, scope is 2.5-8, can weaken sedimentary effect like this and strengthen splash effect, make when on above-mentioned the first layer film, forming second layer film again, because the sputter reaction is greater than deposition reaction, groove opening is able to the completely filled hole of not boxing out, so second layer film just can be with the gapped all completely filled on the whole semiconducter substrate.
Wherein, in above-mentioned steps, the gas flow scope is:
SiH
4-side：5～200sccm Ar-side：30～200sccm
O
2-side：50～300sccm SiH
4-top：5～50sccm
Ar-top：5～50sccm；
The radio-frequency (RF) energy scope is: top RF:10～4800W
side RF：10～4800W bias RF：500～2000W
And among the step D, in order to obtain the bigger D/S value of numerical value, just need the radio-frequency (RF) energy scope is heightened, such as, if D/S=20, top RF:3000～4800W then, and side RF:3000～4800W.
For the present invention is described better, on above-mentioned parameter scope basis, provide following the best
Specific embodiment:
(A) semiconducter substrate 17 that will etch the sti trench groove is inserted on the silicon chip pedestal 18 that is arranged in reaction chamber 13, and the depth-width ratio of the sti trench groove of this semiconducter substrate 17 is 6 in the present embodiment;
(B) set gas flow in the reaction chamber, specifically comprise:
Step 311, from side air inlet port input argon gas (Ar), flow is 126sccm.
Step 312 continues the flow input argon gas (Ar) with 126sccm, makes reaction chamber be forced into 3～100mTorr, and optimum value is 5mTorr.
(C) deposit for the first time, specifically comprise:
Step 313 begins to produce plasma, and open top part radio frequency, power are 2000W, and continues the flow input Ar with 126sccm;
Step 314 continues the open top part radio frequency, and power is 2000W, opens the sidepiece radio frequency, and power is 1000W, and continues the flow input Ar with 126sccm;
Step 315 is heated, and makes the temperature of reaction chamber remain on 650-800 ℃, and the top radio frequency power is 3000W, and the sidepiece radio frequency power is 4000W, continues the flow input Ar with 126sccm; And feeding O
2Flow 126sccm;
Step 316 feeds all gas, and the top radio frequency power is 10W, and the sidepiece radio frequency power is 10W, Ar, O
2Continue to feed, but flow becomes 110sccm, 106sccm, SiH respectively
4Flow be: SiH
4-side 10sccm, SiH
4-top 5sccm.
Step 317, preparation is deposition for the first time, and the top radio frequency power is 10W, and the sidepiece radio frequency power is 10W, and opening inclined to one side radio frequency power is 500W, the flow of gas is respectively: Ar-side 110sccm, O
2106sccm, SiH
4-side 10sccm, SiH
4-top 5sccm;
Step 318, deposition reaction for the first time, except the flow with Ar-side becomes the 50sccm, all the other parameters are identical with step 317;
Step 319 is proceeded deposition reaction, and reaction parameter is become: the top radio frequency power is 4000W, and the sidepiece radio frequency power is 2000W, and radio frequency power is 1300W partially, and the flow of gas is respectively: O
2106sccm, SiH
4-side 10sccm, SiH
4-top 5sccm;
Step 320, the D/S value is 20 deposition, and reaction parameter becomes: the top radio frequency power is 4800W, and the sidepiece radio frequency power is 4800W, and radio frequency power is 1300W partially, the flow of gas is respectively: O
2106sccm, SiH
4-side 54sccm, SiH
4-top 10sccm;
(D) reset parameter:
Step 321 is a conversion routine, makes the reaction conditions in the reaction chamber excessive to next deposition step, and the reaction parameter of this step is: the top radio frequency power is 1300W, and the sidepiece radio frequency power is 3100W, and radio frequency power is 2000W partially, and the flow of gas is respectively: O
2220sccm, SiH
4-side 54sccm, SiH
4-top 10sccm;
(E) deposit for the second time, specifically comprise:
Step 322 is deposition second time of 8 for the D/S value, and the temperature of reaction chamber should remain on 550-750 ℃, and other reaction parameters are: the top radio frequency power is 1300W, and the sidepiece radio frequency power is 3100W, and radio frequency power is 2000W partially, and the flow of gas is respectively: O
2220sccm, SiH
4-side 115sccm, SiH
4-top 6sccm.
So far, high density plasma chemical vapor deposition process of the present invention has just been finished, experiment shows, present method does not need extra etching step just can overcome the shortcoming of traditional method and produces do not have the sti trench of hole groove, please see Figure the microphotograph of the sti trench groove of the method made of the present invention shown in 4, as seen the sti trench groove that present method made does not have hole fully, and provable thus present method has filling capacity preferably.
In addition, for clarity sake, the data of the foregoing description also are expressed as follows with the form of tabulation:
| Step number | The step title | Top radio frequency (W) (top RF) | Sidepiece radio frequency (W) (side RF) | Inclined to one side radio frequency (W) (bias RF) | Gas title and flow (unit: sccm) |
| 311 | Wafer is inserted | 0 | 0 | 0 | Ar-side 126 |
| 312 | The reaction chamber pressurization | 0 | 0 | 0 | Ar-side 126 |
| 313 | Squeeze into plasma | 2000 | 0 | 0 | Ar-side 126 |
| 314 | Open the sidepiece radio frequency | 2000 | 1000 | 0 | Ar-side 126 |
| 315 | Reaction chamber is heated | 3000 | 4000 | 0 | Ar-side 126/O 2 126 |
| 316 | Feed all gas | 10 | 10 | 0 | Ar-side 110/O 2 106/ SiH 4-side 10/SiH 4-top 5 |
| 317 | Preliminary program | 10 | 10 | 500 | Ar-side l10/O 2 106/ SiH 4-side 10/SiH 4-top 5 |
| 318 | Squeeze into plasma | 10 | 10 | 500 | Ar-side 50/O 2 106/ SiH 4-side 10/SiH 4-top 5 |
| 319 | Squeeze into plasma | 4000 | 2000 | 1300 | O 2 106/ SiH 4-side 10/SiH 4-top 5 |
| 320 | D/S value 20 depositions | 4800 | 4800 | 1300 | 0 2 106/ SiH 4-side 54/SiH 4-top 10 |
| 321 | Conversion routine | 1300 | 3100 | 2000 | O 2 220/ SiH 4-side 54/SiH 4-top 10 |
| 322 | D/S value 8 depositions | 1300 | 3100 | 2000 | O 2 220/ SiH 4-side 115/SiH 4-top 6 |
Certainly, want to finish the STI processing procedure, also will after above-mentioned steps, add the CMP step.
Compared with prior art, the present invention is not all films that utilize etching step to remove to comprise corner, groove opening top, but deposition and the two kinds of mechanism moved simultaneously of sputter that itself possessed in the HDPCVD technology have been utilized dexterously, adopt higher D/S value in the first time in the deposition step, a little less than making the strong and splash effect of sedimentary effect, thereby groove is filled preferably; Then adopt lower D/S value in the second time in the deposition step, a little less than making the strong and sedimentary effect of splash effect, make groove corner shape be improved, groove opening is big, be not easy just sealing in advance when leaving hole, thereby groove is filled preferably.
The foregoing description is twice deposition step, but in actual production, can implement above deposition as the case may be twice, so that various gap is all filled preferably.
Although the present invention describes with reference to its specific preferred embodiment, it should be appreciated by those skilled in the art, under the situation that does not break away from the spirit and scope of the present invention that are defined by the following claims, can carry out the various modifications of form and details to it.
Claims (11)
1. the high density plasma chemical vapor deposition process of deposition step more than a kind, be used for the film that forms this gap completely filled having on the semiconducter substrate in gap, it is characterized in that: this method comprises secondary high density PCVD step at least, wherein sedimentary each time D/S value is different, does not have extra etching step between wherein per twice deposition step.
2. the method for claim 1, it is characterized in that: this method comprises secondary high density PCVD step, wherein for the first time sedimentary D/S value greater than the described second time of sedimentary D/S value.
3. method as claimed in claim 1 or 2 is characterized in that: this method steps is:
(a) in reaction chamber, feed first reactant gases and first rare gas element;
(b) carry out the deposition first time, produce first plasma with a D/S value from first rare gas element, form the first layer film on semiconducter substrate, this first layer film is filled the gap portion on the semiconducter substrate;
(c) in reaction chamber, feed second reactant gases and second rare gas element;
(d) carry out the deposition second time, produce second plasma with the 2nd D/S value from second rare gas element, form second layer film on above-mentioned the first layer film, this second layer film is with the gap completely filled on the semiconducter substrate.
4. method as claimed in claim 3 is characterized in that: described first reactant gases and second reactant gases are SiH
4And O
2, described first rare gas element and second rare gas element are Ar, He or H
2
5. method as claimed in claim 3 is characterized in that: a described D/S value is 7-20, and described the 2nd D/S value is 2.5-8.
6. the method for claim 1, it is characterized in that: described gap comprises tft gate, intraconnections and etching bath; The depth-width ratio in described gap is greater than 4, and width is 0.1-0.2 μ m.
7. the isolated making method of the shallow trench of deposition step more than a kind, it is characterized in that: this method comprises secondary high density PCVD step, wherein wherein there is not extra etching step in sedimentary D/S value between twice deposition step greater than the described second time of sedimentary D/S value for the first time.
8. method as claimed in claim 7 is characterized in that: this method comprises:
(a) semiconducter substrate that etches groove is put into reaction chamber;
(b) in reaction chamber, feed first reactant gases and first rare gas element;
(c) carry out the deposition first time, produce first plasma with a D/S value from first rare gas element, form the first layer insulation film on semiconducter substrate, this first layer film is filled the trench portions on the semiconducter substrate;
(d) carry out the deposition second time, produce second plasma with the 2nd D/S value from second rare gas element, form second layer insulation film on described the first layer insulation film, this second layer film is with the groove completely filled on the semiconducter substrate;
(e) this second layer insulation film is carried out chemically machinery polished.
9. as claim 7 or 8 described methods, it is characterized in that: a described D/S value is 7-20, and the 2nd D/S value is 2.5-8.
10. method as claimed in claim 8 is characterized in that: described first reactant gases and second reactant gases comprise SiH
4And O
2, described first rare gas element and second rare gas element are Ar, He or H
2
11. method as claimed in claim 8 is characterized in that: the depth-width ratio of described groove is greater than 4, and width is 0.1-0.2 μ m.
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| CN101333653B (en) * | 2007-06-29 | 2010-05-19 | 中芯国际集成电路制造(上海)有限公司 | Plasma chemical vapor deposition process for preventing generation of bag type defects |
| CN101459109B (en) * | 2007-12-13 | 2013-01-23 | 中芯国际集成电路制造(上海)有限公司 | Method for preparing shallow groove isolation structure |
| CN101640175B (en) * | 2008-07-31 | 2012-10-10 | 中芯国际集成电路制造(北京)有限公司 | Method for manufacturing semiconductor structure |
| CN108054078A (en) * | 2017-11-23 | 2018-05-18 | 上海华力微电子有限公司 | HDP technique film build methods |
| CN112366205B (en) * | 2020-11-09 | 2021-10-22 | 长江存储科技有限责任公司 | Semiconductor device and preparation method thereof |
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| US20020040764A1 (en) * | 2000-08-24 | 2002-04-11 | Applied Materials, Inc. | Gas chemistry cycling to achieve high aspect ratio gapfill with HDP-CVD |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20020040764A1 (en) * | 2000-08-24 | 2002-04-11 | Applied Materials, Inc. | Gas chemistry cycling to achieve high aspect ratio gapfill with HDP-CVD |
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