CN108054078A - HDP technique film build methods - Google Patents
HDP technique film build methods Download PDFInfo
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- CN108054078A CN108054078A CN201711178376.1A CN201711178376A CN108054078A CN 108054078 A CN108054078 A CN 108054078A CN 201711178376 A CN201711178376 A CN 201711178376A CN 108054078 A CN108054078 A CN 108054078A
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
- H01L21/0226—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
- H01L21/02263—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase
- H01L21/02271—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition
- H01L21/02274—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition in the presence of a plasma [PECVD]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
- H01L21/76224—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using trench refilling with dielectric materials
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- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
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Abstract
The invention discloses a kind of HDP techniques film build method, HDP techniques including dielectric layer deposition technique and dielectric layer etching technics, during being formed a film using the HDP techniques, are configured the HDP techniques using following steps simultaneously：The dielectric layer deposition technique of HDP techniques and the distribution of dielectric layer etching technics are split as to multiple, each dielectric layer deposition technique and corresponding one group of a dielectric layer etching technics composition；The pattern of the current film layer of parameter of each group of dielectric layer deposition technique is configured；The parameter of each group of the dielectric layer etching technics is configured according to the pattern of current film layer.The present invention can realize the groove well balance of filling and fill rate, can improve the window ranges of technological parameter adjusting.
Description
Technical field
The present invention relates to a kind of semiconductor integrated circuit manufacture method, more particularly to a kind of HDP techniques film build method.
Background technology
During semiconductor fabrication process, needed in the substantial amounts of technique for forming shallow trench isolation (STI) or interlayer film (ILD)
High-density plasma (HDP) technique is used, by ability of the HDP techniques simultaneously with deposit and etching so with good
Trench fill (gapfill) ability.In STI techniques mainly after the shallow trench of STI is formed, using HDP deposited oxide layers
Shallow trench is filled up completely to form sti structure by realization.There is also in groove structure in ILD techniques, deposited and aoxidized using HDP
Layer, which is realized, fills so as to fulfill ILD techniques the groove of ILD.
In semiconductor integrated circuit production equipment, HDP techniques be completed in HDP equipment and be automatic running, institute
With, be provided in HDP equipment with the corresponding program of HDP actual process, as shown in Figure 1, being existing HDP techniques film build method
Program structure chart；Actual HDP techniques are analyzed from program structure shown in FIG. 1 can be seen that HDP techniques includes：
Mark 101 corresponding laying (liner) formation process.
The corresponding dielectric layer depositions of 102a (Dep step) technique is marked afterwards.
Corresponding dielectric layer etching (Etch step) techniques of 102b are marked again.
103 corresponding coating (Cap layer) formation process are finally marked.
Mark 102a and 102b alternately multiple in the corresponding HDP techniques of Fig. 1, but the Dep in each cycle
The technological parameter of step and Etch step is all identical.And actually when using HDP process filling groove patterns, with filling
Process constantly change, the pattern of groove also can constantly change, and Dep step and the Etch step of existing HDP techniques
The pattern of respective devices structure in HDP technical process can not be followed to change so as to the parameter tune of Dep step and Etch step
Whole can not take into account simultaneously realizes groove the filling of good filling and realization to the high-speed of groove.Moreover, to HDP techniques
During carrying out actual maintenance, can many problems, technique will be considered to the adjustment of the technological parameter of Dep step and Etch step
Parameter regulation window is small.
The content of the invention
The technical problems to be solved by the invention are to provide a kind of HDP techniques film build method, can realize that groove is well filled
With the balance of fill rate, the window ranges that technological parameter is adjusted can be improved.
In order to solve the above technical problems, the HDP techniques of HDP techniques film build method provided by the invention are simultaneously including dielectric layer
Depositing technics and dielectric layer etching technics, during being formed a film using the HDP techniques, using following steps to described
HDP techniques are configured：
The dielectric layer deposition technique of the HDP techniques and the distribution of dielectric layer etching technics are split as multiple, each institute
It states dielectric layer depositing technics and a corresponding dielectric layer etching technics forms one group, pass through multigroup dielectric layer deposition
Technique and the dielectric layer etching technics form the HDP techniques.
The parameter of each group of the dielectric layer deposition technique is configured according to the current pattern of film layer, is being met
Increase the deposition rate of the dielectric layer deposition technique of corresponding group on the basis of being formed a film on the pattern of current film layer.
The parameter of each group of the dielectric layer etching technics is configured according to the current pattern of film layer, each group
It requires to ensure that next group of the dielectric layer deposition technique can be deposited normally after the completion of the dielectric layer etching technics.
A further improvement is that the parameter of each group of the dielectric layer etching technics is meeting the shape to current film layer
Looks can realize that next group of the dielectric layer deposition technique can be deposited normally after performing etching under conditions of, reduce and correspond to
The etch amount of the dielectric layer etching technics of group, to improve rate of film build.
A further improvement is that the HDP techniques form a film, the corresponding film layer is interlayer film, in the interlayer film
There is groove, the interlayer film requirement is filled the groove on Semiconductor substrate pattern before film forming.
Alternatively, the HDP techniques form a film, the corresponding film layer is shallow trench isolating oxide layer, the shallow trench every
From having groove on the Semiconductor substrate pattern before the film forming of oxide layer, the shallow trench isolating oxide layer requirement is to described
Groove is filled.
A further improvement is that in the film forming procedure of the film layer is carried out using the HDP techniques, each group of institute
The pattern for stating the film layer corresponding to the parameter adjustment of dielectric layer depositing technics is described thin on the side of the groove
The pattern of film layer.
The pattern of film layer corresponding to the parameter adjustment of each group of the dielectric layer etching technics is positioned at the ditch
The pattern of the film layer on the side of slot.
A further improvement is that the parameter of the dielectric layer deposition technique of each group is each set, the medium of each group
The parameter of layer etching technics is each set.
A further improvement is that the ginseng of the adjacent dielectric layer deposition technique more than two to the HDP techniques
Number be set to it is identical, the parameter of corresponding group of the dielectric layer etching technics be also set to it is identical, it is identical by respectively having
The dielectric layer deposition technique parameter and the dielectric layer etching technics parameter each group composition it is corresponding big group, by each
Big group forms the HDP techniques.
A further improvement is that it is also wrapped before the dielectric layer deposition technique of corresponding first group of the HDP techniques
Include the step of forming laying.
A further improvement is that the laying is oxide layer.
A further improvement is that the laying is formed using thermal oxidation technology.
A further improvement is that after the dielectric layer deposition technique of last corresponding group of the HDP techniques also
The step of including forming coating.
A further improvement is that the coating is oxide layer.
A further improvement is that the parameter of the dielectric layer deposition technique includes the power of high-frequency radio frequency (HF), low frequency is penetrated
Frequently the power of (LF), the flow of silane, process time；The adjustable range of the power of the high-frequency radio frequency is 1500W~3500W,
The adjustable range of the power of the low frequency radio frequency is 2000W~5000W.Two kinds of rf frequencies are employed in HDP equipment, it will frequency
The higher radio frequency of rate is known as HF, and the relatively low radio frequency of frequency is known as LF, and the frequency of HF is 13.56MHZ, and the frequency of LF is 400KHZ.
A further improvement is that the parameter of the dielectric layer etching technics includes the power of high-frequency radio frequency, low frequency radio frequency
Power, the flow of hydrogen, process time；The adjustable range of the power of the high-frequency radio frequency be 1500W~3500W, the low frequency
The adjustable range of the power of radio frequency is 2000W~5000W, and the adjustable range of the flow of hydrogen is 200SCCM~900SCCM.
A further improvement is that the HDP techniques are written in the control computer of the HDP equipment using editmenu mode
On, corresponding parameter is directly rewritten in corresponding editmenu in the HDP techniques.
A further improvement is that being both provided on the control computer of the HDP equipment to film layer each described pair
The editmenu for the HDP techniques answered；In the different phase of the operation of the HDP equipment, by the corresponding HDP works
The parameter of the editmenu of skill is rewritten to realize and the HDP techniques of the corresponding film layer is safeguarded, with reality
The existing film layer good filming.
The present invention has carried out HDP techniques dielectric layer deposition technique and dielectric layer etching technics carries out split-packet setting,
The technological parameter of each group of dielectric layer deposition technique and dielectric layer etching technics set respectively and it is according to corresponding work
The pattern of the corresponding film layer of skill point, that is, current film layer is configured, and can so realize groove well filling and fill rate
Balance, so as to improve fill rate under conditions of good trench fill is obtained simultaneously.Further, since the parameter of each group is point
Adjustment is opened, therefore only needs to consider the pattern of the film layer of corresponding process point, technological parameter adjusting side to the adjustment of every group of parameter
Just and technological parameter adjust window ranges it is big namely it is of the invention can improve technological parameter adjust window ranges.
Description of the drawings
The present invention will be further described in detail below with reference to the accompanying drawings and specific embodiments：
Fig. 1 is the structure chart of the program of existing HDP techniques film build method；
Fig. 2 is the flow chart of HDP technique film build methods of the embodiment of the present invention；
Fig. 3 is the structure chart of the program of HDP technique film build methods of the embodiment of the present invention.
Specific embodiment
As shown in Fig. 2, it is the flow chart of HDP technique film build methods of the embodiment of the present invention；As shown in figure 3, it is of the invention real
The structure chart of the corresponding program of HDP techniques of a HDP technique film build methods is applied, HDP technique film build methods of the embodiment of the present invention
HDP techniques are simultaneously including dielectric layer deposition technique 2a and dielectric layer etching technics 2b, what is formed a film using the HDP techniques
In the process, the HDP techniques are configured using following steps：
By the dielectric layer deposition technique 2a of the HDP techniques and dielectric layer etching technics 2b distribution be split as it is multiple, it is each
A dielectric layer deposition technique 2a and a corresponding dielectric layer etching technics 2b form one group, are given an account of by multigroup
The matter layer depositing technics 2a and dielectric layer etching technics 2b forms the HDP techniques.Multistep dielectric layer deposition is shown in Fig. 3
It is represented in the box that technique 2a is simultaneously walked in correspondence respectively with English alphabet, such as：Dep1step, Dep2step, Dep3step.Together
Sample, dielectric layer etching technics 2b described in multistep represent in the box of corresponding step with English alphabet respectively in figure 3, such as：
Etch1step, Etch 2step, Etch 3step.
The pattern of the current film layer of parameter of each group of the dielectric layer deposition technique 2a is configured, and is being worked as meeting
Increase the deposition rate of the dielectric layer deposition technique 2a of corresponding group on the basis of being formed a film on the pattern of preceding film layer.
The parameter of each group of the dielectric layer etching technics 2b is configured according to the pattern of current film layer, each group
The dielectric layer etching technics 2b after the completion of require to ensure that next group of the dielectric layer deposition technique 2a can be carried out normally
Deposit.Preferably, the parameter of each group of the dielectric layer etching technics 2b carves the pattern of current film layer in satisfaction
Under conditions of next group of the dielectric layer deposition technique 2a can be realized after erosion normally being deposited, the institute of corresponding group is reduced
The etch amount of dielectric layer etching technics 2b is stated, to improve rate of film build.
The HDP techniques form a film the corresponding film layer as interlayer film, the semiconductor before the film forming of the interlayer film
There is groove, the interlayer film requirement is filled the groove on substrate pattern.Alternatively, the HDP techniques film forming corresponds to
The film layer for shallow trench isolating oxide layer, the Semiconductor substrate before the film forming of the shallow trench isolating oxide layer
There is groove, the shallow trench isolating oxide layer requirement is filled the groove on pattern.
In the film forming procedure of the film layer is carried out using the HDP techniques, each group of the dielectric layer deposition work
The pattern of film layer corresponding to the parameter adjustment of skill 2a is the pattern of the film layer on the side of the groove.
The pattern of film layer corresponding to the parameter adjustment of each group of the dielectric layer etching technics 2b is positioned at described
The pattern of the film layer on the side of groove.
The parameter of the dielectric layer deposition technique 2a of each group is each set, the dielectric layer etching technics 2b's of each group
Parameter is each set.
Phase is set to the parameter of the adjacent dielectric layer deposition technique 2a more than two of the HDP techniques
Together, the parameter of corresponding group of the dielectric layer etching technics 2b is also set to identical, by respectively having the identical medium
The each group composition of the parameter of layer depositing technics 2a and the parameter of the dielectric layer etching technics 2b is big group corresponding, by major group of group
Into the HDP techniques.
It further includes to form laying before the dielectric layer deposition technique 2a of corresponding first group of the HDP techniques
Step in step, i.e. Fig. 3 corresponding to mark 1 is also shown in 1 corresponding box of mark because Liner.Preferably, institute
Laying is stated as oxide layer.The laying is formed using thermal oxidation technology.Wherein first group of the dielectric layer etching technics
The parameter of 2b is configured according to the pattern of the film layer after the completion of laying.
It further includes to form coating after the dielectric layer deposition technique 2a of last corresponding group of the HDP techniques
The step of, i.e. step in Fig. 3 corresponding to mark 3 is also shown in 2 corresponding box of mark because Caplayer.Preferably
For the coating is oxide layer.
The parameter of the dielectric layer deposition technique 2a includes the power of high-frequency radio frequency, the power of low frequency radio frequency, the stream of silane
Amount, process time；The adjustable range of the power of the high-frequency radio frequency be 1500W~3500W, the tune of the power of the low frequency radio frequency
Adjusting range is 2000W~5000W.The parameter of the dielectric layer etching technics 2b includes the power of high-frequency radio frequency, low frequency radio frequency
Power, the flow of hydrogen, process time；The adjustable range of the power of the high-frequency radio frequency be 1500W~3500W, the low frequency
The adjustable range of the power of radio frequency is 2000W~5000W, and the adjustable range of the flow of hydrogen is 200SCCM~900SCCM.
The parameter of the dielectric layer deposition technique 2a includes the power of high-frequency radio frequency, the power of low frequency radio frequency, the stream of silane
Amount, process time.The parameter of the dielectric layer etching technics 2b includes the power of high-frequency radio frequency, the power of low frequency radio frequency, hydrogen
Flow, the process time.
The HDP techniques are written in using editmenu mode on the control computer of the HDP equipment, the HDP techniques
In corresponding parameter directly rewritten in corresponding editmenu.To described in each on the control computer of the HDP equipment
Film layer is both provided with the editmenu of the corresponding HDP techniques；In the different phase of the operation of the HDP equipment, pass through
The parameter of the editmenu of the corresponding HDP techniques is rewritten to realize the HDP to the corresponding film layer
Technique is safeguarded, to realize the film layer good filming.
The embodiment of the present invention has carried out HDP techniques dielectric layer deposition technique 2a and dielectric layer etching technics 2b is split
Grouping set, the technological parameter of each group of dielectric layer deposition technique 2a and dielectric layer etching technics 2b have been carried out respectively set and
It is according to the pattern of the corresponding film layer of corresponding process point, can so realizes the groove well balance of filling and fill rate, from
And fill rate can be improved under conditions of good trench fill is obtained simultaneously.Further, since the parameter of each group is to separate adjustment,
Therefore only needing to consider the pattern of the film layer of corresponding process point to the adjustment of every group of parameter, technological parameter is easy to adjust and technique
The window ranges of parameter regulation are big namely the embodiment of the present invention can improve the window ranges that technological parameter is adjusted.
The present invention has been described in detail through specific embodiments, but these not form the limit to the present invention
System.Without departing from the principles of the present invention, those skilled in the art can also make many modification and improvement, these also should
It is considered as protection scope of the present invention.
Claims (15)
1. a kind of HDP techniques film build method, it is characterised in that：HDP techniques are carved simultaneously including dielectric layer deposition technique and dielectric layer
Etching technique during being formed a film using the HDP techniques, is configured the HDP techniques using following steps：
The dielectric layer deposition technique of the HDP techniques and the distribution of dielectric layer etching technics are split as multiple, each is given an account of
Matter layer depositing technics and a corresponding dielectric layer etching technics form one group, pass through multigroup dielectric layer deposition technique
The HDP techniques are formed with the dielectric layer etching technics；
The parameter of each group of the dielectric layer deposition technique is configured according to the current pattern of film layer, is being met current
Increase the deposition rate of the dielectric layer deposition technique of corresponding group on the basis of being formed a film on the pattern of film layer；
The parameter of each group of the dielectric layer etching technics is configured according to the current pattern of film layer, each group described
It requires to ensure that next group of the dielectric layer deposition technique can be deposited normally after the completion of dielectric layer etching technics.
2. HDP techniques film build method as described in claim 1, it is characterised in that：Each group of the dielectric layer etching technics
Parameter meet the pattern of current film layer is performed etching after can realize that next group of the dielectric layer deposition technique can be into
Under conditions of the normal deposit of row, the etch amount of the dielectric layer etching technics of corresponding group is reduced, to improve rate of film build.
3. HDP techniques film build method as described in claim 1, it is characterised in that：The HDP techniques film forming is corresponding described thin
Film layer is interlayer film, has groove, the interlayer film requirement pair on the Semiconductor substrate pattern before the film forming of the interlayer film
The groove is filled；
Alternatively, the HDP techniques form a film, the corresponding film layer is shallow trench isolating oxide layer, in the shallow trench isolation from oxygen
Changing has groove on the Semiconductor substrate pattern before the film forming of layer, the shallow trench isolating oxide layer requirement is to the groove
It is filled.
4. HDP techniques film build method as claimed in claim 3, it is characterised in that：Described thin using HDP techniques progress
In the film forming procedure of film layer, the pattern of the film layer corresponding to the parameter adjustment of each group of the dielectric layer deposition technique is position
In the pattern of the film layer on the side of the groove；
The pattern of film layer corresponding to the parameter adjustment of each group of the dielectric layer etching technics is positioned at the groove
The pattern of the film layer on side.
5. HDP techniques film build method as described in claim 1, it is characterised in that：The dielectric layer deposition technique of each group
Parameter is each set, and the parameter of the dielectric layer etching technics of each group is each set.
6. HDP techniques film build method as described in claim 1, it is characterised in that：To adjacent two group of the HDP techniques with
On the parameter of the dielectric layer deposition technique be set to identical, the parameter of corresponding group of the dielectric layer etching technics
Be set to it is identical, by respectively have the identical dielectric layer deposition technique parameter and the dielectric layer etching technics parameter
Each group composition it is corresponding big group, form the HDP techniques by major group.
7. the HDP technique film build methods as described in claim 1 or 3, it is characterised in that：In the HDP techniques corresponding first
The step of forming laying is further included before the dielectric layer deposition technique of group.
8. the HDP technique film build methods as described in claim 1 or 3, it is characterised in that：The laying is oxide layer.
9. HDP techniques film build method as claimed in claim 8, it is characterised in that：The laying uses thermal oxidation technology shape
Into.
10. the HDP technique film build methods as described in claim 1 or 3, it is characterised in that：It is corresponding last in the HDP techniques
The step of forming coating is further included after one group of the dielectric layer deposition technique.
11. HDP techniques film build method as claimed in claim 10, it is characterised in that：The coating is oxide layer.
12. HDP techniques film build method as described in claim 1, it is characterised in that：The parameter bag of the dielectric layer deposition technique
Include the power of high-frequency radio frequency, the power of low frequency radio frequency, the flow of silane, process time；The adjusting of the power of the high-frequency radio frequency
Scope is 1500W~3500W, and the adjustable range of the power of the low frequency radio frequency is 2000W~5000W.
13. HDP techniques film build method as described in claim 1, it is characterised in that：The parameter bag of the dielectric layer etching technics
Include the power of high-frequency radio frequency, the power of low frequency radio frequency, the flow of hydrogen, process time；The adjusting of the power of the high-frequency radio frequency
Scope is 1500W~3500W, and the adjustable range of the power of the low frequency radio frequency is 2000W~5000W, the tune of the flow of hydrogen
Adjusting range is 200SCCM~900SCCM.
14. HDP techniques film build method as described in claim 1, it is characterised in that：The HDP techniques use editmenu side
Formula is written on the control computer of the HDP equipment, and corresponding parameter is directly in corresponding editmenu in the HDP techniques
It rewrites.
15. HDP techniques film build method as claimed in claim 14, it is characterised in that：On the control computer of the HDP equipment
The editmenu of the corresponding HDP techniques is both provided with to film layer each described；The HDP equipment operation not
The same stage is rewritten to realize to the corresponding film by the parameter of the editmenu to the corresponding HDP techniques
The HDP techniques of layer are safeguarded, to realize the film layer good filming.
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Citations (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20020040764A1 (en) * | 2000-08-24 | 2002-04-11 | Applied Materials, Inc. | Gas chemistry cycling to achieve high aspect ratio gapfill with HDP-CVD |
| KR100341483B1 (en) * | 1999-12-03 | 2002-06-21 | 윤종용 | Method of filling gap by using high density plasma oxide |
| CN1598050A (en) * | 2003-09-18 | 2005-03-23 | 中芯国际集成电路制造(上海)有限公司 | Process for high concentration plasma chemical vapour phase deposition by multi-step deposition |
| US20050153519A1 (en) * | 2004-01-08 | 2005-07-14 | Taiwan Semiconductor Manufacturing Co. | Novel shallow trench isolation method for reducing oxide thickness variations at different pattern densities |
| KR20060105857A (en) * | 2005-04-04 | 2006-10-11 | 주식회사 하이닉스반도체 | Method for fabricating trench isolation in semiconductor device |
| CN101192559A (en) * | 2006-11-28 | 2008-06-04 | 中芯国际集成电路制造(上海)有限公司 | Isolation groove filling method |
| CN101330036A (en) * | 2007-06-21 | 2008-12-24 | 中芯国际集成电路制造(上海)有限公司 | Isolation structure of shallow plough groove and manufacturing method thereof |
-
2017
- 2017-11-23 CN CN201711178376.1A patent/CN108054078A/en active Pending
Patent Citations (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR100341483B1 (en) * | 1999-12-03 | 2002-06-21 | 윤종용 | Method of filling gap by using high density plasma oxide |
| US20020040764A1 (en) * | 2000-08-24 | 2002-04-11 | Applied Materials, Inc. | Gas chemistry cycling to achieve high aspect ratio gapfill with HDP-CVD |
| CN1598050A (en) * | 2003-09-18 | 2005-03-23 | 中芯国际集成电路制造(上海)有限公司 | Process for high concentration plasma chemical vapour phase deposition by multi-step deposition |
| US20050153519A1 (en) * | 2004-01-08 | 2005-07-14 | Taiwan Semiconductor Manufacturing Co. | Novel shallow trench isolation method for reducing oxide thickness variations at different pattern densities |
| KR20060105857A (en) * | 2005-04-04 | 2006-10-11 | 주식회사 하이닉스반도체 | Method for fabricating trench isolation in semiconductor device |
| CN101192559A (en) * | 2006-11-28 | 2008-06-04 | 中芯国际集成电路制造(上海)有限公司 | Isolation groove filling method |
| CN101330036A (en) * | 2007-06-21 | 2008-12-24 | 中芯国际集成电路制造(上海)有限公司 | Isolation structure of shallow plough groove and manufacturing method thereof |
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Application publication date: 20180518 |