CN1316746C - Method and apparatus for processing digital signal - Google Patents
Method and apparatus for processing digital signal Download PDFInfo
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- CN1316746C CN1316746C CNB031452256A CN03145225A CN1316746C CN 1316746 C CN1316746 C CN 1316746C CN B031452256 A CNB031452256 A CN B031452256A CN 03145225 A CN03145225 A CN 03145225A CN 1316746 C CN1316746 C CN 1316746C
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Abstract
The present invention relates to a method and a device for processing digital signals. Digital signals with low analysis degree are used as analog output, and the same effect expressed by digital signals with high analysis degree can be achieved under the requirements of definite signal quality. The output energy of the digital signals with low analysis degree output to many times is equal to the output energy of the digital signals with high analysis degree.
Description
(1) technical field
The method and apparatus of the relevant a kind of Digital Signal Processing of the present invention, and particularly relevant for a kind of method and apparatus that utilizes the low-res digital signal to reach high-res simulation output.
(2) background technology
Natural sound, light all are that the kenel with ripple exists, and the mode that these analog signals be stored has two kinds, and one is simulation (analog), and one be digital (digital).With the audio signal is example, and traditional analog storage is to utilize the magnetic of Storage Media seal to come direct recorde audio signal.These Storage Medias, for example disc, casette, video tape etc., though have the convenient characteristic of popularizing, the frequency of tape or disc is limited, and damages distortion easily, is difficult for permanent the preservation.Digital storage then utilizes the digital signal of binary system 0 and 1 combination to come recorde audio signal, and the Storage Media of its representative has: CD (CD), hard disk (HD) etc.It is better to utilize these Storage Media stored audio signals not only to protect property of a specified duration, and the fidelity of its tonequality is also preferable.
Because digital storage stored audio signals is a digital signal, and audio signal is the form transmission with analog signal in itself, therefore, when if desire stores audio signal with digital signal, just must earlier the audio signal of simulating be converted into digital digital signal, the process of this conversion be exactly " analog digital conversion " (analog-to-digital converter, ADC).The analog digital transfer process at first must be taken a sample to analog signal (sampling), is example with the audio signal, and the sampling of audio signal has comprised two important factors: sound wave sampling rate and sampling resolution.
The sound wave sampling rate is meant the number of times of in each second the audio signal waveform being gathered, the just sampling rate of audio signal frequency.The sound wave sampling rate is high more, and it is just clear more then to note down the tonequality of getting off, but the data file of its digital signal is also just big more.Because the quality when sound broadcasts usually can only reach sampling frequency half, therefore need to adopt double sampling frequency former accuracy in pitch really could be reappeared.For instance, the human hearing limit approximately is 20KHz, so the sound wave sampling rate of better quality should be it more than twice.
The sampling resolution has determined then whether sampled audio signal can keep original wavy, and the then required resolution of approaching more original waveform is high more.If write down sampling with 8 bits, then its combination variety that can express is 28 powers, and promptly 256 kinds, this expression can only be told the sound of 256 levels with the resolution of 8 bits; If write down sampling with 16 bits, then its combination variety that can express is 2 16 powers, and promptly 65536 kinds, then its accuracy greatly improves naturally.
According to the key factor of above-mentioned two audio signals sampling, sound wave sampling rate and sampling resolution with digital audio and video signals commonly used, are made table one as CD Quality, broadcast receiver tonequality and call voice tonequality etc., relatively the difference between each digital audio and video signals.
Table one: digital audio signal commonly used.
| Numerical digit sound source | The sound wave sampling rate | The sampling resolution | Sound channel | The data quantity of per second |
| CD Quality | 44,100 | 16bits | Stereo | 44,100*16*2 ＝1,411,200 bits |
| Broadcast receiver tonequality | 22,050 | 8bits | Monophony | 22,050*8*1 ＝176,400 bits |
| Call voice tonequality | 11,025 | 8bits | Monophony | 11,025*8*1 ＝88,200 bits |
As shown in Table 1, specifications such as the sound wave sampling rate of CD Quality, sampling resolution, sound channel all are better than broadcast receiver tonequality and call voice tonequality, therefore utilize the CD Quality stored audio signals, its tonequality is the most clear accurately, but the data volume of per second also much larger than other both, need bigger storage area store this digital signal.
And when desire is play above-mentioned digital signal, for example with above-mentioned when utilizing CD or hard disk stored audio signals to see through loud speaker to broadcast, then digital signal must be changed back again the form of analog signal originally, this be called " digital-to-analogue conversion " (digital-to-analog converter, DAC).
When carrying out digital-to-analogue conversion, if the sampling resolution is big more, promptly Qu Yang bit number is many more, and then the required cost of change-over circuit is high more.For instance, the employed current mirror number of eight bit transitions circuit only is 1/4th of ten bit transitions circuit.And each current mirror all can take a fixing unit are, that is to say that both circuit layouts (layout) have differed 768 unit ares, and required manufacturing cost will significantly improve.Therefore, for manufacturer, the digital-to-analogue conversion of high-res, its manufacturing cost are very big burdens.
(3) summary of the invention
Therefore purpose of the present invention is exactly that a kind of method and apparatus of Digital Signal Processing is being provided, and reaches the simulation output of high-res with the digital signal of utilizing low-res.
Another object of the present invention is providing a kind of digital signal processing device exactly, to save the manufacturing cost of high-res D/A conversion circuit.
Another purpose of the present invention is providing a kind of digital processing compensation way exactly, utilizes the lower digital-to-analogue conversion of resolution to play out the higher analog signal of resolution.
According to above-mentioned purpose of the present invention, a kind of method and apparatus of Digital Signal Processing is proposed.The present invention utilizes the low-res digital signal to do simulation output, under certain signal quality requires, reaches the effect same that the high-res digital signal is showed.Method and apparatus of the present invention is a kind of compensation way, exports the low-res digital signal of more number of times, and the energy of its output is equated with the energy of high-res digital signal output.Like this, can utilize less bit digital-to-analogue conversion to reach the requirement of the high accuracy that more bit digital-to-analogue conversion will reach.
When the high-res digital signal is a m bit, and the low-res digital signal is when being n bit, earlier the high-res digital signal is divided into the high bit primary block with n bit and has two parts of low bit primary block of (m-n) individual bit, wherein the numerical value of low bit primary block is B.The period that then output of digital-to-analogue conversion is divided into the individual identical equal portions of 2 (m-n) cycle time.During output, export the numerical value of high bit primary block, and export high bit primary block and add numerical value after one exporting remaining B period in cycle time in 2 (m-n)-B period of output in cycle time.Like this, just, can utilize the low-res digital signal of n bit of output to reach and the same effect of high-res digital signal of exporting m bit.
According to a preferred embodiment of the present invention, be after sending the numerical value A of 2 (m-n)-B period earlier, send the numerical value (A+1) of B period again.Wherein the high-resolution digital signal is in order to store an audio signal.And input can be a digital signal Storage Media, as CD or hard disk, and the processor of arranging in pairs or groups, to read the digital signal that is stored in wherein.Output then can be a loud speaker or amplifier, sends audio signal in order to receive analog signal with the positive and negative level that promotes loud speaker.
Because the present invention can utilize the lower digital-to-analogue conversion of resolution to play than the higher analog signal of digital-to-analogue conversion resolution own, therefore, can significantly reduce the cost when making.And because the operation clock pulse of processor is all quite high now, so the present invention can not cause too big burden yet when processing signals, is a kind of economy and implements to be easy to digital signal processing method and device.
(4) description of drawings
For above-mentioned and other purposes of the present invention, characteristics and advantage can be become apparent, a preferred embodiment cited below particularly, and conjunction with figs. is elaborated.
Fig. 1 is the schematic diagram that illustrates a preferred embodiment of the present invention;
Fig. 2 is the flow chart that illustrates a preferred embodiment of method of the present invention;
Fig. 3 is the schematic diagram that illustrates a preferred embodiment of device of the present invention.
(5) embodiment
In order to solve the expensive problem of known high-res digital-to-analogue conversion, the present invention proposes a kind of method and apparatus of Digital Signal Processing, utilizes the digital signal of low-res to reach the simulation output of high-res.
The present invention utilizes the low-res digital signal to simulate output, under certain signal quality requires, reaches the effect same that the high-res digital signal is showed.Method and apparatus of the present invention is a kind of compensation way, exports the low-res digital signal of more number of times, and the energy of its output is equated with the energy of high-res digital signal output.Like this, can utilize less bit digital-to-analogue conversion to reach the requirement of the high accuracy that more bit digital-to-analogue conversion will reach.
When the high-res digital signal is a m bit, and the low-res digital signal is when being n bit, earlier the high-res digital signal is divided into the high bit primary block with n bit and has two parts of low bit primary block of (m-n) individual bit, wherein the numerical value of low bit primary block is B.The period that then output of digital-to-analogue conversion is divided into the individual identical equal portions of 2 (m-n) cycle time.During output, export the numerical value of high bit primary block, and export high bit primary block and add numerical value after one exporting remaining B period in cycle time in 2 (m-n)-B period of output in cycle time.Like this, just, can utilize the low-res digital signal of n bit of output to reach and the same effect of high-res digital signal of exporting m bit.
From the above, if desire to reach with the low-res digital signal with n bit the output effect of the high-res digital signal with m bit, then the output frequency of low-res digital signal can be 2 (m-n) times of high-res digital signal.For instance, if will reach the output effect of 10 bit digital signals with the digital signal of 8 bits, then the output frequency of the digital signal of 8 bits can be four times of 10 bit digital signal output frequencies originally.
The human hearing limit approximately is 20KHz, if the sound wave sampling rate is 20KHz, and when utilizing the digital signal of 8 bits to reach the simulation output effect of 10 bits, then must be multiplied by four times when operation, makes output frequency near about 100KHz.The output frequency of this grade all for the processor of 1,000,000 Hz, can't cause any excessive burden for present operation clock pulse.Therefore, method of the present invention can be used general processor and repeatedly send the low-res digital signal to reach the simulation output effect identical with the high-res digital signal, utilizes the high clock pulse of processor to operate the manufacturing cost of saving D/A conversion circuit.
Fig. 1 is the schematic diagram that illustrates a preferred embodiment of the present invention.As shown in Figure 1, high-res digital signal 100 has m bit, and its preceding n high bit numeral is defined as a high bit primary block 102, and (m-n) individual low bit numeral then is defined as a low bit primary block 104 thereafter.Wherein, the numerical value of high-res digital signal 100 is X, and the numerical value of high bit primary block 102 is A, and the numerical value of low bit primary block 104 is B.
Numerical relation between high-res digital signal 100, high bit primary block 102 and the low bit primary block 104 can be represented by the formula:
X＝A·2
m-n+B (1)
And method of the present invention is the numerical value A output 2 with high bit primary block 102
(m-n)-B time, and high bit primary block 102 added numerical value (A+1) output B time after one.The sum total of both numerical value also can be expressed from the next:
X′＝A·(2
m-n-B)+(A+1)·B (2)
And above-mentioned formula (1) can be equal to formula (2) via derivation:
X＝A·2
m-n+B
＝A·(2
m-n-B)+A·B+B
＝A·(2
m-n-B)+(A+1)·B
＝X′
Therefore, utilize the numerical value A of high bit primary block 102 of the low-res that repeats to export specific times of the present invention and the method for numerical value (A+1), just can reach and high-res digital signal 100 identical simulation output effects.
Below explain orally the numerical value that numerical value that method of the present invention drawn can equal the high-res digital signal really with another kind of representation again:
Low-res digital signal A and sum total (A+1)
＝(2-
(m-n))×[(2
(m-n)-B)×<A，0>+(B)×<A+1，0>]
＝(2-
(m-n))×[(2
(m-n)-B)×<A，0>+(B)×<A，0>+(B)×<1，0>]
＝(2-
(m-n))×[(2
(m-n))×<A，0>+(B)×<1，0>]
＝(2-
(m-n))×[(2
(m-n))×<A，0>+<B，0>]
＝(2-
(m-n))×[(2
(m-n))×<A，0>+<B，0>]
＝<A，0>+(2-
(m-n))×<B，0>
＝<A，0>+<0，B>
=＜A, B 〉=the high-res digital signal
Wherein＜and A+1,0〉expression adds a back numerical value, so can resolve into
<A+1，0>＝<A，0>+<1，0>
Fig. 2 is the flow chart that illustrates a preferred embodiment of method of the present invention, and the following description please be simultaneously with reference to Fig. 1 and Fig. 2.At first, have the high-res digital signal 100 of m bit by input 210 inputs, in step 202 high-res digital signal 100 is divided into two parts, some is high bit primary block 102, and another partly then is low bit primary block 104.
Then, on the one hand, handle the data of numerical value, in step 212, the numerical value that calculates high bit primary block 102 is A, and in step 214, calculates the numerical value of A+1, with the analog signal numerical value as output.And on the other hand, then handle the data of output number of times, in step 224, the numerical value that calculates low bit primary block 104 is B, and in step 222, then calculates 2
(m-n)The numerical value of-B is with the number of times numerical value as when output.
In addition, in step 204, the output of digital-to-analogue conversion is divided into 2 cycle time
(m-n)The period of individual equal portions.Then, the analog signal numerical value A of above-mentioned output with (A+1), the number of times numerical value 2 in when output
(m-n)The umber 2 that-B and B and output are cut apart cycle time
(m-n), can carry out step 232 and step 234 together.First output stage (step 232), be output cycle time in before 2
(m-n)The period of-B equal portions, output numerical value A is to output 240 earlier, and then, second output stage (step 234) is exported numerical value (A+1) again to output 240.
It should be noted that in this embodiment, is to send 2 earlier
(m-n)Behind the numerical value A of-B period, send the numerical value (A+1) of B period again.Yet the present invention does not limit the sending order of numerical value A and numerical value (A+1), that is to say, also can send the numerical value (A+1) of B period in practical application earlier, and then sends the numerical value A of 2 (m-n)-B period.Even when some other application, can there be the relation of a definite sequence alternately to send between numerical value A and the numerical value (A+1) yet.As long as numerical value A has been sent out 2 in whole output cycle time
(m-n)-B period, and numerical value (A+1) has been sent out B period in whole output cycle time, with regard to spirit according to the invention and scope.
In addition, the step that is illustrated of Fig. 2 be in order clearly to explain method of the present invention, yet the some of them step can merge or take apart.For example step 212 can be returned with step 214 and is a single step, step 224 and step 222, or step 232 and step 234, and also all can merge respectively becomes single step.Perhaps step 222 also can split into two steps, calculates the numerical value of 2 (m-n) and B respectively, then both is subtracted each other to obtain the result of step 222 again.Each step that is illustrated among Fig. 2 only for explaining the usefulness of method of the present invention, can't limit the execution mode of other various combinations of the present invention.
Comprehensive the above, the situation of practical application of the present invention below is described with two simple example.
Example one:
One high-res, 12 bit digital signals: 11010110111, when utilizing method of the present invention to utilize the low-res digital signal to do simulation output,
When a. exporting, wherein with eight bit digital signals:
High bit primary block is 11011011;
Low bit primary block is 0111;
So m-n=4; B=7; A=219.
When b. exporting, wherein with nine bit digital signals:
High bit primary block is 110110110;
Low bit primary block is 111;
So m-n=3; B=7; A=438.
Example two:
One high-res, 10 bit digital signals: 1010101101, when utilizing method of the present invention, when using low-res 8 bit digital signals to do simulation output:
1010101101 numerical value X is 685;
High bit primary block is; 10101011, numerical value A is 171;
Low bit primary block is: 01, and numerical value B is 1, and 2
(10-8)=4;
Therefore, repeat numerical value A three times and repeat numerical value (A+1) once, just can obtain and the identical numerical value of original high-res digital signal:
X’＝171×3+172×1＝685＝X
Fig. 3 is the schematic diagram that illustrates another preferred embodiment of the present invention, is the device of a Digital Signal Processing, and the following description please refer to Fig. 1,2,3.At first, read a high-res digital signal 100, then this high-res digital signal 100 is delivered to judging unit 302 (step 202) by input 310.Judging unit 302 meetings are according to the bit number m of high-res digital signal 100, and the bit number n of the low-res digital signal that will utilize, send and indicate to shade 312.
Shade 312 can be according to the indication of judging unit 310, (m-n) of high-res digital signal 100 individual low bit primary block 104 screenings are gone, only stay the high bit primary block 102 of n bit, then this high bit primary block 102 is delivered to respectively in output unit 330 and the adder 314 (step 212).Adder 314 can add the numerical value of high bit primary block 102 after one, sends into output unit 330 (step 214) again.
In addition, above-mentioned judging unit 302 also can will be exported the period umber 2 that will cut cycle time
(m-N)Be sent to output unit 330 (step 204), and above-mentioned shade 312 also can be sent to the numerical value B that hangs down bit primary block 104 output unit 330 (step 224,222).330 data that transmitted according to judging unit 302, shade 312 and adder 314 of output unit are being exported in cycle time, with numerical value A output 2
(m-n)-B period, and with B the period of numerical value (A+1) output (step 232 and step 234).
Input 310 among Fig. 3 can be a digital signal Storage Media, as CD or hard disk, and the processor of arranging in pairs or groups, to read the digital signal that is stored in wherein.And output 340 then can be a loud speaker or amplifier, sends audio signal in order to receive analog signal with the positive and negative level that promotes loud speaker.Same, the device among Fig. 3 only be a preferred embodiment of the present invention, and each device can the needs when designing mutually combines or disassembles among the figure, and device of the present invention not merely is defined in the configuration scenario among Fig. 3.For example in a preferred embodiment, input 310 can directly offer shade 312 with the high-res digital signal, and need not pass through judging unit 302.
The present invention is except the digital-to-analogue conversion that is applied in audio signal is handled, and other digital-to-analogue conversion method also can be used method and apparatus of the present invention.Digital-to-analogue conversion of signal of video signal or voltage signal etc. for example all can or be installed compatiblely with method of the present invention, also can utilize the low-res digital signal to reach the signal of video signal of high-res or the simulation output effect of voltage signal.
The present invention utilizes the low-res digital signal to reach the effect of high-res simulation output, uses the processor of high operation clock pulse repeatedly to export the low-res digital signal, makes it can show the simulation output effect identical with the high-res digital signal.And the energy that the present invention utilizes the low-res digital signal to be exported can be identical with the energy that the high-res digital signal is exported, and is not the conversion that is similar to, but a kind of hundred correct conversion regimes of percentage.
Because the present invention can utilize the lower digital-to-analogue conversion of resolution to play than the higher analog signal of digital-to-analogue conversion resolution own, therefore, can significantly reduce the cost when making.And because the operation clock pulse of processor is all quite high now, so the present invention can not cause too big burden yet when processing signals, is a kind of economy and implements to be easy to digital signal processing method and device.
Though the present invention discloses as above with a preferred embodiment; yet it is not in order to limit the present invention; any person skilled in the art person without departing from the spirit and scope of the present invention; when can making various changes and replacement, so protection scope of the present invention is when looking being as the criterion that accompanying Claim defines.
Claims (12)
1. the method for a Digital Signal Processing, for in time one-period, handling a high-res digital signal and being sent to an electronic installation, this high-res digital signal is with binary representation and has m bit that the method for this Digital Signal Processing comprises following steps at least:
The high bit numeral of n before this high-res digital signal is defined as a low-res digital signal, m＞n wherein, and the numerical value of the remainder except that this low-res digital signal is B in this high-res digital signal;
The individual period of 2 (m-n) will be divided into this cycle time;
In 2 (m-n)-B these periods, send the numerical value of this low-res digital signal to this electronic installation; And
Send this low-res digital signal in these periods at B and add numerical value after one to this electronic installation, wherein this low-res digital signal substantially equals this high-res digital signal in effect that this electronic installation produced in the effect that this electronic installation produced.
2. the method for Digital Signal Processing as claimed in claim 1 is characterized in that, this electronic installation comprises a loud speaker.
3. the method for Digital Signal Processing as claimed in claim 1 is characterized in that, this high-res digital signal and this low-res digital signal are audio signal.
4. the method for Digital Signal Processing as claimed in claim 3 is characterized in that, this low-res digital signal substantially equals this high-res digital signal at sound effect that this electronic installation produced at the sound effect that this electronic installation produced.
5. the method for Digital Signal Processing as claimed in claim 1, it is characterized in that, in this cycle time, be to send earlier this low-res digital signal to continuous 2 (the m-n)-B of this electronic installation these periods, send numerical value again and add this low-res digital signal of one to the continuous B of this electronic installation these periods.
6. the device of a Digital Signal Processing became a low-res digital signal for conversion one high-res digital signal, and be sent to an electronic installation in time one-period, and the device of this Digital Signal Processing comprises at least:
One judging unit is according to bit number generation one indication and a predetermined number of this high-res digital signal and this low-res digital signal;
One shade, cutting apart this high-res digital signal according to this indication becomes this a low-res digital signal and a remainder;
One adder in order to receiving this low-res digital signal, and adds one with the numerical value of this low-res digital signal; And
One output unit, in order to receive this predetermined number, this low-res digital signal, this numerical value adds one this low-res digital signal and the numerical value B of this remainder, and this predetermined number period will be divided into this cycle time according to this predetermined number, in (this predetermined number subtracts B) individual these periods, send the numerical value of this low-res digital signal to this electronic installation, and send this low-res digital signal in these periods at B and add numerical value after one to this electronic installation, wherein this low-res digital signal substantially equals this high-res digital signal in effect that this electronic installation produced in the effect that this electronic installation produced.
7. the device of Digital Signal Processing as claimed in claim 6 is characterized in that, this electronic installation comprises a loud speaker.
8. the device of Digital Signal Processing as claimed in claim 6 is characterized in that, this high-res digital signal and this low-res digital signal are audio signal.
9. the device of Digital Signal Processing as claimed in claim 8 is characterized in that, this low-res digital signal substantially equals this high-res digital signal at sound effect that this electronic installation produced at the sound effect that this electronic installation produced.
10. the device of Digital Signal Processing as claimed in claim 6 is characterized in that, the device of this Digital Signal Processing also comprises an input, in order to import this high-res digital signal.
11. the device of Digital Signal Processing as claimed in claim 10 is characterized in that, this input comprises a digital signal Storage Media at least.
12. the device of Digital Signal Processing as claimed in claim 6 is characterized in that, when the difference of the bit number of this high-res digital signal and this low-res digital signal was one first numerical value, this predetermined number was this first numerical value power of two.
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| CNB031452256A CN1316746C (en) | 2003-06-24 | 2003-06-24 | Method and apparatus for processing digital signal |
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| CN1316746C true CN1316746C (en) | 2007-05-16 |
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Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1164147A (en) * | 1996-04-26 | 1997-11-05 | 财团法人工业技术研究院 | Third order A-D converter |
| US6433719B2 (en) * | 2000-07-20 | 2002-08-13 | Hyundai Electronics Industries Co., Ltd. | Digital-analogue transformer using resistor string |
-
2003
- 2003-06-24 CN CNB031452256A patent/CN1316746C/en not_active Expired - Fee Related
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1164147A (en) * | 1996-04-26 | 1997-11-05 | 财团法人工业技术研究院 | Third order A-D converter |
| US6433719B2 (en) * | 2000-07-20 | 2002-08-13 | Hyundai Electronics Industries Co., Ltd. | Digital-analogue transformer using resistor string |
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