CN1290174C - Method for forming multiple wire connection by using photoresist layer - Google Patents
Method for forming multiple wire connection by using photoresist layer Download PDFInfo
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- CN1290174C CN1290174C CN 200410018451 CN200410018451A CN1290174C CN 1290174 C CN1290174 C CN 1290174C CN 200410018451 CN200410018451 CN 200410018451 CN 200410018451 A CN200410018451 A CN 200410018451A CN 1290174 C CN1290174 C CN 1290174C
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Abstract
The present invention provides a method for forming multiple wire connection by using photoresist layer, which comprises the following processing steps: an etching terminal layer and a first patterned photoresist layer are formed on a semiconductor substrate with an MOS assembly; an etching process is carried out to the etching terminal layer by the first patterned photoresist layer to form a first groove; a first conductor layer is deposited on the first groove, a flattening process is carried out; a first bottom anti-reflecting layer and a second photoresist layer are formed on the semiconductor substrate; a patterning process is carried out to second photoresist layer so as to form a second groove; a second conductor layer is deposited on the second groove, a flattering process is carried out; finally, the first photoresist layer and the second photoresist layer are removed to obtain a multiple wire connection.
Description
Technical field
The present invention relates to a kind of method that multiplex conductor connects that forms, particularly a kind of photoresist layer that uses forms the method that multiplex conductor connects.
Background technology
Along with the semiconductor subassembly integrated level increases rapidly, size only can't provide enough areas for 2 square centimeters chip surface, make needed metal interconnecting layer (interconnect), therefore the upwards development that technological design must be vertical with interconnect architecture, thereby form metal (multi-level metallization) interconnection structure in the multilayer.When size of components was 0.25 micron, integrated circuit needed five layers of metal.So when live width (linewidth) and spacing (pitch) when dwindling, interconnection resistance and line capacitance also can increase, thereby produce capacitance-resistance sluggishness (RC delay) effect, cause that the reduction of signal transmission speed, crosstalk noise (crosstalk noise) increase, power consumption (power dissipation) increase etc.
For solving the capacitance-resistance sluggishness, the simplest and the most direct method is to reduce resistance and electric capacity.Solution now is to replace aluminium with copper to make lead, or replaces silicon dioxide (SiO2, k 3.9) with low-k (low k, k＜3.0) material.For the demand that meets 0.35 micron following technology, the inner metal dielectric layer with low dielectric radio is more important as lead than using copper, because it eliminates the function of crosstalk noise and reduction power consumption in addition.Advanced low-k materials, research and development at present be mainly organic polymer (organic polymer) film and inorganic polymer (inorganic polymer) film two big classes.Though, the dielectric constant values of high-molecular organic material is low than inorganic macromolecule material, has very much development potentiality, but organic polymer suffers from some problems on semiconductor technology, for example copper enchasing technology is when removing photoresist and residue, and organic dielectric layer is produced injury, and perhaps copper ion may diffuse into dielectric layer, cause electric leakage, reduce reliability.
Therefore, the present invention is directed to the problems referred to above and propose a kind of method of using photoresist layer to form the multiplex conductor connection, not only can omit common technology and need loaded down with trivial details etching technics repeatedly, reduce the probability that etching plasma may cause damage significantly, can also obtain a dielectric constant values and be 1 inner metal dielectric layer.
Summary of the invention
Main purpose of the present invention is, provide a kind of photoresist layer that uses to form the method that multiplex conductor connects, it uses photoresist layer to be used as temporary transient inner metal dielectric layer, then with photoresist layer with removal of solvents in order to form the inner metal dielectric layer of air bridges, avoid that etching plasma causes damage to inner metal dielectric layer under the loaded down with trivial details etching technics repeatedly of common technology.
Another object of the present invention is to, provide a kind of photoresist layer that uses to form the method that multiplex conductor connects, it uses a dielectric constant values is 1 inner metal dielectric layer, thereby reduces resistance and electric capacity effectively.
A further object of the present invention is, provides a kind of photoresist layer that uses to form the method that multiplex conductor connects, and it uses a dielectric constant values is 1 inner metal dielectric layer, thereby eliminates the talk noise effectively and reduce power consumption.
For reaching above-mentioned purpose, the invention provides a kind of photoresist layer that uses and form the method that multiplex conductor connects, comprise the following steps: to have at the semiconductor-based end of MOS assembly and be formed with an etching stop layer and a patterning first photoresist layer successively one; With patterning first photoresist layer is that mask carries out an etching technics to etch stop layer, till etch stop layer is removed fully, to form one first groove; Deposit one first conductor layer at first groove, till filling up first groove, then first conductor layer is carried out a planarization process; On described first photoresist layer, sequentially form one first end anti-reflecting layer and one second photoresist layer, second photoresist layer is carried out Patternized technique forming one second groove, and remove first end anti-reflecting layer that exposes from second groove; Deposit one second conductor layer at second groove, till filling up described second groove, then second conductor layer is carried out a planarization process; And remove first, second photoresist layer and first end anti-reflecting layer, connect to obtain a multiplex conductor.
Beneficial effect of the present invention is: not only can omit common technology and need loaded down with trivial details etching technics repeatedly, reduce the probability that etching plasma may cause damage significantly, can also obtain a dielectric constant values and be 1 inner metal dielectric layer, thereby avoid capacitance-resistance sluggishness (RC delay) effect, prevent phenomenons such as the reduction of signal transmission speed, crosstalk noise (cross talk noise) increase, power consumption (power dissipation) increase.
Description of drawings
Fig. 1 to Fig. 6 is each step structure cutaway view of the present invention.
Label declaration:
The semiconductor-based end of 10 tool MOS assemblies
12 etch stop layers
14 patternings, first photoresist layer
16 first conductor layers
18 first end anti-reflecting layers
20 second photoresist layers
22 second grooves
24 second conductor layers
26 second end anti-reflecting layers
28 the 3rd photoresist layers
30 the 3rd conductor layers
Embodiment
The beneficial effect that further specifies architectural feature of the present invention and reached below in conjunction with drawings and Examples.
The invention provides a kind of photoresist layer that uses and form the method that multiplex conductor connects, it does not have conventional process is to form the multiplex conductor connection need carry out several times of plasma body etching technics, and cause the situation of etching injury inner metal dielectric layer to take place, and the present invention use dielectric constant values be 1 air bridges (air bridge) as inner metal dielectric layer, and effectively reach the purpose that reduces resistance and electric capacity.
Fig. 1 to Fig. 6 is the schematic diagram of each step of the embodiment of the invention, use photoresist layer to form the method that multiplex conductor connects at this at emphasis of the present invention, and connect with the lead that forms three layers and to carry out technologic detailed description, to deeply not describing at this, but can not limit to application of the present invention according to this in the suprabasil MOS assembly of semiconductor kenel.
As shown in Figure 1, provide the semiconductor-based end 10 with MOS assembly (not shown) earlier, on the semiconductor-based end 10, deposit the etch stop layer 12 that a material is a silicon nitride in regular turn, with a patterning first photoresist layer 14 with Low Pressure Chemical Vapor Deposition.
See also Fig. 2, be mask with patterning first photoresist layer 14 then, etch stop layer 12 is carried out an etching technics, the etch stop layer 12 that exposes in by the etching window is removed fully, to form one first groove (not shown), in first groove, deposit one first conductor layer 16 then, till filling up first groove, then carry out a CMP (Chemical Mechanical Polishing) process (CMP), make first conductor layer 16 present comprehensive leveling.
See also shown in Figure 3, on the semiconductor-based end 10, form one first end anti-reflecting layer (Bottom AntireflectiveCoating, BARC) 18 and 1 second photoresist layer 20, then second photoresist layer 20 is carried out Patternized technique to form one second groove 22, remove first end anti-reflecting layer 18 that exposes by second groove 22.
See also Fig. 4,, till filling up second groove 22, then second conductor layer 24 is carried out a planarization process at second groove, 22 depositions, one second conductor layer 24.
Then, as shown in Figure 5, on the semiconductor-based end 10, form one second end anti-reflecting layer 26 and one the 3rd photoresist layer 28 in regular turn, the 3rd photoresist layer 28 is carried out Patternized technique to form one the 3rd groove (not shown), remove second end anti-reflecting layer 26 that exposes from the 3rd groove again, then deposit one the 3rd conductor layer 30, till filling up the 3rd groove, again the 3rd conductor layer 30 is carried out a planarization process at the 3rd groove.
At last, utilize solvent that first, second, third photoresist layer 14,20,30 and first, second end anti-reflecting layer 18,26 are removed, so promptly can to obtain with a dielectric constant values be 1 air bridges connects as the multiplex conductor of inner metal dielectric layer, as shown in Figure 6, and after finishing the multiplex conductor connection, can carry out an annealing treating process again to obtain the excellent step coverage rate, the technological temperature of wherein said annealing treating process is 220 ℃, continues 30 minutes.
Beneficial effect of the present invention is: the present invention forms the method that multiplex conductor connects for a kind of photoresist layer that uses, the damage of avoiding etching process that inner metal dielectric layer is produced effectively, and the present invention uses one to have the effect that has reduced resistance and electric capacity than the inner metal dielectric layer of low dielectric constant values effectively.
Above-described embodiment is only in order to illustrate technological thought of the present invention and characteristics; its purpose makes those of ordinary skill in the art can understand content of the present invention and is implementing according to this; the scope of this patent also not only is confined to above-mentioned specific embodiment; be all equal variation or modifications of doing according to disclosed spirit, still be encompassed in protection scope of the present invention.
Claims (8)
1. one kind is used photoresist layer to form the method that multiplex conductor connects, and comprises the following steps:
The one semiconductor-based end with MOS assembly, be provided, form an etching stop layer and a patterning first photoresist layer on its surface successively;
With described patterning first photoresist layer described etch stop layer is carried out an etching technics, till described etch stop layer is removed fully, to form one first groove;
Deposit one first conductor layer at first groove, till filling up described first groove, then described first conductor layer is carried out a planarization process;
On described first photoresist layer, sequentially form one first end anti-reflecting layer and one second photoresist layer, described second photoresist layer is carried out Patternized technique forming one second groove, and remove described first end anti-reflecting layer that exposes from described second groove;
Deposit one second conductor layer at second groove, till filling up described second groove, then described second conductor layer is carried out a planarization process; And
Remove described first, second photoresist layer and described first end anti-reflecting layer, connect to obtain a multiplex conductor.
2. use photoresist layer according to claim 1 forms the method that multiplex conductor connects, and it is characterized in that: the material of described first conductor layer is a copper.
3. use photoresist layer according to claim 1 forms the method that multiplex conductor connects, and it is characterized in that: the material of described second conductor layer is a copper.
4. use photoresist layer according to claim 1 forms the method that multiplex conductor connects, and it is characterized in that: after finishing the planarization technology of described second conductor layer, form one the 3rd conductor layer on the described semiconductor-based end, comprise the following steps:
On described second photoresist layer, sequentially form one second end anti-reflecting layer and one the 3rd photoresist layer, described the 3rd photoresist layer is carried out Patternized technique forming one the 3rd groove, and remove described second end anti-reflecting layer that exposes from described the 3rd groove; And
Deposit one the 3rd conductor layer at described the 3rd groove, till filling up described the 3rd groove, then described the 3rd conductor layer is carried out a planarization process;
Removing described first, second photoresist layer and described first end during anti-reflecting layer, remove described the 3rd photoresist layer and described second end anti-reflecting layer simultaneously, then to obtain multiplex conductor connection.
5. use photoresist layer according to claim 1 forms the method that multiplex conductor connects, and it is characterized in that: the material of described the 3rd conductor layer is a copper.
6. use photoresist layer according to claim 1 forms the method that multiplex conductor connects, and it is characterized in that: after removing described first, second photoresist layer, also carrying out a temperature is 220 ℃, continues 30 minutes annealing treating process.
7. use photoresist layer according to claim 1 forms the method that multiplex conductor connects, and it is characterized in that: described second conductor layer is as the through hole of an interconnection.
8. use photoresist layer according to claim 1 forms the method that multiplex conductor connects, and it is characterized in that: the material of described etch stop layer is a silicon nitride.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 200410018451 CN1290174C (en) | 2004-05-19 | 2004-05-19 | Method for forming multiple wire connection by using photoresist layer |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 200410018451 CN1290174C (en) | 2004-05-19 | 2004-05-19 | Method for forming multiple wire connection by using photoresist layer |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN1700440A CN1700440A (en) | 2005-11-23 |
| CN1290174C true CN1290174C (en) | 2006-12-13 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN 200410018451 Expired - Fee Related CN1290174C (en) | 2004-05-19 | 2004-05-19 | Method for forming multiple wire connection by using photoresist layer |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN1290174C (en) |
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- 2004-05-19 CN CN 200410018451 patent/CN1290174C/en not_active Expired - Fee Related
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| CN1700440A (en) | 2005-11-23 |
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Granted publication date: 20061213 Termination date: 20100519 |