CN1275162C - Initializing setting method of dynamic rondom access storage - Google Patents

Initializing setting method of dynamic rondom access storage Download PDF

Info

Publication number
CN1275162C
CN1275162C CN 200410082578 CN200410082578A CN1275162C CN 1275162 C CN1275162 C CN 1275162C CN 200410082578 CN200410082578 CN 200410082578 CN 200410082578 A CN200410082578 A CN 200410082578A CN 1275162 C CN1275162 C CN 1275162C
Authority
CN
China
Prior art keywords
dynamic ram
dynamic
setting method
access
initialization
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
CN 200410082578
Other languages
Chinese (zh)
Other versions
CN1588325A (en
Inventor
朱修明
何宽瑞
吴宗哲
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Via Technologies Inc
Original Assignee
Via Technologies Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Via Technologies Inc filed Critical Via Technologies Inc
Priority to CN 200410082578 priority Critical patent/CN1275162C/en
Publication of CN1588325A publication Critical patent/CN1588325A/en
Application granted granted Critical
Publication of CN1275162C publication Critical patent/CN1275162C/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Abstract

The present invention relates to an initialization setting method of dynamic random access memories, which is applicable to a plurality of dynamic random access memories. The present invention comprises the steps that the dynamic random access memories are initialized according to preset initial parameters, and the amount of the dynamic random access memories is detected to obtained the first number; optimal initial parameters are set according to the hardware information of the dynamic random access memories, and the dynamic random access memories are reinitialized according to the optimal initial parameters; the amount of the dynamic random access memores is detected to obtain a second number. If the second number is smaller than the first number, the initial parameters for initializing the initialized dynamic random access memories are changed.

Description

Initializing setting method of dynamic rondom access storage
Technical field
The present invention is relevant for a kind of dynamic RAM (DRAM) initializing setting method, particularly relevant for a kind of in order to a plurality of establishing methods of initialization with dynamic RAM of different hardware information.
Background technology
The primary clustering of computer system comprises central processing unit (CPU), chipset (Chipset), Memory Controller (Memory Controller) and bus (bus).Central processing unit is in order to handle most computer operation.Chipset (Chipset) is supported the running of central processing unit.Usually comprise in the chipset that several controllers are to regulate the transmission of data between processor and system's other parts.Memory Controller (Memory Controller) is the part of chipset, is responsible for setting up the information transmission between storer and the central processing unit.Bus (bus) is the data path in the computing machine, has comprised several parallel circuit lines that connect central processing unit, storer and all input-output apparatus.The design of bus, or claim bus structure, in motherboard speed,, in the system different types of bus is arranged also in order to determination data according to the difference of the needed transmission speed of each several part.The memory bank of memory bus connected storage controller and computing machine.
When system boot, the operation of necessary execute store initialization (initialization).When Memory Controller and a plurality of storer couple, then must assign and require needed access waiting time (CAS latency at the operating frequency (operating frequency) of storer and to certain delegation (rank) on the storer, CL) carry out unified setting, especially when storing the different specified hardware information of utensil.When the correct setting of Memory Controller is fit to the operating and setting of each storer, could allow all normal and stable running of all storeies.If the operating and setting mistake of storer then can cause system's shakiness, even can't finish the start operation smoothly, or take place to detect the problem of setting error memory.
(Serial PresenceDetect SPD) learns that each storer is fit to the parameter of operation to conventional art via reading the exclusive spd sign indicating number of each storer.Spd sign indicating number (SPD) directly reads SPD for the code in the EEPROM that is recorded in storer (DIMM module) via Basic Input or Output System (BIOS) (BIOS), need not carry out the operation of detection again, can obtain the required relevant information of initial memory.
Control two storage chips with Memory Controller, and storage chip is DDR (Double DataRate-Synchronous, DRAM) storage chip is an example, in addition, but the operating frequency of supposing first storage chip is 400MHz, 333MHz and 266MHz, and CL can be 3 clock period, 2.5 clock period and 2 clock period.But the operating frequency of second storage chip is 400MHz, and CL was 2.5 clock period.When BIOS reads the SPD of first storage chip and second storage chip, the operating frequency that can set two storage chips according to the information of SPD is 333MHz, and CL was 2.5 clock period, so obtain best storage access capacity and efficient.
Yet, when two storage chips there is no common spendable operating frequency or access waiting time, conventional art and successful all storage chips of initialization simultaneously.Moreover if the SPD of storage chip does not conform to its hardware, and BIOS still sets the operating parameter of storage chip according to the SPD information of mistake, can cause the initialize memory failure equally.
Summary of the invention
Therefore, in order to address the above problem, fundamental purpose of the present invention is to provide a kind of initializing setting method of dynamic rondom access storage, can guarantee that the storage chip that couples with Memory Controller all can operate smoothly, and have optimal operations usefulness.
For realizing above-mentioned purpose, the present invention proposes a kind of initializing setting method of dynamic rondom access storage, is applicable to a plurality of dynamic RAM.At first,, detect the number of dynamic RAM, obtain first number according to predetermined start parameter initialization dynamic RAM.Set the optimization initial parameters according to the hardware information of dynamic RAM, reinitialize dynamic RAM according to the optimization initial parameters.Detect the number of dynamic RAM, obtain second number.If second number is less than first number, then change the initial parameters of initialization dynamic RAM.
For above-mentioned purpose of the present invention, feature and advantage can be become apparent, a preferred embodiment cited below particularly, and conjunction with figs. are described in detail as follows.
Description of drawings
Fig. 1 represents the structural drawing of computer system.
Fig. 2 represents the operational flowchart according to the described initializing setting method of dynamic rondom access storage of the embodiment of the invention.
Symbol description:
10~computer system
12~processor
14~high-speed memory
16~Memory Controller
17~I/O chipset
18A-18D~I/O interface
19~bus
20A, 20B~storer
Embodiment
Consult Fig. 1, Fig. 1 represents the structural drawing of computer system.Computer system 10 comprises processor 12, high-speed memory 14 (cache memory), Memory Controller 16, I/O chipset 17 and I/O interface (18A~18D), and couple said apparatus via bus 19.Memory Controller 16 is coupled to storer 20A and 20B.Generally speaking, storer 20A and 20B be inserted in respectively two dual inline memory modules (Dual In-line Memory Modules, DIMM).
As mentioned above, when system boot, the operation of necessary execute store initialization (initialization).When Memory Controller and a plurality of storer couple, must assign at the operation clock pulse (operating frequency) of storer and to certain delegation on the storer and require needed access waiting time (CAS latency, CL) setting of execution integration.
Fig. 2 represents the operational flowchart according to the described initializing setting method of dynamic rondom access storage of the embodiment of the invention.At this, Memory Controller control has a plurality of dynamic RAM of different hardware informations.Above-mentioned hardware information comprises the exercisable operating frequency of each dynamic RAM and for the access waiting time of ras.The hardware information that must be noted that dynamic RAM can get via reading the exclusive spd sign indicating number of each storer, or is the execution parameter of dynamic RAM reality.In the present embodiment, being all DDR (Double Data Rate-Synchronous DRAM) storage chip with two dynamic RAM is example, yet, in practical application, two dynamic RAM can be the dynamic RAM of the same type of other type, for example SDRAM, EDO DRAM or RDRAM also can be formed by dissimilar memory pools, but must have identical operations mechanism.
At first, during system boot, set earlier a predetermined start parameter (S1), this parameter in step after a while in order to a plurality of dynamic RAM of initialization.According to one embodiment of the invention, the specified minimum operation frequency or the specified maximum access waiting time of the common permission operation of the dynamic RAM that the set basis of predetermined start parameter uses.For example, the qualified specification of dispatching from the factory of common dynamic random access memory is for supporting that at least operating frequency is that 200MHz and access waiting time were 2.5 clock period at present, if with the above-mentioned parameter dynamic RAM that initialization uses of going ahead of the rest, can guarantee that then all dynamic RAM all can operate smoothly.
Next, come a plurality of dynamic RAM of initialization (S2) according to above-mentioned predetermined start parameter.The operation of the above-mentioned dynamic RAM of initialization comprises the operating frequency of setting dynamic RAM and the access waiting time CL of ras at least.
Next, detect the number of dynamic RAM, obtain one first number (S3).Because the minimum operation usefulness that step S2 is supported with the slot that dynamic RAM is set is set dynamic RAM, therefore can detect all dynamic RAM.In addition, the number of dynamic RAM is via the access dynamic RAM, and gets according to access results.
Next, set an optimization initial parameters (S4) according to the hardware information of dynamic RAM.At this, the information of dynamic RAM can get according to the spd sign indicating number (Serial Presence Detect) of a ROM (read-only memory) that is pre-stored in each dynamic RAM.Moreover the optimization parameter is the highest operating frequency of ideal or the desirable minimum access stand-by period of the common permission operation of a plurality of dynamic RAM.For example, but the operating frequency of first dynamic RAM is 400MHz, 333MHz and 266MHz, and CL can be 3 clock period, 2.5 clock period and 2 clock period.But the operating frequency of second dynamic RAM is 400MHz, 333MHz, and CL was 2.5 clock period.Read the SPD of first dynamic RAM and second dynamic RAM as BIOS, can be according to the SPD information of two dynamic RAM, but get the collection of its operating parameter, but the common operating parameter that then obtains first dynamic RAM and second dynamic RAM is an operating frequency is 400MHz or 333MHz, and CL was 2.5 clock period, the parameter that selection can make first dynamic RAM and second dynamic RAM operate in preferable efficient simultaneously is that the operating frequency of dynamic RAM is 333MHz, and CL was 2.5 clock period, and this is best storage device access capability and the efficient that makes two dynamic RAM co-operate.Yet according to another embodiment of the present invention, above-mentioned optimization parameter also can be set up on their own by system, and the foundation of design can be according to the characteristic of hardware or deviser's experience.
Next, reinitialize dynamic RAM (S5) according to the optimization initial parameters, the step of this step is identical with step S2, and difference only is to set the parameter difference of storer.Next, detect the number of dynamic RAM, obtain one second number (S6).Same, the number of dynamic RAM is via the access dynamic RAM, and gets according to access results.Next, more measured second number and first number (S7).If this moment, all dynamic RAM all can successful access, then detected second number will be identical with first number.Therefore, represent a plurality of dynamic RAM all can operate in the setting of optimization initial parameters,, leave the initialize memory setting program so the dynamic RAM initializing set is successful.If second number is less than first number, represent the initial parameters that sets of dynamic RAM and be not suitable for all dynamic RAM this moment, thus cause the partial dynamic random access memory read less than and cause detected dynamic RAM number to reduce.
Therefore, change the initial parameters (S8) of initialization dynamic RAM.The initial parameters that set this moment makes the operation usefulness of dynamic RAM between predetermined start parameter and optimization initial parameters.For example, this moment dynamic RAM operating frequency between specified minimum operation frequency and the highest operating frequency of ideal corresponding to the optimization initial parameters corresponding to the predetermined start parameter, or its access waiting time is in specified maximum access waiting time and desirable minimum access between the stand-by period.That is, reduce the operating frequency of dynamic RAM or increase its access waiting time.Must be noted that according to the embodiment of the invention in step S8, the adjustment of dynamic RAM initial parameter foundation can be according to perhaps directly specifying the parameter of being adjusted by system in the SPD of each dynamic RAM.
Next, reinitialize dynamic RAM (S9) according to the initial parameters that changes, and get back to step S6, detect the number of dynamic RAM.Carry out so repeatedly, till second number is identical with first number.In addition, according to one embodiment of the invention, when the operating frequency of dynamic RAM is reduced to specified minimum operation frequency, then with the above-mentioned dynamic RAM of specified minimum operation frequency initialization, and when the access waiting time of dynamic RAM increases to above-mentioned specified maximum access waiting time, then with the above-mentioned dynamic RAM of specified maximum access waiting time initialization.
In sum,, can guarantee that all storeies all can operate smoothly, therefore can take into account the compatibility and the optimal operations usefulness of storer according to the described initializing setting method of dynamic rondom access storage of the embodiment of the invention.
In sum; though the present invention with a preferred embodiment openly as above; right its is not in order to limit the present invention; any those skilled in the art; under the situation that does not break away from the spirit and scope of the present invention; can carry out various changes and modification, so protection scope of the present invention is as the criterion when looking the claim restricted portion that is proposed.

Claims (12)

1. an initializing setting method of dynamic rondom access storage is used for a plurality of dynamic RAM, comprises the following steps:
According to the described dynamic RAM of a predetermined start parameter initialization;
Detect the number of described dynamic RAM, obtain one first number;
Set an optimization initial parameters according to the hardware information of described dynamic RAM;
Reinitialize described dynamic RAM according to described optimization initial parameters;
Detect the number of described dynamic RAM, obtain one second number; And
If described second number is less than described first number, then change the initial parameters of the described dynamic RAM of initialization.
2. initializing setting method of dynamic rondom access storage as claimed in claim 1, wherein the operation of the described dynamic RAM of initialization comprises at least one in the access waiting time of the operating frequency of setting described dynamic RAM and ras.
3. initializing setting method of dynamic rondom access storage as claimed in claim 2, wherein said predetermined start parameter are the specified minimum operation frequency or in the specified maximum access waiting time at least one of the common permission operation of described a plurality of dynamic RAM.
4. initializing setting method of dynamic rondom access storage as claimed in claim 3, wherein said optimization initial parameters are in the stand-by period at least one of the highest operating frequency of ideal of common permission operation of described a plurality of dynamic RAM or desirable minimum access.
5. initializing setting method of dynamic rondom access storage as claimed in claim 4, wherein when described second number is less than described first number, then with at the specified minimum operation frequency of the common permission operation of described a plurality of dynamic RAM and the operating frequency between the highest desirable operating frequency or in the specified maximum access waiting time of the common permission operation of described a plurality of dynamic RAM and the described dynamic RAM of at least one initialization in the access waiting time of desirable minimum access between the stand-by period.
6. initializing setting method of dynamic rondom access storage as claimed in claim 5 also comprises the following steps:
After the initial parameters that changes the described dynamic RAM of initialization, detect the number of described dynamic RAM, obtain one the 3rd number; And
If described the 3rd number is less than described first number, then reduce the operating frequency of the described dynamic RAM of initialization or the access waiting time of the described dynamic RAM of increase initialization.
7. initializing setting method of dynamic rondom access storage as claimed in claim 6, wherein when the operating frequency of described dynamic RAM is reduced to described specified minimum operation frequency, then with the described dynamic RAM of described specified minimum operation frequency initialization.
8. initializing setting method of dynamic rondom access storage as claimed in claim 6, wherein when the access waiting time of described dynamic RAM increases to described specified maximum access waiting time, then with the described dynamic RAM of described specified maximum access waiting time initialization.
9. initializing setting method of dynamic rondom access storage as claimed in claim 1, the information of wherein said dynamic RAM gets according to the spd sign indicating number that is pre-stored in a ROM (read-only memory) of each dynamic RAM.
10. initializing setting method of dynamic rondom access storage as claimed in claim 9, wherein said optimization initial parameters is set according to the described spd sign indicating number of each dynamic RAM.
11. initializing setting method of dynamic rondom access storage as claimed in claim 1, wherein said a plurality of dynamic RAM have different hardware informations.
12. initializing setting method of dynamic rondom access storage as claimed in claim 11, wherein said hardware information comprise the access waiting time of a plurality of exercisable operating frequencies and ras.
CN 200410082578 2004-09-21 2004-09-21 Initializing setting method of dynamic rondom access storage Active CN1275162C (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN 200410082578 CN1275162C (en) 2004-09-21 2004-09-21 Initializing setting method of dynamic rondom access storage

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN 200410082578 CN1275162C (en) 2004-09-21 2004-09-21 Initializing setting method of dynamic rondom access storage

Publications (2)

Publication Number Publication Date
CN1588325A CN1588325A (en) 2005-03-02
CN1275162C true CN1275162C (en) 2006-09-13

Family

ID=34605113

Family Applications (1)

Application Number Title Priority Date Filing Date
CN 200410082578 Active CN1275162C (en) 2004-09-21 2004-09-21 Initializing setting method of dynamic rondom access storage

Country Status (1)

Country Link
CN (1) CN1275162C (en)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI428767B (en) * 2006-06-26 2014-03-01 Ibm Method, program and apparatus for optimizing configuration parameter set of system
CN102298974A (en) * 2011-05-31 2011-12-28 四川长虹电器股份有限公司 Method for self-adaption of novel internal memory matched data strobe pulses
CN107657980A (en) * 2017-10-24 2018-02-02 济南浪潮高新科技投资发展有限公司 A kind of method of the onboard DDR particles of auto-initiation

Also Published As

Publication number Publication date
CN1588325A (en) 2005-03-02

Similar Documents

Publication Publication Date Title
US6766385B2 (en) Device and method for maximizing performance on a memory interface with a variable number of channels
US6047361A (en) Memory control device, with a common synchronous interface coupled thereto, for accessing asynchronous memory devices and different synchronous devices
US8631220B2 (en) Adjusting the timing of signals associated with a memory system
US7913073B2 (en) System embedding plural controller sharing nonvolatile memory
US6438670B1 (en) Memory controller with programmable delay counter for tuning performance based on timing parameter of controlled memory storage device
US6611905B1 (en) Memory interface with programable clock to output time based on wide range of receiver loads
EP2579159A1 (en) Memory system, memory device, and memory interface device
EP1835506B1 (en) Semiconductor memory, memory system, and operation method of memory system
JP3290650B2 (en) Memory controller
US5727182A (en) Method and apparatus for adjusting output current values for expansion memories
CN110941395A (en) Dynamic random access memory, memory management method, system and storage medium
US20060206673A1 (en) Method for controlling access of dynamic random access memory module
CN1275162C (en) Initializing setting method of dynamic rondom access storage
US7392372B2 (en) Method for memory initialization involves detecting primary quantity of memories and setting optimum parameters based on hardware information of memories
CN112513824B (en) Memory interleaving method and device
US20060007758A1 (en) Method and apparatus for setting CAS latency and frequency of heterogenous memories
US10522209B2 (en) Non-binary rank multiplication of memory module
JPH10111829A (en) Memory system
US11221931B2 (en) Memory system and data processing system
US20040034748A1 (en) Memory device containing arbiter performing arbitration for bus access right
CN111177027A (en) Dynamic random access memory, memory management method, system and storage medium
US20060010313A1 (en) Methods and devices for DRAM initialization
US6731565B2 (en) Programmable memory controller and controlling method
CN1277212C (en) Initializing set truss and method for dynamic random access storage
CN1480842A (en) Method for determining delay time written into memry and its device

Legal Events

Date Code Title Description
C06 Publication
PB01 Publication
C10 Entry into substantive examination
SE01 Entry into force of request for substantive examination
C14 Grant of patent or utility model
GR01 Patent grant