CN1277212C - Initializing set truss and method for dynamic random access storage - Google Patents
Initializing set truss and method for dynamic random access storage Download PDFInfo
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- CN1277212C CN1277212C CN 200410082585 CN200410082585A CN1277212C CN 1277212 C CN1277212 C CN 1277212C CN 200410082585 CN200410082585 CN 200410082585 CN 200410082585 A CN200410082585 A CN 200410082585A CN 1277212 C CN1277212 C CN 1277212C
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Abstract
The present invention relates to an initialization architecture of a dynamic random access memory. The present invention comprises a detecting circuit, a buffer and a memory controller, wherein the detecting circuit is used for detecting whether the state of the dynamic random access memory is changed; when the state of the dynamic random access memory is not changed, the detecting circuit outputs a rapid initial signal; the buffering is used for storing initial parameters; the memory controller is used for setting the initial parameters according to the hardware information of the dynamic random access memory; when a computer system is restarted and receives the rapid initial signal, the memory controller directly reads the initial parameters stored in the buffer and initializes the dynamic random access memory according to the initial parameters.
Description
Technical field
The present invention relates to a kind of dynamic RAM (DRAM) initializing setting method, particularly relate to when dynamic RAM is not changed, directly according to the establishing method that opens beginning parameter initialization dynamic RAM that stores.
Background technology
The primary clustering of computer system comprises central processing unit (CPU), chipset (Chipset), Memory Controller (Memory Controller) and bus (bus).Central processing unit is in order to handle most computer operation.Chipset (Chipset) is supported the running of central processing unit.Usually comprise in the chipset that several controllers are to regulate the transmission of data between processor and system's other parts.Memory Controller (MemoryController) is the part of chipset, is responsible for setting up the information transmission between storer and the central processing unit.Bus (bus) is the data path in the computing machine, has comprised several parallel circuit lines that connect central processing unit, storer and all input-output apparatus.The design of bus, or claim bus structure, in motherboard speed,, in the system different types of bus is arranged also in order to determination data according to the difference of the needed transmission speed of each several part.Memory bus is the memory bank of connected storage controller and computing machine.
When system boot, the action of necessary execute store initialization (initialization).The action of initialize memory comprise the operating clock (operating frequency) of setting storer and to certain delegation on the storer assign require needed access waiting time (CAS latency, CL).
Conventional art is that (SerialPresence Detect SPD) learns that storer is fit to the parameter of operation by reading the exclusive spd sign indicating number of dynamic RAM.Spd sign indicating number (SPD) is the code of burning in the EEPROM of storage chip, directly reads SPD by Basic Input or Output System (BIOS) (BIOS), need not carry out the action of detection again, can obtain the required relevant information of initial memory.
With the dynamic RAM is that (Double Data Rate-Synchronous is an example DRAM) to DDR, but supposes that its operating frequency is 400MHz, 333MHz and 266MHz, and CL can be 3 clock period, 2.5 clock period and 2 clock period.When BIOS reads the SPD of dynamic RAM, can set its operating frequency according to the information of SPD is 400MHz, and CL was 2.5 clock period, afterwards can be according to this parameter initialization dynamic RAM.
In the system boot process, what taken that many times are to judge dynamic RAM opens the beginning parameter, and this time is along with the kind of dynamic RAM and number and increase.Yet, after the dynamic RAM initialization step is finished, when starting shooting next time, must reinitialize all dynamic RAM again, if dynamic RAM does not change, then rejudge its step that opens the beginning parameter and only can obtain identical judged result, prolong the required time of start in rain.
Summary of the invention
In view of this, in order to address the above problem, fundamental purpose of the present invention is to provide a kind of initializing setting method of dynamic rondom access storage, after successful initialization dynamic RAM, the record dynamic RAM open the beginning parameter, under the situation that storer does not change, the beginning parameter that opens of direct reading and recording is come the initialization dynamic RAM when starting shooting next time, to reduce the parameter determining step that begins that opens that repeats.
For obtaining above-mentioned purpose, the present invention proposes a kind of dynamic RAM initialization system.Whether testing circuit changes in order to the state that detects dynamic RAM, when the state of dynamic RAM does not change, and output quick start signal.Buffer opens the beginning parameter in order to storage.One Memory Controller, open the beginning parameter in order to set according to the hardware information of dynamic RAM, when computer system restarts and receive the quick start signal, directly read buffer stored open the beginning parameter, and according to opening beginning parameter initialization dynamic RAM.
In addition, the present invention proposes a kind of initializing setting method of dynamic rondom access storage.At first, the record dynamic RAM opens the beginning parameter.Next, whether the state of detection dynamic RAM changes.When computer system restarts and the state of dynamic RAM when not changing, directly read and open the beginning parameter, and according to opening beginning parameter initialization dynamic RAM.
Description of drawings
Fig. 1 is the Organization Chart that shows computer system.
Fig. 2 A is the circuit diagram that shows according to the described testing circuit of the embodiment of the invention.
Fig. 2 B is the truth table that shows testing circuit special terminal and node level.
Fig. 3 is the operational flowchart that shows according to the described initializing setting method of dynamic rondom access storage of the embodiment of the invention.
The reference numeral explanation:
10～computer system
12～processor
14～high-speed cache
16～Memory Controller
17～I/O chipset
18A～18D～I/O interface
19～bus
20A～20D～storer
21～buffer
22～testing circuit
Embodiment
For above-mentioned purpose of the present invention, feature and advantage can be become apparent, a preferred embodiment cited below particularly, and conjunction with figs. are described in detail below.
Embodiment:
Consult Fig. 1, Fig. 1 is the Organization Chart that shows computer system.Computer system 10 comprises processor 12, high-speed cache 14 (cache memory), Memory Controller 16, I/O chipset 17 and I/O interface (18A～18D), and couple said apparatus by bus 19.Memory Controller 16 is to be coupled to storer 20A～20D.Generally speaking, storer 20A～20D be inserted in respectively four dual inline memory modules (Dual In-line Memory Modules, DIMM).Moreover whether testing circuit 22 is changed in order at least one of storer 20A～20D that detection is inserted in dual inline memory module.According to the embodiment of the invention, judge whether the mode that storer changes was once pulled away dual inline memory module by the detection of stored device.In addition, buffer 21 is to open the beginning parameter in order to what store dynamic RAM, and according to the embodiment of the invention, buffer 21 can be arranged on the South Bridge chip group.
Fig. 2 A is the circuit diagram that shows according to the described testing circuit 22 of the embodiment of the invention.And Fig. 2 B is the truth table that shows testing circuit 22 special terminals and node level.Testing circuit 22 comprises comparer 24 and D flip-flop 26A and 26B.At this, comparer 24 can be the xor logic door, terminal A
0Represent the state of storer 20A, when storer 20A is inserted in memory module, terminal A
0Logic level be low level " 0 ", when storer 20A pulls away memory module, terminal A
0Logic level be high level " 1 ".In addition, be example with Fig. 1, four groups of storer 20A～20D have four groups of terminal A respectively
0～A
3, only showing detection of stored device 20A status detection circuit among Fig. 2 A, the testing circuit of all the other storeies does not show to simplify explanation.
When storer 20A is installed, terminal A
0Logic level be low level " 0 ", after this level inputs to D flip-flop 26A by phase inverter 27 is anti-phase, Node B
0Level be low logic level " 0 ", and node C
0Logic level still be high level " 1 ", so comparer 24 receives terminal A
0With node C
0The logic level difference, so at terminal E
0The output high logic level " 1 ".
Moreover, terminal E
0The high logic level of being exported " 1 " will enable D flip-flop 26B, make its lead-out terminal Q
1The output low logic level " 0 ", so node C
0Logic level become low logic level " 0 ".This moment, comparer 24 received terminal A
0With node C
0Logic level identical, so at terminal E
0The output low logic level " 0 ".
If storer 20A is removed terminal A
0With Node B
0Logic level get back to high level " 1 ", this moment node C
0Logic level still be low logic level " 0 ", so comparer 24 receives terminal A
0With node C
0The logic level difference, so at terminal E
0The output high logic level " 1 ".
Moreover, terminal E
0The high logic level of being exported " 1 " will enable D flip-flop 26B, make its lead-out terminal Q
1The output high logic level " 1 ", so node C
0Logic level become high logic level " 1 ".This moment, comparer 24 received terminal A
0With node C
0Logic level identical, so at terminal E
0The output low logic level " 0 ".
Therefore, by detection comparator 24 lead-out terminal E
0Level, can identification storer 20A whether be changed.Therefore in addition, according to shown in Figure 1, the incident that storer 20B～20D is changed can record by the testing circuit that belongs to this group storer equally, can learn whether all storeies have wherein one to be changed.
Fig. 3 is the operational flowchart that shows according to the described initializing setting method of dynamic rondom access storage of the embodiment of the invention.In the present embodiment, be that to be all DDR (DoubleData Rate-Synchronous DRAM) storage chip with dynamic RAM be example, yet, in practical application, dynamic RAM can be the dynamic RAM of the same type of other type, for example SDRAM, EDO DRAM or RDRAM also can be formed by dissimilar memory pools.In the described step of Fig. 3, the label of associated component sees also Fig. 1.
At first, during system boot, (Serial Presence Detect SPD) judges that storer is fit to the parameter (S1) that begins that opens of operation by the spd sign indicating number that detects dynamic RAM.With the dynamic RAM is that (Double Data Rate-Synchronous is an example DRAM) to DDR, but supposes that its operating frequency is 400MHz, 333MHz and 266MHz, and CL can be 3 clock period, 2.5 clock period and 2 clock period.When BIOS reads the SPD of dynamic RAM, can set its operating frequency according to the information of SPD is 400MHz, and CL was 2.5 clock period, afterwards can be according to this parameter initialization dynamic RAM.
Next, come initialization dynamic RAM (S2) according to the above-mentioned beginning parameter that opens.The action of the above-mentioned dynamic RAM of initialization comprises the operating frequency of setting dynamic RAM and the access waiting time CL of ras at least.
Next, the beginning parameter that opens with step S1 gained is stored in buffer 21 (S3).Secondly, carry out the initialization action (S4) of other device, enter operating system (operating system) afterwards, finish the action (S5) of start.
After the user finishes boot action, can the normal running computing machine.After computer shutdown, must continue power supply to testing circuit 22 and terminal A
0～A
3, with the state that continues to monitor.That is the power lead of computer system must keep being inserted in the state of supply socket, perhaps has the battery that is enough to provide testing circuit 22 operating powers.
When computer system is started shooting again (S6), judge according to the testing result of testing circuit 22 whether storer suffers to change (S7), if storer is not changed, then read in the stored parameter (S8) that begins that opens of step S3 at buffer 21, and according to the above-mentioned beginning direct initializes memory of parameter (S9) that opens.If storer is changed, therefore must detect spd sign indicating number (the Serial Presence Detect that changed storer again, SPD) judge that it is fit to the parameter (S10) that begins that opens of operation, next, come initializes memory (S11) according to the new detected beginning parameter that opens.Next, carry out the initialization action (S12) of other device, enter operating system (operating system) afterwards, finish the action (S13) of start.
In sum, according to the embodiment of the invention, because reading, system opens beginning parameter required time much smaller than judging that storer opens the beginning required time of parameter, therefore, if storer is not changed, then directly read stored in advance storer and open the beginning parameter storer that initializes, will significantly reduce the required time of system boot.
Though the present invention discloses as above with preferred embodiment; so it is not in order to limit scope of the present invention; anyly have the knack of this skill person; without departing from the spirit and scope of the present invention; when can doing a little change and retouching, so protection scope of the present invention is as the criterion when looking accompanying the claim person of defining.
Claims (20)
1. an initializing setting method of dynamic rondom access storage is used for a computer system, comprises the following steps:
That writes down at least one dynamic RAM opens the beginning parameter;
Whether the state that detects above-mentioned dynamic RAM changes; And
When the state of system restart of aforementioned calculation machine and above-mentioned dynamic RAM does not change, directly read the above-mentioned beginning parameter that opens, and according to the above-mentioned above-mentioned dynamic RAM of beginning parameter initialization that opens.
2. initializing setting method of dynamic rondom access storage as claimed in claim 1 more comprises the following steps:
Open the beginning parameter according to what the information of above-mentioned dynamic RAM was set above-mentioned dynamic RAM.
3. initializing setting method of dynamic rondom access storage as claimed in claim 2, wherein, the information of above-mentioned dynamic RAM is to get according to the spd sign indicating number that is pre-stored in a ROM (read-only memory) of each dynamic RAM.
4. on behalf of above-mentioned dynamic RAM, initializing setting method of dynamic rondom access storage as claimed in claim 1 wherein, when the state of above-mentioned dynamic RAM does not change, do not change.
5. on behalf of above-mentioned dynamic RAM, initializing setting method of dynamic rondom access storage as claimed in claim 1 wherein, when the state of above-mentioned dynamic RAM does not change, be not moved.
6. initializing setting method of dynamic rondom access storage as claimed in claim 1, wherein, above-mentioned dynamic RAM open the beginning parameter be to be stored in a buffer.
7. initializing setting method of dynamic rondom access storage as claimed in claim 1, wherein, above-mentioned dynamic RAM opens at least one of access waiting time that the beginning parameter comprises the operating frequency of above-mentioned dynamic RAM and ras.
8. initializing setting method of dynamic rondom access storage as claimed in claim 1, wherein, the action of the above-mentioned dynamic RAM of initialization comprises at least one of access waiting time of the operating frequency of setting above-mentioned dynamic RAM and ras.
9. initializing setting method of dynamic rondom access storage as claimed in claim 1, wherein, the number of above-mentioned dynamic RAM is a plurality of.
10. on behalf of the state of above-mentioned dynamic RAM, initializing setting method of dynamic rondom access storage as claimed in claim 9 wherein, when any one of above-mentioned dynamic RAM all is not moved, do not change.
11. a dynamic RAM initialization system is used for a computer system, comprising:
At least one dynamic RAM;
Whether one testing circuit changes in order to the state that detects above-mentioned dynamic RAM, when the state of above-mentioned dynamic RAM does not change, exports a quick start signal;
One buffer opens the beginning parameter in order to store one; And
One Memory Controller, in order to set the above-mentioned beginning parameter that opens according to the hardware information of above-mentioned dynamic RAM, when the system restart of aforementioned calculation machine and when receiving above-mentioned quick start signal, directly read above-mentioned buffer stored open the beginning parameter, and according to the above-mentioned above-mentioned dynamic RAM of beginning parameter initialization that opens.
12. dynamic RAM initializing set as claimed in claim 11 system, wherein, above-mentioned dynamic RAM to open the beginning parameter be to set according to the information of above-mentioned dynamic RAM.
13. dynamic RAM initializing set as claimed in claim 12 system, wherein, the information of above-mentioned dynamic RAM is to get according to the spd sign indicating number that is pre-stored in a ROM (read-only memory) of each dynamic RAM.
14. on behalf of above-mentioned dynamic RAM, dynamic RAM initializing set as claimed in claim 11 system wherein, when the state of above-mentioned dynamic RAM does not change, do not change.
15. on behalf of above-mentioned dynamic RAM, dynamic RAM initializing set as claimed in claim 11 system wherein, when the state of above-mentioned dynamic RAM does not change, be not moved.
16. dynamic RAM initializing set as claimed in claim 11 system, wherein, above-mentioned dynamic RAM to open the beginning parameter be to be stored in a buffer.
17. dynamic RAM initializing set as claimed in claim 11 system, wherein, above-mentioned dynamic RAM opens at least one of access waiting time that the beginning parameter comprises the operating frequency of above-mentioned dynamic RAM and ras.
18. dynamic RAM initializing set as claimed in claim 11 system, wherein, the action of the above-mentioned dynamic RAM of initialization comprises at least one of access waiting time of the operating frequency of setting above-mentioned dynamic RAM and ras.
19. dynamic RAM initializing set as claimed in claim 11 system, wherein, the number of above-mentioned dynamic RAM is a plurality of.
20. on behalf of the state of above-mentioned dynamic RAM, dynamic RAM initializing set as claimed in claim 19 system wherein, when any one of above-mentioned dynamic RAM all is not moved, then do not change.
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| CN 200410082585 CN1277212C (en) | 2004-09-21 | 2004-09-21 | Initializing set truss and method for dynamic random access storage |
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| CN 200410082585 CN1277212C (en) | 2004-09-21 | 2004-09-21 | Initializing set truss and method for dynamic random access storage |
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