CN1257611C - Differential comparing circuit system - Google Patents
Differential comparing circuit system Download PDFInfo
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- CN1257611C CN1257611C CN 03142427 CN03142427A CN1257611C CN 1257611 C CN1257611 C CN 1257611C CN 03142427 CN03142427 CN 03142427 CN 03142427 A CN03142427 A CN 03142427A CN 1257611 C CN1257611 C CN 1257611C
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Abstract
The present invention relates to a differential comparing circuit system for receiving all input signals in a voltage range. A revived voltage is amplified to output an output voltage. The voltage range is split into a first part with a high voltage and a second part with a low voltage. The differential comparing circuit system comprises a first differential comparator, a testing circuit and a second differential comparator, wherein the first differential comparator is used for receiving the input signals of the first part in the voltage range and amplifying a received voltage to generate the output voltage; the testing circuit is electrically connected to a first differential comparison circuit; when the testing circuit tests that the first differential comparison circuit can not operate because the voltages of the input signals are lower than that of the first part of the voltage range, a trigger signal is generated; the second differential comparator is connected to the testing circuit; the input signals of the second part in the voltage range are received by the second differential comparator corresponding to the actuating of the trigger signal; the received voltage is amplified for generating the output voltage.
Description
(1) technical field
The present invention is a kind of comparison circuit system, refers to a kind of USB (UniversalSerial Bus, USB) differential comparison circuit system of interface transmission ends of being applicable to especially.
(2) background technology
USB (Universal Serial Bus, USB) be a kind of peripheral equipment interface, it be by seven tame software and hardware manufacturers common the formulation, the transmission rate at this interface has 1.5Mbps and two kinds of forms of 12Mbps, can be connected to 127 peripheral equipments at most.
Because it is very strict that general serial bus interface (USB) gets for magnitude of voltage Vin scope dictates that can receiving inputted signal, (all input voltages between 0.8～2.2V) can both receive must to be satisfied with particular range.
See also Fig. 1 (a) and (b), it is that tradition is used for the circuit of receiving inputted signal, and wherein Fig. 1 (a) is to use N type metal-oxide semiconductor transistor (NMOS) to receive input voltage value, and it can only receive the transmission signals of high voltage scope.Fig. 1 (b) is to use P type metal-oxide semiconductor transistor (PMOS) to come receiving inputted signal, and its characteristic is fully opposite with N type metal-oxide semiconductor transistor (NMOS), can only receive the signal than the low input scope.Because Fig. 1 (a) and the input voltage vin that (b) can receive are confined to higher or lower voltage, and the voltage range that can receive is also less.
But, now for general serial bus interface (USB) can receiving inputted signal voltage range require increasing, traditional circuit has not been inconsistent demand, therefore the dealer tries every possible means P type metal-oxide semiconductor transistor (PMOS) and N type metal-oxide semiconductor transistor (NMOS) is combined, in order to enlarge the voltage range of general serial bus interface (USB) institute energy receiving inputted signal.
See also Fig. 2, it is in conjunction with P type metal-oxide semiconductor transistor (PMOS) and N type metal-oxide semiconductor transistor (NMOS), enlarges the receiving circuit of the voltage range that can receive.When input voltage belongs to low voltage, receive this input voltage by P type metal-oxide semiconductor transistor M5 and M6, and be sent to 1: 1 tail end current transistor (tail-current transistor) 20, in order to produce and to export a tail end current value (tail current).As for, when input voltage belongs to high voltage, change by N type metal-oxide semiconductor transistor M1 and M2 and receive this input voltage, and produce and export required tail end current value (tail current) by same 1: 1 tail end current transistor (tail-current transistor) 21.
Though can reaching, the circuit of Fig. 2 enlarges the input voltage range that receives, but, this tail end current transistor (tail-current transistor) 20,21 both eternal conductings, can dynamically not change, therefore no matter PMOS or NMOS when receiving transmission signals, can have certain tail end current transistor (tail-current transistor) to be in conducting state along with pairing PMOS or the on off state of NMOS, but not running, and then the loss of increase power supply.
Moreover, when input voltage belongs to intermediate voltage, PMOS and NMOS conducting simultaneously, and cause the tail end electric current of output excessive, and then the waste power supply.
(3) summary of the invention
Main purpose of the present invention is for a kind of differential comparison circuit system is provided, make by the control of this testing circuit and to have only a differential comparator to be responsible for received signal in this differential circuit comparison system, another differential comparator then cuts out fully, can obtain required output voltage, the situation that does not have the waste power supply again produces.
Differential comparison circuit system according to an aspect of the present invention, in order to receive all input signals of a voltage range, and amplified the back and exported an output voltage, wherein this voltage range is to be divided into first part and second partly, and the voltage of the first of this voltage range is more than or equal to the voltage of the second portion of this voltage range, this system comprises: one first differential comparator, in order to receive the input signal of first part in this voltage range, and the voltage that is received amplified, in order to produce this output voltage; One testing circuit is electrically connected on this first differential comparator, when detecting the voltage of this first differential comparison circuit because of input signal and be lower than first of this voltage range and partly can't operate, produces a triggering signal; And one second differential comparator, be electrically connected on this testing circuit, driving that mutually should triggering signal, and receive in this voltage range second partly the input signal, and the voltage that is received is amplified, in order to produce this output voltage.
According to above-mentioned conception, this differential comparison circuit system is applicable to the transmission ends at a USB (USB) interface in the system.
According to above-mentioned conception, this first differential comparator comprises in the system: one first differential receiving circuit, in order to receive the input signal of first part in this voltage range; And one first operational amplification circuit, be electrically connected on this first differential receiving circuit, amplified in order to the voltage that this first differential receiving circuit is received, make to produce this output voltage.
According to above-mentioned conception, this second differential comparator comprises in the system: one second differential receiving circuit, be electrically connected on this testing circuit, and driving that mutually should triggering signal, and receive in this voltage range second partly the input signal; And one second operational amplification circuit, be electrically connected on this second differential receiving circuit, amplified in order to the voltage that this second differential receiving circuit is received, make to produce this output voltage.
According to above-mentioned conception, this differential comparison circuit system can comprise an output circuit in the system, in order to export this output voltage.
According to above-mentioned conception, this second differential comparator can be in closed condition in the system when this first differential comparator running, takes advantage of effect in order to avoid producing floating (floating) and adding.
According to above-mentioned conception, this first differential comparator can be in closed condition in this second differential comparator in the system when this second differential comparator operates.
Differential comparison circuit system according to a further aspect of the invention, in order to receive all input signals of a voltage range, and amplified the back and exported an output voltage, wherein this voltage range is to be divided into first part and second partly, and the voltage of the first of this voltage range is more than or equal to the voltage of the second portion of this voltage range, this system comprises: one first differential receiving circuit, in order to receive the input signal of first part in this voltage range; One first operational amplification circuit is electrically connected on this first differential receiving circuit, is amplified in order to the voltage that this first differential receiving circuit is received, and makes to produce this output voltage; One testing circuit is electrically connected on this first differential receiving circuit, when detecting the voltage of this first differential receiving circuit because of input signal and be lower than first of this voltage range and partly can't operate, produces a triggering signal; One second differential receiving circuit is electrically connected on this testing circuit, driving that mutually should triggering signal, and receive in this voltage range second partly the input signal; And one second operational amplification circuit, be electrically connected on this second differential receiving circuit, amplified in order to the voltage that this second differential receiving circuit is received, make to produce this output voltage.
According to above-mentioned conception, this differential comparison circuit system comprises an output circuit in the system, in order to export this output voltage.
According to above-mentioned conception, this second differential receiving circuit can be in closed condition in the system when this first differential receiving circuit and the running of this first operational amplification circuit, takes advantage of effect in order to avoid producing floating (floating) and adding.
According to above-mentioned conception, this first differential receiving circuit and this first operational amplification circuit can be in closed condition in the system when this second differential receiving circuit and the running of this second operational amplification circuit.
Provide a kind of receiving system according to another aspect of the invention, in order to receive all input signals of a voltage range, wherein this voltage range is to be divided into first part and second partly, and the voltage of the first of this voltage range is more than or equal to the voltage of the second portion of this voltage range, this system comprises: one first differential receiving circuit, in order to receive the input signal of first part of high voltage in this voltage range; One testing circuit is electrically connected on this first differential receiving circuit, when detecting the voltage of this first differential receiving circuit because of input signal and be lower than first of this voltage range and partly can't operate, produces a triggering signal; And one second differential receiving circuit, be electrically connected on this testing circuit, driving that mutually should triggering signal, and receive second partly the input signal that belongs to low voltage, in order to do making the effect that reaches all input signals that receive this voltage range.
(4) description of drawings
For above-mentioned purpose of the present invention, characteristics and advantage can be become apparent, a preferred embodiment cited below particularly, and conjunction with figs. is elaborated:
Fig. 1 (a) is existing circuit in order to receiving inputted signal (b).
Fig. 2 is existing in conjunction with the received signal circuit diagram of P type metal-oxide semiconductor transistor (PMOS) with N type metal-oxide semiconductor transistor (NMOS).
Fig. 3 is the circuit box schematic diagram of preferred embodiment of the present invention.
Fig. 4 is the detailed circuit diagram of preferred embodiment of the present invention.
(5) embodiment
Differential comparison circuit of the present invention system can and be understood fully by following embodiment explanation, make what person skilled in the art scholar can finish according to this, yet enforcement of the present invention be not can be limited it by the following example to implement kenel.
See also Fig. 3 and Fig. 4, it is the circuit block diagram and the detailed circuit structural representation of preferred embodiment of the present invention.
Differential reception comparison circuit of the present invention system is applicable to the transmission ends at USB (USB) interface, be used for receiving all input signals of the voltage range of 0～Vdd (about 0～3.3 volt), and amplified the back and exported an output voltage, wherein this voltage range can be subdivided into first part (about 2～3.3 volts) of high voltage and second part (about 0～2 volt) of low voltage, and this system can comprise: a testing circuit 30, one first differential comparator 31, one second differential comparator 32 and an output circuit 33.
This first differential comparator 31 can receive the input signal that input voltage is about 2～3.3 volts by the first differential receiving circuit 311, utilize first operational amplification circuit 312 be electrically connected on this first differential receiving circuit 311 that the voltage that is received is amplified again, make to produce an output voltage, and send out via this output circuit 33.
This testing circuit 30 is electrically connected on this first differential receiving circuit 311, is mainly used to detect the operating state (promptly detecting a point place shown in Figure 4) of this first differential receiving circuit 311.When this first differential receiving circuit 311 is in accepting state, produces a pick-off signal second differential comparator 32 cuts out, to avoid the loss of power.When detecting the voltage of this first differential receiving circuit 311 because of input signal is to belong to that 0～2 volt voltage range can't operate so when being in closed condition, producing a triggering signal and drive this second differential comparator, 32 receiving inputted signals.
As for this second differential comparator 32 mutually should the control of drive signal after, mainly receive the input signal that input voltage is about 0～2 volt by the second differential receiving circuit 321, utilize second operational amplification circuit 322 that is electrically connected on this second differential receiving circuit 321 again, the voltage that is received is amplified, make to produce an output voltage, and send out via this output circuit 33.
Wherein this first differential receiving circuit 311 is made up of N type metal-oxide semiconductor transistor (NMOS), can comprise two receiving terminals (IN+ and IN-), and when IN+＞IN-, this output voltage is then exported high potential Vdd.When IN+＜IN-, this output voltage is then exported electronegative potential 0.Above-mentioned output voltage can be along with changing to some extent for the definition that varies in size of IN+ and IN-.
Certainly, this second differential receiving circuit 321 is made up of one group of N type metal-oxide semiconductor transistor (NMOS) and one group of P type metal-oxide semiconductor transistor (PMOS), avoid floating (floating) and add taking advantage of effect, can comprise two winding receiving ends (IN+ and IN-) and a voltage conversion circuit (level shift circuit) 3211, when the IN+ of PMOS＞IN-, the then exportable high potential Vdd of this output voltage.When the IN+ of PMOS＜IN-, this output voltage is according to the different then exportable electronegative potentials 0 of demand.Above-mentioned output voltage can be along with changing to some extent for the definition that varies in size of IN+ and IN-.
And this second differential receiving circuit 321 can receive voltage when too high in the IN+ of PMOS and IN-, then closes this second differential receiving circuit 321 automatically.Wherein this voltage conversion circuit 3211 can tentatively amplify earlier in order to the input signal that will be received, and when this testing circuit 30 produces this pick-off signal, these two groups of signal receiving ends is closed.
Described above comprehensive, differential comparison circuit of the present invention system can guarantee can not close fully in order to the differential comparator of received signal by testing circuit, and then solve the problem that prior art can be wasted power supply, and the voltage range that can receive (Common Mode Range) is 0～Vdd, resolution (resolution) can reach 50～200mV (USB 1.1 editions is defined as 200mV at present), and be 7ns maximum time of delay, by above-mentioned realistic simulation result as can be known, its result will go up well much than 1.1 editions ordered specifications of USB, so the tool industrial value, and then reach development goal of the invention of the present invention.
Claims (12)
1. differential comparison circuit system, in order to receive all input signals of a voltage range, and amplified the back and exported an output voltage, wherein this voltage range is to be divided into first part and second partly, and the voltage of the first of this voltage range is more than or equal to the voltage of the second portion of this voltage range, and this system comprises:
One first differential comparator in order to receiving in this voltage range first partly the input signal, and is amplified the voltage that is received, and is produced this output voltage;
One testing circuit is electrically connected on this first differential comparator, when detecting the voltage of this first differential comparison circuit because of input signal and be lower than first of this voltage range and partly can't operate, produces a triggering signal; And
One second differential comparator is electrically connected on this testing circuit, driving that mutually should triggering signal, and receive in this voltage range second partly the input signal, and the voltage that is received is amplified, in order to produce this output voltage.
2. the system as claimed in claim 1 is characterized in that, this differential comparison circuit system is the transmission ends that is applicable to a general serial bus interface.
3. the system as claimed in claim 1 is characterized in that, this first differential comparator comprises:
One first differential receiving circuit is in order to receive the input signal of first part in this voltage range; And
One first operational amplification circuit is electrically connected on this first differential receiving circuit, is amplified in order to the voltage that this first differential receiving circuit is received, and makes to produce this output voltage.
4. the system as claimed in claim 1 is characterized in that, this second differential comparator comprises:
One second differential receiving circuit is electrically connected on this testing circuit, driving that mutually should triggering signal, and receive in this voltage range second partly the input signal; And
One second operational amplification circuit is electrically connected on this second differential receiving circuit, is amplified in order to the voltage that this second differential receiving circuit is received, and makes to produce this output voltage.
5. the system as claimed in claim 1 is characterized in that, this differential comparison circuit system comprises an output circuit, in order to export this output voltage.
6. the system as claimed in claim 1 is characterized in that, this second differential comparator is to be in closed condition when the running of this first differential comparator, and is floating in order to avoid producing.
7. the system as claimed in claim 1 is characterized in that, this first differential comparator is to be in closed condition when this second differential comparator running.
8. differential comparison circuit system, in order to receive all input signals of a voltage range, and amplified the back and exported an output voltage, wherein, this voltage range is to be divided into first part and second partly, and the voltage of the first of this voltage range is more than or equal to the voltage of the second portion of this voltage range, and this system comprises:
One first differential receiving circuit is in order to receive the input signal of first part in this voltage range;
One first operational amplification circuit is electrically connected on this first differential receiving circuit, is amplified in order to the voltage that this first differential receiving circuit is received, and makes to produce this output voltage;
One testing circuit is electrically connected on this first differential receiving circuit, when detecting the voltage of this first differential receiving circuit because of input signal and be lower than first of this voltage range and partly can't operate, produces a triggering signal;
One second differential receiving circuit is electrically connected on this testing circuit, driving that mutually should triggering signal, and receive in this voltage range second partly the input signal; And
One second operational amplification circuit is electrically connected on this second differential receiving circuit, is amplified in order to the voltage that this second differential receiving circuit is received, and makes to produce this output voltage.
9. system as claimed in claim 8 is characterized in that, this differential comparison circuit system comprises an output circuit, in order to export this output voltage.
10. system as claimed in claim 8 is characterized in that, this second differential receiving circuit is to be in closed condition when the running of this first differential receiving circuit and this first operational amplification circuit, and is floating in order to avoid producing.
11. system as claimed in claim 8 is characterized in that, this first differential receiving circuit and this first operational amplification circuit are to be in closed condition when this second differential receiving circuit and the running of this second operational amplification circuit.
12. receiving system, in order to receive all input signals of a voltage range, wherein, this voltage range is to be divided into first part and second partly, and the voltage of the first of this voltage range is more than or equal to the voltage of the second portion of this voltage range, and this system comprises:
One first differential receiving circuit is in order to receive the input signal of first part of high voltage in this voltage range;
One testing circuit is electrically connected on this first differential receiving circuit, when detecting the voltage of this first differential receiving circuit because of input signal and be lower than first of this voltage range and partly can't operate, produces a triggering signal; And
One second differential receiving circuit is electrically connected on this testing circuit, driving that mutually should triggering signal, and receive second partly the input signal that belongs to low voltage, to reach all input signals that receive this voltage range.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 03142427 CN1257611C (en) | 2003-06-06 | 2003-06-06 | Differential comparing circuit system |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 03142427 CN1257611C (en) | 2003-06-06 | 2003-06-06 | Differential comparing circuit system |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN1553576A CN1553576A (en) | 2004-12-08 |
| CN1257611C true CN1257611C (en) | 2006-05-24 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN 03142427 Expired - Fee Related CN1257611C (en) | 2003-06-06 | 2003-06-06 | Differential comparing circuit system |
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| Country | Link |
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| CN (1) | CN1257611C (en) |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US8680891B2 (en) * | 2011-01-27 | 2014-03-25 | Qualcomm Incorporated | High voltage tolerant differential receiver |
| CN107909786B (en) * | 2017-06-15 | 2020-01-10 | 国网浙江省电力公司湖州供电公司 | M-BUS input micropower wireless output parallel connection converter |
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2003
- 2003-06-06 CN CN 03142427 patent/CN1257611C/en not_active Expired - Fee Related
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| Publication number | Publication date |
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| CN1553576A (en) | 2004-12-08 |
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