CN1213577C - Method for implementing high-speed data multiplexing in framing device - Google Patents

Method for implementing high-speed data multiplexing in framing device Download PDF

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Publication number
CN1213577C
CN1213577C CNB011057106A CN01105710A CN1213577C CN 1213577 C CN1213577 C CN 1213577C CN B011057106 A CNB011057106 A CN B011057106A CN 01105710 A CN01105710 A CN 01105710A CN 1213577 C CN1213577 C CN 1213577C
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data
pointer
framer
read
frame
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CN1377160A (en
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周文祥
何宁
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ZTE Corp
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ZTE Corp
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Abstract

The present invention discloses a method for realizing high-speed data multiple connection in a framer. Pointers for reading and writing data are arranged in the elastic buffer of the framer, and whether the relative positions of the two pointers are within the range of a threshold value in front and in back in definite time or not is judged to determine whether the position of the pointer for reading data is shifted forwards or shifted backwards for one frame so as to read out the data correctly. The present invention adopts a multiplexing mode of a high-speed frame interlace. Therefore, the data output of the framer can be used by the system directly without need of adding a chip for time division switching. The present invention can be widely used in various interface units of communication devices such as a relay interface on a digital exchanger.

Description

A kind of method that in framer, realizes high-speed data multiplexing
Technical field
The present invention relates to the communication transmission technology, be specifically related in two-forty, multichannel basic group (comprising E1 and T1) interface framer, realize the method for data multiplexing.
Background technology
In the interface section of trunk interface and the optical transmission system and the switching network of digital switch, all adopt framer (Framer) to realize that system-frame reaches framing control synchronously usually.Wherein the purpose of framing control is that each road mutual nonsynchronous basic group pcm stream of possibility and local frame synchronizing signal are carried out synchronously, eliminate the shake and the short term drift of input signal, long term drift is become frame losing or reads frame operation again, to reach the minimum that influences bearer service.This adjustment normally adopts elastic buffer (Elastic Buffer) to carry out.
In single channel framer (data rate of coming in and going out all is 2.048MHz) design in the past, all adopt the processing method of a kind of like this " keep away and move back ": suppose that the bit address space in the elastic buffer is from 0~511 (two frames).When some pointer A arrive the end of a frame (bit address is 255 or 511), whether be positioned within the 8bit of this pointer the place ahead (bit address 256~263 or 0~7) according to another pointer of slip logic determines B.If just in time be positioned within this segment limit, then pointer A jumps back to the starting position of a frame of just having operated at once.If pointer A is a read pointer, then shows as and read a frame again; If pointer A is a write pointer, has then shown as frame data and lost.This method is when beginning to occur, and the transfer rate of internal system data is identical with the transfer rate of input group data, so the departure of 8bit is fully feasible as criterion.This method schematic diagram as shown in Figure 1.
Along with the increase of power system capacity and the raising of internal system data transmission rate, in many practical applications, all require a few road input group data signal multiplexings (as 4.096Mbps, 8.192Mbps or the like) in an internal data flow.The multiplex mode of group data signal in the high-speed internal data flow generally has two kinds---and interframe is inserted (Frame Interleave) and byte interleaves (ByteInterleave).It is to pack into the form that a frame connects a frame that so-called interframe is inserted the group data signal that is meant in the internal system high-speed data, shown in accompanying drawing 2.a, and interleaving each the roadbed group signal that is meant in the internal system high-speed data, byte packs into, shown in accompanying drawing 2.b in the mode that byte interleaves.In existing commercial switch, for the terseness of the hardware and software that keeps system, the multiplex mode that the high speed internet data of internal system generally adopts interframe to insert.
According to aforesaid method principle,, generally can find two kinds of solutions in order to satisfy the requirement that the system side high speed data frame interleaves.
A kind of is the method that does not change the elastic buffer of original single channel framer, and satisfies the application requirements of frame multiple connection by the capacity that increases the elastic buffer district, but can increase the difficulty and the cost of chip manufacturing, so this method is abandoned by vast chip design merchant.
Another kind is the method for designing of the multichannel framer that generally adopts in the market: be exactly elastic buffer method and the elastic buffer capacity that does not change original single channel framer, but the multiplex mode that the output of the data of framer adopts byte to interleave.For inserting in internal system The data interframe in the application of mode, only at the data output end adjunction time-division switching chip of multichannel framer, the multiplex data that byte is interleave converts the interframe of system requirements to and inserts data during application.When adopting this mode,,, in system applies, need increase the cost and the complexity of system therefrom at framer back increase chip though the slow capacity of the bullet of framer does not increase though can prolong design with the single channel framer.
Summary of the invention
Purpose of the present invention can not increase under the elastic buffer district capacity prerequisite exactly, directly from multichannel framer high speed output frame multiple connection data.
The method that in framer, realizes high-speed data multiplexing of the present invention, the step of its processing is as follows:
1) set a read data pointer and a write data pointer in elastic buffer, read data pointer and write data pointer differ the distance of a frame when initial state, begin to carry out data multiplexing and handle;
2) read the relative position of reading and writing data pointer;
3) the place ahead threshold value is set, judges that the write data pointer is whether in the threshold value of the place ahead of read data pointer; If then the read data pointer retreats into the original position of previous frame, change step 5) then;
4) the rear threshold value is set, judges that the write data pointer is whether in the threshold value of the rear of read data pointer; If then the read data pointer advances to the original position of next frame;
5) proceed to read and write the frame operation;
6) finish the operation of reading frame data after, change step 2).
Description of drawings
Fig. 1 is that prior art single channel framer method is handled schematic diagram;
Fig. 2 a is that byte interleaves data multiplex mode schematic diagram;
Fig. 2 b is that interframe is inserted data multiplex mode schematic diagram;
Fig. 3 is the data multiplexing process chart of the inventive method;
Fig. 4 a is a read-write pointer schematic diagram under the normal operation of embodiment of the inventive method;
Fig. 4 b is the reading buffer memory speed and handle schematic diagram when writing buffer memory speed of embodiment of the inventive method;
Fig. 4 c is the writing buffer memory speed and handle schematic diagram when reading buffer memory speed of embodiment of the inventive method.
Embodiment
Below with embodiment and accompanying drawings high-speed data multiplexing method of the present invention:
Because the present invention no longer is made as movable pointer with two pointers (read data pointer and write data pointer), but only use read pointer at a high speed as movable pointer.Under any circumstance, write pointer all writes elastic buffer according to the speed of basic group with group data.When the boundary of read pointer at every frame, need be from elastic buffer during reading of data, judge the distance between read pointer and the write pointer earlier.If find write pointer within the threshold distance of read pointer the place ahead (or rear), then need with read pointer forward (or backward) carry out a frame re-transmission (or abandoning) to the original position of another frame.This new " keep away and move back " method just can guarantee can not occur read data pointer and the overlapping phenomenon of write data pointer.
Because the system side data rate is higher than group data speed all the time, but at different system side speed, need be to the criterion of makeing mistakes---be that forward and backward side's threshold value is made amendment.The concrete value of setting is:
The place ahead threshold value=frame length (bit) * (1-(primary rate/system side data bit rate));
Rear threshold value=8bit (this value is variable, and existing commercial chip generally adopts the 8bit value);
In the E1 system, frame length is 256bit.According to top formula, when the system side data bit rate is 4.096Mbps, because primary rate is 2.048Mbps, so the place ahead threshold value is 128bit; When the system side data bit rate was 8.196Mbps, the place ahead threshold value then was 192bit, by that analogy.
The handling process of Fig. 3 has been done more detailed explanation in front, just repeats no more at this.
Be 2.048Mbps and system side data bit rate 8.192Mbps below with the primary rate, the mode that system side The data interframe is inserted will be an example on four basic group code stream multiplexs to system data line.
The elastic buffer of two frames is at the inner buffering area that constitutes an annular of framer.Set two data pointers at elastic buffer, wherein the read data pointer is that 8.192MHz speed moves with the system side data bit rate, and the write data pointer is that 2.048MHz speed moves with primary rate.
When beginning, read pointer in the elastic buffer and write pointer differ the distance of a frame, and first frame data of reading from read pointer are invalid data.After whenever finishing the operation of single reading, by the relative position of logic determines reading and writing pointer according to frame.Under normal circumstances, because system side 8.192Mbps data are timesharing reads from the every roadbed group of correspondence imports the elastic buffer of data.When each read data, can both guarantee that write pointer can not crossed read pointer or read pointer in the time of same frame can not cross write pointer, shown in accompanying drawing 4.a, otherwise can cause a large amount of error codes of system.
In actual applications, the system side clock is nonsynchronous with the group data clock often, exactly because also this reason has adopted the elastic buffer district to cushion between the two speed difference in framer.When because the influence of factor such as shake when making the changes in data rate of a certain side, will be broken original read-write balance, just need establishment of a mechanism reasonably to adjust, reach read-write balance again.
If the system side data rate accelerates with respect to primary rate, then write pointer be drawn close and finally be caught up with to read pointer will to write pointer gradually.System side read data operation employing circulates to the multichannel framer and carries out.Because the speed of read data is four times of write data speed, when reading frame data, new data has just write 1/4th frames in this example.Therefore, if when read pointer when certain frame start position to be ready beginning reading the data of bullet in delaying, if write pointer is within this frame data the place ahead 256 * (1-1/4)=192bit scope that read pointer will be read the time, read pointer just may catch up with write pointer within a frame time.Before new frame data write fully, carry out read operation, can cause reading full of prunes data, thereby a large amount of error codes appear in system bullet is slow.On the other hand, if the speed of group data accelerates relatively, then at a time, write pointer also can be caught up with read pointer, and when the previous frame data were not read as yet fully, write pointer had begun the write operation of new frame data again, also can cause the readout error data.
For fear of the generation of this situation, adopt read pointer in the method as criterion.When read pointer when certain frame start position to be ready beginning reading the data of bullet in slow, judge the distance between current read pointer and the write pointer at once.If write pointer beyond the 192bit of read pointer front, or in the place of read pointer back greater than 8bit, then can continue the normal read write operation; If write pointer is in the 192bit of read pointer front, then read pointer may catch up with write pointer in a frame time, therefore will in advance read pointer be return back to the position of previous frame, retransmits the data of a frame, shown in accompanying drawing 4.b; If read pointer is positioned at before the write pointer in the 8bit, then write pointer might be caught up with read pointer when writing next frame data, therefore at this moment read pointer will be advanced to the original position of next frame, abandons the data of a frame, shown in accompanying drawing 4.c.Because the system side data are order sense datas from four road framer bullets are slow, the read data time slow to each road bullet only accounts for 1/4th of the whole cycle, be identical with original 2.048MHz read-out speed from the time, therefore also the situation that frequent pointer is beated can not occur.
The front is that example is illustrated this method with 8.192MHz system side data rate, and in fact, this method is applicable to that all system side data rates are higher than the situation of group data speed.
Adopt method of the present invention, the user is directly read according to the mode of frame multiple connection the data in each road framer with high-frequency clock be multiplexed into high-speeld code-flow and be transported to backboard from elastic buffer, be multiplexed into the multiplexing conversion of frame and needn't finish byte with other exchange chip again.Simultaneously, from top explanation as can be seen, this method has still only been used the elastic buffer of two frame lengths, does not increase any extra resource.The realization of this method is compared with original method, and is relatively simple.Can carry out emulation and realization by programmable logic chip, also can directly apply among the design of framer.

Claims (6)

1. method that realizes high-speed data multiplexing in framer is characterized in that:
1) set a read data pointer and a write data pointer in elastic buffer, read data pointer and write data pointer differ the distance of a frame when initial state, begin to carry out data multiplexing and handle;
2) read the relative position of reading and writing data pointer;
3) the place ahead threshold value is set, judges that the write data pointer is whether in the threshold value of the place ahead of read data pointer; If then the read data pointer retreats into the original position of previous frame, change step 5) then;
4) the rear threshold value is set, judges that the write data pointer is whether in the threshold value of the rear of read data pointer; If then the read data pointer advances to the original position of next frame;
5) proceed to read and write the frame operation;
6) finish the operation of reading frame data after, change step 2).
2. a kind of method that realizes high-speed data multiplexing in framer according to claim 1 is characterized in that the read data pointer described in the step 1) is a movable pointer, can adjust reach according to demand and retreats.
3. a kind of method that realizes high-speed data multiplexing in framer according to claim 1 is characterized in that described read data pointer moves with the speed of system side data bit rate, and described write data pointer moves with primary rate.
4. a kind of method that realizes high-speed data multiplexing in framer according to claim 1 is characterized in that the place ahead threshold value in the described step 3) is:
The place ahead threshold value=frame length * (1-(primary rate/system side data bit rate)), wherein frame length unit is a bit.
5. a kind of method that realizes high-speed data multiplexing in framer according to claim 1 is characterized in that, the rear threshold value in the described step 4) is to be determined by the parameter of the chip of framer employing.
6. a kind of according to claim 1 or 5 method that realizes high-speed data multiplexing in framer is characterized in that described rear threshold value is got 8 bits in the framer that uses existing commercial chip.
CNB011057106A 2001-03-22 2001-03-22 Method for implementing high-speed data multiplexing in framing device Expired - Lifetime CN1213577C (en)

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CN101296217B (en) * 2007-04-24 2011-07-06 中芯国际集成电路制造(上海)有限公司 Elastic buffering mechanism
CN101741500B (en) * 2009-12-21 2013-01-09 浙江大学 Special multiconnection device of border network processor
JP6113839B2 (en) * 2012-06-18 2017-04-12 クゥアルコム・インコーポレイテッドQualcomm Incorporated Adaptive offset synchronization of data based on ring buffer

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