CN1206286A - Subimage synthesis device and method for video decoder of high-resolution TV set - Google Patents

Abstract

The high sharpness video decoder includes code flow parting unit to part the HDTV code flow and sub-decoders to decode sub-image code flows; and it features its subimage synthesis device. The subimage synthesis device includes FIFOs of amount corresponding to that of the sub-decoders and one programmable logic device. Each channel of video data is divided into four parts including odd-column brightness signal Y1, even-column brightness signal Y2, and color difference signals C'b and C'r stored separately in one FIFO. In the first stage of synthesis, the Y1,Y2,C'b and C'r signals are read out in the order of scanning; and in the second stage, the Y1 and Y2 signals are synthesized in the programmable logic device for sequential output.

Description

The image subsection synthesizer and the method thereof of hdtv video decoder

The present invention relates to the video decode technology, relate to the image subsection synthesizer and the method thereof that are used for hdtv video decoder particularly.

Current, general digital high-definition television coding techniques is the MPEG-2 technology.It is by the ISO/IEC13818 file description.Because the amount of calculation of high definition television video encoder is very huge, need just can reach the real-time requirement by parallel processing.

Huge amount of calculation and computational speed in view of MPEG-2 HDTV video encoder.Current employing is divided into the plurality of sub image with the HDTV picture, and each image subsection is encoded with a video encoder, realizes the architecture of HDTV video coding in real time by a plurality of sub-encoders collaborative works.Equally, again code stream is partitioned into a plurality of image subsections, respectively image subsection is decoded in decoding end.At last, for the high resolution displayed television image, just the image subsection digital video signal of these low resolutions must be synthesized high-definition TV signal.

Therefore, the image subsection synthesizer and the method thereof that the purpose of this invention is to provide a kind of hdtv video decoder.

According to the image subsection synthesizer of a kind of hdtv video decoder of the present invention, wherein said hdtv video decoder comprises: code stream cutting unit (2) is used for the HDTV code stream is cut apart; A plurality of sub-decoders (3-1 to 3-n) so that each image subsection code stream of being cut apart is decoded, is characterized in that:

Said image subsection synthesizer comprise its quantity a plurality of FIFOs corresponding with above-mentioned a plurality of sub-decoders (3-1 to 3-n) (41-1,42-1,43-1,44-1 ..., 41-n, 42-n, 43-n, 44-n), and programmable logic device (45); Above-mentioned data video signal through decoding synthesizes one road high definition television video data by said image subsection synthesizer, is transformed into the analog high-definition tv vision signal through D/A converter (5) again, shows to deliver to display unit.

According to the image subsection synthesizer of above-mentioned a kind of hdtv video decoder, said vision signal by a plurality of image subsection decoders (3-1 to 3-n) decoding is the SDTV video data that meets the CCIR601 form; Every road video data is broken down into 4 parts: odd column brightness signal Y 1, even column brightness signal Y 2, color difference signal C ' b and C ' r, store with 1 FIFO respectively, they are respectively Y1 FIFO (42-1), Y2 FIFO (44-1), C ' b FIFO (41-1), C ' r FIFO (43-1); In the phase I at interflow, the Y1 of each image subsection, Y2, C ' b and C ' r read successively by the scanning sequency that video shows, this mainly by programmable logic device control FIFO read enable to realize; Second stage is united two into one Y1 and Y2 by the little programmable logic device 45 of time-delay again, order output.

According to the image subsection synthetic method of a kind of hdtv video decoder of the present invention, wherein said hdtv video decoder comprises: code stream cutting unit (2) is used for by scanning sequency the HDTV code stream being cut apart; A plurality of sub-decoders (3-1 to 3-n) so that each image subsection code stream of being cut apart is decoded, is characterized in that:

Said image subsection synthetic method comprises:

Step 1 is broken down into 4 parts with every road video data: odd column brightness signal Y 1, even column brightness signal Y 2, color difference signal C ' b and C ' r;

Step 2,4 parts of being decomposed of storing above-mentioned every road video data respectively with 1 FIFO;

The content that step 3, the scanning sequency that shows by video are read above-mentioned FIFO successively and stored;

Step 4 is united two into one Y1 and Y2 by the little programmable logic device of time-delay again, order output.

Below in conjunction with accompanying drawing most preferred embodiment of the present invention is described.

Fig. 1 is the block diagram of high definition television video decode system;

Fig. 2 is the block diagram according to the image subsection synthesizer of hdtv video decoder of the present invention;

In Fig. 1, what enter Video Decoder is the high definition TV data code flow, and it meets Moving Picture Experts Group-2.At first 1 pair of this HDTV code stream of demultiplexer carries out demultiplexing, and demultiplexer 1 output three road code streams are promptly to the Video Decoder outputting video streams, to audio decoder end output audio stream, to auxiliary data mouth output auxiliary data flow.Because video flowing is the high definition level, so utilizing 2 pairs of code streams of code stream cutting unit before entering Video Decoder earlier cuts apart, to reduce decoding required amount of calculation and speed, send into each sub-decoder 3-1 to 3-n then respectively, so that each image subsection code stream of being cut apart is decoded, data video signal through decoding synthesizes No. one high definition TV level video data by code stream synthesis unit 4, be transformed into the analog high-definition tv vision signal through D/A converter 5 again, show to deliver to the display unit (not shown).System controller 6 is respectively to demultiplexer 1, code stream cutting unit 2, and each sub-decoder 3-1 to 3-n, code stream synthesis unit 4 and D/A converter 5 are controlled.

The present invention will provide a kind of code stream synthesis unit 4 that can be used in the above-mentioned hdtv video decoder.

Referring to Fig. 2, it has shown the image subsection synthesizer of hdtv video decoder of the present invention.Vision signal by a plurality of image subsection decoder 3-1 to 3-n decodings is the SDTV video data that meets the CCIR601 form.For the multipath digital video signal is synthesized one the tunnel, at first each road signal is deposited among the FIFO.Has the characteristic of first in first out for FIFO, so just can read by DISPLAY ORDER as long as write video data by DISPLAY ORDER.In order to reduce requirement to the FIFO capacity, every road video data is broken down into 4 parts: odd column brightness signal Y 1, even column brightness signal Y 2, color difference signal C ' b and C ' r, store with 1 FIFO respectively, they are respectively Y1 FIFO 42-1, Y2 FIFO 44-1, C ' b FIFO 41-1, C ' r FIFO 43-1.In the phase I at interflow, the Y1 of each image subsection, Y2, C ' b and C ' r read successively by the scanning sequency that video shows, this mainly by programmable logic device control FIFO read enable to realize.Second stage unites two into one Y1 and Y2 again, order output.This stage can only be finished by the little programmable logic device 45 of time-delay (such as 7128 chips that adopt altera corp) because speed is higher.In addition, also must be by the row of sub-decoder, field synchronization and blanking signal recover the row of HDTV, field synchronization and blanking signal, row and linage-counter by HDTV, can produce required capable field synchronization and blanking signal, use for D/A converter and display unit, this also is that programmable logic device is realized.

For example, realize that with above-mentioned hardware a resolution is 1440 * 1152 * 25 hdtv video decoder.Such as the HDTV code stream being divided into 4 image subsections, each image subsection size is 720 * 576.Each image subsection is decoded the SDTV video data of output CCIR601 form with special chip.This video data is Y, C ' b, and C ' r Teng liver ring matter is equipped with from the abundant sedan-chair A ' b1 of rose mould, Y1, C ' r1, Y2, C ' b2, Y3, C ' r2, Y4 ...The latch clock of output is 27MHz, uses the EPLD of altera corp to add that jumbo dynamic FIFO finishes among Fig. 2.The video data that enters the unit, interflow is earlier through FIFO, and Mean Speed is 6.75Mb/s, with Y, and C ' b, C ' r branch is opened.From FIFO, extract Y then, C ' b, C ' r, earlier with two SDTV data of HDTV level image level be in the same place, four SDTV data with HDTV level image lump together then, Y at last, C ' b, C ' r exports respectively.

Image behind the interflow is not owing to all there is the pixel increase and decrease in the horizontal and vertical directions, and each image subsection is pressed the pixel alignment, does not see partitioned organization, similarly is not handle through piecemeal.And the synchronizing signal strict synchronism of the synchronizing signal of HDTV and sub-decoder, image stability.

Claims (3)

1, a kind of image subsection synthesizer of hdtv video decoder, wherein said hdtv video decoder comprises: code stream cutting unit (2) is used for the HDTV code stream is cut apart; A plurality of sub-decoders (3-1 to 3-n) so that each image subsection code stream of being cut apart is decoded, is characterized in that:

Said image subsection synthesizer comprise its quantity a plurality of FIFOs corresponding with above-mentioned a plurality of sub-decoders (3-1 to 3-n) (41-1,42-1,43-1,44-1 ..., 41-n, 42-n, 43-n, 44-n), and programmable logic device (45); Above-mentioned data video signal through decoding synthesizes one road high definition television video data by said image subsection synthesizer, is transformed into the analog high-definition tv vision signal through D/A converter (5) again, shows to deliver to the display unit (not shown).

2, according to the image subsection synthesizer of a kind of hdtv video decoder of claim 1, said vision signal by a plurality of image subsection decoders (3-1 to 3-n) decoding is the SDTV video data that meets the CCIR601 form; Every road video data is broken down into 4 parts: odd column brightness signal Y 1, even column brightness signal Y 2, color difference signal C ' b and C ' r, store with 1 FIFO respectively, they are respectively Y1 FIFO (42-1), Y2 FIFO (44-1), C ' b FIFO (41-1), C ' r FIFO (43-1); In the phase I at interflow, the Y1 of each image subsection, Y2, C ' and C ' r read successively by the scanning sequency that video shows, this mainly by programmable logic device control FIFO read enable to realize; Second stage is united two into one Y1 and Y2 by the little programmable logic device 45 of time-delay again, order output.

3, a kind of image subsection synthetic method of hdtv video decoder, wherein the hdtv video decoder of institute's condition comprises: code stream cutting unit (2) is used for by scanning sequency the HDTV code stream being cut apart; A plurality of sub-decoders (3-1 to 3-n) so that each image subsection code stream of being cut apart is decoded, is characterized in that:

Said image subsection synthetic method comprises:

Step 1 is broken down into 4 parts with every road video data: odd column brightness signal Y 1, even column brightness signal Y 2, color difference signal C ' b and C ' r;

Step 2,4 parts of being decomposed of storing above-mentioned every road video data respectively with 1 FIFO;

The content that step 3, the scanning sequency that shows by video are read above-mentioned FIFO successively and stored;

Step 4 is united two into one Y1 and Y2 by the little programmable logic device of time-delay again, order output.

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