CN1202578C - Method for forming semiconductor element with metal base board - Google Patents
Method for forming semiconductor element with metal base board Download PDFInfo
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- CN1202578C CN1202578C CNB011435151A CN01143515A CN1202578C CN 1202578 C CN1202578 C CN 1202578C CN B011435151 A CNB011435151 A CN B011435151A CN 01143515 A CN01143515 A CN 01143515A CN 1202578 C CN1202578 C CN 1202578C
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Abstract
The present invention provides a method for forming a semiconductor element with a metal baseplate. The method at least comprises the steps that a semiconductor baseplate is provided and used as a temporary baseplate; at least a semiconductor layer is formed on the semiconductor baseplate; the metal baseplate is formed on the semiconductor layer; finally, the semiconductor baseplate is removed. The present invention has the advantages that the dependability and the service life of the semiconductor element can be enhanced by utilizing the high heat conduction and conductivity of the metal baseplate.
Description
Technical field:
The invention relates to structure of a kind of semiconductor element and forming method thereof, particularly a kind of structure of optical-semiconductor element and method.
Background technology:
Semiconductor element uses widely on various electronic products, for example central processing unit, memory, microwave component, light-emitting component etc.
Because semiconductor element can produce heat, and the temperature of rising semiconductor element causes the Reliability of semiconductor element and the shortening in useful life, in addition, no matter be that type laser, wall emission laser are penetrated in light-emitting diode, limit, the element luminous efficiency can variation.With AlGaInP type light-emitting diode is example, and its principle of luminosity is to produce light because the electronics that Γ can be with combines with the hole by direct gap; When temperature rose, the electronics of part can transit to X and can interband connect energy gap and combine and produce hot again with the hole, causes the reduction of internal quantum, and end product causes luminous efficiency to reduce along with the rising of temperature.
Concerning traditional light-emitting diode, therefore employed substrate, its energy gap can absorb the light that luminescent layer sends less than the energy gap of luminescent layer, cause the reduction of element light output efficiency.End view with two heterogeneous interface (Double Heterojunction) light-emitting diode chip of the AlGaInP of Fig. 1 is an example, building crystal to grow one n type (Al on n type GaAs substrate 110
xGa
1-x)
0.5In
0.5 P layer 112, one deck non-impurity-doped (Al that grows up again that continues
xGa
1-x)
0.5In
0.5The luminescent layer of P (light emitting layer) 114, a p type (Al more then grows up
xGa
1-x)
0.5In
0.5The layer 116 of P, wherein x represents the chemical ratios of aluminium in each layer.These 112 layers, 114 layers, 116 layers have promptly formed so-called pair of heterogeneous interface structure, are the main light-emitting zone of light-emitting diode.The Al of the last p type of growing up again
xGa
1-xThe current spreading layer of As or GaP (spreading current layer) 118 makes electric current so just finish the of heap of stone brilliant work of light-emitting diode uniformly by two heterogeneous interface structures with the ability of strengthening the horizontal conducting of p zone electric current.Wherein, the ratio of x has determined the light wavelength that is sent in the luminescent layer 114, and the ratio of n type layer 112 and p type layer 116 and current spreading layer 118 need make the light that is sent unlikely by these three layers of absorptions.Such structure, though epitaxial layer 112 and 116 and current spreading layer 118 absorbing light not up and down, GaAs substrate 110 can absorbing light, in this case, cause the light of some downward ejaculations to be absorbed, so that emitting component reduce widely by substrate 110.
Recently, for light emitting diode base plate light absorptive problem, several settling modes are arranged.First kind of mode is directly light-emitting diode to be grown up at non-light absorptive substrate.But because the lattice constant of substrate must be close with the epitaxial layer lattice constant of semiconductor light-emitting elements, so the method has limited the selection of substrate.The second way is first growth Bragg reflection face (DistributedBragg Reflector between light emitting diode construction layer and substrate, DBR), light emitting diode construction then grow up again on Bragg reflection face, but because Bragg reflection face can only reflect the light near vertical incidence, light for all the other non-normal incidences, still the light that has a considerable part passes Bragg reflection face and is absorbed by substrate, therefore also can only increase limited luminous efficiency.
The third mode is to utilize temporary substrate, and it can be a light absorptive substrate, and removes behind building crystal to grow.In this case, the printing opacity that first growth one deck is thick on temporary substrate and the photic zone of conduction are as nonvolatil substrate, building crystal to grow light emitting diode construction on this transparent substrates more then grinds temporary substrate utilization at last again or mode that etching or wafer are taken (wafer lift off) off is removed.But common all suitable thin and easily crisp of the structure of light-emitting component, so that the permanent substrate thickness of printing opacity must be suitable is thick, wafer of heap of stone just can bear other follow-up step, and therefore such LED manufacturing rate is low, and cost is still very high.
Problem about LED quality another consideration is that led current distributes.LED crystal particle end view with Fig. 2 n type substrate manufacture is an example, is made in the behind of n type substrate 132 in the n of the composition that contains Au/Ge usually type ohmic contact 130; And luminescent layer 134 is main luminous main structure, and it can be single heterojunction or two heterogeneous interface or multiple quantum trap structure; 136 layers of the printing opacity current spreading layer of p type are p type ohmic contact routing on it with pad 138 on luminescent layer 134, and it contains the composition of Au/Be or Au/Zn usually.When electric current by p type Ohmic electrode routing with pad 138 when flowing to printing opacity current spreading layer 136, the part electric current can be earlier then enters luminescent layer 134 again and emits beam in this layer lateral flow; But also have the part electric current can directly down flow to luminescent layer 134 with pad 138 when flowing to printing opacity current spreading layer 136 and emit beam, but this a part of light can suffer from p type ohmic contact routing when up penetrating with filling up 138 and can't penetrate the crystal grain outside by p type Ohmic electrode routing; Therefore, this a part of electrorheological becomes invalid electric current, should reduce as far as possible.Want head it off, directly down flow to 134 layers of luminescent layers in the time of must making electric current flow to printing opacity current spreading layer 136 on the resistance barrier of the electric current under the electrode (current blocking) by p type Ohmic electrode 138.The solution that is widely known by the people at present is an example with the crystal grain of n type substrate manufacture, is shown in the crystal grain end view of Fig. 3, the electric current resistance barrier structure 140 of utilizing the n type and printing opacity current spreading layer 136 (p type) different electrically, reach electric current and hinder the purpose that hinders.Make so structure, two kinds of methods are arranged at present, first kind is two stages brilliant methods of heap of stone, promptly form trichite photosphere 134 of heap of stone and electric current resistance barrier structure in regular turn, take out the step of passing through outside the brilliant chamber of heap of stone to make and hinder barrier structure 140, then again wafer is put back the current spreading layer 136 of the printing opacity of growing up again in the brilliant chamber of heap of stone, this kind mode to form n-type electric current with electric current resistance barrier etch structures, be easier to pollute brilliant chamber of heap of stone, the of heap of stone brilliant quality that influence is following; Second method is to utilize to select regional diffusion, though the method is comparatively simple and cost is low, and wayward.
Summary of the invention:
In described background of invention, many shortcomings that the tradition light-emitting diode is produced, main purpose of the present invention is to provide the method that forms a metal substrate, replace semiconductor substrate with metal substrate, utilize high-termal conductivity, the high conductivity of metal substrate, can promote Reliability and add the long life general semiconductor element, can increase light output efficiency semiconductor optical device.
Another object of the present invention is to for semiconductor light-emitting elements, provide and form minute surface just like or matsurface and be positioned at method between metal substrate and semiconductor, this surface can be the metal/semiconductor interface and forms, or the surface that utilizes refractive index difference to cause, utilize this surface that the luminescent layer light down of semiconductor light-emitting elements is led again and make it break away from element surface and increase luminous efficiency.
Another purpose of the present invention is to utilize the technology of metal substrate, and the method that forms electric current resistance barrier structure is provided under the lumination of light emitting diode layer, reaches the purpose of electric current resistance barrier, to increase the luminous efficiency of light-emitting diode.
A further object of the present invention is to provide a kind of method that forms metal substrate, utilizes metal as the thin film in the desirable down semiconductor of temporary substrate, with as follow-up other purposes.
According to above-described purpose, the invention provides the method that a kind of formation has the semiconductor element of a metal substrate, method comprises at least provides the semiconductor substrate as temporary substrate; Then form at least semi-conductor layer on semiconductor substrate; Form metal substrate again on semiconductor layer; Remove semiconductor substrate at last.Utilize the high heat conduction of metal substrate and Reliability and the useful life that conductivity can be promoted semiconductor element.
Description of drawings:
Fig. 1 is the generalized section with the diode of conventional method formation;
Fig. 2 is the generalized section with the diode that comprises wire pad of conventional method formation;
Fig. 3 is the generalized section with the diode that comprises the electric current barrier layer of conventional method formation;
Fig. 4 is for forming the generalized section of the diode with thick metal layers with the inventive method;
Fig. 5 forms the generalized section that replaces the diode of temporary substrate with thick metal substrate with the inventive method;
Fig. 6 is for to form some generalized sections that comprise the diode of wire pad with the inventive method;
Fig. 7 is the front elevational schematic with the diode of the inventive method formation;
Fig. 8 is for to form a kind of generalized section that comprises the diode of electric current barrier layer with the inventive method;
Fig. 9 is for to form the generalized section that another kind comprises the diode of electric current barrier layer with the inventive method; And
Figure 10 is the generalized section of the diode of temporary substrate for forming with thick metal substrate with the inventive method.
Embodiment:
Semiconductor design of the present invention can be widely applied in many semiconductor design, and can utilize many different semi-conducting material manufacturings, when the present invention is that basic element is that preferred embodiment is when illustrating the inventive method with the two heterogeneous interface light-emitting diodes of the AlGaInP of a n type brilliant substrate of heap of stone, the due cognition of personage of being familiar with this field is that many steps can change, material and impurity are also replaceable, and these general replacements do not break away from spirit of the present invention and category far and away yet.
Secondly, the present invention is described in detail as follows with accompanying drawing, and when the detailed description embodiment of the invention, the profile of expression semiconductor structure can be disobeyed general ratio and be done local the amplification in order to explanation in semiconductor fabrication, so should be with this as the understanding that qualification is arranged.In addition, in the making of reality, should comprise the three dimensions size of length, width and the degree of depth.
The invention provides the method that a kind of formation has the semiconductor element of a metal substrate, method comprises at least provides the semiconductor substrate as temporary substrate; Then form at least semi-conductor layer on semiconductor substrate; Form metal substrate again on semiconductor layer; Remove semiconductor substrate at last.Utilize the high heat conduction of metal substrate and Reliability and the useful life that conductivity can be promoted semiconductor element.
Wafer side view of heap of stone with Fig. 4 is an example, at first select a suitable wafer as substrate 60, because substrate 60 will remove when following element is finished, though therefore this substrate 60 be n type or p type or semi-insulating, be light transmission or light absorptive substrate all can, it focuses on becoming to grow good light-emitting diode.Because the defective of n type GaAs is less and lattice constant can be consistent with the AlGaInP light-emitting diode, though therefore it is the light absorptive substrate, generally being still and adopting n type GaAs is substrate.The LED layer 62,64 of on this substrate 60, growing up in regular turn again, and 66.LED layer 64 is the two heterogeneous interface structures of formation, but is noted that the present invention also is applicable to the LED element of other kinds.
First growth LED layer 62 on substrate 60, it is the current spreading layer of n type AlGaAs or AlGaInP light transmission, the layer 64 of the two heterogeneous interface structures of AlGaInP of then growing up thereon again, the LED layer 66 of then growing up again is the GaP of p type light transmission or AlGaAs or light-absorption layer as thin as a wafer, GaAs layer for example thinks that follow-up making can make good Ohmic contact.
Finished described brilliant work of heap of stone, promptly made layer of metal ohmic electrode layer 68 thereon, it can utilize and plate one deck gold (Au)/beryllium (Be) or gold (Au)/zinc (Zn) and reach through high tempering.Yet for the semiconductor element that does not need vertical conducting or metal substrate can be directly and semiconductor form for the element of ohmic contact, can not need metal ohmic electrode layer 68, semiconductor element can directly formation between a metal substrate 70 and LED layer 66.Finished this metal ohmic contact, just on this metal, formed layer of metal substrate 70 as permanent substrate.Because metal is difficult for breaking for semiconductor, so the thickness of this metal substrate 70 just is enough to support the semiconductor epitaxial layer not break more than 20um, but also can thick thickness to general substrate.
The mode that this metal substrate 70 forms, as with the mode of semiconductor fabrication, can utilize evaporation (evaporation) or sputter (sputtering), plated with gold, platinum (Pt), palladium (Pd), zinc, aluminium (Al), nickel (Ni), titanium (Ti), chromium (Cr) or its alloy or its composite bed form.Also can be by but melt and dissolved then it being watered in metal Ohmic electrode 68 or semiconductor layer surface (being described polycrystal semiconductor layer of heap of stone) of the metal of low temperature melt and dissolved (cold-forming) gone up formation metal substrate 70, as indium (In), plumbous (Pb), tin (Sn) or its alloy etc.; But also can by with the melt and dissolved metal of low temperature as sticker, another sheet metal is adhered on metal Ohmic electrode 68 or the semiconductor layer surface form " thick " and metal substrate 70.
In addition, also can utilize the mode of plating, utilize metal Ohmic electrode 68 or directly with semiconductor layer surface as cathode electrode, metal substrate 70 is plated on metal Ohmic electrode 68 or the semiconductor layer surface, its material can be copper, nickel, chromium (Cr), zinc, tin, gold, silver etc.With copper is example, and plating can utilize copper sulphate to add sulfuric acid to add water and form electroplate liquid, then connect copper and put into electroplate liquid at anode, and negative electrode connects metal Ohmic electrode 68 or semiconductor layer, and puts into electroplate liquid, can form copper metal substrate 70 after the energising.Another example is example with nickel, electroplate and then can utilize nickelous sulfate to add nickel chloride to add boric acid and add water and form electroplate liquid, then connect nickel and put into electroplate liquid at anode, negative electrode connects metal Ohmic electrode 68 or semiconductor layer, and put into electroplate liquid, can form the metal substrate 70 of nickel matter after the energising.In addition, also can utilize the electrodeless plating method, plated metal substrate 70, its material can be copper, nickel, gold, platinum, palladium etc.Its principle is that metal ion is dissolved in the solution, adds reducing agent and makes metal ion be reduced into metallic atom, and be deposited on metal Ohmic electrode 68 or the semiconductor layer, and form metal substrate 70.After finishing metal substrate 70, the mode that can utilize selective etch, grinding or wafer to raise (wafer lift off) is removed GaAs substrate 60.
After finishing described making, this wafer is reversed the back up and down as Fig. 5, wherein except substrate has changed metal substrate 70 into, all the other structures are consistent with general light-emitting diode chip, after finishing the wafer of heap of stone of metal substrate of Fig. 5, this wafer of heap of stone promptly carries out element to be made, and forms front metal ohmic contact routing with filling up, as shown in Figure 6.
Then just can cut,, promptly finish the light-emitting diode of metal substrate each die separation.The front view of each crystal grain promptly as shown in Figure 7.Except making light-emitting diode, the high-termal conductivity that can utilize metal substrate 70 has higher Reliability, also utilized the metal Ohmic electrode 68 among Fig. 6 and the interface of LED layer 66 (GaP of p type light transmission or AlGaAs or GaAs layer as thin as a wafer) to reflect the light that two heterogeneous interfaces are produced, but made because high annealing has been gone through at this interface, and caused reflectivity to descend.Improve the reflectivity at this interface, except can utilizing the metal Ohmic electrode 68 that can replace at the metal that lower temperature forms ohmic contact among Fig. 6, add Bragg reflection face between metal Ohmic electrode 68 that also can be in Fig. 6 and the LED layer 64 (two heterogeneous interface structure), also can utilize the method for matsurface, interface as metal Ohmic electrode among Fig. 6 68 and p type layer 66 utilizes grinding or alternate manner to make it become matsurface when making, and increases luminous efficiency with the direct of travel that changes light; Also can be between the metal Ohmic electrode 68 of Fig. 6 and layer 66 interface part or comprehensively add the not extinction material that some refractive indexes are lower than the refractive index of LED layer 66, have the phenomenon of total reflection when utilizing light to be incident to low-refraction by high index of refraction and reach the method that increases luminous efficiency, this class low-index material can be indium oxide (In
2O
3), tin oxide (SnO
2), tin indium oxide (ITO), hafnium oxide (HfO
2), magnesium oxide (MgO), silica (SiO, SiO
2, SiO
x), titanium oxide (TiO, TiO
2, TiO
x, Ti
2O
3), zinc oxide (ZnO), zinc sulphide (ZnS), aluminium oxide (Al
2O
3), tantalum oxide (Ta
2O
3, Ta
2O
5) etc.
Utilizing electric current resistance barrier aspect increase lumination of light emitting diode efficient, utilize this metal substrate technology also can reach electric current resistance barrier at an easy rate.First method can add last layer electric current barrier layer 79 at layer 66 and 68 of metal electrode layers as shown in Figure 8, and it is positioned at front metal ohmic contact routing with under the pad 78, as the electric current barrier layer.This electric current barrier layer 79 can utilize and form semi-insulating layer when building crystalline substance, utilizes subsequent step to form again; Also can utilize formation one layer insulating then to utilize follow-up making to form; Utilize subsequent step formation after also can utilizing the semiconductor layer that forms a kind of and layer 66 different conductivity.This electric current barrier layer 79 also can utilize implanting ions to form; In addition, and 66 on the LED layer metal level that can't form ohmic contact also can be used as electric current barrier layer 79.
The method of second kind of formation electric current barrier layer as shown in Figure 9, to be positioned at front metal ohmic contact routing removes with layer 66 etching under the pad 78, therefore can't contact with layer 66 with the metal electrode layer 68 under the pad 78 at front metal ohmic contact routing, can form non-ohmic contact therebetween, stop current flowing and reach the purpose of electric current resistance barrier.Above method all can reach high electric current resistance barrier effect, and then reach the purpose that increases luminous efficiency.
In addition,, therefore when crystalline substance of heap of stone, must consider in this respect, on making, need be noted because the technology of described metal substrate can make the order of its epitaxial layer of wafer that is taken off opposite up and down.In addition, can twice application metal substrate technology of the present invention; As temporary substrate, for example utilize again the technology of metal substrate then can avoid so situation again first metal substrate.As shown in figure 10 all, metal substrate 80, its purpose are temporary substrate, subregion 82 certain part for utilizing the metal substrate technology to be taken off on semiconductor wafer, therefore, the interface of 82 of metal substrate 80 and subregions is the top of original semiconductor wafer.At this moment, 82 tops make a permanent substrate 84 to the metal substrate technology in the subregion again, then utilize the mode of etching or electrolysis that temporary metal substrate 80 is removed again, again this wafer is spun upside down, so the just supreme situation of reversed in order down of epitaxial layer.Therefore, the technology of metal substrate also can be simple is used for certain part of wafer is taken off, and is about to metal substrate as temporary substrate, after some required part for the treatment of wafer is taken off, is re-used as other purposes.
Above-described embodiment only is preferred embodiment of the present invention, provide convenience technology of the present invention is described, be not in order to limiting scope of the present invention, all other do not break away from the equivalence change of being finished under the disclosed spirit or modify, and all should be included in the claim scope of the present invention.
Claims (35)
1. a formation has the method for the semiconductor element of a metal substrate, it is characterized in that this method comprises at least:
The semiconductor substrate is provided;
Form at least semi-conductor layer on this semiconductor substrate;
Form this metal substrate on this semiconductor layer; And
Remove this semiconductor substrate.
2. method according to claim 1 is characterized in that, described metal substrate is to adopt evaporation one metal process to form, and this metal is selected from one of the alloy of gold, platinum, palladium, zinc, aluminium, nickel, titanium, chromium, described metal or combination of described metal alloy.
3. method according to claim 1 is characterized in that, described metal substrate is to adopt sputter one metal process to form, and this metal is selected from one of the alloy of gold, platinum, palladium, zinc, aluminium, nickel, titanium, chromium, described metal or combination of described metal alloy.
4. method according to claim 1, it is characterized in that, described metal substrate is after adopting melt and dissolved at least one metal that can be melt and dissolved, the method of metal on this semiconductor layer that this can be melt and dissolved of casting subsequently forms, and this can be selected from one of the alloy of indium, lead, tin, described metal or combination of described metal alloy by melt and dissolved metal.
5. method according to claim 1 is characterized in that, described metal substrate is the method formation of adopting melt and dissolved at least one metal and other metals that can be melt and dissolved.
6. method according to claim 1 is characterized in that, described metal substrate is to adopt to electroplate metal process formation, and this metal is selected from one of the alloy of copper, nickel, chromium, zinc, tin, silver, gold, described metal or combination of described metal alloy.
7. method according to claim 1 is characterized in that, described metal substrate is to adopt electrodeless plating one metal process to form, and this metal is selected from one of the alloy of copper, nickel, gold, palladium, platinum, described metal or combination of described metal alloy.
8. a method that forms semiconductor element is characterized in that, this method comprises at least:
The semiconductor substrate is provided;
Form at least semi-conductor layer on this semiconductor substrate;
Form one first metal substrate on first side of this semiconductor layer;
Remove this semiconductor substrate;
Form one second metal substrate on second side of this semiconductor layer; And
Remove this first metal substrate.
9. method according to claim 8, it is characterized in that, described first metal substrate is to adopt evaporation one metal process to form, and this metal is selected from one of the alloy of gold, platinum, palladium, zinc, aluminium, nickel, titanium, chromium, described metal or combination of described metal alloy.
10. method according to claim 8, it is characterized in that, described first metal substrate is to adopt sputter one metal process to form, and this metal is selected from one of the alloy of gold, platinum, palladium, zinc, aluminium, nickel, titanium, chromium, described metal or combination of described metal alloy.
11. method according to claim 8, it is characterized in that, described first metal substrate is after adopting melt and dissolved at least one metal that can be melt and dissolved, the method of metal on this semiconductor layer that this can be melt and dissolved of casting subsequently forms, and this can be selected from one of the alloy of indium, lead, tin, described metal or combination of described metal alloy by melt and dissolved metal.
12. method according to claim 8 is characterized in that, described first metal substrate is the method formation of adopting melt and dissolved at least one metal and other metals that can be melt and dissolved.
13. method according to claim 8, it is characterized in that, described first metal substrate is adopt to electroplate a metal process to form, and this metal is selected from one of the combination of the alloy of the alloy of copper, nickel, chromium, zinc, tin, silver, gold, described metal or described metal.
14. method according to claim 8 is characterized in that, described first metal substrate is to adopt electrodeless plating one metal process to form, and this metal is selected from one of the combination of the alloy of the alloy of copper, nickel, gold, palladium, platinum, described metal or described metal.
15. method according to claim 8, it is characterized in that, described second metal substrate is to adopt evaporation one metal process to form, and this metal is selected from one of the alloy of gold, platinum, palladium, zinc, aluminium, nickel, titanium, chromium, described metal or combination of described metal alloy.
16. method according to claim 8, it is characterized in that, described second metal substrate is to adopt sputter one metal process to form, and this metal is selected from one of the alloy of gold, platinum, palladium, zinc, aluminium, nickel, titanium, chromium, described metal or combination of described metal alloy.
17. method according to claim 8, it is characterized in that, described second metal substrate is after adopting melt and dissolved at least one metal that can be melt and dissolved, the method of metal on this semiconductor layer that this can be melt and dissolved of casting subsequently forms, and this can be selected from one of the alloy of indium, lead, tin, described metal or combination of described metal alloy by melt and dissolved metal.
18. method according to claim 8 is characterized in that, described second metal substrate is the method formation of adopting melt and dissolved at least one metal and other metals that can be melt and dissolved.
19. method according to claim 8, it is characterized in that, described second metal substrate is adopt to electroplate a metal process to form, and this metal is selected from one of the combination of the alloy of the alloy of copper, nickel, chromium, zinc, tin, silver, gold, described metal or described metal.
20. method according to claim 8 is characterized in that, described second metal substrate is to adopt electrodeless plating one metal process to form, and this metal is selected from one of the combination of the alloy of the alloy of copper, nickel, gold, palladium, platinum, described metal or described metal.
21. a formation has the method for a light-emitting diode of a metal substrate, it is characterized in that, this method comprises at least:
The semiconductor substrate is provided;
Form an epitaxial layer on this semiconductor substrate, this epitaxial layer is made up of a plurality of semiconductor layer;
Form a metal ohmic electrode layer on this epitaxial layer;
Form this metal substrate on this metal ohmic electrode layer;
Remove this semiconductor substrate; And
Form an Ohmic electrode routing with filling up under this epitaxial layer.
22. method according to claim 21, it is characterized in that, described metal substrate is to adopt evaporation one metal process to form, and this metal is selected from one of the alloy of gold, platinum, palladium, zinc, aluminium, nickel, titanium, chromium, described metal or combination of described metal alloy.
23. method according to claim 21, it is characterized in that, described metal substrate is to adopt sputter one metal process to form, and this metal is selected from one of the alloy of gold, platinum, palladium, zinc, aluminium, nickel, titanium, chromium, described metal or combination of described metal alloy.
24. method according to claim 21, it is characterized in that, described metal substrate is after adopting melt and dissolved at least one metal that can be melt and dissolved, the method of metal on this semiconductor layer that this can be melt and dissolved of casting subsequently forms, and this can be selected from one of the alloy of indium, lead, tin, described metal or combination of described metal alloy by melt and dissolved metal.
25. method according to claim 21 is characterized in that, described metal substrate is the method formation of adopting melt and dissolved at least one metal and other metals that can be melt and dissolved.
26. method according to claim 21 is characterized in that, described metal substrate is adopt to electroplate a metal process to form, and this metal is selected from one of the combination of the alloy of the alloy of copper, nickel, chromium, zinc, tin, silver, gold, described metal or described metal.
27. method according to claim 21 is characterized in that, described metal substrate is to adopt electrodeless plating one metal process to form, and this metal is selected from one of the alloy of copper, nickel, gold, palladium, platinum, described metal or combination of described metal alloy.
28. method according to claim 21 is characterized in that, described method further comprises: form a Bragg reflection face between this epitaxial layer and this metal ohmic electrode layer, improve luminous efficiency so as to increasing reflectivity.
29. method according to claim 21, it is characterized in that, described method further comprises: whole or local formation one non-light-absorption layer is between this epitaxial layer and this metal ohmic electrode layer, this non-light-absorption layer has the refractive index of a refractive index less than this epitaxial layer, improve luminous efficiency so as to increasing reflectivity, this non-light-absorption layer is selected from one of indium oxide, tin oxide, tin indium oxide, hafnium oxide, magnesium oxide, silica, titanium oxide, zinc oxide, zinc sulphide, aluminium oxide, tantalum oxide.
30. method according to claim 21 is characterized in that, further comprises: form a matsurface between this epitaxial layer and this metal ohmic electrode layer, improve luminous efficiency to glazed thread so as to leading again.
31. method according to claim 21, it is characterized in that, the local semi-insulating layer that forms is between this epitaxial layer and this metal ohmic electrode layer when also being included in this epitaxial layer of formation, this semi-insulating layer is positioned at this Ohmic electrode routing with directly over the pad, in order to light, and improve luminous efficiency as the emission downwards of electric current barrier layer resistance barrier.
32. method according to claim 21, it is characterized in that, further comprise: also local formation has the semi-conductor layer of one second conductivity between this epitaxial layer and this metal ohmic electrode layer when forming this epitaxial layer, this semiconductor layer is positioned at this Ohmic electrode routing with directly over the pad, in order to the light of launching as electric current barrier layer resistance barrier, and improve luminous efficiency downwards.
33. method according to claim 21, it is characterized in that, described method further comprises, form a semi-insulating layer between this epitaxial layer and this metal ohmic electrode layer with the ion implantation method part, this semi-insulating layer is positioned at this Ohmic electrode routing with directly over the pad, in order to the light of launching as electric current barrier layer resistance barrier, and improve luminous efficiency downwards.
34. method according to claim 21, it is characterized in that, described method further comprises, the local insulating barrier that forms is between this epitaxial layer and this metal ohmic electrode layer, this insulating barrier is positioned at this Ohmic electrode routing with directly over the pad, in order to the light of launching as electric current barrier layer resistance barrier, and improve luminous efficiency downwards.
35. method according to claim 21, it is characterized in that, described method further comprises, the local non-ohmic contact zone that forms is between this epitaxial layer and this metal ohmic electrode layer, this non-ohmic contact zone is positioned at this Ohmic electrode routing with directly over the pad, in order to the light of launching as electric current barrier layer resistance barrier, and improve luminous efficiency downwards.
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| US7344903B2 (en) * | 2003-09-17 | 2008-03-18 | Luminus Devices, Inc. | Light emitting device processes |
| JP2005223165A (en) | 2004-02-06 | 2005-08-18 | Sanyo Electric Co Ltd | Nitride-based light emitting element |
| CN101626000B (en) * | 2008-07-10 | 2014-11-26 | 晶元光电股份有限公司 | Metal array basal plate, photoelectric element, light-emitting element and manufacturing method thereof |
| KR101106151B1 (en) * | 2009-12-31 | 2012-01-20 | 서울옵토디바이스주식회사 | Light emitting device and method of fabricating the same |
| CN105845801B (en) * | 2016-06-13 | 2018-04-10 | 天津三安光电有限公司 | Light emitting diode and preparation method thereof |
-
2001
- 2001-12-07 CN CNB011435151A patent/CN1202578C/en not_active Expired - Fee Related
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| CN1423346A (en) | 2003-06-11 |
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