CN118672049A

CN118672049A - Zero-layer mask plate and photoetching alignment method thereof

Info

Publication number: CN118672049A
Application number: CN202410855351.4A
Authority: CN
Inventors: 李伟峰; 张其学
Original assignee: Shanghai Huahong Grace Semiconductor Manufacturing Corp; Hua Hong Semiconductor Wuxi Co Ltd
Current assignee: Shanghai Huahong Grace Semiconductor Manufacturing Corp; Hua Hong Semiconductor Wuxi Co Ltd
Priority date: 2024-06-27
Filing date: 2024-06-27
Publication date: 2024-09-20

Abstract

The invention provides a zeroth layer mask plate and a photoetching alignment method thereof, wherein the zeroth layer mask plate comprises the following components: a base; the first dummy straight line and the second dummy straight line are arranged on the substrate and are orthogonal to the origin; at least 4 groups of lithography marks are arranged on the first dummy straight line and the second dummy straight line, and at least one group of lithography marks are arranged on each side of the origin point of the first dummy straight line and the second dummy straight line. According to the invention, the exposure of the zeroth layer with different exposure area sizes can be realized by adjusting the relative movement distance between the zeroth layer mask and the splicing area, so that the zeroth layer mask can be used for preparing zeroth layer marks of different products, the cost of the mask in an epitaxial process is saved, and in addition, the alignment and exposure times can be reduced, so that the exposure efficiency is improved.

Description

Zero-layer mask plate and photoetching alignment method thereof

Technical Field

The invention relates to the technical field of semiconductors, in particular to a zeroth layer mask plate and a photoetching alignment method thereof.

Background

In the semiconductor manufacturing process, when a process for forming a first layer structure is performed on a wafer (blank wafer), it is generally required to define the range of each exposure region first, that is, to define each exposure region on the wafer by photolithography using a zeroth layer mask. The process is, for example, an ion implantation process or an epitaxy process, and only a zeroth layer mark for subsequent alignment and overlay needs to be formed on the wafer to define each exposure region, so that the alignment requirement is relatively low.

However, since different products have different designs and different requirements, each product chip has a different size, a different chip arrangement (pitch), and a different scribe line size, the exposure size (exposure area size) of each product is different, and the position of the lithographic marks (mainly, the marks for lithographic alignment and the marks for lithographic overlay) on the reticle is also different, so the lithographic reticle design is different for each product. Therefore, a plurality of masks of different products, namely a zeroth layer mask can not be used commonly, and each time a new product is required, the zeroth layer mask needs to be re-published, so that the cost of the mask is high. As shown in fig. 1, for different products A, B, C, each product requires a zeroth layer reticle.

Disclosure of Invention

The invention aims to provide a zeroth layer mask plate and a photoetching alignment method thereof, which are used for enabling a plurality of products to share the zeroth layer mask plate.

In order to solve the above technical problems, the zeroth layer mask provided by the present invention includes:

A base;

The first dummy straight line and the second dummy straight line are arranged on the substrate and are orthogonal to the origin;

At least 4 groups of lithography marks are arranged on the first dummy straight line and the second dummy straight line, and at least one group of lithography marks are arranged on each side of the origin point of the first dummy straight line and the second dummy straight line.

Optionally, the substrate is in a first rectangular shape, and the first dummy straight line and the second dummy straight line are parallel to rectangular sides of the substrate respectively.

Optionally, the origin is disposed in a second rectangle on the substrate, the center of the second rectangle coincides with the center of the substrate, and the rectangular side length of the second rectangle is less than or equal to 2/3 of the corresponding rectangular side length of the substrate.

Optionally, each set of the lithographic marks includes an alignment mark and an overlay mark.

Optionally, the lithographic marks of the first and second dummy lines on each side of the origin are the same.

Optionally, at least 4 sets of the lithographic marks are arranged in a central symmetry about the origin.

Optionally, each group of the lithography marks is symmetrically arranged along a first dummy straight line or a second dummy straight line where the lithography marks are located.

Optionally, the method further comprises a cross mark arranged at the origin, and each side of the cross mark is aligned with the first dummy straight line and the second dummy straight line respectively.

Based on another aspect of the present invention, there is also provided a photolithography alignment method of a zeroth layer mask, including:

Providing a substrate, wherein the substrate comprises a preset exposure area and a splicing area between the exposure areas;

Providing a zeroth layer mask plate comprising a substrate; the first dummy straight line and the second dummy straight line are arranged on the substrate and are orthogonal to the origin; at least 4 groups of lithography marks arranged on the first virtual straight line and the second virtual straight line, wherein each side of the origin is provided with at least one group of lithography marks;

And aligning the first dummy straight line and the second dummy straight line of the zeroth layer mask plate with the central line of the splicing area between the adjacent exposure areas respectively, wherein the central line is parallel to the extending direction of the splicing area, and executing photoetching and etching processes to form zeroth layer marks on the splicing area of the substrate for defining the exposure areas.

Optionally, the preset exposure areas are arranged in an array along a first direction and a second direction, the splicing areas adjacent to the exposure areas include a first central line extending along the first direction and a second central line extending along the second direction, the first direction is orthogonal to the second direction, and the first dummy straight line and the second dummy straight line are aligned with the first central line and the second central line of the splicing area respectively.

In summary, the zeroth layer mask provided by the invention comprises a substrate; the first dummy straight line and the second dummy straight line are arranged on the substrate and are orthogonal to the origin; at least 4 groups of lithography marks are arranged on the first dummy straight line and the second dummy straight line, and at least one group of lithography marks are arranged on each side of the origin of the first dummy straight line and the second dummy straight line. The steps when the zeroth layer mask plate is applied to the photoetching alignment method include: providing a substrate, wherein the substrate comprises a preset exposure area and a splicing area between the exposure areas; providing a zeroth layer mask plate comprising a substrate; the first dummy straight line and the second dummy straight line are arranged on the substrate and are orthogonal to the origin; at least 4 groups of photoetching marks arranged on the first virtual straight line and the second virtual straight line, wherein each side of the origin is at least provided with one group of photoetching marks; and respectively aligning the first dummy straight line and the second dummy straight line of the zeroth layer mask plate with the central line of the splicing area between the adjacent exposure areas, wherein the central line is parallel to the extending direction of the splicing area, and executing photoetching and etching processes to form zeroth layer marks on the splicing area of the substrate for defining the exposure areas. In the invention, the zeroth layer mask plate only comprises at least 4 groups of photoetching marks positioned on a first dummy straight line and a second dummy straight line, and the design of layout data and chips of products is not related, when the photoetching of the zeroth layer mask plate is aligned, the first dummy straight line and the second dummy straight line of the zeroth layer mask plate are respectively aligned with the central line of a splicing area between adjacent exposure areas, so that the preparation of the zeroth layer mark and the definition of the exposure areas are realized, in other words, the exposure of zeroth layers with different exposure area sizes can be realized only by adjusting the relative movement distance (offset distance) of the zeroth layer mask plate and the splicing area to align the zeroth layer mark, thereby the zeroth layer mask plate can be generally used for the preparation of zeroth layer marks of different products, and the cost of the mask plate in an epitaxial process is saved. In addition, for the incomplete exposure area on the substrate, part of the splicing area is positioned outside the substrate, and the alignment and exposure times can be reduced by saving the alignment and exposure of the splicing area outside the substrate, so that the exposure efficiency is improved.

Drawings

It will be appreciated by those skilled in the art that the drawings are provided for a better understanding of the invention and do not constitute any limitation on the scope of the invention.

FIG. 1 is a schematic illustration of a zero-level mask blank for different products;

FIG. 2 is a schematic diagram of a zeroth layer mask according to the first embodiment;

FIG. 3a is a schematic diagram of four adjacent exposure areas of 2×2 according to the first embodiment;

FIG. 3b is a schematic diagram of a plurality of products according to the first embodiment sharing the same zeroth layer mask;

FIG. 4 is a flowchart of a method for aligning photolithography of a zeroth layer mask provided in the second embodiment;

FIG. 5 is a schematic alignment diagram of a zero-th layer mask and a center line of a stitching region in a second embodiment;

FIG. 6a is a schematic diagram of an exposed area on a substrate according to a second embodiment;

Fig. 6b is a schematic diagram of the number of exposures on a substrate provided in embodiment two.

In the accompanying drawings: 10-a substrate; 11-an exposure area; 11 a-11 d-first to fourth exposure areas; 12-splicing area; 13-midline; 13 a-a first midline; 13 b-a second midline; x-a first direction; y-a second direction; 40-matrix; 41-a second rectangle; 41 a-a first dummy straight line; 41 b-a second dummy straight line; 42-photoetching marks; 43-cross mark; OA-first ray; OA' -second ray; OB-third ray; OB' -fourth ray.

Detailed Description

The invention will be described in further detail with reference to the drawings and the specific embodiments thereof in order to make the objects, advantages and features of the invention more apparent. It should be noted that the drawings are in a very simplified form and are not drawn to scale, merely for convenience and clarity in aiding in the description of embodiments of the invention. Furthermore, the structures shown in the drawings are often part of actual structures. In particular, the drawings are shown with different emphasis instead being placed upon illustrating the various embodiments.

As used in this disclosure, the singular forms "a," "an," and "the" include plural referents, the term "or" are generally used in the sense of comprising "and/or" and the term "several" are generally used in the sense of comprising "at least one," the term "at least two" are generally used in the sense of comprising "two or more," and the term "first," "second," and "third" are used for descriptive purposes only and are not to be construed as indicating or implying any relative importance or number of features indicated. Thus, a feature defining "a first", "a second", and "a third" may include one or at least two of the feature, either explicitly or implicitly, unless the context clearly dictates otherwise.

Example 1

An embodiment provides a zeroth layer mask.

Fig. 2 is a schematic diagram of a zeroth layer mask according to a first embodiment.

As shown in fig. 2, the zeroth layer mask provided in the first embodiment includes a substrate 40, a first dummy line 41a, a second dummy line 41b, and a photolithography mark 42. The first dummy straight line 41a and the second dummy straight line 41b are provided on the base 40 and are orthogonal to the origin O. At least 4 sets of the lithography marks 42 are provided on the first dummy straight line 41a and the second dummy straight line 41b, and the first dummy straight line 41a and the second dummy straight line 41b are provided with at least one set of the lithography marks 42 on each side of the origin O.

With continued reference to fig. 2, the substrate 40 may have a first rectangular shape, and two orthogonal rectangular sides of the first rectangular shape may be L1 and W1, respectively, and may be any material suitable for manufacturing a reticle. The first dummy straight line 41a and the second dummy straight line 41b may be dummy straight lines on the surface of the substrate 40 for locating the position of the lithographic mark 42, which is not actually present on the actual zeroth layer reticle, and thus are indicated by dashed lines in the present embodiment. The first dummy straight line 41a and the second dummy straight line 41b may be parallel (or perpendicular) to two orthogonal rectangular sides of the first rectangle, that is, the first dummy straight line 41a and the second dummy straight line 41b may be disposed orthogonally on the surface of the base 40, intersecting (orthogonally) with the origin O. Wherein the origin O may be provided within a second rectangle 41 on the surface of the base 40, and the center of the second rectangle 41 may coincide with the center of the base 40 (the center of the first rectangle). In particular, each rectangular side of the second rectangle 41 may be less than or equal to 2/3 of the corresponding rectangular side of the substrate 40, while ensuring that each group of the photo-etching marks is on the substrate, so as to reserve a space for disposing the photo-etching marks 42 on the first dummy straight line 41a and the second dummy straight line 41b, in other words, taking the rectangular sides of the second rectangle 41 corresponding to the first rectangle as L2 and W2, L2 is less than or equal to L1 x 2/3, and W2 is less than or equal to W1 x 2/3. Of course, in some preferred examples, the origin O may be located at or near the center of the first rectangle (the base 40), i.e., the rectangle side length of the second rectangle 41 is 0 or near 0.

With continued reference to fig. 2, the first dummy straight line 41a may be formed by two rays (i.e., a first ray OA and a second ray OA ') having opposite directions from the origin O, and the second dummy straight line 41b may be formed by two rays (i.e., a third ray OB and a third fourth ray OB') having opposite directions from the origin O. Each of the four rays is provided with at least one group of lithography marks 42, and each group of lithography marks 42 may include an alignment mark and an overlay mark (not specifically shown), where the alignment mark is used for lithography alignment during subsequent lithography, and the overlay mark is used for overlay detection after subsequent lithography. The marks on each group of the lithography marks 42 may be symmetrically arranged along the first dummy straight line 41a or the second dummy straight line 41b where they are located, so that the lithography marks 42 are shared by two adjacent exposure areas 11. In one example, the photolithographic marks 42 on each of the above-described rays have the same alignment marks and overlay marks. In another example, a multiple set of 4 lithographic marks 42 is provided on the zeroth layer reticle, and the multiple sets of lithographic marks 42 are arranged in a central symmetry about the origin. Of course, one or more of the four rays may be additionally provided with a number of other marks, such as additional alignment marks, overlay marks, or sets of lithography marks 42. The alignment marks and overlay marks in the lithographic mark 42 may be specifically determined according to the marks required by the lithographic exposure apparatus and the overlay detection apparatus, respectively. A cross mark 43 for alignment may be provided at the intersection (i.e., origin O) of the first dummy straight line 41a and the second dummy straight line 41b, and the center line 13 of each side of the cross mark 43 may be parallel to the first dummy straight line 41a and the second dummy straight line 41b, respectively.

The first dummy straight line 41a and the second dummy straight line 41b, which are orthogonal, divide the substrate 40 into four rectangular areas, each rectangular area may be a part of the corresponding four adjacent exposure areas 11 arranged by 2 x2, the four rays (the first dummy straight line 41a and the second dummy straight line 41 b) may be aligned with each central line 13 of the splicing area 12 between the adjacent exposure areas 11 along the extending direction thereof, and one boundary of two adjacent exposure areas 11 may be defined by using the photolithography mark 42 on each ray. Specifically, fig. 3a is a schematic diagram of four adjacent exposure areas of 2×2, as shown in fig. 3a, each exposure area 11 includes a pattern area and a stitching area 12 at least partially surrounding the pattern area, the adjacent exposure areas 11 share the stitching area 12 (the stitching area 12 is formed by two adjacent exposures in a strict sense, for simplicity of illustration, the middle line 12 of the stitching area 12 along the extending direction thereof may be the boundary of the adjacent exposure areas 11, so that the first dummy straight line 41a and the second dummy straight line 41b of the zeroth layer mask are aligned with two orthogonal middle lines 13 of the stitching area 12 respectively, that is, the lithographic marks 42 on the first dummy straight line 41a and the second dummy straight line 41b are exposed to the stitching area 12, so that the partial definition of the four adjacent exposure areas 11 can be achieved. In addition to the incompletely exposed regions 11, typically two sets (at least two sets) of photolithographic marks 42 are required for one boundary of the adjacent exposed regions 11, in other words, two adjacent exposures may achieve definition of one boundary of the adjacent exposed regions 11.

It should be noted that, the above-mentioned zeroth layer mask is blank except for the photo-etching marks 42 on the first dummy line 41a and the second dummy line 41b, no chip pattern or mark pattern (no layout data of product and no chip design) is provided, the dimensions of the pattern region and the stitching region 12 in each exposure region 11 are not specifically confirmed, the dimensions of the pattern region and the stitching region 12 can be any suitable dimensions within the allowable range, and when the zeroth layer mask of the present embodiment is adopted, the definition of the corresponding exposure region 11 can be realized only by placing the first dummy line 41a and the second dummy line 41b at positions aligned with the two orthogonal center lines 13 of the stitching region 12, in other words, the exposure of zeroth layers with different exposure regions 11 can be realized only by adjusting the relative movement distance (offset distance) of the zeroth layer mask and the (center lines 13 of the stitching region 12) to align the two. Fig. 3b is a schematic diagram of a zeroth layer mask that is common to a plurality of products provided in the first embodiment, so, as shown in fig. 3b, the zeroth layer mask provided in the present embodiment can be applied to zeroth layer mark preparation of products with different pattern area sizes and different stitching area 12 sizes, that is, to define exposure areas 11 of different products.

Example two

The second embodiment provides a photoetching alignment method of a zeroth layer mask.

Fig. 4 is a flowchart of a photolithography alignment method of a zeroth layer mask provided in the second embodiment.

As shown in fig. 4, a photolithography alignment method of a zeroth layer mask provided in the second embodiment includes:

s01: providing a substrate, wherein the substrate comprises preset exposure areas and splicing areas between the exposure areas,

S02: providing a zeroth layer mask plate comprising a substrate; the first dummy straight line and the second dummy straight line are arranged on the substrate and are orthogonal to the origin; at least 4 groups of lithography marks arranged on the first virtual straight line and the second virtual straight line, wherein each side of the origin is provided with at least one group of lithography marks;

S03: and aligning the first dummy straight line and the second dummy straight line of the zeroth layer mask plate with the central line of the splicing area between the adjacent exposure areas respectively, wherein the central line is parallel to the extending direction of the splicing area, and executing photoetching and etching processes to form zeroth layer marks on the splicing area of the substrate for defining the exposure areas.

First, step S01 is performed to provide a substrate 10 including a predetermined exposure region 11 and a splice region 12 between the exposure regions 11.

The substrate 10 of the present embodiment may be a semiconductor substrate, such as silicon, germanium, etc., to be prepared with a zero-level mark, and the substrate 10 may be a blank wafer to be subjected to an epitaxial process in the present embodiment. Of course, the surface of the substrate 10 is covered with a photoresist layer to be exposed to form a zeroth layer mark.

The exposure regions 11 may be regions formed on the substrate 10 on the reticle in one (single) exposure, and a plurality of exposure regions 11 arranged in an array in the first direction X and the second direction Y are preset on the substrate 10, each exposure region 11 may include a pattern region and a stitching region 12 at least partially surrounding the pattern region, and adjacent exposure regions 11 share the stitching region 12 (the stitching region 12 is stitched by two adjacent exposures in a strict sense, here, for convenience of illustration, a simplified process). The exposure regions 11 may have a rectangular shape, the joint region 12 between two adjacent exposure regions 11 along the first direction X or the second direction Y may have a stripe shape, and the joint region 12 between four adjacent exposure regions 11 of 2×2 may have a cross shape. The exposure region 11 and the splice region 12 are virtual regions, that is, the exposure region 11 and the splice region 12 are regions to be defined on the substrate 10, and are not actually defined.

Referring to fig. 3a, in the present embodiment, the four exposure regions 11 adjacent to each other along the first direction X and the second direction Y on the substrate 10 are illustrated as examples, that is, the first to fourth exposure regions 11a to 11d, the joint region 12 between the four exposure regions 11 may have a cross shape, and the center line 13 of the cross-shaped joint region 12 may include a first center line 13a extending along the first direction X and a second center line 13b extending along the second direction Y.

Next, referring to fig. 2, step S02 is performed to provide a zeroth layer mask, including a substrate 40; a first dummy straight line 41a and a second dummy straight line 41b provided on the base 40 and orthogonal to the origin O; at least 4 sets of the lithography marks 42 provided on the first dummy straight line 41a and the second dummy straight line 41b, the first dummy straight line 41a and the second dummy straight line 41b being provided with at least one set of the lithography marks 42 on each side of the origin O.

The arrangement of the zeroth layer mask may specifically refer to the first embodiment, and will not be described herein.

Next, step S03 is performed to align the first dummy line 41a and the second dummy line 41b of the zeroth layer mask with the central line 13 of the stitching region 12 between the adjacent exposure regions 11, respectively, wherein the central line 13 is parallel to the extending direction of the stitching region 12, and performing photolithography and etching processes to form zeroth layer marks on the stitching region 12 of the substrate 10 for defining the exposure regions 11.

Fig. 5 is a schematic alignment diagram of the zero-level reticle with the midline of the stitching region. As shown in fig. 5, taking the example that the adjacent first to fourth exposure regions 11a to 11d on the substrate 10 and the first exposure region 11a is the first aligned exposure region 11 (the first aligned stitching region 12), the step of moving the zeroth layer mask to be aligned with the midline 13 (the first midline 13a and the second midline 13 b) of the stitching region 12 includes: moving the zeroth layer mask (in the lithography exposure apparatus) to above the first exposure region 11a so that the zeroth layer mask is "aligned" with the first exposure region 11, wherein a distance between the first dummy line 41a of the zeroth layer mask and the first center line 13a is L3, and a distance between the second dummy line 41b and the second center line 13b is W3; the zeroth layer mask or substrate 10 is moved (offset) by a distance L3 along the first direction X and by a distance W3 along the second direction Y, the first dummy line 41a is moved directly above the first center line 13a, the second dummy line 41b is moved directly above the second center line 13b, that is, the alignment of the first dummy line 41a with the first center line 13a and the alignment of the second dummy line 41b with the second center line 13b are achieved, and an exposure step is performed to complete the exposure of the stitching region 12. Then, the zeroth layer mask (or the substrate 10) is sequentially moved to align with the first center line 13a and the second center line 13b of the other cross-shaped splicing area 12 for exposure until the whole surface of the substrate 10 is exposed, and then a developing and etching process is performed to form all zeroth layer marks on the substrate 10. In other examples of this embodiment, according to the position data of the splicing area 12 between the exposure areas 11 of the substrate 10 on the exposure machine, and in combination with the position data of the first dummy line 41a and the second dummy line 41b on the zeroth layer mask, the zeroth layer mask may be directly moved above the splicing area 12, so as to achieve the alignment of the first dummy line 41a with the first center line 13a and the alignment of the second dummy line 41b with the second center line 13b, in other words, the step of moving the zeroth layer mask above the exposure area 11 and then above the splicing area 12 after moving the zeroth layer mask above the exposure area 11 is saved as directly moving the zeroth layer mask above the splicing area 12.

It can be understood that the photolithographic alignment method of the present embodiment actually aligns with the stitching region 12 between the exposure regions 11, and the incomplete exposure region 11 on the edge of the substrate 10, part of which stitching region 12 is already located outside the substrate 10, cannot achieve the corresponding alignment and exposure, so that the alignment and exposure of the stitching region 12 outside the substrate 10 can be saved, thereby saving the alignment and exposure times, and improving the efficiency of the exposure apparatus. Fig. 6a is a schematic diagram of an exposure area 11 on a substrate 10 provided in the second embodiment, as shown in fig. 6a, the substrate 10 includes 50 complete and incomplete exposure areas 11, and a method of sequentially exposing the 50 exposure areas 11 in the related art is adopted, which requires 50 exposure times, that is, the exposure times are 50. Fig. 6b is a schematic diagram of the number of exposures on the substrate 10 provided in the second embodiment, as shown in fig. 6b, the method of this embodiment is adopted to perform alignment exposure on the spliced region 12 of each exposure region 11, and a total of 43 exposures are required, i.e. the number of exposures is 43.

In addition, as described above, the above-mentioned zeroth layer mask is blank except for the lithographic mark 42 on the first dummy line 41a and the second dummy line 41b, no chip pattern or mark pattern (no layout data of the product or design of the chip is involved), the dimensions of the pattern region and the stitching region 12 in each exposure region 11 are not specifically confirmed, and the dimensions of the pattern region and the stitching region 12 may be any suitable dimensions within the allowable range, and when the zeroth layer mask of the present embodiment is adopted, the definition of the corresponding exposure region 11 can be achieved only by placing the first dummy line 41a and the second dummy line 41b at positions aligned with the two orthogonal center lines 13 of the stitching region 12, in other words, the exposure of zeroth layers with different exposure regions 11 may be achieved by adjusting the relative movement distance (offset distance) of the zeroth layer mask and the (center lines 13 of the stitching region 12) to align the two. Therefore, the zeroth layer mask provided by the embodiment can be applied to zeroth layer mark preparation of products with different pattern area sizes and different splicing area 12 sizes, namely, the zeroth layer mask is used for defining exposure areas 11 of different products.

The above description is only illustrative of the preferred embodiments of the present invention and is not intended to limit the scope of the present invention, and any alterations and modifications made by those skilled in the art based on the above disclosure shall fall within the scope of the appended claims.

Claims

1. A zeroth layer reticle, comprising:

A base;

2. The zeroth layer mask of claim 1, wherein the substrate is in a first rectangular shape, and the first dummy line and the second dummy line are respectively parallel to rectangular sides of the substrate.

3. The zeroth layer reticle of claim 2, wherein the origin is located in a second rectangle on the substrate, a center of the second rectangle coincides with a center of the substrate, and a rectangular side length of the second rectangle is less than or equal to 2/3 of a corresponding rectangular side length of the substrate.

4. The zeroth layer reticle of claim 1, wherein each set of the photolithographic marks comprises an alignment mark and an overlay mark.

5. The zeroth layer reticle of claim 4, wherein the lithographic marks of the first and second dummy lines are the same on each side of the origin.

6. The zeroth layer reticle of claim 1, wherein at least 4 sets of the lithographic marks are arranged in a central symmetry about the origin.

7. The zeroth layer reticle of claim 6, wherein each set of the lithographic marks is symmetrically arranged along a first dummy line or a second dummy line in which it is located.

8. The zeroth layer reticle of claim 1, further comprising a cross mark disposed at the origin, and each side of the cross mark is aligned with the first and second dummy lines, respectively.

9. The photoetching alignment method of the zeroth layer mask plate is characterized by comprising the following steps of:

10. The method of claim 9, wherein the predetermined exposure regions are arranged in an array along a first direction and a second direction, and the stitching region adjacent to the exposure regions includes a first centerline extending along the first direction and a second centerline extending along the second direction, the first direction being orthogonal to the second direction, and the first dummy line and the second dummy line are each aligned with the first centerline and the second centerline of the stitching region.