CN1185660A - Semi-conductor device with longitudinal and transversal double-pole transistor - Google Patents

Semi-conductor device with longitudinal and transversal double-pole transistor Download PDF

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CN1185660A
CN1185660A CN97125805A CN97125805A CN1185660A CN 1185660 A CN1185660 A CN 1185660A CN 97125805 A CN97125805 A CN 97125805A CN 97125805 A CN97125805 A CN 97125805A CN 1185660 A CN1185660 A CN 1185660A
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conductivity type
diffusion layer
transistor
base
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CN1113416C (en
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高桥诚一
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Renesas Electronics Corp
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NEC Corp
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/70Bipolar devices
    • H01L29/72Transistor-type devices, i.e. able to continuously respond to applied control signals
    • H01L29/73Bipolar junction transistors
    • H01L29/732Vertical transistors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
    • H01L21/822Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
    • H01L21/8222Bipolar technology
    • H01L21/8224Bipolar technology comprising a combination of vertical and lateral transistors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/08Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind
    • H01L27/082Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including bipolar components only
    • H01L27/0821Combination of lateral and vertical transistors only

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Manufacturing & Machinery (AREA)
  • Ceramic Engineering (AREA)
  • Bipolar Transistors (AREA)
  • Bipolar Integrated Circuits (AREA)

Abstract

A semiconductor device has a P type semiconductor substrate 1, a vertical type bipolar transistor having an N type base region 4, a lateral type bipolar transistor having an N type base region 4 formed on the semiconductor substrate 1, an N type collector region 7a, and an N type emitter region 8, and a P type insulating diffusion region 7b for isolating between vertical and lateral type bipolar transistors, at least one of collector and emitter regions of the lateral bipolar transistor having substantially same depth of the insulating diffusion region 7b.

Description

Semiconductor device with longitudinal type and transversal double-pole transistor
The present invention relates to a kind of semiconductor device, more particularly, the present invention relates to a kind of semiconductor device with longitudinal type bipolar transistor and transversal double-pole transistor.
Bipolar transistor is because the speed of service is fast, and driveability height and analog feature are remarkable and be widely used in the field of semiconductor devices of nearly all high-speed cruising and the semiconductor integrated circuit of home electronics.
Two kinds of bipolar transistors are arranged, be npn type bipolar transistor and positive-negative-positive bipolar transistor, in integrated circuit, usually use vertical NPN transistor (hereinafter referred to as " NPN transistor "), it has three doped regions, and depth direction forms emitter region, base and collector region successively in the Semiconductor substrate upper edge; And lateral type PNP transistor, (hereinafter being referred to as the L-PNP transistor) in the process of making NPN transistor, do not need to increase any step, just can form above-mentioned L-PNP transistor.
Fig. 4 (a) to 4 (d) be have the NPN crystal and and the sectional view of the transistorized traditional bipolar integrated circuit of L-PNP, represent its manufacturing step in order.
At first, shown in Fig. 4 (a), at P -Form N on the type silicon substrate 1 +Type buried layer 2 and P +Type buried layer 3, then, growth one deck N on it -Type epitaxial loayer 4.The impurity concentration of epitaxial loayer and thickness depend on transistorized puncture voltage, usually respectively 1 * 10 15~1 * 10 17Cm -3With select in the scope of 1~1 μ m.
After forming epitaxial loayer, utilize common selective oxidation method, form thick oxide film (hereinafter referred to as " locos oxide film ") 5, isolate so that make between the semiconductor element.After this, spread, be diffused into N always +Type buried layer 2 forms N + Type diffusion layer 6a and 6b, these two diffusion layer 6a and 6b finally form the collector terminal diffusion layer and the transistorized base lead diffusion layer of L-PNP of NPN transistor respectively.
Then, diffusion P +Type insulating diffusion layer 7 is diffused into P always +Type buried layer 3 is isolated so that make between the semiconductor element.Make mask with photoresist 14, carry out the boron ion in the final zone that forms the NPN transistor base stage and inject, the result forms P type base diffusion layer 8.The condition that the boron ion injects depends on transistorized puncture voltage and characteristic.But inject energy and dosage preferably respectively in 10-60KeV and 1~5 * 10 13Cm -3Scope in.
Then, shown in Fig. 4 (b), base diffusion layer 8 lip-deep a part of thin oxide films of NPN transistor are removed, and deposit one layer thickness is the polysilicon layer 9 of 1000-3000 dust on it.After the N type impurity with high concentration adding arsenide and so in polysilicon layer 9, wafer is placed nitrogen atmosphere, carry out heat treatment in 10 minutes, form N with 900-1000 ℃ temperature +Type emitter diffusion layer 10.When adopting ion implantation to add arsenide in the polysilicon layer, injection condition is chosen as: the injection energy of arsenide and dosage are respectively in 50-90KeV and 0.5-2 * 10 16Cm -2Scope in.
Then, shown in Fig. 4 (c), utilize photoetching process and anisortopicpiston engraving method, polysilicon layer 9 is etched into desired shape, make polysilicon layer play mask like this in step subsequently, said here step subsequently is by boron ion implantation or BF 2Form P -Type grafting (graft) base stage (extrinsic base), as Japan special permission disclose clear 59-147458 document disclosed.That is to say, polysilicon layer is carried out etching so that at the N of NPN transistor +On the type emitter diffusion layer 10, and round N +Type emitter diffusion layer 10 and N -The transistorized N of the L-PNP of type epitaxial loayer 4 +Type collector terminal diffusion layer 6a and N +Type base lead diffusion layer 6b goes up and keeps polysilicon layer, and the epitaxial loayer 4 here becomes the transistorized base of L-PNP.Therefore, do not need to carry out selective etch with photoresist, just can boron ion implantation or BF 2, form P +Type grafting (graft) base stage 11a.That is to say,, therefore, can reduce the quantity of the manufacturing step of semiconductor device on the whole surface of semiconductor wafer because etching is to finish.
The transistorized P of L-PNP +Type emitter diffusion layer 11b and collector Diffusion layer 11c and P +Type grafting base stage 11a forms simultaneously, and this discloses in the clear 59-147458 document in Japan's special permission and is not illustrated.
Yet, the P of formation NPN transistor in a step +Type grafting base stage, the transistorized P of L-PNP +The method of type collector region and emitter region is known.The injection condition of grafting base stage can be: when using boron as ionic material, inject energy and be approximately 30KeV, dosage is 3-5 * 10 15Cm -2When using BF 2During as ionic material, the injection energy is 50-70KeV, and dosage is 3-5 * 10 15Cm -2
At last, shown in Fig. 4 (d), form common inner layer insulating film such as bpsg film 12 and aluminum lead 13, the result forms semiconductor device.
Yet, in above-mentioned prior art, there is a problem, that is, (back is called " h to the transistorized current amplification factor of L-PNP FE") little.This is because the transistorized P of L-PNP +The shallow cause of type collection sheet utmost point diffusion layer.In order to address this problem, Japan's special permission discloses flat 1-261865 document suggestion, forms darker P +Type collector Diffusion layer improves h FEYet, as mentioned above, because the P of NPN transistor +Type grafting base stage, the transistorized P of L-PNP +The type collector electrode forms in a step, thereby can bring following new problem again, if L-PNP is transistorized P +Type collector Diffusion layer forms deeplyer, and then the grafting of NPN transistor (graft) base stage is also done deeplyer, and the capacitor C of collector junction (base stage-collector electrode) JCCorresponding increase has reduced high frequency characteristics.
In order to make P -Type grafting base is darker, and therefore the high frequency characteristics of loss NPN transistor must heat-treat under higher temperature, makes the boron ions diffusion that is injected in the wafer, forms darker grafting base.This high-temperature heat treatment can influence the emitter diffusion layer of NPN transistor, makes emitter diffusion layer become too dark.Therefore, it is very thin that base stage becomes, and the puncture voltage between the collector and emitter reduces because of punch-through.If to take place in order preventing to puncture, to be pre-formed dark P type base diffusion layer, then N -The thickness of type extension density region will attenuation, and the puncture voltage between collector electrode and the base stage can reduce because of puncture.As a result, the puncture voltage between the collector and emitter can reduce.
On the contrary, if in order to prevent from puncture to take place in advance with N -The type epitaxial loayer is done thick, then L -The transistorized P of PNP +It is darker relatively that type collector Diffusion layer just can not become, and the transistorized substrate current of L-PNP will increase.As a result, H FECan not be by desired increase.
And, in the prior art, because current potential behind the polysilicon that forms on the transistorized base of L-PNP must keep maximum potential, i.e. supply voltage, therefore, component placement is very difficult.
If polysilicon layer keeps suspension joint (floating), then can flow through leakage current because of the capacitive coupling between the collector and emitter.
Further, polysilicon layer becomes electronegative potential because of some reason, can produce reverse layer (inver sion layer) at base region surface, and this also makes and flows through leakage current between the collector and emitter.
Therefore, must provide a lead, make the current potential of the transistorized polysilicon layer of L-PNP reach maximum, this makes component placement very difficult.
And for lead-in wire is provided on polysilicon layer, the polysilicon layer of a part of annular or closed shape must extend on the localized oxidation of silicon film.Doing like this and will cutting off a part also is P annular or closed shape +Type collector Diffusion layer.Therefore, P +Type collector Diffusion layer is not intactly round emitter diffusion layer, and this can cause h FEReduce, and substrate current increases.
The purpose of this invention is to provide a kind of semiconductor device that comprises longitudinal type bipolar transistor and transversal double-pole transistor, and the method for making this semiconductor device, wherein, the conductivity type of transversal double-pole transistor is different from the longitudinal type bipolar transistor, and, under the situation that does not influence longitudinal type bipolar transistor characteristic, improve the current amplification factor (h of transversal double-pole transistor FE), in the process of making this semiconductor device, do not increase manufacturing step.
In order to achieve the above object, according to the present invention, semiconductor device comprises: the Semiconductor substrate of first conductivity type; The longitudinal type bipolar transistor that on described Semiconductor substrate, forms, it has the base of first conduction type; The transversal double-pole transistor that on described Semiconductor substrate, forms, it has the base with second conduction type of first conductivity type opposite; The first conduction type collector area, the first conduction type emitter region, with the insulating diffusion district that is used for isolated described vertical and horizontal bipolar transistor of first conduction type, and at least one the degree of depth in described collector area and the emitter region is substantially the same with the degree of depth in described insulating diffusion district.
On the base of transversal double-pole transistor diffusing surface, optionally the grow oxide-film of a bed thickness, and the degree of depth in the first conductive collector district is greater than the degree of depth of oxide-film.
Further, according to the present invention, a kind of method of making semiconductor device is provided, described semiconductor device comprises: the Semiconductor substrate of first conductivity type, longitudinal type bipolar transistor, it has the base of first conductivity type, and is formed on the Semiconductor substrate; Transversal double-pole transistor, it has the base of second conductivity type, and is formed on the Semiconductor substrate; The method of making this semiconductor device is characterised in that: one deck thick oxide film of optionally growing on the surface of the second conductivity type base of transversal double-pole transistor, with this layer oxide-film as at least a portion mask, inject first conductive-type impurity with ion implantation, then it is heat-treated, form the first conductive collector diffusion layer of longitudinal type bipolar transistor thus, perhaps form the first conductive collector diffusion layer and emission collection diffusion layer.
Therefore, within the specific limits, form the collector Diffusion layer of transversal double-pole transistor as far as possible, make and captured effectively by the minority carrier of emitter injection; In above-mentioned certain depth bounds, by converting minority carrier to collector current for a short time, and obtain suitable puncture voltage, and obtain high current amplification factor h FE
Since the collector Diffusion layer of transversal double-pole transistor be used for the insulating diffusion layer of isolated component and in same step, form, therefore, can improve the current amplification factor h of lateral type bidirectional transistor FE, and can not increase the quantity of manufacturing step.
And, owing to before the base stage and emitter that form the longitudinal type bipolar transistor, form the collector Diffusion layer of transversal double-pole transistor, therefore with having no truck with, form darker collector Diffusion layer easily, and can not influence the characteristic of longitudinal type bipolar transistor.
Further, owing on the base region surface of transversal double-pole transistor, have locos oxide film, and do not have polysilicon on it, therefore, can not produce leakage current because of for example face counter-rotating (surfaceinversion).
Fig. 1 (a) is the sectional view of the semiconductor device of the first embodiment of the present invention to 1 (d), represents its manufacturing step;
Fig. 2 is the sectional view of the semiconductor device of the second embodiment of the present invention;
Fig. 3 is the sectional view of the semiconductor device of the third embodiment of the present invention; And
Fig. 4 (a) is the sectional view of conventional semiconductor devices to 4 (d), represents its manufacturing step.
Describe most preferred embodiment of the present invention in detail below in conjunction with accompanying drawing.
Fig. 1 (a) is the sectional view of first embodiment of the invention semiconductor device to Fig. 1 (d), illustrates its manufacturing step.
Fig. 1 (a) is in 1 (d), semiconductor device of the present invention comprises the first conductive-type semiconductor substrate and longitudinal type bipolar transistor that forms and lateral type gated transistors on this Semiconductor substrate, the longitudinal type bipolar transistor has the first conductivity type base, and transversal double-pole transistor has the second conductivity type base; Wherein, the collector area of the collector area of first conductivity type or first conductivity type and emitter region and the first conductivity type insulating diffusion district that is used to isolate longitudinal type and transversal double-pole transistor, have substantially the same impurity concentration, and its formation degree of depth is also substantially the same.
First conductive collector diffusion layer of transversal double-pole transistor or the first conductive collector diffusion layer of transversal double-pole transistor and emitter diffusion layer and the insulating diffusion layer that is used for isolating two kinds of transistorized first conductivity types have the identical degree of depth and impurity concentration.
And, according to the present invention, a kind of method of making semiconductor device is provided, described semiconductor device comprises the Semiconductor substrate of first conductivity type and longitudinal type bipolar transistor and the transversal double-pole transistor that forms on this Semiconductor substrate, the longitudinal type bipolar transistor has the base of first conduction, and transversal double-pole transistor has the base of second conductivity type; Make this semiconductor device method be characterised in that: one deck thick oxide film of on the surface of the second conductivity type base of transversal double-pole transistor, optionally growing, with this layer oxide-film as at least a portion mask, inject first conductive-type impurity with ion implantation, then it is heat-treated, form the first conductive collector diffusion layer of longitudinal type bipolar transistor thus, perhaps form first conductive collector diffusion layer and the emitter diffusion layer.
Describe the manufacture method of the semiconductor device of first embodiment now in detail.At first, shown in Fig. 1 (a), be 1 * 10 in impurity concentration 15Cm -3P -Form N in the type silicon substrate 1 +Type buried layer 2 and P +Type buried layer 3, N +Type buried layer 2 becomes the collector region and the transistorized base of L-NPN of NPN transistor, P +Type buried layer 3 will become the isolated area between the element.Inject arsenide ion, it injects energy is 70KeV, and dosage is 5E15cm -2, place nitrogen atmosphere to carry out heat treatment in 4 hours this wafer then, form N thus +Type buried layer 2.The boron ion that reinjects, it injects energy is 70KeV, dosage is 1E14cm -2, then this wafer is placed 1000 ℃ nitrogen atmosphere to carry out heat treatment in 1 hour, form P thus +Type buried layer 3.
Then, thick, the impurity concentration of growth one deck 2.1 μ m is 5 * 10 on the whole surface of silicon substrate 15Cm -3N -Type epitaxial loayer 4.At this moment, N +Type buried layer 2 about 0.7 μ m that rises in epitaxial loayer 4 that is to say, the thickness of epitaxial loayer 4 itself become about 0.9 μ m.On the other hand, P +Type buried layer 3 is rising 1.3 μ m approximately.
Then, by selective oxidation, form the thick locos oxide film of 5000 dusts 5.At this moment, also form locos oxide film on the surface of wafer, it will become the transistorized base of L-PNP.
Then, shown in Fig. 1 (b), form the N of NPN transistor +Type collector terminal diffusion layer 6a and the transistorized N of L-PNP +Type base lead diffusion layer 6b.The N of NPN transistor +Type collector terminal diffusion layer 6a and the transistorized N of L-PNP +The formation method of type base lead diffusion layer 6b is: from injecting wafer, it injects energy is 70KeV with phosphorus, and dosage is 5E15cm -2Then, under 1100 ℃ temperature, wafer is carried out heat treatment in 40 minutes, make these diffusion layers arrive N +Buried layer 2.
Then, form the transistorized P of L-PNP +Type collector Diffusion layer 7a and P +Type insulating diffusion layer 7b.The transistorized P of L-PNP +Type collector Diffusion layer 7a and P +The formation method of type insulating diffusion layer 7b is, the boron ion is injected wafer, and it injects energy is 30KeV, and dosage is 2E15cm -2, then, under 1100 ℃ temperature, wafer is carried out heat treatment in 20 minutes, it is dark to make these diffusion layers 7a and 7b become about 1.0 μ m, and buried.In this processing step, the P of rising +Type buried layer 3 and P +Type insulating diffusion layer 7b becomes and interconnects, and can isolate mutually thereby make between the element.
Then, in order to form the P type base diffusion layer 8 of NPN transistor, adopt ion implantation to inject boron on the whole surface of wafer, it injects energy is 20KeV, and dosage is 2 * 10 13Cm -2, needn't use photoetching technique for the selectivity ion injects.This be because, except the zone that becomes the NPN transistor base stage with form the L-PNP emitter and do not have the zone of locos oxide film on the wafer all other regional conduction types on it all by N +For becoming P +Type, and the p type impurity of injection intermediate concentration does not influence its impurity concentration and conduction polarity substantially.Much less, also be insulator even wherein inject the later locos oxide film of boron.
Then, shown in Fig. 1 (c), a part of oxide-film on P type base region surface is removed, and forms window, then the thick polysilicon layer 9 of growth one deck 2000 dusts in window.Inject arsenide with ion implantation in wafer, it injects energy is 70KeV, and dosage is 1E16cm -2, after this, place 900 ℃ nitrogen atmosphere to carry out heat treatment in 10 minutes wafer, the result forms N +Type emitter diffusion layer and N +Type base diffusion layer 10.
Then, use photoetching process and anisortopicpiston etching technique to N + Type polysilicon layer 9 is handled, so that make N +Above the type emitter diffusion layer and peripheral region, N +Above the type collector terminal diffusion layer and N +Keep N above the type base lead diffusion layer + Type polysilicon layer 9.
Further, use ion implantation, on the whole surface of silicon substrate 1, inject BF 2, the injection energy is 70KeV, dosage is 5E15cm -2, form the P of NPN transistor thus +Type grafting (graft) base diffusion layer 11a and the transistorized P of L-PNP +Type emitter diffusion layer 11b.
At last, shown in Fig. 1 (d), dielectric film bpsg film 12 for example in thick common of growth one deck 1.0 μ m, and on bpsg film 12, form contact hole, and in contact hole, form aluminum steel layer 13, thus, make complete semiconductor device.
Fig. 2 is the sectional view of the semiconductor device of the second embodiment of the present invention.
In second embodiment shown in Figure 2, the transistorized P of dark L-PNP +Type emitter diffusion layer 11b and P +Type collector Diffusion layer 7a forms simultaneously.Therefore, compare with first embodiment, the semiconductor device of second embodiment has further improved the transistorized current amplification factor h of L-PNP FEBut should be noted that along with P +The transverse width of type emitter diffusion layer increases, and the regional extent of transistor unit also correspondingly has increase slightly.This is because before the emitter diffusion layer of longitudinal type bipolar transistor formed, the dark collector Diffusion layer and the insulating diffusion layer of transversal double-pole transistor formed in same manufacturing step.
And, form the process of the base of longitudinal type bipolar transistor carrying out foreign ion to inject, the lithography step that adopts for the selectivity implanted dopant can save, and this is because locos oxide film is formed on the base region surface of transversal double-pole transistor.

Claims (3)

1. semiconductor device comprises:
The Semiconductor substrate of first conductivity type;
The longitudinal type bipolar transistor that on described Semiconductor substrate, forms, it has the base of described first conductivity type;
The transversal double-pole transistor that on described Semiconductor substrate, forms, it has the base of second conductivity type opposite with described first conductivity type, the emitter region of the collector area of described first conductivity type and described first conductivity type; And
The insulating diffusion district of described first conductivity type is used for isolating described longitudinal type and transversal double-pole transistor;
The degree of depth at least one district in described collector area and the emitter region is substantially the same with the degree of depth in described insulating diffusion district.
2. semiconductor device according to claim 1, wherein, the impurity concentration at least one district in described collector area and the emitter region is substantially the same with the impurity concentration in described insulating diffusion district.
3. semiconductor device comprises:
The Semiconductor substrate of first conductivity type;
The longitudinal type bipolar transistor that on described Semiconductor substrate, forms, it has the base of described first conductivity type;
The transversal double-pole transistor that on described Semiconductor substrate, forms, it has the collector area of the base of second conductivity type opposite with described first conductivity type, described first conductivity type and the emitter region of described first conductivity type; And
On described base, select the dielectric film of formation, be used for isolating the described collector area and the described emitter region of described transversal double-pole transistor;
The described dielectric film of the depth ratio at least one district in described collector area and the emitter region is dark.
CN97125805A 1996-12-20 1997-12-18 Semi-conductor device with longitudinal and transversal double-pole transistor Expired - Fee Related CN1113416C (en)

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JP341403/96 1996-12-20
JP8341403A JPH10189755A (en) 1996-12-20 1996-12-20 Semiconductor device and its manufacturing method
JP341403/1996 1996-12-20

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CN1113416C CN1113416C (en) 2003-07-02

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CN1113416C (en) 2003-07-02
KR19980064351A (en) 1998-10-07

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