CN118335607A - HBT device and manufacturing method thereof - Google Patents
HBT device and manufacturing method thereof Download PDFInfo
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- CN118335607A CN118335607A CN202310945996.2A CN202310945996A CN118335607A CN 118335607 A CN118335607 A CN 118335607A CN 202310945996 A CN202310945996 A CN 202310945996A CN 118335607 A CN118335607 A CN 118335607A
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- 238000004519 manufacturing process Methods 0.000 title claims abstract description 27
- 229910021420 polycrystalline silicon Inorganic materials 0.000 claims abstract description 98
- 229920005591 polysilicon Polymers 0.000 claims abstract description 79
- 238000000137 annealing Methods 0.000 claims abstract description 46
- 239000000758 substrate Substances 0.000 claims abstract description 43
- 150000002500 ions Chemical class 0.000 claims abstract description 30
- 238000005530 etching Methods 0.000 claims abstract description 11
- 238000005468 ion implantation Methods 0.000 claims abstract description 8
- 238000000034 method Methods 0.000 claims description 38
- 230000008569 process Effects 0.000 claims description 15
- -1 arsenic ions Chemical class 0.000 claims description 14
- 238000005229 chemical vapour deposition Methods 0.000 claims description 14
- 239000007789 gas Substances 0.000 claims description 11
- 229910052785 arsenic Inorganic materials 0.000 claims description 8
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 claims description 6
- 238000010438 heat treatment Methods 0.000 claims description 4
- 238000001816 cooling Methods 0.000 claims description 3
- 239000001307 helium Substances 0.000 claims description 3
- 229910052734 helium Inorganic materials 0.000 claims description 3
- SWQJXJOGLNCZEY-UHFFFAOYSA-N helium atom Chemical compound [He] SWQJXJOGLNCZEY-UHFFFAOYSA-N 0.000 claims description 3
- 238000004518 low pressure chemical vapour deposition Methods 0.000 claims description 3
- 238000001451 molecular beam epitaxy Methods 0.000 claims description 3
- 229910052757 nitrogen Inorganic materials 0.000 claims description 3
- 238000000038 ultrahigh vacuum chemical vapour deposition Methods 0.000 claims description 3
- 239000002019 doping agent Substances 0.000 claims 2
- 229910000577 Silicon-germanium Inorganic materials 0.000 description 12
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 9
- 229910052710 silicon Inorganic materials 0.000 description 9
- 239000010703 silicon Substances 0.000 description 9
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 6
- 229910052698 phosphorus Inorganic materials 0.000 description 6
- 239000011574 phosphorus Substances 0.000 description 6
- 238000002955 isolation Methods 0.000 description 5
- 230000004888 barrier function Effects 0.000 description 4
- 229910052814 silicon oxide Inorganic materials 0.000 description 4
- 239000000463 material Substances 0.000 description 3
- 230000004048 modification Effects 0.000 description 3
- 238000012986 modification Methods 0.000 description 3
- 235000012431 wafers Nutrition 0.000 description 3
- LEVVHYCKPQWKOP-UHFFFAOYSA-N [Si].[Ge] Chemical compound [Si].[Ge] LEVVHYCKPQWKOP-UHFFFAOYSA-N 0.000 description 2
- RQNWIZPPADIBDY-UHFFFAOYSA-N arsenic atom Chemical compound [As] RQNWIZPPADIBDY-UHFFFAOYSA-N 0.000 description 2
- 230000015572 biosynthetic process Effects 0.000 description 2
- 229910052732 germanium Inorganic materials 0.000 description 2
- GNPVGFCGXDBREM-UHFFFAOYSA-N germanium atom Chemical compound [Ge] GNPVGFCGXDBREM-UHFFFAOYSA-N 0.000 description 2
- 229910052739 hydrogen Inorganic materials 0.000 description 2
- 239000001257 hydrogen Substances 0.000 description 2
- 230000006872 improvement Effects 0.000 description 2
- 238000011065 in-situ storage Methods 0.000 description 2
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- UFHFLCQGNIYNRP-UHFFFAOYSA-N Hydrogen Chemical compound [H][H] UFHFLCQGNIYNRP-UHFFFAOYSA-N 0.000 description 1
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 description 1
- 229910052581 Si3N4 Inorganic materials 0.000 description 1
- 229910003818 SiH2Cl2 Inorganic materials 0.000 description 1
- 229910045601 alloy Inorganic materials 0.000 description 1
- 239000000956 alloy Substances 0.000 description 1
- 230000003321 amplification Effects 0.000 description 1
- 238000004458 analytical method Methods 0.000 description 1
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 229910052796 boron Inorganic materials 0.000 description 1
- 238000000151 deposition Methods 0.000 description 1
- 230000008021 deposition Effects 0.000 description 1
- 150000002431 hydrogen Chemical class 0.000 description 1
- 238000002347 injection Methods 0.000 description 1
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- 238000003199 nucleic acid amplification method Methods 0.000 description 1
- 239000001301 oxygen Substances 0.000 description 1
- 229910052760 oxygen Inorganic materials 0.000 description 1
- 230000000149 penetrating effect Effects 0.000 description 1
- 238000000623 plasma-assisted chemical vapour deposition Methods 0.000 description 1
- 230000000750 progressive effect Effects 0.000 description 1
- 229910021332 silicide Inorganic materials 0.000 description 1
- FVBUAEGBCNSCDD-UHFFFAOYSA-N silicide(4-) Chemical compound [Si-4] FVBUAEGBCNSCDD-UHFFFAOYSA-N 0.000 description 1
- 235000012239 silicon dioxide Nutrition 0.000 description 1
- 239000000377 silicon dioxide Substances 0.000 description 1
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 1
Abstract
The invention provides an HBT device and a manufacturing method thereof, wherein the manufacturing method comprises the following steps: providing a substrate, and performing ion implantation on the substrate to form a collector region. And etching a part of the thickness of the substrate to form a groove, wherein the upper surface of the collector region is exposed by the groove. And forming a base region epitaxial layer, wherein the base region epitaxial layer fills the groove. Forming an outer base region polysilicon layer which covers the base region epitaxial layer and is provided with an opening positioned above the collector region; the side walls of the openings form side walls. And forming a doped emitter region polysilicon layer, wherein the emitter region polysilicon layer at least fills a window surrounded by the side wall and the base region epitaxial layer. And (3) carrying out spike annealing treatment on the substrate, introducing O 2 at the initial stage of spike annealing temperature rise to form an oxide layer on the surface of the exposed emitter region polysilicon layer, so that the oxide layer can avoid the loss of doping ions (such As As) in the emitter region polysilicon layer, the emitter region polysilicon layer obtains smaller square resistance, the doping concentration of the emitter region polysilicon layer is improved, and the speed of the HBT device is ensured.
Description
Technical Field
The invention belongs to the technical field of integrated circuit manufacturing, and particularly relates to an HBT device and a manufacturing method thereof.
Background
Silicon germanium (SiGe) Heterojunction Bipolar Transistors (HBTs) are devices that utilize the characteristics of silicon germanium (SiGe) alloys. The HBT device not only has low cost of the Si device, but also has high performance of a heterostructure, and has the characteristics of higher frequency, faster speed, lower noise, higher current gain and the like than the Si device under the same conditions. The HBT device is a good choice of an ultrahigh frequency device, and the energy band difference of SiGe and silicon (Si) is utilized to improve the carrier injection efficiency of an emission area and increase the current amplification factor of the device; the high doping of the SiGe base region is utilized, so that the resistance of the base region is reduced, and the characteristic frequency is improved; the SiGe process is basically compatible with the silicon process, so HBT devices have become the dominant force for ultra-high frequency devices.
In the HBT device manufacturing process, the doping concentration of the emitter region is always lower than the expected doping concentration, so that the speed of the HBT device is affected, and improvement is needed.
Disclosure of Invention
The invention aims to provide an HBT device and a manufacturing method thereof, wherein spike annealing treatment is carried out on a substrate, and O 2 with a certain flow rate is introduced in the initial stage of spike annealing temperature rise so As to form an oxide layer on the surface of a bare emitter region polysilicon layer, so that the oxide layer can avoid the loss of doping elements (such As As) in the emitter region polysilicon layer, the emitter region polysilicon layer obtains smaller sheet resistance, the doping concentration of the emitter region polysilicon layer is improved, and the speed of the HBT device is ensured.
The invention provides a manufacturing method of an HBT device, which comprises the following steps:
Providing a substrate, and performing ion implantation on the substrate to form a collector region;
Etching a part of the substrate to form a groove, wherein the upper surface of the collector region is exposed by the groove;
forming a base region epitaxial layer, wherein the base region epitaxial layer fills the groove;
Forming an outer base region polysilicon layer which covers the base region epitaxial layer and is provided with an opening positioned above the collector region; the side wall of the opening forms a side wall;
forming an emitter region polysilicon layer and carrying out ion doping, wherein the emitter region polysilicon layer at least fills a window surrounded by the side wall and the base region epitaxial layer;
And carrying out spike annealing treatment on the substrate, and introducing O 2 at the initial stage of spike annealing temperature rise to form an oxide layer on the surface of the exposed emitter polycrystalline silicon layer.
Further, the temperature range of the spike annealing treatment is 550-1030 ℃, and the spike annealing time length is set to be 0s.
Further, in the spike annealing process, the heating rate is in the range of 80 ℃/sec to 260 ℃/sec, and the cooling rate is in the range of 50 ℃/sec to 100 ℃/sec.
Further, in the spike annealing process, the annealing gas includes at least one of nitrogen and helium.
Furthermore, the peak annealing adopts a laser wavelength of 3000 nm-25000 nm.
Further, the flow rate of the O 2 is 1000 sccm-3000 sccm, and the thickness of the oxide layer is 15-80 angstroms.
Further, in the ion doping process of the polysilicon layer of the emitter region, the doping ions comprise arsenic ions or phosphorus ions.
Further, the base region epitaxial layer is formed by adopting a selective epitaxial growth method, and the selective epitaxial growth method comprises the following steps: any one of molecular beam epitaxy, ultra-high vacuum chemical vapor deposition, low pressure chemical vapor deposition and reduced pressure chemical vapor deposition.
The invention also provides an HBT device comprising:
A substrate having a collector region formed therein;
the groove penetrates through part of the thickness of the substrate and exposes the upper surface of the collector region;
the base region epitaxial layer fills the groove;
An outer base region polysilicon layer covering the base region epitaxial layer and having an opening above the collector region; a side wall is formed on the side wall of the opening;
The doped emitter region polycrystalline silicon layer at least fills a window surrounded by the side wall and the base region epitaxial layer;
and the oxide layer is positioned on the upper surface of the polysilicon layer of the emitting area.
Further, the emitter region polysilicon layer is doped with N-type, and the doped ions include arsenic ions or phosphorus ions.
Compared with the prior art, the invention has the following beneficial effects:
The invention provides an HBT device and a manufacturing method thereof, wherein the manufacturing method comprises the following steps: providing a substrate, and performing ion implantation on the substrate to form a collector region. And etching a part of the thickness of the substrate to form a groove, wherein the upper surface of the collector region is exposed by the groove. And forming a base region epitaxial layer, wherein the base region epitaxial layer fills the groove. Forming an outer base region polysilicon layer which covers the base region epitaxial layer and is provided with an opening positioned above the collector region; the side walls of the openings form side walls. And forming an emitter region polysilicon layer and carrying out ion doping, wherein the emitter region polysilicon layer at least fills a window surrounded by the side wall and the base region epitaxial layer. And (3) carrying out spike annealing treatment on the substrate, introducing O 2 at the initial stage of spike annealing temperature rise to form an oxide layer on the surface of the exposed emitter region polysilicon layer, so that the oxide layer can avoid the loss of doping ions (such As As) in the emitter region polysilicon layer, the emitter region polysilicon layer obtains smaller sheet resistance, the doping concentration of the emitter region polysilicon layer is improved, and the speed of the HBT device is ensured.
Drawings
Fig. 1 is a schematic flow chart of a method for manufacturing an HBT device according to an embodiment of the present invention.
Figure 2 is a schematic cross-sectional view of an HBT device according to an embodiment of the present invention.
FIG. 3 is a graph comparing ion doping concentrations after annealing of actual peaks of oxide layer formed on the surface of polysilicon layer in emitter region and oxide layer not formed.
FIG. 4 is a graph comparing square resistances of emitter polysilicon layers after annealing of actual peaks of oxide layer formed on the surface of emitter polysilicon layer and oxide layer not formed.
Wherein, the reference numerals are as follows:
10-a substrate; 11-collector region; 12-base region epitaxial layer; 13-an outer base region polysilicon layer; 14-side walls; 15-an emitter polysilicon layer; a 16-oxide layer; a-isolating layer; b-etching the barrier layer.
Detailed Description
As described in the background, in a process for manufacturing HBT devices, the doping concentration of the emitter is always lower than the expected doping concentration, which affects the speed of HBT devices, and improvement is needed.
Intensive research has found that in the HBT device fabrication process, a spike anneal of greater than 1000 ℃ is required to activate the doping elements after deposition of emitter polysilicon doping (e.g., as doping). And during spike annealing at a temperature of more than 1000 ℃, doping element As can escape from the exposed polysilicon surface of the emitter region, so that the doping concentration of the emitter region is reduced, and the speed of the HBT device is affected.
Based on the above-mentioned intensive research analysis, the present invention provides an HBT device and a method for manufacturing the same. The invention is described in further detail below with reference to the drawings and the specific examples. The advantages and features of the present invention will become more apparent from the following description. It should be noted that the drawings are in a very simplified form and are not to scale precisely, but rather merely for the purpose of facilitating and clearly aiding in the description of the embodiments of the invention.
For ease of description, some embodiments of the application may use spatially relative terms such as "above …," "below …," "top," "below," and the like to describe one element or component's relationship to another element(s) or component(s) as illustrated in the figures of the embodiments. It will be understood that the spatially relative terms are intended to encompass different orientations of the device in use or operation in addition to the orientation depicted in the figures. For example, if the device in the figures is turned over, elements or components described as "below" or "beneath" other elements or components would then be oriented "above" or "over" the other elements or components. The terms "first," "second," and the like, herein below, are used for distinguishing between similar elements and not necessarily for describing a particular sequential or chronological order. It is to be understood that such terms so used are interchangeable under appropriate circumstances.
The embodiment of the invention provides a method for manufacturing an HBT device, as shown in figure 1, comprising the following steps:
step S1, providing a substrate, and performing ion implantation on the substrate to form a collector region;
S2, etching a part of the substrate with the thickness to form a groove, wherein the upper surface of the collector region is exposed by the groove;
s3, forming a base region epitaxial layer, wherein the base region epitaxial layer fills the groove;
S4, forming an outer base region polycrystalline silicon layer which covers the base region epitaxial layer and is provided with an opening positioned above the collector region; the side wall of the opening forms a side wall;
s5, forming a doped emitter region polycrystalline silicon layer, wherein the emitter region polycrystalline silicon layer at least fills a window surrounded by the side wall and the base region epitaxial layer;
and S6, carrying out spike annealing treatment on the substrate, and introducing O 2 in the initial stage of spike annealing temperature rise to form an oxide layer on the surface of the exposed emitter polycrystalline silicon layer.
Specifically, as shown in fig. 2, in step S1, a substrate 10 is provided, and N-type ion implantation is performed on the substrate 10 to form a collector region 11. Illustratively, the collector region 11 is formed by implanting arsenic or phosphorus into the substrate at an energy of 100KeV to 4000 KeV. The material of the substrate 10 may be silicon, silicon-on-insulator (SOI), bulk silicon, or the like.
Step S2, etching a part of the thickness of the substrate 10 to form a groove, wherein the upper surface of the collector region 11 is exposed by the groove, and the groove is used for forming a base region subsequently.
And S3, forming a base region epitaxial layer 12, wherein the base region epitaxial layer 12 fills the groove. The base epitaxial layer 12 is, for example, a SiGe epitaxial layer. The present embodiment may employ a selective epitaxial growth method to form the base epitaxial layer 12 in the trench. The selective epitaxial growth method comprises the following steps: any one of molecular beam epitaxy, ultra-high vacuum chemical vapor deposition, low pressure chemical vapor deposition, and reduced pressure chemical vapor deposition. Illustratively, the base epitaxial layer 12 fills the trench and extends over the surface of the substrate 10 on either side of the trench.
In this embodiment, the base epitaxial layer 12 is formed by an in-situ doping method, specifically, a selective epitaxial growth method by reduced pressure chemical vapor deposition is described as an example, which includes:
placing the cleaned substrate 10 with the grooves formed into a reduced pressure chemical vapor deposition reaction cavity, heating and decompressing the reduced pressure chemical vapor deposition reaction cavity, and simultaneously filling hydrogen into the reduced pressure chemical vapor deposition reaction cavity to keep the temperature of the reduced pressure chemical vapor deposition reaction cavity at 550-1100 ℃ and the pressure at 1-20 torr.
And then, filling hydrogen, silicon-based gas, germanium-based gas, doping gas and selective gas into the depressurized chemical vapor deposition reaction cavity until the SiGe epitaxial layer with the expected thickness is obtained. Wherein: the silicon-based gas includes: one or more of SiH 4、SiH2Cl2 and Si 2H6; the germanium-based gas includes: geH 4; the selective gases include: HCl; the doping gas includes: b 2H6、PH3 or AsH 3.
It should be noted that, in other embodiments of the present invention, only the SiGe epitaxial layer may be obtained by using an epitaxial growth method, and then, for example, boron ions may be implanted into the SiGe layer by using an ion implantation method, so as to form the base epitaxial layer 12 of the HBT transistor.
Step S4, forming an outer base region polycrystalline silicon layer 13, wherein the outer base region polycrystalline silicon layer 13 covers the base region epitaxial layer 12 and is provided with an opening positioned above the collector region 11; the sidewalls of the opening form sidewalls 14. Furthermore, an etching barrier layer B, for example, silicon oxide, may be formed between the bottom of the sidewall 14 and the base epitaxial layer 12. Forming an isolation layer A in a region, close to the opening, on the upper surface of the outer base region polysilicon layer 13; the material of the isolation layer a may be a silicon-containing oxide, such as: silicon oxide, silicon oxynitride, oxygen-enriched silicon dioxide, etc., and the formation method can adopt a chemical vapor deposition method. The isolation layer a is used to isolate the emitter polysilicon layer 15 and the outer base polysilicon layer 13 that are formed later. The side wall 14 covers the side wall of the opening of the outer base region polysilicon layer 13 and can also cover the side wall of the isolation layer A. The material of the side wall 14 may be one of silicon oxide, silicon nitride, silicon oxynitride or any combination thereof.
S5, forming a doped emitter region polycrystalline silicon layer 15, wherein the emitter region polycrystalline silicon layer 15 at least fills a window surrounded by the side wall 14 and the base region epitaxial layer 12; the polysilicon layer 15 of the emitter region may be higher than the top end of the sidewall 14 by a predetermined thickness and covers the upper surface of the isolation layer a on both sides of the opening. The emitter polysilicon layer 15 may be formed by chemical vapor deposition, such as low pressure plasma chemical vapor deposition or plasma enhanced chemical vapor deposition.
The emitter polysilicon layer 15 is made of polysilicon or polysilicon silicide, and the formation process can be epitaxial growth method or chemical vapor deposition method. If a chemical vapor deposition method is adopted, an in-situ doping mode can be adopted to introduce N-type ions, such As arsenic (As) ions or phosphorus ions, into the polysilicon layer. In the ion doping process of the polysilicon layer of the emitter region, the doping ions comprise arsenic ions or phosphorus ions. The SiGe HBT transistor is formed, for example, as an NPN.
Step S6, placing the wafer of the substrate 10 with the emitter region polysilicon layer 15 formed and doped with ions into a laser peak annealing machine, carrying out peak annealing treatment on the substrate 10, and introducing O 2 at the initial stage of peak annealing temperature rise to form an oxide layer 16 on the surface of the exposed emitter region polysilicon layer 15. After the exposed emitter polysilicon layer 15 is implanted with N-type ions, a spike anneal process is performed to activate the doped ions. Exemplary O 2 flows are 1000sccm to 3000sccm and oxide layers are 15 angstroms to 80 angstroms thick. The temperature range of the peak annealing treatment is 550-1030 ℃, and the annealing time is 0s. In the peak annealing process, the heating rate ranges from 80 ℃/sec to 260 ℃/sec, and the cooling rate ranges from 50 ℃/sec to 100 ℃/sec. In the spike annealing process, the annealing gas includes at least one of nitrogen and helium. The peak annealing uses laser wavelength of 3000 nm-25000 nm.
FIG. 3 is a graph comparing ion doping concentrations after annealing of actual peaks of oxide layer formed on the surface of polysilicon layer in emitter region and oxide layer not formed. In fig. 3, curve S1 is an ion doping concentration curve after annealing of a measured spike for forming an oxide layer on the surface of the polysilicon layer in the emitter region. In fig. 3, curve S2 is an ion doping concentration curve after annealing of a measured spike in which an oxide layer is not formed on the surface of the polysilicon layer in the emitter region. In the measured data, the ion doping concentration after the measured spike annealing of the curve S1 (with oxide layer) is stabilized at 7.26E20/cm 2, the ion doping concentration after the measured spike annealing of the curve S2 (without oxide layer) is stabilized at 5.07E20/cm 2, and the experimental data shows that the ion doping concentration of the emitter polysilicon layer 15 without oxide layer 16 is about 30% lower than that of the emitter polysilicon layer with oxide layer 16. The oxide layer 16 of the invention avoids the loss of doping ions (such As As) in the emitter polysilicon layer 15 and improves the doping concentration of the emitter polysilicon layer 15.
FIG. 4 is a graph comparing square resistances of emitter polysilicon layers after annealing of actual peaks of oxide layer formed on the surface of emitter polysilicon layer and oxide layer not formed. The first three columns in fig. 4 are measured emitter polysilicon layer square resistances without oxide layer formed on the emitter polysilicon layer surfaces on three different wafers. The next four columns in fig. 4 are measured emitter polysilicon layer square resistances for oxide layers formed on the emitter polysilicon layer surfaces on four different wafers. The test data shows that the square resistance of the oxide layer formed on the surface of the emitter polycrystalline silicon layer is smaller than that of the emitter polycrystalline silicon layer without the oxide layer, and the square resistance is about 280 omega smaller.
In the method for manufacturing the HBT device, after the emitter region polycrystalline silicon layer 15 is formed and ion doping is carried out, spike annealing treatment is carried out on the substrate 10, O 2 is introduced in the initial stage of spike annealing temperature rise so As to form the oxide layer 16 on the surface of the exposed emitter region polycrystalline silicon layer 15, thus the oxide layer 16 can avoid the loss of doping ions (such As As) in the emitter region polycrystalline silicon layer 15, the emitter region polycrystalline silicon layer 15 obtains smaller sheet resistance, the doping concentration of the emitter region polycrystalline silicon layer 15 is improved, and the speed of the HBT device is ensured.
The present invention also provides an HBT device, as shown in fig. 2, comprising:
A substrate 10, a collector region 11 being formed in the substrate 10;
a trench penetrating a portion of the thickness of the substrate 10 and exposing the upper surface of the collector region 11;
A base epitaxial layer 12, the base epitaxial layer 12 filling the trench;
An outer base region polysilicon layer 13, the outer base region polysilicon layer 13 covering the base region epitaxial layer 12 and having an opening above the collector region 11; the side wall of the opening is provided with a side wall 14;
The doped emitter region polysilicon layer 15, wherein the emitter region polysilicon layer 15 at least fills a window surrounded by the side wall 14 and the base region epitaxial layer 12;
Oxide layer 16, oxide layer 16 is located on the upper surface of emitter polysilicon layer 15.
The emitter polysilicon layer 15 is N-doped, and the doping ions include arsenic ions or phosphorus ions. Oxide layer 16 has a thickness of 15 angstroms to 80 angstroms. An etching barrier layer B is further formed between the bottom of the side wall 14 and the base epitaxial layer 12, and the etching barrier layer B is made of silicon oxide, for example.
In summary, the present invention provides an HBT device and a method for manufacturing the HBT device, where the method includes: providing a substrate, and performing ion implantation on the substrate to form a collector region. And etching a part of the thickness of the substrate to form a groove, wherein the upper surface of the collector region is exposed by the groove. And forming a base region epitaxial layer, wherein the base region epitaxial layer fills the groove. Forming an outer base region polysilicon layer which covers the base region epitaxial layer and is provided with an opening positioned above the collector region; the side walls of the openings form side walls. And forming an emitter region polysilicon layer and carrying out ion doping, wherein the emitter region polysilicon layer at least fills a window surrounded by the side wall and the base region epitaxial layer. And (3) carrying out spike annealing treatment on the substrate, introducing O 2 at the initial stage of spike annealing temperature rise to form an oxide layer on the surface of the exposed emitter region polysilicon layer, so that the oxide layer can avoid the loss of doping ions (such As As) in the emitter region polysilicon layer, the emitter region polysilicon layer obtains smaller sheet resistance, the doping concentration of the emitter region polysilicon layer is improved, and the speed of the HBT device is ensured.
In the present specification, each embodiment is described in a progressive manner, and each embodiment is mainly described in a different point from other embodiments, and identical and similar parts between the embodiments are all enough to refer to each other. For the method disclosed in the embodiment, the description is relatively simple since it corresponds to the device disclosed in the embodiment, and the relevant points refer to the description of the method section.
The foregoing description is only illustrative of the preferred embodiments of the present invention, and is not intended to limit the scope of the claims, and any person skilled in the art may make any possible variations and modifications to the technical solution of the present invention using the method and technical content disclosed above without departing from the spirit and scope of the invention, so any simple modification, equivalent variation and modification made to the above embodiments according to the technical matter of the present invention fall within the scope of the technical solution of the present invention.
Claims (10)
1. A method of fabricating an HBT device comprising:
Providing a substrate, and performing ion implantation on the substrate to form a collector region;
Etching a part of the substrate to form a groove, wherein the upper surface of the collector region is exposed by the groove;
forming a base region epitaxial layer, wherein the base region epitaxial layer fills the groove;
Forming an outer base region polysilicon layer which covers the base region epitaxial layer and is provided with an opening positioned above the collector region; the side wall of the opening forms a side wall;
Forming a doped emitter region polysilicon layer, wherein the emitter region polysilicon layer at least fills a window surrounded by the side wall and the base region epitaxial layer;
And carrying out spike annealing treatment on the substrate, and introducing O 2 at the initial stage of spike annealing temperature rise to form an oxide layer on the surface of the exposed emitter polycrystalline silicon layer.
2. The method of fabricating a HBT device according to claim 1 wherein,
The temperature range of the peak annealing treatment is 550-1030 ℃, and the peak annealing time length is set to be 0s.
3. The method of fabricating a HBT device according to claim 2 wherein,
In the peak annealing process, the heating rate ranges from 80 ℃/sec to 260 ℃/sec, and the cooling rate ranges from 50 ℃/sec to 100 ℃/sec.
4. The method of fabricating a HBT device according to claim 1 wherein,
In the spike annealing process, the annealing gas includes at least one of nitrogen and helium.
5. The method of fabricating a HBT device according to claim 1 wherein,
The peak annealing adopts laser wavelength of 3000 nm-25000 nm.
6. The method of fabricating the HBT device of claim 1 wherein said O 2 has a flow of 1000sccm to 3000sccm and said oxide layer has a thickness of 15 angstroms to 80 angstroms.
7. The method of fabricating a HBT device according to claim 1 wherein said dopant ions comprise arsenic ions or phosphorous ions in an ion doping process of said emitter polysilicon layer.
8. The HBT device manufacturing method of claim 1 wherein said base epitaxial layer is formed using a selective epitaxial growth method comprising: any one of molecular beam epitaxy, ultra-high vacuum chemical vapor deposition, low pressure chemical vapor deposition and reduced pressure chemical vapor deposition.
9. An HBT device comprising:
A substrate having a collector region formed therein;
the groove penetrates through part of the thickness of the substrate and exposes the upper surface of the collector region;
the base region epitaxial layer fills the groove;
An outer base region polysilicon layer covering the base region epitaxial layer and having an opening above the collector region; a side wall is formed on the side wall of the opening;
The doped emitter region polycrystalline silicon layer at least fills a window surrounded by the side wall and the base region epitaxial layer;
and the oxide layer is positioned on the upper surface of the polysilicon layer of the emitting area.
10. The method of fabricating the HBT device of claim 9 wherein said emitter polysilicon layer is N-doped, and wherein said dopant ions comprise arsenic ions or phosphorous ions.
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN118335607A true CN118335607A (en) | 2024-07-12 |
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