CN118295938A - Single-bit signal hardware identification method and system with self-adaptive rate - Google Patents
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Abstract
The invention belongs to the technical field of signal hardware identification, and discloses a method and a system for identifying single-bit signal hardware with self-adaptive rate, wherein the method comprises the following steps: the host sends a start code; counting the start code by using a clock CLK, wherein the counter is a counter; the slave samples the data of each bit according to the 1/9 time of the counter, and ensures the correct identification of the data of each bit. The invention can ensure the correct identification of each bit of data according to the rate of the start code during the effective data transmission; the hardware calculation can be realized by using only a shift method, does not need to use a divider, consumes less hardware resources, and is a good single-bit signal hardware identification method with self-adaptive rate.
Description
Technical Field
The invention belongs to the technical field of signal hardware identification, and particularly relates to a method and a system for identifying single-bit signal hardware with self-adaptive rate.
Background
With the rapid development of modern technology, hardware design is increasingly widely applied, and plays a vital role in various fields. Signal processing technology in hardware design is one of the important components of hardware design, and its application is far limited to communication fields, but covers multiple fields such as medical treatment, automobiles, industrial automation, and the like.
The self-adaptive rate single bit signal hardware identification method solves the following technical problems:
1. Signal synchronization problem
In digital communication systems, it is critical to ensure signal synchronization between a sender and a receiver. Different devices or systems have different operating clock frequencies, which directly lead to synchronization problems in the data transmission process. The method establishes a synchronization mechanism by transmitting the start code by the host and counting it by using the clock CLK, and ensures that the sender and the receiver can agree on a time reference when data transmission starts, thereby solving the problem of signal synchronization.
2. Signal sampling rate adaptation problem
Because of the diversity and complexity of hardware devices, different devices transmit data at different rates. The fixed sampling rate cannot be adapted to all conditions, resulting in inaccurate data identification. The method samples the data of each bit according to the 1/9 time of the counter by the slave machine, and realizes the self-adaptive adjustment of the sampling rate. The self-adaptive mechanism can dynamically adjust the sampling rate according to the actual signal rate, and ensures the accurate identification of signals with different rates.
3. Data accuracy problem
In digital communications, ensuring accurate identification of each bit of data is critical to the integrity and accuracy of the information. Conventional fixed sample rate methods can result in erroneous identification of data bits due to clock skew, signal noise, and the like. According to the method, the positions of the sampling points are dynamically adjusted, namely, sampling is carried out at 1/9 time of the counter, so that the influence of the factors is reduced to the greatest extent, and the accurate recognition rate of data is improved.
4. Complexity and cost of hardware implementation
In some existing solutions, to accommodate signals at different rates and to improve accuracy of data identification, complex hardware designs and high performance processors are required, which directly increase the cost and power consumption of the system. The method realizes the self-adaptive identification of the signals through a simple clock counting and sampling point adjusting mechanism, and avoids the requirements of complex hardware and a high-performance processor, thereby realizing the high efficiency and accuracy of the signal identification while reducing the complexity and the cost of the system.
Disclosure of Invention
Aiming at the problems existing in the prior art, the invention provides a method and a system for identifying single-bit signal hardware with self-adaptive rate.
The invention is realized in such a way that the method for identifying the single-bit signal hardware with the self-adaptive rate comprises the following steps:
step one, a host sends a start code;
Step two, counting the start code by using a clock CLK, wherein a counter is counter, and the count value is m;
And thirdly, the slave samples the data of each bit according to the 1/9 time of the counter count value m, and ensures the correct identification of the data of each bit.
Further, the start code is first frame data, 9bit serial data.
Further, the counter counts the start code by using the clock CLK, the counter is a counter, the counter is used as a rate standard of the serial signal, the start code is counted according to the rate of the start code in the subsequent effective data transmission, and if the frequency of the clock CLK is f in the circuit and the start code of 9 bits uses CLK to count counter=m, each bit of data following the start code is transmitted according to 1/9 CLK clock period of m.
Furthermore, the slave samples data of each bit according to 1/9 time of m, 1/9 is about 1/8-1/64+1/512-1/1024+ & gt.+ -. 1/2n, n is a natural number, the number of items needing to be added and subtracted can be set according to the precision required by the system, 1/8, 1/64 and the hardware calculation can be realized by using only a shift method.
Another object of the present invention is to provide an adaptive rate single bit signal hardware identification system, which includes:
the host module is used for sending the start code;
A counting module for counting the start codes using the clock CLK;
The slave module is used for sampling the data of each bit according to the 1/9 time of the counter count value m and ensuring the correct identification of the data of each bit.
It is a further object of the present invention to provide a computer device comprising a memory and a processor, the memory storing a computer program which, when executed by the processor, causes the processor to perform the steps of the adaptive rate single bit signal hardware identification method.
It is a further object of the present invention to provide a computer readable storage medium storing a computer program which, when executed by a processor, causes the processor to perform the steps of the adaptive rate single bit signal hardware identification method.
Another object of the present invention is to provide an information data processing terminal for implementing the adaptive rate single bit signal hardware identification system.
In combination with the technical scheme and the technical problems to be solved, the technical scheme to be protected has the following advantages and positive effects:
Firstly, the invention is carried out according to the rate of the start code during the effective data transmission, so that the correct identification of each bit of data can be ensured; the hardware calculation can be realized by using only a shift method, does not need to use a divider, consumes less hardware resources, and is a good single-bit signal hardware identification method with self-adaptive rate.
The self-adaptive rate single-bit signal hardware identification method provided by the invention realizes the self-adaptive adjustment of the sampling rate by establishing an effective synchronization mechanism, improves the data accurate identification rate, reduces the complexity and cost of hardware implementation, and solves the key technical problem in digital communication.
The expected benefits and commercial values after the technical scheme of the invention is converted are as follows: the patent core technology can be promoted to chip design enterprises needing to use the single-bit signal hardware identification method with the self-adaptive rate, and corresponding fees can be charged in the form of soft IP.
Second, the significant technical progress of the adaptive rate single bit signal hardware identification method provided by the invention is mainly embodied in the following aspects:
1. Adaptive rate capability: the method sends and counts the start code through the host computer, and then adjusts the sampling rate of the slave computer according to the value of the counter, thereby realizing the self-adaptive identification of the single-bit signal. The method can process the input signals with different rates, and improves the flexibility and the universality of the system.
2. And (3) accurate sampling: the method proposes to use 1/9 of the counter value as the time interval for the slave to sample each bit of data, which ensures that each bit of data is accurately identified even in the event of a change in signal rate. The accurate sampling technology reduces the possibility of data errors and improves the accuracy of signal identification.
3. Simplifying hardware design: compared with the traditional method which needs complex circuits and algorithms to realize signal identification, the method has the advantage that hardware design is remarkably simplified through simple counting and sampling logic. This not only reduces the cost, but also improves the reliability of the system.
4. The system efficiency is improved: due to the adoption of the self-adaptive rate and accurate sampling, the system can recognize and process signals more quickly, so that the overall working efficiency is improved. This is particularly important for systems that require high-speed processing of large amounts of data.
5. Easy expansion and maintenance: the modular design of the method makes it easy to expand and maintain. For example, if more signal rates or more complex signal formats need to be supported, only the corresponding modules need to be modified or expanded.
The self-adaptive rate single bit signal hardware identification method provided by the invention has obvious technical progress in the aspects of flexibility, accuracy, hardware design simplification, system efficiency, maintainability and the like.
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FIG. 1 is a flow chart of a method for identifying single-bit signal hardware with self-adaptive rate according to an embodiment of the present invention;
fig. 2 is a block diagram of a single bit signal hardware identification system with adaptive rate according to an embodiment of the present invention.
Detailed Description
The present invention will be described in further detail with reference to the following examples in order to make the objects, technical solutions and advantages of the present invention more apparent. It should be understood that the specific embodiments described herein are for purposes of illustration only and are not intended to limit the scope of the invention.
Example 1: data transmission in a wireless communication device
In a wireless communication device, the transmission rate may change continuously due to environmental interference and signal attenuation. The method for identifying the single-bit signal hardware with the self-adaptive rate can effectively adapt to the rate change and ensure the accuracy of data transmission.
1. A starting stage: a master device (e.g., a smart phone) for wireless communication transmits a predefined start code to a slave device (e.g., a wireless headset).
2. Clock synchronization and sample rate adjustment: the clock signal of the master device is used for counting the transmission time of the start code, and the count value m is determined. The slave device adjusts the data sampling time interval to be 1/9 of m according to the received count value m, so as to ensure that the next data can be accurately sampled.
3. Data transmission and sampling: in the following data transmission process, the slave device samples the data according to the adjusted sampling rate, so as to adapt to possible rate change and ensure accurate receiving of the data.
This method is very effective for improving the reliability of data transmission in wireless communication, especially in a scene where environmental conditions are constantly changing.
Example 2: industrial automation control system
In an industrial automation control system, high-speed and accurate data transmission is required between the sensor and the control unit. Since there may be a large amount of electromagnetic interference in an industrial setting, the transmission rate and quality may be affected.
1. A starting stage: the control unit acts as a master device and sends a start code to the sensor (slave device) to initiate the data transfer process.
2. Rate adaptation and adjustment: the control unit records the transmission time of the start code, calculates the count value m, and informs the sensor through a control signal. The sensor adjusts the data sampling rate of the sensor to be 1/9 of m according to the received count value m.
3. Stable data transmission: in a subsequent data transmission process, the sensor samples the data at the adjusted sampling rate and sends it back to the control unit. The method can ensure accurate identification and transmission of data no matter how the transmission rate changes.
In an industrial automation control system, the self-adaptive rate data transmission method can remarkably improve the stability and reliability of the system, especially in an environment with larger electromagnetic interference. As shown in fig. 1, the method for identifying single-bit signal hardware with self-adaptive rate provided by the embodiment of the invention comprises the following steps:
S101, a host sends a start code;
s102, counting a start code by using a clock CLK, wherein a counter is counter, and the count value is m;
s103, the slave samples the data of each bit according to the 1/9 time of the counter count value m, and ensures the correct identification of the data of each bit.
The adaptive rate single bit signal hardware identification method aims at ensuring the accuracy of data transmission by dynamically adjusting the data sampling rate, and is particularly suitable for communication between master equipment and slave equipment, wherein the transmission rate can be changed due to the environment or the equipment state. The following is a detailed working principle:
Step one: start code transmission
At the beginning of the communication, the master sends a specific start code (start code) to the slave. This boot code is designed to be unique so that the slave can accurately identify the start of a communication while avoiding confusion with normal data transmissions. The transmission of the start code provides a reference basis for subsequent adaptive rate adjustment and data sampling.
Step two: counting and clock synchronization
Using the clock signal CLK, the host counts the transmitted start code, and the counter used in this process is called counter, the count value of which is denoted as m. By counting the transmission time of the start code, important information about the current communication rate can be obtained. The count value m reflects the time required for the start code transmission, which provides a basis for the slave to set the sampling frequency.
Step three: adaptive sampling
The slave sets a sampling strategy according to the count value m obtained in the second step by the host. Specifically, the slave takes 1/9 of the counter count value m as the sampling time interval of each bit data. The ratio of 1/9 is chosen to ensure that during the transmission of each bit the slave can sample the signal at the appropriate moment, thus minimizing sampling errors and ensuring the correct identification of the data. This step is the key to realizing adaptive rate communication, and enables the slave to dynamically adjust the sampling strategy according to the actual transmission rate, thereby improving the flexibility of the system and the accuracy of data transmission.
According to the self-adaptive rate single-bit signal hardware identification method, the start codes are used for synchronizing clocks of the master equipment and the slave equipment at the initial stage of communication, and then the data sampling rate is dynamically adjusted according to the transmission time of the start codes, so that the problem of data identification caused by the change of the transmission rate is effectively solved. The method has the advantage that the method can adapt to different communication rates, ensures accurate identification of data, and is particularly important for hardware systems which can encounter communication rate changes in an operating environment.
The start code provided by the embodiment of the invention is the first frame data and 9bit serial data.
The embodiment of the invention provides a method for counting a start code by using a clock CLK, wherein a counter is used as a counter, so that the counter is used as a rate standard of the serial signal, the start code is counted according to the rate of the start code in the subsequent effective data transmission, the clock CLK is used as f in a circuit, the counter=m is used by the start code of 9 bits, each bit of data following the start code is transmitted according to 1/9 CLK clock cycles of m, for example, the clock CLK is used as 10MHz in the circuit, if the counter= 180,20 is used by the start code of 9 bits, the data following the start code is transmitted according to 2 CLK clock cycles, and the data speed is 5MHz/bit in the case; if a 9bit start code uses CLK count counter=270, 270/9=3, that means that data following the start code is transferred every bit in 3 CLK clock cycles, in which case the data speed is 3.3MHz/bit.
The slave provided by the embodiment of the invention samples the data of each bit according to the 1/9 time of the counter count value m, so that the data of each bit can be ensured to be correctly identified, and the number of items needing to be added and subtracted can be set according to the precision required by the system because 1/9 is about 1/8-1/64+1/512-1/1024+ (+/-) 1/2n and n is a natural number. The hardware calculation 1/8 and 1/64 in the identification method is realized by using only a shift method, a divider is not needed, and the hardware resource consumption is less, so that the identification method is a good single-bit signal hardware identification method with self-adaptive rate.
The single-bit signal hardware identification system with self-adaptive rate provided by the embodiment of the invention comprises the following components:
the host module is used for sending the start code;
A counting module for counting the start codes using the clock CLK;
The slave module is used for sampling the data of each bit according to the 1/9 time of the counter count value m and ensuring the correct identification of the data of each bit.
The method is applied to the design of an SOC chip, the chip is successfully streamed by a 90nm CMOS process, and the test data meets the expectations.
The method for identifying the single-bit signal hardware of the self-adaptive rate, which is provided by the application embodiment of the invention, is applied to computer equipment, wherein the computer equipment comprises a memory and a processor, the memory stores a computer program, and the computer program, when being executed by the processor, causes the processor to execute the steps of the method for identifying the single-bit signal hardware of the self-adaptive rate.
The single-bit signal hardware identification method of the self-adaptive rate, provided by the application embodiment of the invention, is applied to an information data processing terminal, and the information data processing terminal is used for realizing the single-bit signal hardware identification system of the self-adaptive rate.
It should be noted that the embodiments of the present invention can be realized in hardware, software, or a combination of software and hardware. The hardware portion may be implemented using dedicated logic; the software portions may be stored in a memory and executed by a suitable instruction execution system, such as a microprocessor or special purpose design hardware. Those of ordinary skill in the art will appreciate that the apparatus and methods described above may be implemented using computer executable instructions and/or embodied in processor control code, such as provided on a carrier medium such as a magnetic disk, CD or DVD-ROM, a programmable memory such as read only memory (firmware), or a data carrier such as an optical or electronic signal carrier. The device of the present invention and its modules may be implemented by hardware circuitry, such as very large scale integrated circuits or gate arrays, semiconductors such as logic chips, transistors, etc., or programmable hardware devices such as field programmable gate arrays, programmable logic devices, etc., as well as software executed by various types of processors, or by a combination of the above hardware circuitry and software, such as firmware.
The foregoing is merely illustrative of specific embodiments of the present invention, and the scope of the invention is not limited thereto, but any modifications, equivalents, improvements and alternatives falling within the spirit and principles of the present invention will be apparent to those skilled in the art within the scope of the present invention.
Claims (10)
1. A method for identifying single bit signal hardware of self-adaptive rate, comprising:
step one, a host sends a start code;
step two, counting the start code by using a clock CLK, wherein the counter is a counter;
And thirdly, the slave samples the data of each bit according to 1/9 time of the counter, and ensures the correct identification of the data of each bit.
2. The adaptive rate single bit signal hardware identification method of claim 1, wherein the start code is first frame data, 9bit serial data.
3. The adaptive rate single bit signal hardware identification method of claim 1, wherein the counter counts the start code using the clock CLK, the counter is a counter, and the counter is used as a rate standard of the serial signal, the start code is counted according to the rate of the start code during the subsequent valid data transmission, and the data following the start code is transmitted according to m/9 CLK clock cycles assuming that the frequency of the clock CLK is f in the circuit and the start code of 9 bits uses CLK count counter = m.
4. The adaptive rate single bit signal hardware identification method according to claim 1, wherein the slave samples data of each bit according to 1/9 time of counter, 1/9 is about 1/8-1/64+1/512-1/1024+ (+/-) 1/2n, n is a natural number, the number of items to be added and subtracted can be set according to the precision required by the system, and the hardware calculation 1/8, 1/64 is performed by using only a shift method.
5. The adaptive rate single bit signal hardware identification method of claim 1, comprising the steps of: (a) The master sends a unique start code (start code) to the slave for marking the start of communication; (b) Using the clock signal CLK, the host counts the transmitted start code, and records the count value (m) by using a counter (counter) to acquire the information of the current communication rate; (c) The slave sets a sampling strategy according to a count value m acquired by the host, and adopts 1/9 of a counter count value m as a sampling time interval of each bit of data so as to ensure accurate identification of each bit of data; the method synchronizes clocks of the master device and the slave device through the start code, and dynamically adjusts sampling rate according to transmission time of the start code so as to adapt to different communication rates.
6. A system for implementing the adaptive rate single bit signal hardware identification method, the system comprising: (a) The sending module is used for sending the starting code to the slave machine by the host machine; (b) The counting synchronization module is used for counting the transmitted start codes by the host through a clock signal CLK and recording a count value m; (c) The slave sets a sampling strategy according to the count value m, and takes 1/9 of the count value m as the sampling time interval of each bit of data; the system allows the slave to dynamically adjust the sampling strategy according to the actual transmission rate through the self-adaptive adjustment mechanism of the sampling adjustment module, so that high accuracy and adaptability in the data transmission process are realized.
7. A single bit signal hardware identification system implementing an adaptive rate according to any one of claims 1-4, said adaptive rate single bit signal hardware identification system comprising:
the host module is used for sending the start code;
A counting module for counting the start codes using the clock CLK;
The slave module is used for sampling the data of each bit according to the 1/9 time of the counter and ensuring the correct identification of the data of each bit.
8. A computer device comprising a memory and a processor, the memory storing a computer program that, when executed by the processor, causes the processor to perform the steps of the adaptive rate single bit signal hardware identification method of any one of claims 1-5.
9. A computer readable storage medium storing a computer program which, when executed by a processor, causes the processor to perform the steps of the adaptive rate single bit signal hardware identification method of any one of claims 1-5.
10. An information data processing terminal for implementing the adaptive rate single bit signal hardware identification system of claim 6.
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