CN118199602A

CN118199602A - PhotoMOS solid relay

Info

Publication number: CN118199602A
Application number: CN202211610544.0A
Authority: CN
Inventors: 王亚萍; 丁东民
Original assignee: CRM ICBG Wuxi Co Ltd
Current assignee: CRM ICBG Wuxi Co Ltd
Priority date: 2022-12-14
Filing date: 2022-12-14
Publication date: 2024-06-14

Abstract

The invention provides an optical MOS solid relay, wherein a control circuit comprises a photoelectric tube, a diode, a silicon controlled rectifier bleeder circuit and an MOS tube bleeder circuit; the silicon controlled rectifier bleeder circuit and the MOS tube bleeder circuit are connected between the grid sources of the rear-stage output power device and between the second end of the photoelectric tube and the anode of the diode, the first end of the photoelectric tube is connected with the first end of the photoelectric conversion circuit, and the cathode of the diode is connected with the second end of the photoelectric conversion circuit; the silicon controlled rectifier release loop and the MOS tube release loop are used for being closed when illumination exists, and are opened when no illumination exists; the opening speed of the MOS tube bleeder circuit is faster than that of the thyristor bleeder circuit, and after the MOS tube bleeder circuit is opened, the grid potential of the output power device is pulled to a fixed potential. The invention solves the problems that the output is turned on by mistake after being interfered and the turn-off time is increased rapidly along with illumination enhancement when the existing photo MOS solid relay does not have illumination.

Description

PhotoMOS solid relay

Technical Field

The invention relates to the technical field of integrated circuit design, in particular to a photo MOS solid relay.

Background

The optical MOS solid relay is a device integrating a light emitting device, a light receiving device and an output power device, signals can be transmitted through optical signals, the on and off of the output power device are controlled through controlling the on-off of the optical signals, and the input side and the output side are electrically insulated.

The single-channel normally-on photo-MOS solid relay is formed by combining and packaging a light-emitting diode (LED), a photo-generated voltage device (PVG, photovoltaic generator) and two N-channel enhanced MOSFETs. The PVG control circuit in the current fast photo-MOS solid relay in the market mostly adopts triode or diode, when no illumination is carried out, after the charge of the MOSFET grid is discharged, the triode or diode is in a cut-off state. Because the output end of PVG is connected between the gate and the source of MOSFET, when no illumination exists, there is no low-resistance channel between the gate and the source of MOSFET, and if the PVG is disturbed and the amplitude is higher than the threshold value of MOSFET, MOSFET will be conducted, resulting in misconduction of photo MOS solid relay.

In addition, the photosensitive element of the photo-generated voltage device is a photodiode, the photo-generated voltage of the photo-generated voltage device increases along with the increase of illumination, which is a characteristic of the photo-generated voltage device, but since the PVG control circuit is in an off state when the photo-MOS solid relay is in illumination, the photo-generated voltage of the photo-generated voltage device also increases along with the increase of illumination, which can cause the MOSFET gate capacitance to store more charges, so that the turn-off time of the photo-MOS solid relay is prolonged, which is a phenomenon that most photo-MOS solid relays exist.

Disclosure of Invention

In view of the above-mentioned drawbacks of the prior art, an object of the present invention is to provide a photo-MOS solid relay, which is used for solving the problems that the output is turned on by mistake after being disturbed and the turn-off time is increased rapidly with the illumination enhancement when the existing photo-MOS solid relay is not illuminated.

To achieve the above and other related objects, the present invention provides a photomos solid state relay comprising:

The photo-generated voltage device comprises a photoelectric conversion circuit and a control circuit; the control circuit comprises a photoelectric tube, a diode, a silicon controlled rectifier bleeder circuit and a MOS tube bleeder circuit;

The silicon controlled rectifier bleeder circuit and the MOS tube bleeder circuit are connected between gate sources of the rear-stage output power device and between the second end of the photoelectric tube and the anode of the diode, the first end of the photoelectric tube is connected with the first end of the photoelectric conversion circuit, and the cathode of the diode is connected with the second end of the photoelectric conversion circuit;

The thyristor bleeder circuit and the MOS tube bleeder circuit are used for being closed when illumination exists, and being opened when no illumination exists; the opening speed of the MOS tube bleeder circuit is faster than that of the thyristor bleeder circuit, and after the MOS tube bleeder circuit is opened, the grid potential of the output power device is pulled to a fixed potential.

Optionally, the thyristor bleeder circuit comprises a PNP triode and a first NPN triode;

The base electrode of the PNP triode is connected with the collector electrode of the first NPN triode and the second end of the photoelectric tube, the emitter electrode of the PNP triode is connected with the first end of the photoelectric tube and the grid electrode of the output power device, and the collector electrode of the PNP triode is connected with the base electrode of the first NPN triode;

And the base electrode of the first NPN triode is connected with the cathode of the diode, and the emitter is connected with the anode of the diode and the source electrode of the output power device.

Optionally, the control circuit further includes a second resistor connected between the base of the first NPN transistor and the cathode of the diode.

Optionally, the MOS transistor bleeder circuit includes a first resistor and a depletion NMOS transistor;

the first end of the first resistor is connected with the second end of the photoelectric tube, and the second end of the first resistor is connected with the anode of the diode;

the grid electrode of the depletion type NMOS tube is connected with the second end of the first resistor and the source electrode of the output power device, the source electrode is connected with the first end of the first resistor, and the drain electrode is connected with the first end of the photoelectric tube and the grid electrode of the output power device.

Optionally, the control circuit further includes a second NPN transistor having a base connected to an emitter thereof and connected to a gate of the depletion NMOS transistor, and a collector connected to a drain of the depletion NMOS transistor.

Optionally, the phototube comprises a photodiode or a phototriode, wherein the phototriode comprises an NPN phototriode or a PNP phototriode.

The invention also provides a photo-MOS solid relay, which comprises:

the photo-generated voltage device comprises a photoelectric conversion circuit and a control circuit; the control circuit comprises a resistor, a diode, a thyristor bleeder circuit and a MOS tube bleeder circuit;

The silicon controlled rectifier bleeder circuit and the MOS tube bleeder circuit are connected between the gate source of the rear-stage output power device and between the cathode of the diode and the second end of the resistor; the anode of the diode is connected with the first end of the resistor and the first end of the photoelectric conversion circuit;

The base electrode of the PNP triode is connected with the collector electrode of the first NPN triode and the anode of the diode, the emitter electrode of the PNP triode is connected with the cathode of the diode and the grid electrode of the output power device, and the collector electrode of the PNP triode is connected with the base electrode of the first NPN triode and the second end of the resistor;

And the emitter of the first NPN triode is connected with the second end of the photoelectric conversion circuit and the source electrode of the output power device.

Optionally, the MOS transistor bleeder circuit includes a phototransistor and a depletion NMOS transistor;

The first end of the photoelectric tube is connected with the second end of the resistor, and the second end of the photoelectric tube is connected with the second end of the photoelectric conversion circuit;

the grid electrode of the depletion type NMOS tube is connected with the first end of the photoelectric tube, the source electrode of the depletion type NMOS tube is connected with the second end of the photoelectric tube and connected with the source electrode of the output power device, and the drain electrode of the depletion type NMOS tube is connected with the cathode of the diode and connected with the grid electrode of the output power device.

Optionally, the control circuit further includes a second NPN transistor having a base connected to an emitter thereof and connected to a source of the depletion NMOS transistor and a collector connected to a drain of the depletion NMOS transistor.

As described above, the design of the thyristor bleeder circuit and the MOS tube bleeder circuit in the control circuit can prevent the problem of false conduction after the photo MOS solid relay is interfered when no illumination exists, and meanwhile, the turn-off time of the photo MOS solid relay can not be rapidly increased along with the illumination enhancement, so that the purpose of improving the performance and the reliability is achieved on the premise of not increasing the cost.

Drawings

Fig. 1 is a schematic circuit diagram of an photomos solid state relay according to an embodiment of the invention.

Fig. 2 shows a schematic circuit diagram of the addition of a second resistor to the circuit of fig. 1.

Fig. 3 is a schematic circuit diagram of a photomos solid state relay according to a second embodiment of the present invention.

Fig. 4 is a schematic circuit diagram of the photomos solid state relay shown in fig. 1 when the photomos solid state relay includes only the thyristor bleeding circuit.

Fig. 5 is a schematic diagram showing a photo-generated voltage waveform of the photo-MOS solid state relay shown in fig. 1 under specific interference in the absence of illumination.

Fig. 6 is a schematic diagram showing a photo-generated voltage waveform of the photo-MOS solid state relay shown in fig. 3 under specific interference in the absence of illumination.

Fig. 7 is a schematic diagram showing a photo-generated voltage waveform of the photomos solid state relay shown in fig. 4 under specific interference in the absence of illumination.

Fig. 8 is a schematic diagram showing the variation of the turn-off time with the illumination intensity in the schemes shown in fig. 1,3 and 4.

Description of element reference numerals

100. Light emitting device

110. Light emitting diode

200. Photo-generated voltage device

210. Photoelectric conversion circuit

211. Photodiode having a high-k-value transistor

220. Control circuit

220A thyristor bleeder circuit

220B MOS tube bleeder circuit

221 PNP type triode

222. First NPN triode

223. Photoelectric tube

224. First resistor/resistor

225. Diode

226. Depletion type NMOS (N-channel Metal oxide semiconductor) tube

227. Second NPN triode

228. Second resistor

300. Output power device

310. First power device

320. Second power device

Detailed Description

Other advantages and effects of the present invention will become apparent to those skilled in the art from the following disclosure, which describes the embodiments of the present invention with reference to specific examples. The invention may be practiced or carried out in other embodiments that depart from the specific details, and the details of the present description may be modified or varied from the spirit and scope of the present invention.

Please refer to fig. 1 to 8. It should be noted that, the illustrations provided in the present embodiment are merely schematic illustrations of the basic concepts of the present invention, and only the components related to the present invention are shown in the illustrations, rather than being drawn according to the number, shape and size of the components in actual implementation, and the form, number and proportion of each component in actual implementation may be arbitrarily changed, and the layout of the components may be more complex.

Example 1

As shown in fig. 1, the present embodiment provides a photomos solid state relay including: a photo-generated voltage device 200; further, the method further comprises the following steps: the light emitting device 100 and the output power device 300.

The light emitting device 100 is used to generate illumination.

As an example, the light emitting device 100 includes a light emitting diode 110, wherein an anode of the light emitting diode 110 serves as a first terminal PIN1 of the photo MOS solid state relay and a cathode serves as a second terminal PIN2 of the photo MOS solid state relay. When current is injected into the first end PIN1 and the second end PIN2, the light emitting diode 110 emits light and generates illumination; when no current is injected or current injection is stopped at the first end PIN1 and the second end PIN2, the light emitting diode 110 does not emit light, and no illumination is generated at this time.

The photo-generated voltage device 200 includes: the photoelectric conversion circuit 210 and the control circuit 220, the control circuit 220 is connected to both ends of the photoelectric conversion circuit 210. Wherein,

The photoelectric conversion circuit 210 is used for converting an optical signal into an electrical signal and generating a photo-generated voltage when light is applied.

As an example, the photoelectric conversion circuit 210 includes: a plurality of photodiodes 211 are connected in series, wherein an anode of the series array of photodiodes is used as a first end of the photoelectric conversion circuit 210, and a cathode of the series array of photodiodes is used as a second end of the photoelectric conversion circuit 210. When the light emitting device 100 generates illumination, the plurality of photodiodes 211 receive the illumination and convert the light signal into an electrical signal to generate a photo-generated voltage. In practical applications, the number of series connection of the photodiodes 211 depends on the photo-generated voltage value, and should be determined by specific requirements.

Taking the example that the photoelectric conversion circuit 210 includes N (N > 1) photodiodes 211, the cathode of the first photodiode 211 is connected to the anode of the second photodiode 211, the cathode of the second photodiode 211 is connected to the anode of the third photodiode 211, and so on, the cathode of the (N-1) th photodiode 211 is connected to the anode of the nth photodiode 211, at this time, the N photodiodes 211 form a photodiode serial array, the anode of the first photodiode 211 serves as the anode of the photodiode serial array, and the cathode of the nth photodiode 211 serves as the cathode of the photodiode serial array.

The control circuit 220 includes a photo-diode 223, a diode 225 (i.e. a common diode), a thyristor bleeder circuit 220a and a MOS transistor bleeder circuit 220b, wherein the thyristor bleeder circuit 220a and the MOS transistor bleeder circuit 220b are connected between the gate and the source of the post-stage output power device 300 and between the second end of the photo-diode 223 and the anode of the diode 225, the first end of the photo-diode 223 is connected with the first end of the photoelectric conversion circuit 210, and the cathode of the diode 225 is connected with the second end of the photoelectric conversion circuit 210; the thyristor bleeder circuit 220a and the MOS transistor bleeder circuit 220b are configured to be turned off when there is illumination, and turned on when there is no illumination, wherein the turn-on speed of the MOS transistor bleeder circuit 220b is faster than the turn-on speed of the thyristor bleeder circuit 220a, and the gate potential of the output power device 300 is pulled to a fixed potential after the MOS transistor bleeder circuit 220b is turned on.

As an example, the thyristor bleeder circuit 220a comprises a PNP transistor 221 and a first NPN transistor 222; the base electrode of the PNP triode 221 is connected with the collector electrode of the first NPN triode 222 and is connected with the second end of the photoelectric tube 223, the emitter electrode of the PNP triode 221 is connected with the first end of the photoelectric tube 223 and is connected with the grid electrode of the output power device 300, and the collector electrode of the PNP triode is connected with the base electrode of the first NPN triode 222; the base of the first NPN transistor 222 is connected to the cathode of the diode 225, and the emitter is connected to the anode of the diode 225 and to the source of the output power device 300.

The MOS transistor bleeder circuit 220b includes a first resistor 224 and a depletion NMOS transistor 226; the first end of the first resistor 224 is connected to the second end of the photoelectric tube 223, and the second end is connected to the anode of the diode 225; the gate of the depletion NMOS tube 226 is connected to the second end of the first resistor 224 and the source of the output power device 300, the source is connected to the first end of the first resistor 224, and the drain is connected to the first end of the photocell 223 and to the gate of the output power device 300. In practice, the substrate of depletion NMOS 226 is connected to its source.

Wherein, the first end of the photo-transistor 223 is connected to the emitter of the PNP transistor 221 and the drain of the depletion type NMOS transistor 226 and is used as the first end of the control circuit 220 to connect to the gate of the output power device 300; the anode of the diode 225 is connected to the emitter of the first NPN transistor 222 and the gate of the depletion NMOS transistor 226 and is used as the second terminal of the control circuit 220 to connect to the source of the output power device 300.

Specifically, the photodiode 223 includes a photodiode or a phototransistor, wherein the phototransistor includes an NPN type phototransistor or a PNP type phototransistor. For phototriodes (including both NPN phototriodes and PNP phototriodes), the base electrode of the phototriodes can be led out or not; if not, the phototriode only has an emitter and a collector; if the current is led out, the base electrode and the emitter electrode are short-circuited in application; therefore, when the connection relation of the related phototriodes is described below, only the emitter and the collector are described, and whether the base is led out or not has no substantial influence on the embodiment.

When the photodiode 223 includes photodiodes, the number of photodiodes may be 1 or plural (i.e., greater than 1); when the number of photodiodes is 1, the cathode of the photodiode is used as a first end of the photodiode 223, and the anode is used as a second end of the photodiode 223; when the number of photodiodes is greater than 1, the plurality of photodiodes are connected in series, taking the number of photodiodes equal to X as an example, the cathode of the first photodiode is used as the first end of the photodiode 223, the anode of the first photodiode is connected with the cathode of the second photodiode, the anode of the second photodiode is connected with the cathode of the third photodiode, and so on, the anode of the (X-1) th photodiode is connected with the cathode of the X-th photodiode, and the anode of the X-th photodiode is used as the second end of the photodiode 223.

When the phototube 223 includes NPN phototriodes, the number of NPN phototriodes may be 1 or more (i.e., greater than 1); when the number of NPN type phototriodes is 1, the collector of the NPN type phototriodes is the first end of the phototube 223, and the emitter is the second end of the phototube 223; when the number of NPN phototriodes is greater than 1, the NPN phototriodes are connected in series, taking the case that the number of NPN phototriodes is equal to Y, the collector of the first NPN phototriode is used as the first end of the phototriode 223, the emitter of the first NPN phototriode is connected with the collector of the second NPN phototriode, the emitter of the second NPN phototriode is connected with the collector of the third NPN phototriode, and so on, the emitter of the (Y-1) th NPN phototriode is connected with the collector of the Y NPN phototriode, and the emitter of the Y NPN phototriode is used as the second end of the phototriode 223.

When the phototube 223 includes PNP phototriodes, the number of PNP phototriodes may be 1 or more (i.e., greater than 1); when the number of PNP type phototriodes is 1, the emitter of the PNP type phototriodes is used as the first end of the phototube 223, and the collector is used as the second end of the phototube 223; when the number of PNP type phototriodes is greater than 1, the plurality of PNP type phototriodes are connected in series, and taking the case that the number of PNP type phototriodes is equal to Z, the emitter of the first PNP type phototriodes is used as the first end of the phototriodes 223, the collector of the first PNP type phototriodes is connected with the emitter of the second PNP type phototriodes, the collector of the second PNP type phototriodes is connected with the emitter of the third PNP type phototriodes, and so on, the collector of the (Z-1) th PNP type phototriodes is connected with the emitter of the Z th PNP type phototriodes, and the collector of the Z th PNP type phototriodes is used as the second end of the phototriodes 223.

In practical applications, the number of photodiodes, NPN type photodiodes or PNP type photodiodes in the photodiode 223 depends on the turn-off condition of the PNP type transistor 221, so that the voltage drop across the photodiode 223 can turn off the PNP type transistor 221 in the presence of light. Of course, the photocell 223 may be a photoelectric conversion device other than a photodiode, an NPN type phototransistor, or a PNP type phototransistor, which has no substantial influence on the present embodiment.

In this example, when there is illumination, a photo-generated voltage is generated at two ends of the photo-transistor 223 (the direction of the photo-generated voltage is that the second end of the photo-transistor 223 is positive, and the first end is negative), the photo-generated voltage is used as Vbe of the PNP transistor 221, and the base voltage of the PNP transistor 221 is higher than the emitter voltage, so that the PNP transistor 221 is in the off state; the photo-generated current of the photodiode 223 flows from the first end to the second end, so that a current flows from the photodiode 223 through the first resistor 224 to the diode 225, the photo-generated current makes the diode 225 forward biased, and since the diode 225 is connected in parallel to two ends of the emitter junction of the first NPN triode 222, the forward bias voltage drop of the diode 225 will cause the emitter junction of the first NPN triode 222 to reverse bias, so that the first NPN triode 222 is in a cut-off state; at this time, the thyristor bleeder circuit 220a consisting of the PNP transistor 221 and the first NPN transistor 222 is turned off. In addition, the voltage drop of the photo-generated current of the photo-transistor 223 on the first resistor 224 is larger than the absolute value of the threshold voltage of the depletion type NMOS 226, so that the depletion type NMOS 226 is turned off, and at this time, the MOS transistor bleeder circuit 220b formed by the depletion type NMOS 226 and the first resistor 224 is turned off. Thus, the photoelectric conversion circuit 210 drives the output power device 300 of the subsequent stage with a stable photo-generated voltage, and charges the parasitic gate capacitance of the output power device 300 to turn on the output power device 300, thereby turning on the photomos solid state relay.

Once the light is not illuminated, the photo tube 223 is free from generating current, the base potential of the PNP type triode 221 is pulled down by the first resistor 224 and is lower than the conducting voltage drop of the PN junction of the emitter, so that the PNP type triode 221 is conducted, the collector current of the PNP type triode 221 is used as the base current of the first NPN type triode 222, so that the first NPN type triode 222 is conducted, and at this time, the thyristor bleeder circuit 220a formed by the PNP type triode 221 and the first NPN type triode 222 is opened, wherein the PNP type triode 221 and the first NPN type triode 222 form positive feedback. In addition, when no light is applied, the gate-source voltage of the depletion type NMOS 226 is rapidly reduced, so that the depletion type NMOS 226 is rapidly turned on, and at this time, the MOS transistor bleeder circuit 220b formed by the depletion type NMOS 226 and the first resistor 224 is turned on. Therefore, the charge on the parasitic gate capacitance of the output power device 300 is discharged based on the thyristor discharge loop 220a and the MOS transistor discharge loop 220b, and finally the output power device 300 is turned off, so that the photo MOS solid relay is turned off.

In this example scheme, the MOS transistor bleeder circuit 220b has the following advantages: when no illumination exists, the conducted depletion type NMOS tube 226 can reduce the impedance between the grid sources of the output power device 300, which is equivalent to arranging a resistor between the grid sources of the output power device 300, so that the grid sources of the output power device 300 are connected through the resistor, and the grid is also fixed potential and is not unstable because the source is fixed potential, thereby remarkably enhancing the anti-interference performance and avoiding the occurrence of false conduction after the photo MOS solid relay is interfered when no illumination exists. Secondly, when the illumination is stronger, the more minority carriers are accumulated in the space charge region of the photocell 223, and when the illumination is turned off, the photocell 223 has a relaxation process and takes longer time to turn off, which affects the response speed of the PNP triode 221; the MOS transistor bleeding circuit 220b is not affected by the phototube 223, and can respond quickly at the moment of turning off the illumination, so that the turn-off time of the photomos solid relay is not increased quickly along with the enhancement of the illumination, and the influence of the illumination on the turn-off time is greatly reduced.

Further, as shown in fig. 1, the control circuit 220 further includes a second NPN transistor 227 having a base connected to an emitter thereof and to a gate of the depletion NMOS 226, and a collector connected to a drain of the depletion NMOS 226; the second NPN transistor 227 serves as an ESD protection tube, which can improve the practicality and reliability of the photomos solid relay.

Further, as shown in fig. 2, the control circuit 220 further includes a second resistor 228 connected between the base of the first NPN transistor 222 and the cathode of the diode 225, which has no substantial effect on the present exemplary embodiment.

The output power device 300 is connected to two ends of the control circuit 220 and is used for driving a subsequent load; the output power device 300 includes a power MOS transistor.

For example, when the thyristor bleeder circuit 220a and the MOS transistor bleeder circuit 220b are closed, the parasitic gate capacitor of the output power device 300 is charged based on the photo-generated voltage generated by the photoelectric conversion circuit 210, so that the output power device 300 is turned on, and the photo-MOS solid relay is turned on to drive the subsequent load; when the thyristor bleeder circuit 220a and the MOS transistor bleeder circuit 220b are turned on, the parasitic gate capacitance of the output power device 300 is discharged based on the thyristor bleeder circuit 220a and the MOS transistor bleeder circuit 220b, so that the output power device 300 is turned off, thereby turning off the photomos solid relay, and stopping driving the subsequent load.

As an example, as shown in fig. 1, the output power device 300 includes a first power device 310 and a second power device 320, where a gate of the first power device 310 is connected to a gate of the second power device 320 and is connected to a first end of the control circuit 220, a source of the first power device 310 is connected to a source of the second power device 320 and is connected to a second end of the control circuit 220, a drain of the first power device 310 is used as a third end PIN3 of the optical MOS solid relay, and a drain of the second power device 320 is used as a fourth end PIN4 of the optical MOS solid relay; the first power device 310 and the second power device 320 are NMOS transistors, and typically, enhancement NMOS transistors are selected, however, depletion NMOS transistors may also be selected, which has no substantial effect on the present embodiment. In practical applications, the substrate of the first power device 310 is connected to its source, and the substrate of the second power device 320 is connected to its source.

Example two

As shown in fig. 3, the difference between the present embodiment and the first embodiment is the control circuit 220, so the present embodiment only describes the control circuit 220, and other parts will not be described, and the related content can be seen in the first embodiment. Wherein,

The control circuit 220 includes a resistor 224, a diode 225 (i.e., a common diode), a thyristor bleeder circuit 220a, and a MOS transistor bleeder circuit 220b; the thyristor bleeder circuit 220a and the MOS transistor bleeder circuit 220b are connected between the gate and source of the rear-stage output power device 300, and between the cathode of the diode 225 and the second end of the resistor 224; an anode of the diode 225 is connected to the first terminal of the resistor 224 and to the first terminal of the photoelectric conversion circuit 210; the thyristor bleeder circuit 220a and the MOS transistor bleeder circuit 220b are configured to be turned off when there is illumination, and turned on when there is no illumination; the opening speed of the MOS transistor bleeder circuit 220b is faster than that of the thyristor bleeder circuit 220a, and after the MOS transistor bleeder circuit 220b is opened, the gate potential of the output power device 300 is pulled to a fixed potential.

As an example, the thyristor bleeder circuit 220a comprises a PNP transistor 221 and a first NPN transistor 222; the base electrode of the PNP triode 221 is connected with the collector electrode of the first NPN triode 222 and is connected with the anode of the diode 225, the emitter electrode is connected with the cathode of the diode 225 and is connected with the grid electrode of the output power device 300, and the collector electrode is connected with the base electrode of the first NPN triode 222 and the second end of the resistor 224; an emitter of the first NPN transistor 222 is connected to the second terminal of the photoelectric conversion circuit 210 and to the source of the output power device 300.

The MOS transistor bleeder circuit 220b includes a phototransistor 223 and a depletion NMOS 226; the first end of the photoelectric tube 223 is connected with the second end of the resistor 224, and the second end of the photoelectric conversion circuit 210 is connected with the second end; the depletion NMOS 226 has a gate connected to the first terminal of the photodiode 223, a source connected to the second terminal of the photodiode 223 and to the source of the output power device 300, and a drain connected to the cathode of the diode 225 and to the gate of the output power device 300. In practice, the substrate of depletion NMOS 226 is connected to its source.

Wherein, the cathode of the diode 225 is connected to the emitter of the PNP transistor 221 and the drain of the depletion NMOS transistor 226 and is used as the first end of the control circuit 220 to connect to the gate of the output power device 300; an emitter of the first NPN transistor 222 is connected to a source of the depletion NMOS 226 and serves as a second terminal of the control circuit 220 for connecting to a source of the output power device 300.

Specifically, the photodiode 223 includes a photodiode or a phototransistor, and the phototransistor includes an NPN type phototransistor or a PNP type phototransistor. The number and connection design of the photodiodes or the photodiodes are the same as those of the first embodiment, and the related contents are referred to above, and will not be repeated here. In practical applications, the number of photodiodes, NPN type photodiodes or PNP type photodiodes in the photodiode 223 depends on the threshold voltage of the depletion type NMOS 226, so that the voltage drop across the photodiode 223 can turn off the depletion type NMOS 226 in the presence of light. Of course, the photocell 223 may be a photoelectric conversion device other than a photodiode, an NPN type phototransistor, or a PNP type phototransistor, which has no substantial influence on the present embodiment.

In this example, when there is illumination, a photo-generated voltage is generated at two ends of the photo-transistor 223 (the direction of the photo-generated voltage is that the second end of the photo-transistor 223 is positive, and the first end is negative), and since the photo-transistor 223 is connected in parallel to two ends of the emitter junction of the first NPN transistor 222, the photo-generated voltage makes the emitter junction of the first NPN transistor 222 reversely biased, so that the first NPN transistor 222 is in the off state; when the light is illuminated, the diode 225 is forward biased, and the diode 225 is connected in parallel with the two ends of the emitter junction of the PNP type triode 221, so that the emitter junction of the PNP type triode 221 is reverse biased, and the PNP type triode 221 is in a cut-off state; at this time, the thyristor bleeder circuit 220a consisting of the PNP transistor 221 and the first NPN transistor 222 is turned off. In addition, when the light is irradiated, the photo-generated voltage of the photocell 223 is larger than the absolute value of the threshold voltage of the depletion type NMOS 226, and the depletion type NMOS 226 is in the off state, and at this time, the MOS transistor bleeder circuit 220b formed by the depletion type NMOS 226 and the photocell 223 is turned off. Thus, the photoelectric conversion circuit 210 drives the output power device 300 of the subsequent stage with a stable photo-generated voltage, and charges the parasitic gate capacitance of the output power device 300 to turn on the output power device 300, thereby turning on the photomos solid state relay.

Once the light is not illuminated, the photoelectric tube 223 does not generate current, the base potential of the first NPN triode 222 is pulled up through the resistor 224 and is higher than the emitter thereof by a PN junction conduction voltage drop, so that the first NPN triode 222 is turned on; the collector current of the first NPN transistor 222 is used as the base current of the PNP transistor 221, so that the PNP transistor 221 is also turned on, and at this time, the thyristor bleeder circuit 220a formed by the PNP transistor 221 and the first NPN transistor 222 is turned on, wherein the PNP transistor 221 and the first NPN transistor 222 form positive feedback. In addition, when no light is applied, the gate-source voltage of the depletion type NMOS 226 is rapidly reduced, so that the depletion type NMOS 226 is rapidly turned on, and at this time, the MOS transistor bleeder circuit 220b formed by the depletion type NMOS 226 and the phototransistor 223 is turned on. Therefore, the charge on the parasitic gate capacitance of the output power device 300 is discharged based on the thyristor discharge loop 220a and the MOS transistor discharge loop 220b, and finally the output power device 300 is turned off, so that the photo MOS solid relay is turned off.

In this example scheme, the MOS transistor bleeder circuit 220b has the following advantages: when no illumination exists, the conducted depletion type NMOS tube 226 can reduce the impedance between the grid sources of the output power device 300, which is equivalent to arranging a resistor between the grid sources of the output power device 300, so that the grid sources of the output power device 300 are connected through the resistor, and the grid is also fixed potential and is not unstable because the source is fixed potential, thereby remarkably enhancing the anti-interference performance and avoiding the occurrence of false conduction after the photo MOS solid relay is interfered when no illumination exists. Secondly, when the light is stronger, the more minority carriers are accumulated in the space charge region of the photocell 223, and when the light is turned off, the photocell 223 has a relaxation process and takes longer time to turn off, which affects the response speed of the first NPN triode 222; the MOS transistor bleeding circuit 220b is not affected by the phototube 223, and can respond quickly at the moment of turning off the illumination, so that the turn-off time of the photomos solid relay is not increased quickly along with the enhancement of the illumination, and the influence of the illumination on the turn-off time is greatly reduced.

Further, as shown in fig. 3, the control circuit 220 further includes a second NPN transistor 227 having a base connected to an emitter thereof and to a source of the depletion NMOS 226, and a collector connected to a drain of the depletion NMOS 226; the second NPN transistor 227 serves as an ESD protection tube, which can improve the practicality and reliability of the photomos solid relay.

The following describes the performance of the photomos solid state relay of the present embodiment with reference to fig. 5 to 8, taking the scheme shown in fig. 1 as example 1, the scheme shown in fig. 3 as example 2, and the scheme shown in fig. 4 as comparative example.

In the absence of illumination, comparative tests were performed on example 1, example 2 and comparative example under the same interference, the test results are shown in fig. 5 to 7, the photo-generated voltage fluctuation of example 1 is 0.24V (shown in fig. 5), the photo-generated voltage fluctuation of example 2 is 0.28V (shown in fig. 6), and the photo-generated voltage fluctuation of comparative example is 1.36V (shown in fig. 7); therefore, the photo-generated voltage fluctuation of the photo-MOS solid relay of the embodiment is far lower than the absolute value of the threshold voltage of the output power device 300 after being interfered when no illumination is provided, and the problem of erroneous conduction does not occur, while the photo-generated voltage fluctuation of the photo-MOS solid relay of the comparative example is close to the absolute value of the threshold voltage of the output power device 300 after being interfered when no illumination is provided, and the risk of erroneous conduction is generated when stronger interference is provided.

Comparative tests were performed on example 1, example 2 and comparative example under the same illumination intensity, and the test results are shown in fig. 8, in which the turn-off times of the three are not greatly different under weak illumination, but the increase in turn-off time of example 1 and example 2 is significantly reduced under strong illumination; therefore, the turn-off time of the photomos solid relay of the embodiment cannot be rapidly increased along with the illumination enhancement, and the influence of illumination on the turn-off time can be effectively reduced.

In summary, according to the photoMOS solid relay disclosed by the invention, through the design of the thyristor release loop and the MOS tube release loop in the control circuit, the problem of false conduction after the photoMOS solid relay is interfered when no illumination exists can be solved, meanwhile, the turn-off time of the photoMOS solid relay can not be rapidly increased along with illumination enhancement, and the purposes of improving the performance and the reliability are achieved on the premise of not increasing the cost. Therefore, the invention effectively overcomes various defects in the prior art and has high industrial utilization value.

The above embodiments are merely illustrative of the principles of the present invention and its effectiveness, and are not intended to limit the invention. Modifications and variations may be made to the above-described embodiments by those skilled in the art without departing from the spirit and scope of the invention. Accordingly, it is intended that all equivalent modifications and variations of the invention be covered by the claims, which are within the ordinary skill of the art, be within the spirit and scope of the present disclosure.

Claims

1. A photomos solid state relay, the photomos solid state relay comprising:

2. The photomos solid state relay of claim 1 wherein the thyristor bleed circuit comprises a PNP transistor and a first NPN transistor;

3. The photomos solid state relay of claim 2, wherein the control circuit further comprises a second resistor connected between the base of the first NPN transistor and the cathode of the diode.

4. A photomos solid state relay according to any one of claims 1-3, wherein the MOS transistor bleed loop comprises a first resistor and a depletion NMOS transistor;

5. The photomos solid state relay of claim 4, wherein the control circuit further comprises a second NPN transistor having a base connected to an emitter thereof and to a gate of the depletion NMOS transistor and a collector connected to a drain of the depletion NMOS transistor.

6. The photomos solid state relay of claim 1, wherein the photo-transistor comprises a photodiode or a phototransistor, wherein the phototransistor comprises an NPN phototransistor or a PNP phototransistor.

7. A photomos solid state relay, the photomos solid state relay comprising:

8. The photomos solid state relay of claim 7 wherein the thyristor bleed circuit comprises a PNP transistor and a first NPN transistor;

9. The photomos solid state relay of claim 7 or 8, wherein the MOS transistor bleed loop comprises a phototransistor and a depletion NMOS transistor;

10. The photomos solid state relay of claim 9, wherein the control circuit further comprises a second NPN transistor having a base connected to an emitter thereof and to a source of the depletion NMOS transistor and a collector connected to a drain of the depletion NMOS transistor.

11. The photomos solid state relay of claim 9, wherein the photo-transistor comprises a photodiode or a phototransistor, wherein the phototransistor comprises an NPN phototransistor or a PNP phototransistor.