CN118170436A - Method, device, equipment and storage medium for constructing instruction dependency relationship - Google Patents

Method, device, equipment and storage medium for constructing instruction dependency relationship Download PDF

Info

Publication number
CN118170436A
CN118170436A CN202410605540.6A CN202410605540A CN118170436A CN 118170436 A CN118170436 A CN 118170436A CN 202410605540 A CN202410605540 A CN 202410605540A CN 118170436 A CN118170436 A CN 118170436A
Authority
CN
China
Prior art keywords
instruction
elements
matrix
dependency
logic
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
CN202410605540.6A
Other languages
Chinese (zh)
Other versions
CN118170436B (en
Inventor
胡楠梓
蒋利杨
南云昊
孔令辉
朱航
何伟
包云岗
唐丹
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Beijing Open Source Chip Research Institute
Original Assignee
Beijing Open Source Chip Research Institute
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Beijing Open Source Chip Research Institute filed Critical Beijing Open Source Chip Research Institute
Priority to CN202410605540.6A priority Critical patent/CN118170436B/en
Publication of CN118170436A publication Critical patent/CN118170436A/en
Application granted granted Critical
Publication of CN118170436B publication Critical patent/CN118170436B/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003Arrangements for executing specific machine instructions
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30098Register arrangements
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30145Instruction analysis, e.g. decoding, instruction word fields
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/44Arrangements for executing specific programs
    • G06F9/448Execution paradigms, e.g. implementations of programming paradigms
    • G06F9/4482Procedural
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02DCLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D10/00Energy efficient computing, e.g. low power processors, power management or thermal management

Landscapes

  • Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Executing Machine-Instructions (AREA)

Abstract

The application provides a method, a device, electronic equipment and a computer readable storage medium for constructing instruction dependency relationship, comprising the following steps: acquiring an instruction format of each instruction, and determining a logic register included in each instruction according to the instruction format of each instruction; constructing a matrix according to the instruction sequence and logic registers included by all instructions; the elements in the matrix are used for representing the logic registers, and the association relation between the elements in the matrix is set according to the dependency relation between the logic registers of the instruction, so that the dependency relation construction of the instruction is completed. In the application, the data form of the matrix is compact, the volume is smaller, the change of elements in the matrix is very flexible, in addition, the matrix accurately and intuitively expresses the circulation sequence of the instruction through the row and column arrangement of the elements, and the dependency relationship among the logic registers of the instruction is expressed through the association relationship among the elements in the matrix.

Description

Method, device, equipment and storage medium for constructing instruction dependency relationship
Technical Field
The present application relates to the field of computer technologies, and in particular, to a method and apparatus for constructing an instruction dependency relationship, an electronic device, and a computer readable storage medium.
Background
The dependency relationship between instructions is important information for maintaining normal operation of an instruction stream, and two instructions have dependency relationship, which means that one instruction needs to rely on the execution of the other instruction, for example, a calculation operand instruction must be loaded with data from a memory by a data loading instruction before the data loading instruction can be used.
At present, the dependency relationship of the instruction can be written in a fixed text code form, and the dependency relationship is written in source codes and then compiled and executed.
However, in the above process, the recorded dependency relationship is fixed, and in the case of more dependency relationships, the writing operation is complicated, and the written dependency relationships are disordered.
Disclosure of Invention
The embodiment of the application provides a method and a device for constructing instruction dependency, electronic equipment and a computer readable storage medium, which are used for solving the problems in the related art.
In a first aspect, an embodiment of the present application provides a method for constructing an instruction dependency relationship, where the method includes:
acquiring an instruction format of each instruction and an instruction sequence formed by all the instructions;
determining a logic register included in each instruction according to the instruction format of each instruction;
Constructing a matrix according to the instruction sequence and logic registers included in all the instructions; the elements in the matrix are used for representing the logic registers, and the logic registers are in one-to-one correspondence with the elements in the matrix;
And setting the association relation between elements in the matrix according to the dependency relation between the logic registers of the instruction, thereby completing the construction of the dependency relation of the instruction.
In a second aspect, an embodiment of the present application provides an apparatus for constructing an instruction dependency, where the apparatus includes:
The acquisition module is used for acquiring the instruction format of each instruction and the instruction sequence formed by all the instructions;
the determining module is used for determining a logic register included in each instruction according to the instruction format of each instruction;
The construction module is used for constructing a matrix according to the instruction sequence and logic registers included in all the instructions; the elements in the matrix are used for representing the logic registers, and the logic registers are in one-to-one correspondence with the elements in the matrix;
and the dependency module is used for setting the association relation between the elements in the matrix according to the dependency relation between the logic registers of the instruction, so as to complete the construction of the dependency relation of the instruction.
In a third aspect, an embodiment of the present application further provides an electronic device, including a processor;
A memory for storing the processor-executable instructions;
Wherein the processor is configured to execute the instructions to implement the method of the first aspect.
In a fourth aspect, embodiments of the present application also provide a computer-readable storage medium, which when executed by a processor of an electronic device, causes the electronic device to perform the method of the first aspect.
In the embodiment of the application, the logic register included in each instruction can be converted into the elements in the matrix according to the instruction sequence to form a matrix formed by the elements, and the elements characterize the logic register, so that the dependency relationship can be set based on the elements in the matrix later. In the application, the data form of the matrix is compact and the volume is smaller, the change of the elements in the matrix is very flexible, in addition, the matrix accurately and intuitively expresses the circulation sequence of the instruction through the row and column arrangement of the elements, and the dependency relationship among the logic registers of the instruction is expressed through the association relationship among the elements in the matrix.
The foregoing description is only an overview of the present application, and is intended to be implemented in accordance with the teachings of the present application in order that the same may be more clearly understood and to make the same and other objects, features and advantages of the present application more readily apparent.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings required for the description of the embodiments will be briefly described below, it being obvious that the drawings in the following description are only some embodiments of the present invention, and other drawings may be obtained according to these drawings without inventive effort to a person skilled in the art.
FIG. 1 is a flow chart of steps of a method for constructing an instruction dependency according to an embodiment of the present application;
FIG. 2 is a flowchart illustrating specific steps of a method for constructing an instruction dependency according to an embodiment of the present application;
FIG. 3 is a schematic diagram of a matrix with a dependency relationship according to an embodiment of the present application;
FIG. 4 is a schematic diagram of a dependency relationship display interface according to an embodiment of the present application;
FIG. 5 is a block diagram of an apparatus for constructing instruction dependencies provided by an embodiment of the present application;
FIG. 6 is a block diagram of an electronic device provided by an embodiment of the invention;
Fig. 7 is a block diagram of another electronic device in accordance with another embodiment of the present invention.
Detailed Description
The following description of the embodiments of the present application will be made clearly and fully with reference to the accompanying drawings, in which it is evident that the embodiments described are some, but not all embodiments of the application. All other embodiments, which can be made by those skilled in the art based on the embodiments of the application without making any inventive effort, are intended to be within the scope of the application.
The terms first, second and the like in the description and in the claims, are used for distinguishing between similar elements and not necessarily for describing a particular sequential or chronological order. It is to be understood that the data so used may be interchanged, as appropriate, such that embodiments of the present application may be implemented in sequences other than those illustrated or described herein, and that the objects identified by "first," "second," etc. are generally of a type, and are not limited to the number of objects, such as the first object may be one or more. Furthermore, the term "and/or" as used in the specification and claims to describe an association of associated objects means that there may be three relationships, e.g., a and/or B, may mean: a exists alone, A and B exist together, and B exists alone. The character "/" generally indicates that the context-dependent object is an "or" relationship. The term "plurality" in embodiments of the present application means two or more, and other adjectives are similar.
Fig. 1 is a step flowchart of a method for constructing an instruction dependency according to an embodiment of the present application, where, as shown in fig. 1, the method may include:
step 101, obtaining an instruction format of each instruction and an instruction sequence formed by all the instructions.
In the embodiment of the present application, the instruction is also called a machine instruction, which refers to a command that a computer performs a certain operation, and is a minimum functional unit for the computer to run. The instruction format defines the existence form of the instruction, including the definition of each field of the instruction, the definition of a logic register, the definition of coding and the like.
In addition, according to the actual service requirement, the instruction sequence formed by each instruction in the process of implementing the service, for example, the instruction A, B, C is required for implementing the service, and the instruction sequence of BACAABAA is formed.
Step 102, determining a logic register included in each instruction according to the instruction format of each instruction.
In the embodiment of the application, the instruction format of the instruction contains the definition of the logic register required by the instruction, so that the logic register included in each instruction can be acquired based on the instruction format of the instruction. The logical registers of an instruction may be used to store data operated on by the instruction, and have many types, such as floating point type, vector type, integer type, etc. The dependency relationship of the subsequent building instruction can take the logic register of the instruction as a building dimension. I.e. to build a dependency between the logical registers of the two instructions, respectively.
For example, assuming the instruction format of the instruction is I-TYPE, it may include two logical registers, rd, rs 1; assuming the instruction format of the instruction is R-TYPE, it may include two logical registers, rd, rs1, rs 2.
Step 103, constructing a matrix according to the instruction sequence and logic registers included in all the instructions; the elements in the matrix are used for representing the logic registers, and the logic registers are in one-to-one correspondence with the elements in the matrix.
In the embodiment of the application, the instruction sequence defines the execution sequence of the instructions, and each instruction in the instruction sequence comprises a logic register, so that the logic register included in each instruction can be converted into the element in the matrix according to the instruction sequence, so that all the elements converted by the logic registers included in one instruction form one data row in the matrix, and a plurality of data rows are overlapped to form the matrix. After the processing, a matrix formed by the elements is formed, and the logic registers are represented by the elements, so that the setting of the dependency relationship can be completed based on the elements in the matrix. In the application, the data form of the matrix is compact and the volume is smaller, the change of the elements in the matrix is very flexible, in addition, the matrix accurately and intuitively expresses the circulation sequence of the instruction through the row and column arrangement of the elements, and the dependency relationship among the logic registers of the instruction is expressed through the association relationship among the elements in the matrix.
Step 104, setting the association relation between elements in the matrix according to the dependency relation between the logic registers of the instruction, thereby completing the construction of the dependency relation of the instruction.
In the embodiment of the application, based on the determined dependency relationship between the logic registers of the instruction, the association relationship between the corresponding elements can be added in the matrix, so that the dependency relationship between the logic registers is represented by the association relationship between the elements, and the dependency relationship construction of the instruction is completed after the addition is completed.
Specifically, the dependency relationship between the logic registers of the instruction may be determined by the service requirement, or may be determined by calculation. After the matrix is constructed, as each row of elements of the matrix corresponds to one instruction, the arrangement of the data rows of the matrix also follows the instruction sequence, and each element in the matrix represents a corresponding logic register, therefore, the two logic registers with the dependency relationship can be added among the elements corresponding to the elements in the matrix respectively, and after all the association relationships are added, the establishment of the dependency relationship of the instruction is completed based on the final matrix.
Further, after the matrix characterizing the dependency relationship between the logic registers is constructed, if an instruction stream with the dependency relationship is to be generated, the matrix may be imported into the instruction generator, so that the instruction generator may obtain the dependency relationship therefrom, and complete the construction of the instruction stream according to the dependency relationship. In addition, the matrix can be visually displayed through visual operation, so that the circulation sequence of the instruction and the dependency relationship among the logic registers can be more intuitively embodied.
In summary, in the embodiment of the present application, the logic register included in each instruction may be converted into the elements in the matrix according to the instruction sequence, to form a matrix formed by the elements, and the elements characterize the logic register, so that the dependency relationship may be set based on the elements in the matrix. In the application, the data form of the matrix is compact and the volume is smaller, the change of the elements in the matrix is very flexible, in addition, the matrix accurately and intuitively expresses the circulation sequence of the instruction through the row and column arrangement of the elements, and the dependency relationship among the logic registers of the instruction is expressed through the association relationship among the elements in the matrix.
Fig. 2 is a flowchart of specific steps of a method for constructing an instruction dependency according to an embodiment of the present application, where, as shown in fig. 2, the method may include:
step 201, obtain the instruction format of each instruction, and the instruction sequence formed by all the instructions.
The step may refer to step 101, and will not be described herein.
Step 202, determining a logic register included in each instruction according to the instruction format of each instruction.
The step may refer to step 102, and will not be described herein.
Step 203, constructing a matrix according to the instruction sequence and logic registers included in all the instructions; the elements in the matrix are used for representing the logic registers, and the logic registers are in one-to-one correspondence with the elements in the matrix.
This step may refer to step 103, and will not be described herein.
Optionally, the value of the element is a register identification of a logical register corresponding to the element.
In the embodiment of the application, the logic registers have corresponding register identifications, for example, the register identification of a destination logic register for storing a calculation result is rd, and the register identifications of source logic registers for storing operands are rs1, rs2 and the like. Therefore, when the elements of the matrix are constructed, the register mark of the logic register corresponding to the elements can be set to be the value of the elements, so that the elements have smaller data volume on the basis of marking the standard logic register by the registers, and the data structure of the matrix is lighter.
For example, assuming that three instructions A, B and C exist, the format of instruction a is L, which contains logical registers rd, rs1, rs2, then the logical register set corresponding to instruction a is { rd rs1 rs2}, the format of instruction B is M, which contains logical registers rd, rs1, then the logical register set corresponding to instruction B is { rd rs1}, the format of instruction C is N, which contains logical registers rs1, rs2, then the logical register set corresponding to instruction C is { rs1 rs2}. If the instruction order is BACAABAA, a matrix can be generated as follows:
rd rs1
rd rs1 rs2
rs1 rs2
rd rs1 rs2
rd rs1 rs2
rd rs1
rd rs1 rs2
rd rs1 rs2
the matrix has 8 rows, each row corresponds to one instruction, such as a first row corresponds to instruction B, a second row corresponds to instruction a, a third row corresponds to instruction C, and so on.
Step 204, setting the association relation between the elements in the matrix according to the dependency relation between the logic registers of the instruction, thereby completing the construction of the dependency relation of the instruction.
For example, for the instruction sequence of the above example: BACAABAA (execution order 1-8), a dependency-containing matrix can be constructed as shown in FIG. 3, wherein for instruction A of execution order 4 in instruction order, its logical register rd depends on logical register rs2 of instruction C of execution order 3, and its logical register rs1 depends on logical register rs1 of instruction B of execution order 1; its logical register rs2 depends on the logical register rs2 of instruction a of execution order 2.
For instruction A of execution order 8 in instruction order, its logical register rd depends on logical register rs2 of instruction A of execution order 5, and its logical register rs1 depends on logical register rs1 of instruction B of execution order 6; the logic register rs2 depends on the logic register rd of the instruction a in the execution order 4, and based on these dependencies, the corresponding elements can be connected in the matrix to obtain a matrix of the dependencies.
Optionally, in one implementation, step 203 may specifically include:
Substep 2031, converting the logical registers included in each instruction into the elements, and determining all the elements generated by each instruction conversion as one data line.
Sub-step 2032, arranging all data rows corresponding to the instructions according to the instruction sequence, to obtain the matrix.
In one implementation manner of the embodiment of the present application, after determining all instructions in the instruction sequence, the logic register included in each instruction may be converted into elements, all the elements generated by converting each instruction are determined as one data line, and all the data lines are sequentially arranged according to the instruction sequence, so as to obtain a matrix, i.e. information of all the instructions is collected, and the matrix is directly obtained through one construction operation.
Assuming three instructions A, B and C exist, the set of logical registers for instruction A is { rd rs1 rs2}, the set of logical registers for instruction B is { rd rs1}, and the set of logical registers for instruction C is { rs1 rs2}. If the instruction order is BAC, a matrix as follows may be generated once:
rd rs1
rd rs1 rs2
rs1 rs2
Optionally, step 204 may specifically include, on the basis of sub-steps 2031-2032:
and step 2041, setting the association relation among elements in the matrix according to the dependency relation among the logic registers of the instruction after the matrix is obtained by construction.
In one implementation manner of the embodiment of the present application, after the dependency relationship between the matrix and the logical registers of all the instructions in the instruction sequence is obtained by construction, the matrix may be obtained by one-time construction operation, and the association relationship between the elements may be added to the constructed matrix.
Alternatively, in another implementation, step 203 may specifically include:
Sub-step 2033, determining a current instruction to be processed according to the instruction sequence, converting a logic register included in the current instruction into the elements, and creating a data row in the matrix according to all the elements generated by the conversion of the current instruction.
Sub-step 2034, obtaining the constructed matrix when it is determined that all instructions are processed according to the instruction order.
In another implementation manner, each instruction in the instruction sequence may be sequentially generated, so that the embodiment of the present application may convert a logical register included in the current instruction into an element every time a current instruction to be processed is generated in the instruction sequence, and create a data row in the matrix according to all elements generated by the conversion of the current instruction, that is, every time a new instruction is generated in the instruction sequence, a new data row is added to the matrix. When the instruction sequence is determined to be processed, namely, a new instruction is not generated in the instruction sequence, and a built matrix is obtained.
Optionally, step 204 may specifically include, on the basis of sub-steps 2031-2032:
In the substep 2041, each new data row is created in the matrix, and according to the dependency relationship between the logic register included in the created data row and the logic register included in the history data row, the association relationship between the elements in the created data row and the elements in the history data row is set.
In another implementation manner, each time a data line is newly built in the matrix, it can be determined whether a dependency relationship exists between a logic register in the newly built data line and a logic register in a historical data line, if so, the association relationship between elements in the newly built data line and elements in the historical data line is set, that is, each time one data line is updated, the dependency relationship setting of the logic register in the newly built data line is performed once, the construction of the matrix is completed, and after the dependency relationship setting of the logic register in the last line of data line is completed, the matrix including the dependency relationship is obtained.
Optionally, after step 204, the method may further include:
Step 205, obtaining an interface display element corresponding to the logic register; the interface presentation elements corresponding to different types of logical registers are different.
And 206, arranging the interface display elements according to the arrangement sequence of the elements in the matrix, and adding corresponding instruction identifications for each row.
Step 207, setting connection relationships among the arranged interface display elements according to the association relationships among the elements in the matrix, and obtaining a dependency relationship display interface.
In the embodiment of the application, after the matrix with the dependency relationship is constructed, the matrix can be visually displayed through visual operation, so that the circulation sequence of the instruction and the dependency relationship among the logic registers are more intuitively embodied.
Specifically, corresponding interface display elements can be set for the logic registers, and interface display elements corresponding to different types of logic registers are made to be different, so that each interface display element can be arranged according to the arrangement sequence of elements in a matrix, corresponding instruction identifications are added for each row, then the connection relationships among the arranged interface display elements are set according to the association relationships among the elements in the matrix, a dependency relationship display interface is obtained, and the dependency relationship display interface can intuitively and accurately display the dependency relationship among the logic registers of the instructions.
For example, assume that there are three instructions A, B and C, instruction A has a set of logical registers { rd rs1 rs2}, instruction B has a set of logical registers { rd rs1}, and instruction C has a set of logical registers { rs1 rs2}. If the instruction sequence is BAC, the constructed matrix is as follows:
rd rs1
rd rs1 rs2
rs1 rs2
If the logical register rs1 of the instruction a depends on the logical register rd of the instruction B, and the logical register rs2 of the instruction C depends on the logical register rd of the instruction a, the association relationship between the corresponding element of the logical register rs1 of the instruction a and the corresponding element of the logical register rd of the instruction B, and the association relationship between the corresponding element of the logical register rs2 of the instruction C and the corresponding element of the logical register rd of the instruction a may be added in the matrix.
In visualization, an interface presentation element may be set for the logical register rd: block, set interface presentation element for logical register rs 1: an ellipse; interface presentation element is set for logical register rs 2: triangle; according to the arrangement sequence of the elements in the matrix, arranging the interface display elements, adding corresponding instruction identifiers for each row, and setting the connection relation between the arranged interface display elements according to the association relation between the elements in the matrix to obtain the dependency relation display interface shown in fig. 4.
Optionally, the dependency relationship includes: a dependency between the first type of logical register and the second type of logical register; the dependency relationship has a corresponding dependency probability; the method may further comprise:
Step 209, determining the type of the logical register corresponding to the element in the matrix.
Step 210, under the condition that the dependency probability is satisfied, establishing a dependency relationship between elements corresponding to the logic registers of the first type and elements corresponding to the logic registers of the second type in all the types.
In the embodiment of the application, the logic register also has corresponding types, such as integer type, floating point type and vector type; or a source register type, a destination register type, etc.; thus, before setting the dependency, a dependency policy may be added based on the type of logical registers, i.e. setting that a logical register of a first type depends on a logical register of a second type, such as a logical register of a destination register type depends on a logical register of a source register type; the logical registers of the integer type depend on the logical registers of the integer type (the first type and the second type may be the same); the floating point type of logical registers depends on the floating point type of logical registers; the logical registers of the vector type depend on the logical registers of the vector type, etc.
In addition, the corresponding dependency probabilities can be set for the dependency policies, so that the dependency relationship between the element corresponding to the first type of logic register and the element corresponding to the second type of logic register is built in the matrix only when the dependency probabilities are met. The embodiment of the application ensures that the setting of the dependency relationship is more flexible and the application scene of the dependency relationship is wider by setting the dependency strategy and the dependency probability.
In summary, in the embodiment of the present application, the logic register included in each instruction may be converted into the elements in the matrix according to the instruction sequence, to form a matrix formed by the elements, and the elements characterize the logic register, so that the dependency relationship may be set based on the elements in the matrix. In the application, the data form of the matrix is compact and the volume is smaller, the change of the elements in the matrix is very flexible, in addition, the matrix accurately and intuitively expresses the circulation sequence of the instruction through the row and column arrangement of the elements, and the dependency relationship among the logic registers of the instruction is expressed through the association relationship among the elements in the matrix.
FIG. 5 is a block diagram of an apparatus for constructing instruction dependency provided in an embodiment of the present application, where the apparatus includes:
an obtaining module 301, configured to obtain an instruction format of each instruction, and an instruction sequence formed by all the instructions;
A determining module 302, configured to determine, according to an instruction format of each instruction, a logic register included in each instruction;
a construction module 303, configured to construct a matrix according to the instruction sequence and logic registers included in all the instructions; the elements in the matrix are used for representing the logic registers, and the logic registers are in one-to-one correspondence with the elements in the matrix;
And the dependency module 304 is configured to set an association relationship between elements in the matrix according to the dependency relationship between the logical registers of the instruction, so as to complete the dependency relationship construction of the instruction.
Optionally, the building module 303 includes:
A first conversion sub-module, configured to convert a logic register included in each instruction into the elements, and determine all the elements generated by converting each instruction into one data line;
And the first construction submodule is used for arranging all data rows corresponding to the instructions according to the instruction sequence to obtain the matrix.
Optionally, the relying module 304 includes:
And the first setting submodule is used for setting the association relation among elements in the matrix according to the dependency relation among the logic registers of the instruction after the matrix is constructed and obtained.
Optionally, the building module 303 includes:
The second conversion sub-module is used for determining a current instruction to be processed according to the instruction sequence, converting a logic register included in the current instruction into the elements, and creating a data row in the matrix according to all the elements generated by conversion of the current instruction;
and the second construction submodule is used for obtaining the constructed matrix when all instructions are determined to be processed according to the instruction sequence.
Optionally, the relying module 304 includes:
And the second setting submodule is used for setting the association relation between the elements in the newly built data row and the elements in the historical data row according to the dependency relation between the logic registers included in the newly built data row and the logic registers included in the historical data row in every newly built data row in the matrix.
Optionally, the value of the element is a register identification of a logical register corresponding to the element.
Optionally, the apparatus further includes:
the display element module is used for acquiring interface display elements corresponding to the logic registers; interface display elements corresponding to different types of logic registers are different;
the arrangement module is used for arranging the interface display elements according to the arrangement sequence of the elements in the matrix and adding corresponding instruction identifiers for each row;
And the connection module is used for setting the connection relation between the arranged interface display elements according to the association relation between the elements in the matrix to obtain a dependency relation display interface.
Optionally, the dependency relationship includes: a dependency between the first type of logical register and the second type of logical register; the dependency relationship has a corresponding dependency probability;
the apparatus further comprises:
The type acquisition module is used for determining the type of the logic register corresponding to the element in the matrix;
And the dependency policy module is used for establishing the dependency relationship between the elements corresponding to the logic registers of the first type and the elements corresponding to the logic registers of the second type in all the types under the condition that the dependency probability is met.
In summary, in the embodiment of the present application, the logic register included in each instruction may be converted into the elements in the matrix according to the instruction sequence, to form a matrix formed by the elements, and the elements characterize the logic register, so that the dependency relationship may be set based on the elements in the matrix. In the application, the data form of the matrix is compact and the volume is smaller, the change of the elements in the matrix is very flexible, in addition, the matrix accurately and intuitively expresses the circulation sequence of the instruction through the row and column arrangement of the elements, and the dependency relationship among the logic registers of the instruction is expressed through the association relationship among the elements in the matrix.
For the device embodiments, since they are substantially similar to the method embodiments, the description is relatively simple, and reference is made to the description of the method embodiments for relevant points.
In this specification, each embodiment is described in a progressive manner, and each embodiment is mainly described by differences from other embodiments, and identical and similar parts between the embodiments are all enough to be referred to each other.
The specific manner in which the various modules perform the operations in the apparatus of the above embodiments have been described in detail in connection with the embodiments of the method, and will not be described in detail herein.
Embodiments of the present application provide an instruction dependency building apparatus, comprising a memory, and one or more programs, wherein the one or more programs are stored in the memory and configured to be executed by one or more processors, including for performing the methods described in one or more of the embodiments above.
Fig. 6 is a block diagram of an electronic device 600, according to an example embodiment. For example, the electronic device 600 may be a mobile phone, a computer, a digital broadcast terminal, a messaging device, a game console, a tablet device, a medical device, an exercise device, a personal digital assistant, and the like.
Referring to fig. 6, an electronic device 600 may include one or more of the following components: a processing component 602, a memory 604, a power component 606, a multimedia component 608, an audio component 610, an input/output (I/O) interface 612, a sensor component 614, and a communication component 616.
The processing component 602 generally controls overall operation of the electronic device 600, such as operations associated with display, telephone calls, data communications, camera operations, and recording operations. The processing component 602 may include one or more processors 620 to execute instructions to perform all or part of the steps of the methods described above. Further, the processing component 602 can include one or more modules that facilitate interaction between the processing component 602 and other components. For example, the processing component 602 may include a multimedia module to facilitate interaction between the multimedia component 608 and the processing component 602.
The memory 604 is used to store various types of data to support operations at the electronic device 600. Examples of such data include instructions for any application or method operating on the electronic device 600, contact data, phonebook data, messages, pictures, multimedia, and so forth. The memory 604 may be implemented by any type or combination of volatile or nonvolatile memory devices such as Static Random Access Memory (SRAM), electrically erasable programmable read-only memory (EEPROM), erasable programmable read-only memory (EPROM), programmable read-only memory (PROM), read-only memory (ROM), magnetic memory, flash memory, magnetic or optical disk.
The power supply component 606 provides power to the various components of the electronic device 600. The power supply components 606 can include a power management system, one or more power supplies, and other components associated with generating, managing, and distributing power for the electronic device 600.
The multimedia component 608 includes a screen between the electronic device 600 and the user that provides an output interface. In some embodiments, the screen may include a Liquid Crystal Display (LCD) and a Touch Panel (TP). If the screen includes a touch panel, the screen may be implemented as a touch screen to receive input signals from a user. The touch panel includes one or more touch sensors to sense touches, swipes, and gestures on the touch panel. The touch sensor may not only sense demarcations of touch or sliding actions, but also detect durations and pressures associated with the touch or sliding operations. In some embodiments, the multimedia component 608 includes a front camera and/or a rear camera. When the electronic device 600 is in an operational mode, such as a shooting mode or a multimedia mode, the front-facing camera and/or the rear-facing camera may receive external multimedia data. Each front camera and rear camera may be a fixed optical lens system or have focal length and optical zoom capabilities.
The audio component 610 is for outputting and/or inputting audio signals. For example, the audio component 610 includes a Microphone (MIC) for receiving external audio signals when the electronic device 600 is in an operational mode, such as a call mode, a recording mode, and a voice recognition mode. The received audio signals may be further stored in the memory 604 or transmitted via the communication component 616. In some embodiments, audio component 610 further includes a speaker for outputting audio signals.
The I/O interface 612 provides an interface between the processing component 602 and peripheral interface modules, which may be a keyboard, click wheel, buttons, etc. These buttons may include, but are not limited to: homepage button, volume button, start button, and lock button.
The sensor assembly 614 includes one or more sensors for providing status assessment of various aspects of the electronic device 600. For example, the sensor assembly 614 may detect an on/off state of the electronic device 600, a relative positioning of the components, such as a display and keypad of the electronic device 600, the sensor assembly 614 may also detect a change in position of the electronic device 600 or a component of the electronic device 600, the presence or absence of a user's contact with the electronic device 600, an orientation or acceleration/deceleration of the electronic device 600, and a change in temperature of the electronic device 600. The sensor assembly 614 may include a proximity sensor configured to detect the presence of nearby objects in the absence of any physical contact. The sensor assembly 614 may also include a light sensor, such as a CMOS or CCD image sensor, for use in imaging applications. In some embodiments, the sensor assembly 614 may also include an acceleration sensor, a gyroscopic sensor, a magnetic sensor, a pressure sensor, or a temperature sensor.
The communication component 616 is utilized to facilitate communication between the electronic device 600 and other devices, either in a wired or wireless manner. The electronic device 600 may access a wireless network based on a communication standard, such as WiFi, an operator network (e.g., 2G, 3G, 4G, or 5G), or a combination thereof. In one exemplary embodiment, the communication component 616 receives broadcast signals or broadcast-related information from an external broadcast management system via a broadcast channel. In one exemplary embodiment, the communication component 616 further includes a Near Field Communication (NFC) module to facilitate short range communications. For example, the NFC module may be implemented based on Radio Frequency Identification (RFID) technology, infrared data association (IrDA) technology, ultra Wideband (UWB) technology, bluetooth (BT) technology, and other technologies.
In an exemplary embodiment, the electronic device 600 may be implemented by one or more Application Specific Integrated Circuits (ASICs), digital Signal Processors (DSPs), digital Signal Processing Devices (DSPDs), programmable Logic Devices (PLDs), field Programmable Gate Arrays (FPGAs), controllers, microcontrollers, microprocessors, or other electronic elements for implementing the methods provided by the embodiments of the application.
In an exemplary embodiment, a non-transitory computer-readable storage medium is also provided, such as memory 604, including instructions executable by processor 620 of electronic device 600 to perform the above-described method. For example, the non-transitory storage medium may be ROM, random Access Memory (RAM), CD-ROM, magnetic tape, floppy disk, optical data storage device, etc.
Fig. 7 is a block diagram of an electronic device 700, according to an example embodiment. For example, the electronic device 700 may be provided as a server. Referring to fig. 7, electronic device 700 includes a processing component 722 that further includes one or more processors and memory resources represented by memory 732 for storing instructions, such as application programs, executable by processing component 722. The application programs stored in memory 732 may include one or more modules that each correspond to a set of instructions. Further, the processing component 722 is configured to execute instructions to perform the methods provided by embodiments of the present application.
The electronic device 700 may also include a power supply component 726 configured to perform power management of the electronic device 700, a wired or wireless network interface 750 configured to connect the electronic device 700 to a network, and an input output (I/O) interface 758. The electronic device 700 may operate based on an operating system stored in memory 732, such as Windows Server, mac OS XTM, unixTM, linuxTM, freeBSDTM, or the like.
The embodiment of the application also provides a computer program product, comprising a computer program which, when being executed by a processor, realizes the method described in the above embodiment.
Other embodiments of the application will be apparent to those skilled in the art from consideration of the specification and practice of the application disclosed herein. This application is intended to cover any variations, uses, or adaptations of the application following, in general, the principles of the application and including such departures from the present disclosure as come within known or customary practice within the art to which the application pertains. It is intended that the specification and examples be considered as exemplary only, with a true scope and spirit of the application being indicated by the following claims.
It is to be understood that the application is not limited to the precise arrangements and instrumentalities shown in the drawings, which have been described above, and that various modifications and changes may be effected without departing from the scope thereof. The scope of the application is limited only by the appended claims.

Claims (11)

1. A method of constructing an instruction dependency, the method comprising:
acquiring an instruction format of each instruction and an instruction sequence formed by all the instructions;
determining a logic register included in each instruction according to the instruction format of each instruction;
Constructing a matrix according to the instruction sequence and logic registers included in all the instructions; the elements in the matrix are used for representing the logic registers, and the logic registers are in one-to-one correspondence with the elements in the matrix;
And setting the association relation between elements in the matrix according to the dependency relation between the logic registers of the instruction, thereby completing the construction of the dependency relation of the instruction.
2. The method for constructing an instruction dependency according to claim 1, wherein the constructing a matrix according to the instruction sequence and the logic registers included in each of all the instructions comprises:
converting a logic register included in each instruction into the elements, and determining all the elements generated by each instruction conversion as one data line;
And arranging all data rows corresponding to the instructions according to the instruction sequence to obtain the matrix.
3. The method for constructing an instruction dependency relationship according to claim 1 or 2, wherein the setting the association relationship between the elements in the matrix according to the dependency relationship between the logical registers of the instruction comprises:
After the matrix is constructed and obtained, setting the association relation among elements in the matrix according to the dependency relation among the logic registers of the instruction.
4. The method for constructing an instruction dependency according to claim 1, wherein the constructing a matrix according to the instruction sequence and the logic registers included in each of all the instructions comprises:
Determining a current instruction to be processed according to the instruction sequence, converting a logic register included in the current instruction into the elements, and creating a data row in the matrix according to all the elements generated by conversion of the current instruction;
and when all the instructions are determined to be processed according to the instruction sequence, obtaining the constructed matrix.
5. The method for constructing an instruction dependency according to claim 1 or 4, wherein the setting the association relationship between the elements in the matrix according to the dependency between the logical registers of the instruction comprises:
And setting the association relation between the elements in the newly built data row and the elements in the historical data row according to the dependency relation between the logic registers included in the newly built data row and the logic registers included in the historical data row every newly built data row in the matrix.
6. The method according to claim 1, wherein the value of the element is a register identification of a logical register corresponding to the element.
7. The method according to claim 1, wherein after setting the association relationship between the elements in the matrix according to the dependency relationship between the logical registers of the instruction, so as to complete the dependency relationship construction of the instruction, the method further comprises:
acquiring an interface display element corresponding to the logic register; interface display elements corresponding to different types of logic registers are different;
according to the arrangement sequence of elements in the matrix, arranging the interface display elements, and adding corresponding instruction identifications for each row;
and setting the connection relation between the arranged interface display elements according to the association relation between the elements in the matrix, and obtaining a dependency relation display interface.
8. The method of claim 1, wherein the dependency relationship comprises: a dependency between the first type of logical register and the second type of logical register; the dependency relationship has a corresponding dependency probability;
The method further comprises the steps of:
Determining the type of a logic register corresponding to an element in the matrix;
And under the condition that the dependency probability is met, establishing the dependency relationship between the elements corresponding to the logic registers of the first type and the elements corresponding to the logic registers of the second type in all the types.
9. An apparatus for constructing an instruction dependency, the apparatus comprising:
The acquisition module is used for acquiring the instruction format of each instruction and the instruction sequence formed by all the instructions;
the determining module is used for determining a logic register included in each instruction according to the instruction format of each instruction;
The construction module is used for constructing a matrix according to the instruction sequence and logic registers included in all the instructions; the elements in the matrix are used for representing the logic registers, and the logic registers are in one-to-one correspondence with the elements in the matrix;
and the dependency module is used for setting the association relation between the elements in the matrix according to the dependency relation between the logic registers of the instruction, so as to complete the construction of the dependency relation of the instruction.
10. An electronic device, comprising: a processor;
A memory for storing the processor-executable instructions;
wherein the processor is configured to execute the instructions to implement the method of any one of claims 1 to 8.
11. A computer readable storage medium, characterized in that instructions in the computer readable storage medium, when executed by a processor of an electronic device, enable the electronic device to perform the method of any one of claims 1 to 8.
CN202410605540.6A 2024-05-15 2024-05-15 Method, device, equipment and storage medium for constructing instruction dependency relationship Active CN118170436B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202410605540.6A CN118170436B (en) 2024-05-15 2024-05-15 Method, device, equipment and storage medium for constructing instruction dependency relationship

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202410605540.6A CN118170436B (en) 2024-05-15 2024-05-15 Method, device, equipment and storage medium for constructing instruction dependency relationship

Publications (2)

Publication Number Publication Date
CN118170436A true CN118170436A (en) 2024-06-11
CN118170436B CN118170436B (en) 2024-07-26

Family

ID=91360797

Family Applications (1)

Application Number Title Priority Date Filing Date
CN202410605540.6A Active CN118170436B (en) 2024-05-15 2024-05-15 Method, device, equipment and storage medium for constructing instruction dependency relationship

Country Status (1)

Country Link
CN (1) CN118170436B (en)

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6216200B1 (en) * 1994-10-14 2001-04-10 Mips Technologies, Inc. Address queue
US20040111587A1 (en) * 2002-12-09 2004-06-10 Nair Gopalan N Apparatus and method for matrix data processing
CN113986356A (en) * 2016-07-02 2022-01-28 英特尔公司 Interruptible and restartable matrix multiply instruction, processor, method and system
CN117331862A (en) * 2023-06-12 2024-01-02 清华大学 Instruction processing method, device, equipment and medium based on reordering buffer

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6216200B1 (en) * 1994-10-14 2001-04-10 Mips Technologies, Inc. Address queue
US20040111587A1 (en) * 2002-12-09 2004-06-10 Nair Gopalan N Apparatus and method for matrix data processing
CN113986356A (en) * 2016-07-02 2022-01-28 英特尔公司 Interruptible and restartable matrix multiply instruction, processor, method and system
CN117331862A (en) * 2023-06-12 2024-01-02 清华大学 Instruction processing method, device, equipment and medium based on reordering buffer
CN117873577A (en) * 2023-06-12 2024-04-12 清华大学 Instruction processing method, device, equipment and medium

Also Published As

Publication number Publication date
CN118170436B (en) 2024-07-26

Similar Documents

Publication Publication Date Title
CN113238752B (en) Code generation method, device, electronic equipment and storage medium
CN104679599A (en) Application program duplicating method and device
CN109117144B (en) Page processing method, device, terminal and storage medium
CN111752598A (en) Page generation method and device, electronic equipment and storage medium
CN113807253A (en) Face recognition method and device, electronic equipment and storage medium
CN107463372B (en) Data-driven page updating method and device
US20180365199A1 (en) Page display method and device and storage medium
CN114691115A (en) Business process system generation method and device, electronic equipment and storage medium
CN106790683B (en) Network data display method and device based on mobile terminal
CN111596980B (en) Information processing method and device
CN111694571B (en) Compiling method and device
CN111488267B (en) Interface test script generation method and device and electronic equipment
CN118170436B (en) Method, device, equipment and storage medium for constructing instruction dependency relationship
CN113919311B (en) Data display method and device, electronic equipment and storage medium
CN111667827B (en) Voice control method and device for application program and storage medium
CN113869295A (en) Object detection method and device, electronic equipment and storage medium
CN112581102A (en) Task management method and device, electronic equipment and storage medium
CN117093267B (en) Storage method, device, equipment and storage medium for branch instruction jump address
CN111078022B (en) Input method and device
CN118193056B (en) Method, device, equipment and storage medium for checking instruction dependency relationship
CN113065326B (en) Text comparison method, device, electronic equipment and storage medium
CN111258436B (en) Configuration information modification method, device and readable medium
CN118170435B (en) Instruction information processing method, device, equipment and storage medium
CN113867871B (en) Interface processing method and device, electronic equipment and storage medium
CN110473138B (en) Graphic code conversion method, graphic code conversion device, electronic equipment and storage medium

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination
GR01 Patent grant
GR01 Patent grant