CN118170435B

CN118170435B - Instruction information processing method, device, equipment and storage medium

Info

Publication number: CN118170435B
Application number: CN202410599666.7A
Authority: CN
Inventors: 胡楠梓; 蒋利杨; 南云昊; 孔令辉; 朱航; 何伟; 包云岗; 唐丹
Original assignee: Beijing Open Source Chip Research Institute
Current assignee: Beijing Open Source Chip Research Institute
Filing date: 2024-05-15
Publication date: 2024-07-26
Anticipated expiration: 2044-05-15

Abstract

The application provides a method, a device, an electronic device and a computer readable storage medium for processing instruction information, comprising the following steps: acquiring an instruction name and instruction detailed information of an instruction; acquiring a pre-established structure type; the structure type comprises a first variable corresponding to the instruction name and a second variable corresponding to the instruction detailed information; according to the structure type, declaring to obtain an associated array comprising array elements, wherein the array elements in the associated array are in one-to-one correspondence with the instructions; the array element comprises a corresponding relation between the first variable and the second variable; and respectively assigning the instruction name and the instruction detailed information of the instruction to a first variable and a second variable of the corresponding array elements in the associated array. The application realizes a flexible instruction information recording mode, has wider application range and solves the problem of fixed instruction information recording mode in the related technology.

Description

Instruction information processing method, device, equipment and storage medium

Technical Field

The present application relates to the field of computer technologies, and in particular, to a method and apparatus for processing instruction information, an electronic device, and a computer readable storage medium.

Background

The instruction generator may generate an instruction stream according to the execution order of the instructions, and in generating the instruction stream, the instruction generator needs to use detailed information in the instructions, such as encoding information, logical register types, and the like. Therefore, it is important to acquire detailed information of an instruction in the instruction stream generation process.

Currently, the instruction name and the instruction detailed information of each instruction can be recorded in a fixed format in the form of a text, and when an instruction stream is generated, the instruction generator can call the text to find the detailed information of the instruction to be generated currently by traversing the instruction name.

However, in the above process, the text constructed for recording instruction information has a fixed format, so that the form of the recorded instruction detailed information is relatively fixed, and it is difficult to flexibly expand the instruction with a new format, which results in a narrower application range.

Disclosure of Invention

The embodiment of the application provides a method and a device for processing instruction information, electronic equipment and a computer readable storage medium, which are used for solving the problems in the related art.

In a first aspect, an embodiment of the present application provides a method for processing instruction information, where the method includes:

acquiring an instruction name and instruction detailed information of an instruction;

Acquiring a pre-established structure type; the structure type comprises a first variable corresponding to the instruction name and a second variable corresponding to the instruction detailed information;

According to the structure body type, declaring to obtain an associated array comprising array elements, wherein the array elements in the associated array are in one-to-one correspondence with the instruction; the array element comprises a corresponding relation between the first variable and the second variable;

And respectively assigning the instruction name and the instruction detailed information of the instruction to a first variable and a second variable of a corresponding array element in the associated array.

In a second aspect, an embodiment of the present application provides a device for processing instruction information, where the device includes:

the acquisition module is used for acquiring the instruction name and the instruction detailed information of the instruction;

A structure module for acquiring a pre-established structure type; the structure type comprises a first variable corresponding to the instruction name and a second variable corresponding to the instruction detailed information;

the declaration module is used for declaratively obtaining an associated array comprising array elements according to the structure type, wherein the array elements in the associated array are in one-to-one correspondence with the instructions; the array element comprises a corresponding relation between the first variable and the second variable;

and the assignment module is used for respectively assigning the instruction name and the instruction detailed information of the instruction to a first variable and a second variable of the corresponding array element in the associated array.

In a third aspect, an embodiment of the present application further provides an electronic device, including a processor;

A memory for storing the processor-executable instructions;

Wherein the processor is configured to execute the instructions to implement the method of the first aspect.

In a fourth aspect, embodiments of the present application also provide a computer-readable storage medium, which when executed by a processor of an electronic device, causes the electronic device to perform the method of the first aspect.

In the embodiment of the application, a plurality of variables can be set in the structure body type, so that the instruction name and the instruction detailed information of the instruction are respectively represented by the plurality of variables. When the instruction detailed information of the instruction needs to be increased or decreased, the number of the second variables is correspondingly adjusted. And the related array is obtained through the structure type statement, and when the subsequent instruction generator generates the instruction, the corresponding instruction detailed information can be quickly found out from the related array for use according to the instruction name of the instruction as an index. In the embodiment of the application, when the information of the instruction needs to be changed, the corresponding variable is adjusted, and based on the flexible information recording mode, a new instruction recording format can be expanded by adjusting the variable in the structure type according to the condition of the instruction, so that the application range is wider, and the problem of fixed instruction information recording form in the related technology is solved.

The foregoing description is only an overview of the present application, and is intended to be implemented in accordance with the teachings of the present application in order that the same may be more clearly understood and to make the same and other objects, features and advantages of the present application more readily apparent.

Drawings

In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings required for the description of the embodiments will be briefly described below, it being obvious that the drawings in the following description are only some embodiments of the present invention, and other drawings may be obtained according to these drawings without inventive effort to a person skilled in the art.

FIG. 1 is a flow chart of steps of a method for processing instruction information according to an embodiment of the present application;

FIG. 2 is a flowchart illustrating steps of a method for processing instruction information according to an embodiment of the present application;

FIG. 3 is a schematic view of a type of structure provided by an embodiment of the present application;

FIG. 4 is a block diagram of an instruction information processing apparatus according to an embodiment of the present application;

FIG. 5 is a block diagram of an electronic device provided by an embodiment of the present invention;

Fig. 6 is a block diagram of another electronic device in accordance with another embodiment of the invention.

Detailed Description

The following description of the embodiments of the present application will be made clearly and fully with reference to the accompanying drawings, in which it is evident that the embodiments described are some, but not all embodiments of the application. All other embodiments, which can be made by those skilled in the art based on the embodiments of the application without making any inventive effort, are intended to be within the scope of the application.

The terms first, second and the like in the description and in the claims, are used for distinguishing between similar elements and not necessarily for describing a particular sequential or chronological order. It is to be understood that the data so used may be interchanged, as appropriate, such that embodiments of the present application may be implemented in sequences other than those illustrated or described herein, and that the objects identified by "first," "second," etc. are generally of a type, and are not limited to the number of objects, such as the first object may be one or more. Furthermore, the term "and/or" as used in the specification and claims to describe an association of associated objects means that there may be three relationships, e.g., a and/or B, may mean: a exists alone, A and B exist together, and B exists alone. The character "/" generally indicates that the context-dependent object is an "or" relationship. The term "plurality" in embodiments of the present application means two or more, and other adjectives are similar.

Fig. 1 is a step flowchart of a method for processing instruction information according to an embodiment of the present application, where, as shown in fig. 1, the method may include:

step 101, acquiring instruction names and instruction detailed information of instructions.

The instruction generator is a tool for generating an instruction stream, wherein the instruction stream is information flow involved in the operation process of a computer and mainly used for controlling various operations such as transmission, reading and writing. The instruction stream may be formed by arranging a plurality of instructions in an order (the order is formed by service requirements), and for each instruction to be generated in the instruction stream, the instruction generator needs to generate the instruction according to the instruction detailed information of the instruction.

Specifically, in order to achieve the above objective, in the embodiment of the present application, a carrier for recording an instruction name and instruction detailed information of an instruction needs to be constructed in advance, so that when an instruction stream is generated later, an instruction generator may acquire the instruction detailed information of the instruction from the carrier according to the instruction name of the instruction.

The instruction name is used for identifying and indicating the instruction, and the instruction detailed information comprises various information reflecting the characteristics of the instruction, such as the coding information of the instruction, the type of a logic register and the like, and is used for defining the instruction in detail.

It should be noted that, in the embodiment of the present application, the instruction name and the instruction detailed information of the instruction may be obtained from the internet or instruction architecture specification.

102, Acquiring a pre-established structure type; the structure type includes a first variable corresponding to the instruction name and a second variable corresponding to the instruction detailed information.

In the embodiment of the application, the structure type can be used as a carrier for carrying instruction detailed information of instructions, and the structure (struct) is a composite data type in the C language, which allows different types of data to be combined into a single data structure, and the structure type can comprise basic data types, arrays, pointers and even other structure types.

The general form of structure type definition is:

The struct key is followed by the name of the structure type, which can be customized by the user and follow the variable naming rules of the C language.

Within the curly brace are listed members of the structure type, each member comprising a data type and a member name.

The structural members end with a semicolon.

For example, a structure type containing instruction details may be constructed, named instr_t, and three variables may be included in the structure type, representing reg_type (logical register type), function code, and opcode code, respectively.

Specifically, in the embodiment of the present application, a plurality of variables may be set in the structure type, so that the instruction name and the instruction detailed information of the instruction are respectively represented by using the plurality of variables, that is, the instruction name corresponds to a first variable, and each instruction detailed information corresponds to a second variable. When the instruction detailed information of the instruction is required to be increased or decreased, the number of the second variables is correspondingly adjusted, when certain instruction detailed information of the instruction is required to be changed, the definition of the second variables is correspondingly adjusted, and based on the flexible information recording mode, a new instruction recording format can be expanded by adjusting the variable in the structure type according to the condition of the instruction, the application range is wider, and the problem of fixed instruction information recording form in the related technology is solved.

For example, an instruction with instruction name a, instruction details containing instruction encoded as 000 and logical register type as floating point type, then the structure type may have a first variable for the instruction: a, A is as follows; second variable: 000; second variable: floating point type.

Step 103, according to the structure body type, declaring to obtain an associated array comprising array elements, wherein the array elements in the associated array are in one-to-one correspondence with the instructions; the array element includes a correspondence between the first variable and the second variable.

In the embodiment of the application, after the structure type is constructed, the association array comprising the array elements can be declared based on the structure type, so that the mapping relationship between the instruction name of the instruction and the instruction detailed information is finally carried in the form of the association array declared by the structure type. Each array element in the associated array corresponds to an instruction, and each array element records the corresponding relation between the first variable (instruction name) and the second variable (instruction detailed information) of the instruction, so that the associated array records the mapping relation between the instruction name and the instruction detailed information of each instruction in a compact form.

And 104, respectively assigning the instruction name and the instruction detailed information of the instruction to a first variable and a second variable of a corresponding array element in the associated array.

In the embodiment of the application, since the first variable recorded in the array element is defined as the instruction name and the second variable is defined as the instruction detailed information, the instruction name and the instruction detailed information of the instruction can be respectively assigned to the first variable and the second variable corresponding to the array element in the associated array. When the subsequent instruction generator generates the instruction, the corresponding instruction detailed information can be quickly found out from the associated array for use according to the instruction name of the instruction as an index.

In summary, in the embodiment of the present application, a plurality of variables may be set in the structure type, so that the instruction name and the instruction detailed information of the instruction are respectively represented using the plurality of variables. When the instruction detailed information of the instruction needs to be increased or decreased, the number of the second variables is correspondingly adjusted. And the related array is obtained through the structure type statement, and when the subsequent instruction generator generates the instruction, the corresponding instruction detailed information can be quickly found out from the related array for use according to the instruction name of the instruction as an index. In the embodiment of the application, when the information of the instruction needs to be changed, the corresponding variable is adjusted, and based on the flexible information recording mode, a new instruction recording format can be expanded by adjusting the variable in the structure type according to the condition of the instruction, so that the application range is wider, and the problem of fixed instruction information recording form in the related technology is solved.

Fig. 2 is a flowchart of specific steps of a method for processing instruction information according to an embodiment of the present application, where, as shown in fig. 2, the method may include:

Step 201, acquiring an instruction name and instruction detailed information of an instruction.

The step may refer to step 101, and will not be described herein.

Step 202, obtaining a pre-established structure type; the structure type includes a first variable corresponding to the instruction name and a second variable corresponding to the instruction detailed information.

The step may refer to step 102, and will not be described herein.

Step 203, according to the structure type, declaring to obtain an associated array comprising array elements, wherein the array elements in the associated array are in one-to-one correspondence with the instructions; the array element includes a correspondence between the first variable and the second variable.

This step may refer to step 103, and will not be described herein.

And 204, assigning the instruction name of the instruction to a first variable of a corresponding array element in the associated array.

In the embodiment of the present application, since the first variable in the structure type is defined as the instruction name of the recording instruction, after the association array is declared, the instruction name of the instruction may be assigned to the first variable of the corresponding array element in the association array, so that the first variable records the instruction name of the instruction. The instruction name is in the form of a string.

Step 205, assigning the logical register type of the instruction to a second variable corresponding to the logical register type, and assigning the encoding information of the instruction to a second variable corresponding to the encoding information.

The instruction details include: the logical register type and encoding information of the instruction; the logical register type and the encoded information have respective corresponding second variables.

In an embodiment of the present application, the instruction details of the instruction may include a plurality of parameters, each corresponding to a second variable, where in one case, the instruction details include: the logical register type of the instruction and the encoded information.

Among other things, the logical registers of an instruction may be used to store data operated on by the instruction, with many types, such as floating point type, vector type, integer type, etc. The code information of the instruction is in a binary form which is convenient for computer identification, mainly relates to the design of an operation code field of the instruction, determines the operation characteristics and functions of the instruction, and can be fixed-length or variable-length. The encoded information may specifically include an opcode code, a function code, for each instruction, whose combination of opcode code and function code is unique, an opcode code, also known as an operation code, is a code that describes machine language instructions, each operation code in opcode code representing a particular operation or instruction, making the computer aware of what to perform. In the case where the encoded information includes an opcode encoding and a function encoding, a second variable corresponding to the opcode encoding and a second variable corresponding to the function encoding may be set correspondingly in the structure type.

Since the second variable in the structure type is defined as the instruction detailed information of the recording instruction, after the associated array is declared, each instruction detailed information of the instruction can be respectively assigned to the second variable of the corresponding array element in the associated array, so that the second variable records the instruction detailed information of the instruction.

Step 206, in the process of generating an instruction stream by the instruction generator, acquiring a target instruction name generated by the instruction generator for the instruction stream.

Step 207, using the target instruction name as an index, determining a target first variable matched with the target instruction name in the association array, and a target array element to which the target first variable belongs.

Step 208, taking the value of the second variable in the target array element as the instruction detailed information of the target instruction corresponding to the target instruction name.

Step 209, generating the target instruction in the instruction stream through the instruction generator according to the instruction detailed information of the target instruction.

Optionally, the array element is in the form of a key value pair, a key in the key value pair is the first variable, and a key in the key value pair is the second variable.

In the embodiment of the present application, for the steps 206-209, in order to enable the instruction generator to obtain the instruction detailed information of the instruction according to the instruction name of the instruction in a flexible, convenient and efficient manner, the embodiment of the present application constructs the structure type in advance and declares the association array, so that the instruction generator can use the target instruction name of the target instruction as the index of the association array when generating the target instruction.

Specifically, the array element is in a key-value pair (key) form, a key (key) in the key-value pair is a first variable, and a key (value) in the key-value pair is a second variable, so that the associated array forms a form with compact data content and adapting to a matching query scene, on the basis of saving data quantity, a corresponding target array element is quickly positioned in the associated array by taking a target instruction name as an index of the associated array, and corresponding instruction detailed information (a target second variable in the target array element, namely the value corresponding to the index key in the target array element) is obtained for use. Compared with the related art, the matching query process does not need to traverse one by one, and the response time is shorter and the query efficiency is higher in a high-frequency query scene.

For example, referring to FIG. 3, assume that there are two instructions A and B, instruction A has an integer logical register type, an opcode encoding 000, instruction B has a floating point logical register type, and an opcode encoding 111. According to the technical scheme of the application, a structure type can be constructed, 3 variables can be defined in the structure type, the variable 1 represents the instruction name, the variable 2 represents the opcode code, and the variable 3 represents the logic register type. Then, an associated array named instr [ name ] can be declared according to the structure type, the associated array takes the instruction name as a key, two keys A and B are shared in the associated array, the structure type corresponding to the key A comprises a variable 2 recording an opcode code 000 and a variable 3 recording a logical register type as integer, namely instr [ A ]. The opcode=000, instr [ A ]. The function=001, instr [ A ]. The reg_type=int; the structure type corresponding to the key B comprises a variable 2 recording an opcode code 111 and a variable 3 recording a logical register type as a floating point; i.e. instr [ B ] opcode=111, instr [ B ] function=110, instr [ B ] reg_type=fp.

When the subsequent instruction generator generates the instruction stream, assuming that the instruction A is to be generated, the instruction name A of the instruction A can be used as an index, the array element containing the instruction name A as a key can be quickly positioned in an associated array, and the key value corresponding to the key A is used as the instruction detailed information of the instruction A, so that the instruction generator can generate the instruction A in the instruction stream according to the instruction detailed information of the instruction A.

Optionally, the method may further include:

Step 210, the instruction detailed information of the instruction further includes: in the case of other information than the logical register type and the encoded information, adding a third variable corresponding to the other information in the structure type in response to a construction operation; the array element comprises the corresponding relation among the first variable, the second variable and the third variable.

Step 211, assigning other information of the instruction to a third variable of the corresponding array element in the associated array.

Wherein the third variable comprises one or more of a format, an attribute of the instruction.

In the embodiment of the application, based on the data form of the structure type, the embodiment of the application can flexibly expand more instruction forms, namely when expanding instructions with more instruction detailed information (such as the format, the attribute and the like of the instructions), the third variables corresponding to other information except the logic register type and the coding information are correspondingly added in the structure type, and each other information has 1 corresponding third variable. The flexible expansion mode only needs to adjust the variable in the structure type, and the cost is low.

For example, assume that 3 variables are defined in the fabric type, variable 1 characterizes the instruction name, variable 2 characterizes the opcode encoding, and variable 3 characterizes the logical register type. If the instruction detailed information needs to be expanded to include an opcode code, a logic register type, a function code and an instruction format instruction form, a variable 4 corresponding to the function code and a variable 5 corresponding to the instruction format can be added in the structure type. And the variable 4 are 2 newly expanded third variables.

Optionally, the method may further include:

Step 212, setting a third variable of an array element corresponding to the instruction to be null in the process of assigning the associated array for the instruction of which the instruction detailed information does not include the other information.

In the embodiment of the application, after a new instruction form is expanded, aiming at the original instruction of which the instruction detailed information does not comprise other information, a third variable of an array element corresponding to the original instruction can be set to be empty in the associated array during assignment. That is, the embodiment of the application expands a new instruction form and does not influence the normal record of the instruction information of the original instruction in the structure type.

Optionally, the method may further include:

step 213, deleting the selected variable in the structure type in response to the deleting operation.

Step 214, in response to the altering operation, altering the meaning characterized by the selected variable in the structure type.

In the embodiment of the application, some variables in the structure body type can be deleted according to actual requirements, namely, when the structure body type does not need to record some instruction forms, the variables special for the instruction forms are deleted. Of course, some variables in the structure type can be changed according to actual requirements, so as to achieve the purposes of error correction and the like. For example, a variable for recording opcode encoding is changed to recording function encoding.

Fig. 4 is a block diagram of an instruction information processing apparatus according to an embodiment of the present application, where the apparatus includes:

The acquiring module 301 is configured to acquire an instruction name and instruction detailed information of an instruction.

A structure module 302 for acquiring a pre-established structure type; the structure type includes a first variable corresponding to the instruction name and a second variable corresponding to the instruction detailed information.

A declaration module 303, configured to declaratively obtain an associated array including array elements according to the structure type, where the array elements in the associated array are in one-to-one correspondence with the instructions; the array element includes a correspondence between the first variable and the second variable.

And the assignment module 304 is configured to assign the instruction name and the instruction detailed information of the instruction to a first variable and a second variable corresponding to the array element in the associated array respectively.

Optionally, the apparatus further includes:

the name module is used for acquiring a target instruction name generated by the instruction generator aiming at the instruction stream in the process of generating the instruction stream by the instruction generator;

The matching module is used for taking the target instruction name as an index and determining a target first variable matched with the target instruction name in the associated array and a target array element to which the target first variable belongs;

The determining module is used for taking the value of the second variable in the target array element as the instruction detailed information of the target instruction corresponding to the target instruction name;

And the generation module is used for generating the target instruction in the instruction stream through the instruction generator according to the instruction detailed information of the target instruction.

Optionally, the instruction detailed information includes: the logical register type and encoding information of the instruction; the logic register type and the coding information respectively have second variables corresponding to each other;

The assignment module 304 includes:

The first assignment submodule is used for assigning the instruction name of the instruction to a first variable of a corresponding array element in the associated array;

And the second assignment submodule is used for assigning the logic register type of the instruction to a second variable corresponding to the logic register type and assigning the coding information of the instruction to the second variable corresponding to the coding information.

Optionally, the apparatus further includes:

The adding module is configured to, in the instruction detailed information of the instruction, further include: in the case of other information than the logical register type and the encoded information, adding a third variable corresponding to the other information in the structure type in response to a construction operation; the array element comprises the corresponding relation among the first variable, the second variable and the third variable;

The other information module is used for assigning other information of the instruction to a third variable of the corresponding array element in the associated array;

Optionally, the apparatus further includes:

and the setting module is used for setting a third variable of an array element corresponding to the instruction to be empty in the process of assigning the associated array aiming at the instruction of which the instruction detailed information does not comprise the other information.

Optionally, the apparatus further includes:

A deletion module for deleting the selected variable in the structure type in response to a deletion operation;

And the changing module is used for responding to the changing operation and changing the meaning represented by the selected variable in the structure type.

For the device embodiments, since they are substantially similar to the method embodiments, the description is relatively simple, and reference is made to the description of the method embodiments for relevant points.

In this specification, each embodiment is described in a progressive manner, and each embodiment is mainly described by differences from other embodiments, and identical and similar parts between the embodiments are all enough to be referred to each other.

The specific manner in which the various modules perform the operations in the apparatus of the above embodiments have been described in detail in connection with the embodiments of the method, and will not be described in detail herein.

Embodiments of the present application provide a processing device of instruction information, including a memory, and one or more programs, wherein the one or more programs are stored in the memory, and configured to be executed by one or more processors, include means for performing the method described in one or more of the embodiments.

Fig. 5 is a block diagram of an electronic device 600, according to an example embodiment. For example, the electronic device 600 may be a mobile phone, a computer, a digital broadcast terminal, a messaging device, a game console, a tablet device, a medical device, an exercise device, a personal digital assistant, and the like.

Referring to fig. 5, the electronic device 600 may include one or more of the following components: a processing component 602, a memory 604, a power component 606, a multimedia component 608, an audio component 610, an input/output (I/O) interface 612, a sensor component 614, and a communication component 616.

The processing component 602 generally controls overall operation of the electronic device 600, such as operations associated with display, telephone calls, data communications, camera operations, and recording operations. The processing component 602 may include one or more processors 620 to execute instructions to perform all or part of the steps of the methods described above. Further, the processing component 602 can include one or more modules that facilitate interaction between the processing component 602 and other components. For example, the processing component 602 may include a multimedia module to facilitate interaction between the multimedia component 608 and the processing component 602.

The memory 604 is used to store various types of data to support operations at the electronic device 600. Examples of such data include instructions for any application or method operating on the electronic device 600, contact data, phonebook data, messages, pictures, multimedia, and so forth. The memory 604 may be implemented by any type or combination of volatile or nonvolatile memory devices such as Static Random Access Memory (SRAM), electrically erasable programmable read-only memory (EEPROM), erasable programmable read-only memory (EPROM), programmable read-only memory (PROM), read-only memory (ROM), magnetic memory, flash memory, magnetic or optical disk.

The power supply component 606 provides power to the various components of the electronic device 600. The power supply components 606 can include a power management system, one or more power supplies, and other components associated with generating, managing, and distributing power for the electronic device 600.

The multimedia component 608 includes a screen between the electronic device 600 and the user that provides an output interface. In some embodiments, the screen may include a Liquid Crystal Display (LCD) and a Touch Panel (TP). If the screen includes a touch panel, the screen may be implemented as a touch screen to receive input signals from a user. The touch panel includes one or more touch sensors to sense touches, swipes, and gestures on the touch panel. The touch sensor may not only sense demarcations of touch or sliding actions, but also detect durations and pressures associated with the touch or sliding operations. In some embodiments, the multimedia component 608 includes a front camera and/or a rear camera. When the electronic device 600 is in an operational mode, such as a shooting mode or a multimedia mode, the front-facing camera and/or the rear-facing camera may receive external multimedia data. Each front camera and rear camera may be a fixed optical lens system or have focal length and optical zoom capabilities.

The audio component 610 is for outputting and/or inputting audio signals. For example, the audio component 610 includes a Microphone (MIC) for receiving external audio signals when the electronic device 600 is in an operational mode, such as a call mode, a recording mode, and a voice recognition mode. The received audio signals may be further stored in the memory 604 or transmitted via the communication component 616. In some embodiments, audio component 610 further includes a speaker for outputting audio signals.

The I/O interface 612 provides an interface between the processing component 602 and peripheral interface modules, which may be a keyboard, click wheel, buttons, etc. These buttons may include, but are not limited to: homepage button, volume button, start button, and lock button.

The sensor assembly 614 includes one or more sensors for providing status assessment of various aspects of the electronic device 600. For example, the sensor assembly 614 may detect an on/off state of the electronic device 600, a relative positioning of the components, such as a display and keypad of the electronic device 600, the sensor assembly 614 may also detect a change in position of the electronic device 600 or a component of the electronic device 600, the presence or absence of a user's contact with the electronic device 600, an orientation or acceleration/deceleration of the electronic device 600, and a change in temperature of the electronic device 600. The sensor assembly 614 may include a proximity sensor configured to detect the presence of nearby objects in the absence of any physical contact. The sensor assembly 614 may also include a light sensor, such as a CMOS or CCD image sensor, for use in imaging applications. In some embodiments, the sensor assembly 614 may also include an acceleration sensor, a gyroscopic sensor, a magnetic sensor, a pressure sensor, or a temperature sensor.

The communication component 616 is utilized to facilitate communication between the electronic device 600 and other devices, either in a wired or wireless manner. The electronic device 600 may access a wireless network based on a communication standard, such as WiFi, an operator network (e.g., 2G, 3G, 4G, or 5G), or a combination thereof. In one exemplary embodiment, the communication component 616 receives broadcast signals or broadcast-related information from an external broadcast management system via a broadcast channel. In one exemplary embodiment, the communication component 616 further includes a Near Field Communication (NFC) module to facilitate short range communications. For example, the NFC module may be implemented based on Radio Frequency Identification (RFID) technology, infrared data association (IrDA) technology, ultra Wideband (UWB) technology, bluetooth (BT) technology, and other technologies.

In an exemplary embodiment, the electronic device 600 may be implemented by one or more Application Specific Integrated Circuits (ASICs), digital Signal Processors (DSPs), digital Signal Processing Devices (DSPDs), programmable Logic Devices (PLDs), field Programmable Gate Arrays (FPGAs), controllers, microcontrollers, microprocessors, or other electronic elements for implementing the methods provided by the embodiments of the application.

In an exemplary embodiment, a non-transitory computer-readable storage medium is also provided, such as memory 604, including instructions executable by processor 620 of electronic device 600 to perform the above-described method. For example, the non-transitory storage medium may be ROM, random Access Memory (RAM), CD-ROM, magnetic tape, floppy disk, optical data storage device, etc.

Fig. 6 is a block diagram of an electronic device 700, according to an example embodiment. For example, the electronic device 700 may be provided as a server. Referring to fig. 6, electronic device 700 includes a processing component 722 that further includes one or more processors and memory resources represented by memory 732 for storing instructions, such as application programs, executable by processing component 722. The application programs stored in memory 732 may include one or more modules that each correspond to a set of instructions. Further, the processing component 722 is configured to execute instructions to perform the methods provided by embodiments of the present application.

The electronic device 700 may also include a power supply component 726 configured to perform power management of the electronic device 700, a wired or wireless network interface 750 configured to connect the electronic device 700 to a network, and an input output (I/O) interface 758. The electronic device 700 may operate based on an operating system stored in memory 732, such as Windows Server, mac OS XTM, unixTM, linuxTM, freeBSDTM, or the like.

The embodiment of the application also provides a computer program product, comprising a computer program which, when being executed by a processor, realizes the method described in the above embodiment.

Other embodiments of the application will be apparent to those skilled in the art from consideration of the specification and practice of the application disclosed herein. This application is intended to cover any variations, uses, or adaptations of the application following, in general, the principles of the application and including such departures from the present disclosure as come within known or customary practice within the art to which the application pertains. It is intended that the specification and examples be considered as exemplary only, with a true scope and spirit of the application being indicated by the following claims.

It is to be understood that the application is not limited to the precise arrangements and instrumentalities shown in the drawings, which have been described above, and that various modifications and changes may be effected without departing from the scope thereof. The scope of the application is limited only by the appended claims.

Claims

1. A method of processing instruction information, the method comprising:

2. The method according to claim 1, wherein after assigning the instruction name and the instruction detailed information of the instruction to the first variable and the second variable of the corresponding array element in the associated array, respectively, the method further comprises:

In the process of generating an instruction stream by an instruction generator, acquiring a target instruction name generated by the instruction generator aiming at the instruction stream;

taking the target instruction name as an index, and determining a target first variable matched with the target instruction name in the associated array and a target array element to which the target first variable belongs;

Taking the value of the second variable in the target array element as the instruction detailed information of the target instruction corresponding to the target instruction name;

And generating the target instruction in the instruction stream through the instruction generator according to the instruction detailed information of the target instruction.

3. The method of processing instruction information according to claim 1, wherein the instruction detailed information includes: the logical register type and encoding information of the instruction; the logic register type and the coding information respectively have second variables corresponding to each other;

The assigning the instruction name and the instruction detailed information of the instruction to the first variable and the second variable of the corresponding array element in the associated array respectively includes:

Assigning the instruction name of the instruction to a first variable of a corresponding array element in the associated array;

Assigning the logic register type of the instruction to a second variable corresponding to the logic register type, and assigning the coding information of the instruction to the second variable corresponding to the coding information.

4. A method of processing instruction information according to claim 3, characterized in that the method further comprises:

The instruction detailed information of the instruction further comprises: in the case of other information than the logical register type and the encoded information, adding a third variable corresponding to the other information in the structure type in response to a construction operation; the array element comprises the corresponding relation among the first variable, the second variable and the third variable;

assigning other information of the instruction to a third variable of the corresponding array element in the associated array;

5. The method of processing instruction information according to claim 4, characterized in that the method further comprises:

And setting a third variable of an array element corresponding to the instruction to be null in the process of assigning the associated array for the instruction of which the instruction detailed information does not comprise the other information.

6. The method of processing instruction information according to claim 1, characterized in that the method further comprises:

Deleting the selected variable in the structure type in response to a delete operation;

in response to the altering operation, altering the meaning characterized by the selected variable in the structure type.

7. The method according to claim 1, wherein the array element is in the form of a key value pair, a key in the key value pair is the first variable, and a key in the key value pair is the second variable.

8. An apparatus for processing instruction information, the apparatus comprising:

9. An electronic device, comprising: a processor;

A memory for storing the processor-executable instructions;

Wherein the processor is configured to execute the instructions to implement the method of any one of claims 1 to 7.

10. A computer readable storage medium, characterized in that instructions in the computer readable storage medium, when executed by a processor of an electronic device, enable the electronic device to perform the method of any one of claims 1 to 7.