CN118156283A - Microlens structure MicroLED and preparation method thereof - Google Patents
Microlens structure MicroLED and preparation method thereof Download PDFInfo
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- CN118156283A CN118156283A CN202410241226.4A CN202410241226A CN118156283A CN 118156283 A CN118156283 A CN 118156283A CN 202410241226 A CN202410241226 A CN 202410241226A CN 118156283 A CN118156283 A CN 118156283A
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- 238000002161 passivation Methods 0.000 claims abstract description 38
- 239000000758 substrate Substances 0.000 claims abstract description 31
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- 239000011248 coating agent Substances 0.000 claims description 27
- 238000000576 coating method Methods 0.000 claims description 27
- 238000005530 etching Methods 0.000 claims description 13
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- 238000004544 sputter deposition Methods 0.000 claims description 9
- 238000007738 vacuum evaporation Methods 0.000 claims description 9
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- 238000000151 deposition Methods 0.000 claims description 7
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 claims description 6
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims description 6
- 238000001312 dry etching Methods 0.000 claims description 6
- 238000005468 ion implantation Methods 0.000 claims description 6
- 239000000463 material Substances 0.000 claims description 6
- 238000000059 patterning Methods 0.000 claims description 6
- 238000007747 plating Methods 0.000 claims description 6
- 229910052710 silicon Inorganic materials 0.000 claims description 6
- 239000010703 silicon Substances 0.000 claims description 6
- 238000001039 wet etching Methods 0.000 claims description 6
- 238000004519 manufacturing process Methods 0.000 claims description 5
- XKRFYHLGVUSROY-UHFFFAOYSA-N argon Substances [Ar] XKRFYHLGVUSROY-UHFFFAOYSA-N 0.000 claims description 4
- 230000003287 optical effect Effects 0.000 claims description 4
- PXGOKWXKJXAPGV-UHFFFAOYSA-N Fluorine Chemical compound FF PXGOKWXKJXAPGV-UHFFFAOYSA-N 0.000 claims description 3
- FYYHWMGAXLPEAU-UHFFFAOYSA-N Magnesium Chemical compound [Mg] FYYHWMGAXLPEAU-UHFFFAOYSA-N 0.000 claims description 3
- 239000004642 Polyimide Substances 0.000 claims description 3
- 229920001486 SU-8 photoresist Polymers 0.000 claims description 3
- 229910004298 SiO 2 Inorganic materials 0.000 claims description 3
- PNEYBMLMFCGWSK-UHFFFAOYSA-N aluminium oxide Inorganic materials [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 claims description 3
- 229910052786 argon Inorganic materials 0.000 claims description 3
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 claims description 3
- 239000004020 conductor Substances 0.000 claims description 3
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- 230000005669 field effect Effects 0.000 claims description 3
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- 239000001307 helium Substances 0.000 claims description 3
- 229910052734 helium Inorganic materials 0.000 claims description 3
- SWQJXJOGLNCZEY-UHFFFAOYSA-N helium atom Chemical compound [He] SWQJXJOGLNCZEY-UHFFFAOYSA-N 0.000 claims description 3
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Abstract
The invention relates to the technical field of display chips and discloses a micro-lens structure MicroLED and a preparation method thereof, wherein the micro-lens structure MicroLED comprises a driving substrate, a plurality of light-emitting units which are arranged in a rectangular array are arranged on the driving substrate, each light-emitting unit comprises a bonding metal layer, the bottom of each bonding metal layer is connected with the driving substrate, an epitaxial layer is arranged above each bonding metal layer, each epitaxial layer comprises a P-type semiconductor layer, a multiple quantum well layer and an N-type semiconductor layer which are sequentially arranged, the bottom of each P-type semiconductor layer is connected with each bonding metal layer, the middle of each N-type semiconductor layer is etched to form a lens structure, ions are implanted into the outer ring of each N-type semiconductor layer to form a blocking layer, a passivation layer is deposited on the outer wall of each light-reflecting unit, a light outlet is formed in the middle of each passivation layer corresponding to each N-type semiconductor layer, an ITO layer is deposited on the outer wall of each passivation layer, each ITO layer is deposited with an N electrode layer, and each N-type semiconductor layer is electrically connected with each ITO layer.
Description
Technical Field
The invention belongs to the technical field of display chips, and particularly relates to a micro-lens structure MicroLED and a preparation method thereof.
Background
The full name of English of Micro LED is Micro LIGHT EMITTING Diode, chinese is called Micro LED, and can also be written as mu LED, generally refers to a technology of forming a display array by using LED light-emitting units with the size of 1-60 um, the size of the technology is 1/10 of that of human hair, and the technology has the characteristics of no need of backlight, high photoelectric conversion efficiency, ns-level response time and the like, and the technology is characterized in that the LEDs are thinned, miniaturized and arrayed, so that the volume of the LED reaches 1% of that of the main stream LEDs. The color conversion technology is a full-color display technology which can realize high resolution and high efficiency by exciting red and green quantum dot fluorescent materials coated on a Micro-LED chip by ultraviolet or blue light, and has the characteristics of low technical threshold, low cost, easy industrialization and the like, and is widely focused.
Micro LED display panels generally include a plurality of LED pixels (i.e., light emitting units), and conventional Micro LEDs obtain a plurality of completely isolated functional pixels by etching away continuous functional epitaxial layers, but side light emission of the pixels may have structural problems, such as light leakage/side structural defects, and serious optical crosstalk between adjacent pixels, which becomes more serious with further shrinking of the pixels.
Disclosure of Invention
In order to solve the above-mentioned shortcomings in the background art, the present invention aims to provide a microlens structure MicroLED and a preparation method thereof, which can reduce the side wall damage caused by etching and improve the collimation and condensation of light by means of ion implantation and N-type semiconductor layer microstructure.
The aim of the invention can be achieved by the following technical scheme:
The utility model provides a microlens structure MicroLED, including driving substrate, be equipped with a plurality of light emitting units that are rectangular array setting on the driving substrate, light emitting unit includes bonding metal layer, bonding metal layer bottom links to each other with driving substrate, bonding metal layer top is equipped with the epitaxial layer, the epitaxial layer includes P type semiconductor layer that sets gradually, multiple quantum well layer and N type semiconductor layer, P type semiconductor layer bottom is connected with bonding metal layer, etch into the lens structure in the middle of the N type semiconductor layer, N type semiconductor layer outer lane implants the ion and forms the barrier layer, reflection of light unit outer wall deposit has the passivation layer, the light outlet has been seted up in the middle of the passivation layer corresponds N type semiconductor layer, the outer wall deposit of passivation layer has the ITO layer, ITO layer outer wall deposit N electrode layer, N type semiconductor layer passes through ITO layer and N electrode layer electricity is connected.
Further preferably, the drive substrate is a silicon-based CMOS backplate or TFT field effect transistor display substrate, the drive substrate having metal contacts for connection to internal circuitry.
Further preferably, the bonding metal layer is a multilayer structure formed by compounding a metal film or a nonmetal film, and both the metal film and the nonmetal film are conductors.
Further preferably, the passivation layer is made of SiO 2、Al2O3, siN, polyimide or SU-8 photoresist, the projection area of the passivation layer on the driving substrate is larger than the area of the epitaxial layer, the height of the passivation layer is lower than that of the N-type semiconductor layer, and the coverage height of the passivation layer is adjusted according to the light emitting angle of the optical design.
Further preferably, the ITO layer fully covers the epitaxial layer, and a light outlet is formed at a position of the N electrode layer corresponding to the lens structure in the middle of the N-type semiconductor layer, and the top surface of the lens structure in the middle of the N-type semiconductor layer is higher than the N electrode layer.
Further preferably, the barrier implanted ions are one or more of hydrogen, magnesium, nitrogen, fluorine, oxygen, helium, silicon and argon ions.
Further preferably, the N electrode layer material is one or more of metal Cr, ti, pt, au, al, cu, ge and Ni.
A method of making a microlens structure MicroLED comprising the steps of:
s1, plating a first metal layer with a multilayer structure on the surface of an epitaxial layer of an epitaxial wafer through vacuum evaporation coating, vacuum sputtering coating or vacuum ion coating;
S2, plating a second metal layer on the surface of the driving substrate through vacuum evaporation coating, vacuum sputtering coating or vacuum ion coating;
S3, bonding the coated epitaxial wafer and the driving substrate in a flip-chip bonding mode, bonding the first metal layer and the second metal layer to obtain a bonding metal layer, forming good ohmic contact, and removing the epitaxial wafer substrate and the buffer layer;
s4, carrying out micro-structuring on the N-type semiconductor layer through dry etching or wet etching to form a lens structure, wherein the etching thickness is smaller than that of the N-type semiconductor layer;
S5, implanting ions into the microstructure outer ring N-type semiconductor layer through an ion implantation method to form a barrier layer;
S6, etching and grooving the epitaxial layer by dry etching or wet etching, and patterning the bonding metal layer by IBE etching to form an independent light-emitting unit;
S7, PECVD deposits a passivation layer and patterns the passivation layer through IBE, and etches the passivation layer above the lens structure of the N-type semiconductor layer to expose the light emitting surface of the LED;
s8, depositing an ITO layer on the surface of the passivation layer through vacuum evaporation coating, vacuum sputtering coating or vacuum ion coating, so that the ITO layer fully covers the external layer;
and S9, depositing and manufacturing an N electrode layer on the surface of the ITO layer in a photoetching, vapor deposition or lift-off mode, and completing the patterning preparation of the N electrode.
The invention has the beneficial effects that:
According to the invention, the side wall damage caused by etching is reduced by means of ion implantation and the micro-structuring of the N-type semiconductor layer, and meanwhile, the light emergent surface of the N-type semiconductor is of a lens structure, so that light scattered to the periphery can be refracted and gathered towards the middle, and the collimation and condensation of the light are improved.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described, and it will be obvious to those skilled in the art that other drawings can be obtained according to these drawings without inventive effort.
FIG. 1 is a schematic diagram showing a microlens structure MicroLED in embodiment 1 of the present invention;
FIG. 2 is a schematic process flow diagram of step S1 of the present invention;
FIG. 3 is a schematic process flow diagram of step S2 of the present invention;
FIG. 4 is a schematic process flow diagram of step S3 of the present invention;
FIG. 5 is a schematic illustration of the process flow of step S4 of the present invention;
FIG. 6 is a schematic illustration of the process flow of step S5 of the present invention;
FIG. 7 is a schematic illustration of the process flow of step S6 of the present invention;
FIG. 8 is a schematic process flow diagram of step S7 of the present invention;
FIG. 9 is a schematic process flow diagram of step S8 of the present invention;
Fig. 10 is a schematic process flow diagram of step S9 of the present invention.
In the figure: 1-epitaxial wafer, 2-substrate, 3-buffer layer, 4-epitaxial layer, 5-N type semiconductor layer, 6-multiple quantum well layer, 7-P type semiconductor layer, 8-first metal layer, 9-drive base plate, 10-second metal layer, 11-bond metal layer, 12-barrier layer, 13-passivation layer, 14-ITO layer, 15-N electrode layer.
Detailed Description
The technical solutions of the embodiments of the present invention will be clearly and completely described below in conjunction with the embodiments of the present invention, and it is apparent that the described embodiments are only some embodiments of the present invention, not all embodiments. All other embodiments, which can be made by those skilled in the art based on the embodiments of the invention without making any inventive effort, are intended to be within the scope of the invention.
As shown in fig. 1, the invention provides a microlens structure MicroLED, which comprises a driving substrate 9, a plurality of light-emitting units arranged in a rectangular array are arranged on the driving substrate 9, each light-emitting unit comprises a bonding metal layer 11, the bottom of the bonding metal layer 11 is connected with the driving substrate 9, an epitaxial layer 4 is arranged above the bonding metal layer 11, the epitaxial layer 4 comprises a P-type semiconductor layer 7, a multiple quantum well layer 6 and an N-type semiconductor layer 5 which are sequentially arranged, the bottom of the P-type semiconductor layer 7 is connected with the bonding metal layer 11, the middle of the N-type semiconductor layer 5 is etched into a lens structure, the outer ring of the N-type semiconductor layer 5 is implanted with ions to form a blocking layer 12, the outer wall of each light-reflecting unit is deposited with a passivation layer 13, the middle of the passivation layer 13 is provided with an ITO light outlet, the outer wall of the passivation layer 13 is deposited with an ITO layer 14, the outer wall of the passivation layer 14 is deposited with an N electrode layer 15, and the N-type semiconductor layer 5 is electrically connected with the N electrode layer 15 through the ITO layer 14.
In some embodiments, the drive substrate 9 is a silicon-based CMOS backplate or TFT field effect transistor display substrate, the drive substrate 9 having metal contacts for connection to internal circuitry.
In some embodiments, the bonding metal layer 11 is a multilayer structure formed by compounding a metal film or a nonmetal film, and the metal film and the nonmetal film are conductors, for example: cr, ni, au, ag, sn, ti, pt, pb or a conductive oxide such as ITO.
In some embodiments, the passivation layer 13 is made of SiO 2、Al2O3, siN, polyimide or SU-8 photoresist, or other photo-patternable polymer, the projected area of the passivation layer 13 on the driving substrate 9 is larger than the area of the epitaxial layer 4, the passivation layer 13 is lower than the N-type semiconductor layer 5, and the coverage height of the passivation layer 13 is adjusted according to the optical design light-emitting angle.
In some embodiments, the ITO layer 14 fully covers the epitaxial layer 4, and a light outlet is formed at a position of the N electrode layer 15 corresponding to the lens structure in the middle of the N-type semiconductor layer 5, and the top surface of the lens structure in the middle of the N-type semiconductor layer 5 is higher than the N electrode layer 15.
In some embodiments, barrier layer 12 is implanted with ions of one or more of hydrogen, magnesium, nitrogen, fluorine, oxygen, helium, silicon, and argon.
In some embodiments, the N electrode layer 15 material is one or more of metal Cr, ti, pt, au, al, cu, ge and Ni.
Fig. 2 to 9 illustrate schematic structural diagrams of the microlens structure MicroLED at different stages in the preparation process, and the preparation method specifically includes the following steps:
s1, plating a first metal layer 8 with a multilayer structure on the surface of an epitaxial layer 4 of an epitaxial wafer 1 through vacuum evaporation coating, vacuum sputtering coating or vacuum ion coating;
s2, plating a second metal layer 10 on the surface of the driving substrate 9 through vacuum evaporation coating, vacuum sputtering coating or vacuum ion coating;
s3, bonding the coated epitaxial wafer 1 and the driving substrate 9 in a flip-chip bonding mode, and bonding the first metal layer 8 and the second metal layer 10 to obtain a bonding metal layer 11, so that good ohmic contact is formed, and removing the substrate 2 and the buffer layer 3 of the epitaxial wafer 1;
S4, carrying out micro-structuring on the N-type semiconductor layer 5 through dry etching or wet etching to form a lens structure, wherein the etching thickness is smaller than the thickness of the N-type semiconductor layer 5;
S5, implanting ions into the microstructure outer ring N-type semiconductor layer 5 through an ion implantation method to form a barrier layer 12;
S6, etching and grooving the epitaxial layer 4 by dry etching or wet etching, and patterning the bonding metal layer 11 by IBE etching to form an independent light-emitting unit;
s7, PECVD deposits a passivation layer 13 and patterns the passivation layer 13 above the lens structure of the N-type semiconductor layer 5 through IBE, and the passivation layer 13 is etched to expose the light emitting surface of the LED;
S8, depositing an ITO layer 14 on the surface of the passivation layer 13 through vacuum evaporation coating, vacuum sputtering coating or vacuum ion coating, so that the ITO layer 14 fully covers the epitaxial layer 4, the ITO has good conductivity and transparency, better conductivity can be provided by combining the N electrode layer 15, and the resistivity is reduced;
and S9, depositing and manufacturing an N electrode layer 15 on the surface of the ITO layer in a photoetching, vapor deposition or lift-off mode, and completing the patterning preparation of the N electrode.
In the description of the present specification, the descriptions of the terms "one embodiment," "example," "specific example," and the like, mean that a particular feature, structure, material, or characteristic described in connection with the embodiment or example is included in at least one embodiment or example of the present invention. In this specification, schematic representations of the above terms do not necessarily refer to the same embodiments or examples. Furthermore, the particular features, structures, materials, or characteristics described may be combined in any suitable manner in any one or more embodiments or examples.
The foregoing has shown and described the basic principles, principal features and advantages of the invention. It will be understood by those skilled in the art that the present invention is not limited to the embodiments described above, and that the above embodiments and descriptions are merely illustrative of the principles of the present invention, and various changes and modifications may be made without departing from the spirit and scope of the invention, which is defined in the appended claims.
Claims (8)
1. The utility model provides a microlens structure MicroLED, its characterized in that, includes the drive base plate, be equipped with a plurality of luminescence units that are rectangular array and set up on the drive base plate, luminescence unit includes bonding metal layer, bonding metal layer bottom links to each other with the drive base plate, bonding metal layer top is equipped with the epitaxial layer, the epitaxial layer is including P type semiconductor layer, multiple quantum well layer and the N type semiconductor layer that set gradually, P type semiconductor layer bottom is connected with bonding metal layer, etching becomes the lens structure in the middle of the N type semiconductor layer, ion implantation forms the barrier layer in N type semiconductor layer outer lane, reflection of light unit outer wall deposit has the passivation layer, the light outlet has been seted up in the middle of the passivation layer corresponds the N type semiconductor layer, the deposition of passivation layer outer wall has the ITO layer, ITO layer outer wall deposit N electrode layer, N type semiconductor layer passes through the ITO layer and is connected with N electrode layer electricity.
2. The microlens structure MicroLED of claim 1 wherein the drive substrate is a silicon-based CMOS backplate or TFT field effect transistor display substrate, the drive substrate having metal contacts for connection to internal circuitry.
3. The microlens structure MicroLED of claim 1 wherein the bonding metal layer is a multilayer structure of metal films or nonmetallic films, both of which are conductors.
4. The microlens structure MicroLED of claim 1, wherein the passivation layer is made of SiO 2、Al2O3, siN, polyimide or SU-8 photoresist, the projected area of the passivation layer on the drive substrate is larger than the area of the epitaxial layer, the passivation layer height is lower than the N-type semiconductor layer height, and the passivation layer coverage height is adjusted according to the optical design light angle.
5. The microlens structure MicroLED as set forth in claim 1, wherein the ITO layer forms a full coverage to the epitaxial layer, a light outlet is formed at a position of the N electrode layer corresponding to the lens structure in the middle of the N-type semiconductor layer, and a top surface of the lens structure in the middle of the N-type semiconductor layer is higher than the N electrode layer.
6. The microlens structure MicroLED of claim 1 wherein the barrier implanted ions are one or more of hydrogen, magnesium, nitrogen, fluorine, oxygen, helium, silicon and argon ions.
7. The microlens structure MicroLED of claim 1 wherein the N electrode layer material is one or more of metal Cr, ti, pt, au, al, cu, ge and Ni.
8. The method of manufacturing a microlens structure MicroLED according to any one of claims 1 to 7, comprising the steps of:
s1, plating a first metal layer with a multilayer structure on the surface of an epitaxial layer of an epitaxial wafer through vacuum evaporation coating, vacuum sputtering coating or vacuum ion coating;
S2, plating a second metal layer on the surface of the driving substrate through vacuum evaporation coating, vacuum sputtering coating or vacuum ion coating;
S3, bonding the coated epitaxial wafer and the driving substrate in a flip-chip bonding mode, bonding the first metal layer and the second metal layer to obtain a bonding metal layer, forming good ohmic contact, and removing the epitaxial wafer substrate and the buffer layer;
s4, carrying out micro-structuring on the N-type semiconductor layer through dry etching or wet etching to form a lens structure, wherein the etching thickness is smaller than that of the N-type semiconductor layer;
S5, implanting ions into the microstructure outer ring N-type semiconductor layer through an ion implantation method to form a barrier layer;
S6, etching and grooving the epitaxial layer by dry etching or wet etching, and patterning the bonding metal layer by IBE etching to form an independent light-emitting unit;
S7, PECVD deposits a passivation layer and patterns the passivation layer through IBE, and etches the passivation layer above the lens structure of the N-type semiconductor layer to expose the light emitting surface of the LED;
s8, depositing an ITO layer on the surface of the passivation layer through vacuum evaporation coating, vacuum sputtering coating or vacuum ion coating, so that the ITO layer fully covers the external layer;
and S9, depositing and manufacturing an N electrode layer on the surface of the ITO layer in a photoetching, vapor deposition or lift-off mode, and completing the patterning preparation of the N electrode.
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