CN118151714B - Charging and discharging digital-analog mixed voltage compensation method - Google Patents
Charging and discharging digital-analog mixed voltage compensation method Download PDFInfo
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- 238000005070 sampling Methods 0.000 claims description 5
- 238000006243 chemical reaction Methods 0.000 claims description 4
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- HEZMWWAKWCSUCB-PHDIDXHHSA-N (3R,4R)-3,4-dihydroxycyclohexa-1,5-diene-1-carboxylic acid Chemical compound O[C@@H]1C=CC(C(O)=O)=C[C@H]1O HEZMWWAKWCSUCB-PHDIDXHHSA-N 0.000 claims description 3
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- 238000010586 diagram Methods 0.000 description 3
- 230000003321 amplification Effects 0.000 description 2
- 238000013459 approach Methods 0.000 description 2
- 230000009286 beneficial effect Effects 0.000 description 2
- 230000008901 benefit Effects 0.000 description 2
- 230000003247 decreasing effect Effects 0.000 description 2
- 230000006386 memory function Effects 0.000 description 2
- 238000003199 nucleic acid amplification method Methods 0.000 description 2
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- 238000012423 maintenance Methods 0.000 description 1
- 238000010295 mobile communication Methods 0.000 description 1
- 239000012120 mounting media Substances 0.000 description 1
- 230000003287 optical effect Effects 0.000 description 1
- 230000000644 propagated effect Effects 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
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- 238000011105 stabilization Methods 0.000 description 1
- 239000013589 supplement Substances 0.000 description 1
- 230000001629 suppression Effects 0.000 description 1
- 230000009466 transformation Effects 0.000 description 1
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- G05F1/46—Regulating voltage or current wherein the variable actually regulated by the final control device is dc
- G05F1/56—Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices
- G05F1/565—Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices sensing a condition of the system or its load in addition to means responsive to deviations in the output of the system, e.g. current, voltage, power factor
- G05F1/567—Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices sensing a condition of the system or its load in addition to means responsive to deviations in the output of the system, e.g. current, voltage, power factor for temperature compensation
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Abstract
The invention provides a charge-discharge digital-analog mixed voltage compensation method, which comprises the following steps: setting a target voltage; monitoring the voltage in real time; comparing voltages; a switch control; threshold region allocation; nested accumulation compensation; digital logic operations; voltage regulation is performed. According to the invention, the target output voltage is stored in the chip, the real-time voltage is detected, a plurality of unidirectional switches are arranged, the voltage output of the voltage output circuit is regulated independently by adopting an on-chip gradient linear compensation or reduction mode, the stability and the accuracy of the output voltage are kept, and the stability of the voltage output circuit is realized; the voltage stabilizing circuit is not influenced by environmental parameters such as temperature, and the like, and can control the voltage stabilizing output by directly controlling the charging and discharging of a plurality of switches through limited logic, and even under the condition of changing external conditions, the voltage stabilizing circuit can be adaptively applied to various electronic systems and integrated circuits with extremely high requirements on the voltage stabilizing, so that the efficiency and the stability of the digital-analog mixed voltage output circuit are improved, and the voltage output adjustment with higher efficiency and higher speed is realized.
Description
Technical Field
The invention relates to the technical field of voltage output regulation, in particular to a charge-discharge digital-analog mixed voltage compensation method.
Background
In the voltage output circuit, a temperature compensation resistor is generally used for compensating errors caused by temperature of a sensitive element with large ambient temperature value drift, so that the voltage of a voltage output end is stabilized, and the accuracy of the output voltage is improved. In the thermal resistance temperature measurement system, a thermal resistance is connected with a signal acquisition module, an analog-digital converter converts a micro signal into a digital signal, the digital signal is calculated into a temperature value, and finally the temperature value is transmitted to a controller, so that a temperature compensation resistor is adjusted to correct output voltage.
However, the manner of realizing voltage stabilization by regulating the temperature compensation resistor in the prior art has the following disadvantages:
1. The temperature sensing and compensating mechanism cannot respond to rapid temperature change immediately, and the response time is long, so that short-time output instability can be caused.
2. The temperature compensation circuit is usually designed to have a predetermined operating temperature range beyond which the temperature compensation performance cannot be ensured and the compensation range is limited.
3. The electronic components, including the temperature compensation resistor itself, experience parameter drift or aging as the time of use increases, reducing the accuracy of the compensation.
4. The temperature compensation resistor needs to be calibrated regularly to keep the temperature compensation accurate, and the resistor calibration requirement increases maintenance workload and cost.
Disclosure of Invention
In view of this, the present invention aims to provide a self-adaptive charge-discharge digital-analog mixed voltage compensation method, which is capable of storing a target output voltage and detecting the performance of a real-time voltage in a chip, and is provided with a plurality of unidirectional switches, and the voltage output of a voltage output circuit is autonomously adjusted by adopting an on-chip gradient linear compensation or reduction mode, so as to maintain the stability and accuracy of the output voltage, realize the stability of the voltage output circuit, improve the efficiency and stability of the digital-analog mixed voltage output circuit, and apply the method to various electronic systems and integrated circuits with extremely high requirements on the voltage stability, thereby realizing more efficient and rapid voltage output adjustment.
The invention provides a charge-discharge digital-analog mixed voltage compensation method, which is suitable for a DCDC power supply chip and comprises the following steps:
S1, a storage unit is arranged in a chip, a digital output value of a preset target voltage is stored in the storage unit, and the digital output value of the target voltage is used as an ideal voltage level maintained by a voltage output circuit;
s2, monitoring the voltage of an output end of the voltage output circuit in real time, and converting the voltage of the output end into a digital signal through an analog-digital converter ADC to obtain a real-time digital output voltage;
S3, comparing the real-time digital output voltage with the digital output value of the target voltage; judging whether the real-time digital output voltage (actual voltage) is higher than, lower than or within the allowable range of the target voltage according to a preset threshold region;
S4, determining a charge-discharge strategy to be adopted according to the voltage comparison result of the step S3, and performing switch control; the charge-discharge strategy comprises the following steps: if the real-time digital output voltage (actual voltage) is lower than the target voltage, starting one or more groups of unidirectional charging switches to boost the voltage to the target voltage;
if the real-time digital output voltage (actual voltage) is higher than the target voltage, one or more groups of unidirectional discharge switches are started to reduce the voltage to the target voltage;
s5, setting a threshold area, distributing an operation range into different operation areas according to the threshold area, determining the threshold area where the real-time digital output voltage (actual voltage) is located, and selecting a corresponding charge-discharge switch group to operate;
s6, controlling a plurality of sets of unidirectional charge-discharge switches of the charge-discharge switch group in a nested accumulation mode, and adjusting the voltage at different levels and precision to control the increase and decrease of the voltage more finely;
S7, quickly determining the state of the charge and discharge switch corresponding to the charge and discharge switch group by utilizing the matching attribute of the digital logic circuit, wherein the method comprises the following steps:
s71, generating a digital signal by using a microcontroller and a logic gate digital circuit; these signals are typically binary and may be at a high level (logic "1") or a low level (logic "0");
S72, designing a digital logic circuit to execute specific logic operations, wherein the logic operations comprise: basic AND, OR, NOT logic, more complex NAND, NOR, XOR logic, and complex logic;
S73, integrating the digital logic circuit with a switch circuit (such as a transistor, a relay, a solid-state relay and the like); the signal generated by the digital logic circuit controls the switching state (on or off) of the switching circuit;
S74, for applications requiring voltage control (such as battery charging and discharging or power management), designing corresponding logic circuits to determine when and how to switch voltage lines or adjust voltage levels, and ensuring that the logic states of the logic circuits remain synchronized with the actual switching states. For example, a logic "1" indicates that the switch is closed, and a logic "0" indicates that the switch is open.
The charge-discharge switch group includes components such as decoders, multiplexers, etc. to simplify the switch control logic. Digital logic operation in combination with switching circuitry generally involves the use of digital signals to control the state of switches in a power supply or other electrical system. This approach can be used in a variety of applications, from basic switching control to more complex voltage regulation and power management systems.
Digital circuits or digital integrated circuits are complex circuits consisting of many logic gates. Compared with an analog circuit, the digital signal processing circuit mainly processes digital signals (namely signals are represented by 0 and 1 states), so that the anti-interference capability is higher. Digital integrated circuits have various gates, flip-flops, and various combinational and sequential logic circuits formed therefrom. A digital system generally comprises a control unit and an arithmetic unit, wherein the control unit controls the arithmetic unit to perform actions to be executed under the driving of a clock. The digital circuit may be interconnected with the analog circuit by an analog-to-digital converter, a digital-to-analog converter.
The combination logic circuit is called a combination circuit for short, and is formed by combining the most basic logic gate circuits. The characteristics are that: the output value is only related to the current input value, i.e. the output is uniquely determined by the current input value. The circuit has no memory function, and the output state changes with the change of the input state, similar to a resistive circuit, such as an adder, a decoder, an encoder, a data selector, and the like.
The sequential logic circuit is a circuit formed by combining a most basic logic gate circuit and a feedback logic loop (output to input) or devices, and the most essential difference between the sequential logic circuit and the combined circuit is that the sequential circuit has a memory function. The sequential circuit is characterized in that: the output depends not only on the input value at the time, but also on the past state of the circuit. It is similar to circuits containing the inductance or capacitance of a storage element, such as flip-flops, latches, counters, shift registers, memories, etc., which are typical devices of sequential circuits.
The digital circuit is divided into a discrete component digital circuit and an integrated digital circuit according to the existence of integrated components in the circuit. Integrated circuits are classified according to their integration level, and can be classified into small-scale integrated digital circuits (SSI), medium-scale integrated digital circuits (MSI), large-scale integrated digital circuits (LSI), and very-large-scale integrated digital circuits (VLSI). Semiconductor devices constituting a circuit are classified into bipolar digital circuits and unipolar digital circuits.
S8, activating an executing element based on a control algorithm, executing charging or discharging operation, and dynamically adjusting voltage according to requirements; after the charge or discharge adjustment, the output voltage is continuously monitored, and if the adjusted voltage still does not reach the target voltage or a new deviation occurs, the comparison and adjustment processes of the steps S3-S8 are repeated until the output voltage is stabilized at the target voltage level.
Further, the method of storing the digital output value of the preset target voltage in the storage unit in the step S1 includes the steps of:
s11, determining an ideal output voltage value for ensuring normal operation of a chip and a system circuit according to circuit design requirements and application scenes; the output voltage value stabilizes the circuit.
S12, converting the determined output voltage value into a digital value of a digitally represented target voltage through a lookup table, an algorithm or a preset conversion mode so as to be compatible with a digital circuit;
S13, storing the digital value of the target voltage in a nonvolatile memory unit in a chip, such as a read-only memory (ROM), a programmable read-only memory (PROM), a flash memory or other types of memories, and loading the digital value of the target voltage into a rapidly accessible register or a memory unit for real-time comparison after power-up or reset.
Further, the method for monitoring the output terminal voltage of the voltage output circuit in real time in the step S2 includes the following steps:
S21, determining target nodes of which key performances to be monitored of the chip and the system circuit are greatly influenced by voltage variation; such as a power supply node of the core processor or an analog interface circuit.
S22, detecting the voltage of the target node by matching an analog voltage sensor with an analog-digital converter ADC; these sensors are typically used in conjunction with an analog-to-digital converter (ADC) to convert the analog voltage signal to a digital signal for processing by digital circuitry.
Analog circuits are circuits used to transmit, transform, process, amplify, measure, and display analog signals. Analog signals refer to continuously varying electrical signals. The analog circuit is the basis of an electronic circuit and mainly comprises an amplifying circuit, a signal operation and processing circuit, an oscillating circuit, a modulation and demodulation circuit, a power supply and the like.
The characteristics of the analog circuit include: the value of the function is infinite. When the image information changes, the waveform of the signal also changes, i.e. the information to be propagated by the analog signal is contained in its waveform (the law of change of the information is directly reflected on the changes in amplitude, frequency and phase of the analog signal). The primary analog circuit mainly solves two major aspects: 1. amplification 2, signal source. The analog signal has a continuity.
The functions of the analog circuit include: an amplifying circuit: for voltage, current or power amplification of signals. And a filter circuit: for signal extraction, transformation or interference rejection. An arithmetic circuit: and (3) finishing operations of proportion, addition, subtraction, multiplication, division, integration, differentiation, logarithm, index and the like of the signals. A signal conversion circuit: for converting a current signal into a voltage signal or a voltage signal into a current signal, converting a direct current signal into an alternating current signal or an alternating current signal into a direct current signal, and converting a direct current voltage into a frequency proportional thereto. A signal generating circuit: for generating sine waves, rectangular waves, triangular waves, saw-tooth waves. DC power supply: 220V and 50Hz alternating current is converted into direct current with different output voltages and currents, and the direct current is used as a power supply of various electronic circuits.
S23, setting the sampling frequency of an analog-digital converter ADC for the measured voltage; the sampling frequency should be high enough to capture rapid changes in voltage, but not too high to cause unnecessary power consumption. The resolution of the ADC determines the minimum voltage change that can be detected. The higher the resolution, the finer the monitoring of the voltage by the system circuitry, but this also means higher cost and power consumption.
S24, a filter and an amplifier circuit are arranged in front of the analog-digital converter ADC to regulate the voltage signal, so that the quality of the voltage signal is ensured, such as noise reduction and interference suppression, and the accuracy of monitoring data is ensured.
The real-time monitoring is continuous, and the ADC continuously reads the voltage value; or based on a specific trigger condition, for example, when the voltage fluctuation exceeds a predetermined threshold.
Further, the method of comparing the real-time digital output voltage with the digital output value of the target voltage in the step S3 includes the steps of:
S31, at a hardware level, voltage comparison is realized by a comparator Commemorator or by an analog-digital converter ADC combined with a software algorithm; the comparator can provide simple high/low output, while the ADC provides richer voltage difference information;
S32, setting a reference voltage value, wherein the reference voltage value is directly used as one of the inputs when the comparator is used; using the reference voltage value for subsequent digital comparisons when using an ADC; this reference voltage value is typically derived from the target voltage setting.
S33, obtaining a real-time voltage value of a current target node of the system circuit through ADC or direct measurement;
S34, automatically executing comparison operation by a comparator, and outputting a logic high signal by the comparator if the real-time voltage is higher than the reference voltage; outputting a logic low signal if the real-time voltage is lower than the reference voltage; for digital systems, the comparison operation may be a software algorithm that compares the ADC readings to target voltage values stored in registers;
S35, setting a threshold value or a tolerance range of deviation between the real-time digital output voltage and the target voltage, and determining when the voltage deviation exceeds a normal range for natural fluctuation of the voltage caused by load change and temperature fluctuation;
s36, when the deviation between the real-time digital output voltage and the target voltage exceeds a threshold value, the system circuit takes corresponding measures including adjusting the output of the power supply or activating a related protection mechanism;
S37, introducing a hysteresis mechanism, triggering adjustment only after the voltage continuously exceeds a threshold value for a period of time, and preventing frequent switching and jitter phenomenon caused by adjustment;
s38, using the result of the voltage comparison as a voltage or a digital signal of a feedback signal, wherein the feedback signal is used for guiding the action of a voltage adjustment mechanism in a closed-loop control system.
Further, the method for controlling the switch in the step S4 comprises the following steps:
S41, determining targets and requirements of switch control, including: switching speed, response time, efficiency and reliability, and designing a control strategy according to the targets and requirements to ensure that the control strategy can rapidly and accurately react when the voltage is abnormal;
S42, selecting an applicable switching device according to the voltage and current levels and the switching frequency to be controlled; common switching devices include transistors (e.g., BJT, MOSFET, IGBT), relays, solid State Relays (SSR), and thyristors (SCR).
S43, controlling the switching device to be turned on and off by the adaptive driving circuit; for transistors, appropriate gate voltages need to be provided; for a relay, sufficient current is required to activate the coil.
S44, controlling the output voltage of the voltage output circuit by adjusting the on-off time proportion of the switching device by adopting a Pulse Width Modulation (PWM) method;
in many applications, particularly in power converters, pulse Width Modulation (PWM) is a common method of controlling the output voltage.
S45, continuously comparing the digital output voltage value monitored in real time with the digital output of the preset target voltage through a feedback loop to realize a closed-loop control system, and adjusting the switch state according to the comparison result to maintain the required voltage level.
Further, the method for setting the threshold area in the step S5 and allocating different operation areas according to the threshold area includes the following steps:
s51, setting a plurality of thresholds to define different operation areas; for example, for a voltage, a minimum threshold and several different levels of maximum threshold may be set.
S52, dividing the whole operation range into a plurality of operation areas according to the plurality of thresholds; for example, there may be "normal operation region", "warning region", "danger region", and the like.
S53, defining a set of associated control logic for each operation area; in the normal operation area, the system circuit works normally as expected; in the warning area, the system circuit sends out a warning signal and takes precautions; within the hazard zone, the system circuitry enforces a protection action. Such as disconnecting the power supply or switching to a standby system.
Further, the method for controlling the multiple sets of unidirectional charge-discharge switches of the charge-discharge switch group in the step S6 by adopting the nested accumulation mode comprises the following steps:
s61, comparing the current output voltage of the voltage output circuit with a preset target voltage, and identifying errors;
S62, accumulating the error of the current period to the previous accumulated error as an integration process to help eliminate steady-state error;
Nested accumulation compensation typically involves multiple control loops. Within the primary control loop, there may be one or more secondary control loops. Each control loop controls a switch while each secondary control loop adjusts independently based on their error accumulation.
S63, dynamic compensation: the control signal is dynamically adjusted to compensate for these errors based on the accumulated errors. Including increasing or decreasing voltage, current, or other necessary control variables.
Further, the method for dynamically adjusting the voltage according to the requirement in the step S8 comprises the following steps:
s81, determining a correct regulation action of the output voltage by adopting a strategy such as a proportional-integral-derivative PID control algorithm, and changing the output voltage by using the correct regulation action so as to correct any deviation;
S82, activating an executive component, such as a regulating Switch Mode Power Supply (SMPS), a linear voltage regulator or a power transistor, and the like to regulate the output voltage according to the output of the control algorithm; the energy output of the voltage output circuit is increased or decreased by the actuator according to the requirement, so as to adjust the output voltage. For example, altering the switching frequency or duty cycle is involved in SMPS.
Through the flow of steps S1-S8, the chip is able to autonomously adjust its voltage output to remain stable and accurate even in the event of a change in external conditions. The adaptive voltage compensation method can be used for various electronic systems and integrated circuits, particularly for applications requiring extremely high voltage stability, such as temperature compensation circuits.
The temperature compensation circuit belongs to the technical field of electronic circuits and comprises a voltage stabilizing diode and a thermistor which are adopted in the circuit. In the connection relation of the temperature compensation circuit, after the thermistor, the temperature compensation circuit is connected to an operational amplifier circuit through an adjustable potentiometer, and the negative end of the amplifier circuit is connected with the output end of the circuit. The circuit has simple structure, is accurate and reliable, and can be suitable for temperature compensation of sensitive elements with large temperature value drift.
The temperature compensation is to make the reference temperature of the free end of the temperature sensor more proper. Most temperature sensors require temperature compensation, and a common temperature compensation method is a bridge compensation method.
In some electronic products, electronic components with positive temperature coefficient and negative temperature coefficient are used, and for example, the resistance of the positive temperature coefficient increases with temperature, and the resistance value increases. The negative temperature coefficient of resistance is the opposite and decreases with increasing temperature.
In applications such as a sensor, if a temperature coefficient element is used alone, the error will be relatively large, and if a combination of positive and negative temperature coefficient elements is used, the positive and negative phases are balanced, and the error will be relatively small.
According to the invention, a storage unit is arranged on a chip, and a target voltage digital output value is recorded; setting a voltage measuring unit, and recording and converting the voltage into a real-time digital output voltage in real time; setting a logic comparison unit to compare the real-time digital output voltage with a target voltage digital output value; setting a plurality of threshold areas, setting a plurality of sets of unidirectional charge-discharge switches, wherein one side of each charge-discharge switch is connected with a high level, and the other side of each charge-discharge switch is connected with a low level, carrying out regional charge-discharge according to the threshold area where the real-time digital output voltage is located to supplement the plurality of sets of unidirectional charge-discharge switches, adopting a nested accumulation mode, and adopting a multilayer nested mode to have good matching properties with a digital logic circuit, namely, only detecting the corresponding bit height.
The present invention also provides a computer readable storage medium having stored thereon a computer program which when executed by a processor performs the steps of the charge-discharge digital-analog hybrid voltage compensation method as described above.
The invention also provides a computer device which comprises a memory, a processor and a computer program stored on the memory and capable of running on the processor, wherein the processor executes the program to realize the steps of the charge-discharge digital-analog hybrid voltage compensation method.
Compared with the prior art, the invention has the beneficial effects that:
According to the charge-discharge voltage compensation method provided by the invention, the target output voltage is stored in the chip, the performance of detecting the real-time voltage is realized, a plurality of unidirectional switches are arranged, the voltage output of the voltage output circuit is regulated automatically by adopting an on-chip gradient linear compensation or reduction mode, the stability and the accuracy of the output voltage are maintained, and the stability of the voltage output circuit is realized; compared with the traditional voltage regulation scheme, the scheme of the invention is not influenced by environmental parameters such as temperature, and the like, and the charge and discharge of a plurality of switches can be directly controlled through limited logic, so that voltage stable output can be controlled, and even under the condition of changing external conditions, the self-adaptive voltage compensation method can be applied to various electronic systems and integrated circuits with extremely high requirements on voltage stability, thereby improving the efficiency and stability of the digital-analog mixed voltage output circuit and realizing more efficient and rapid voltage output regulation.
Drawings
Various other advantages and benefits will become apparent to those of ordinary skill in the art upon reading the following detailed description of the preferred embodiments. The drawings are only for purposes of illustrating the preferred embodiments and are not to be construed as limiting the invention.
In the drawings:
FIG. 1 is a flow chart of a charge-discharge digital-analog mixed voltage compensation method according to the present invention;
FIG. 2 is a flow chart of a method for storing a digital output value of a preset target voltage in a memory cell according to the present invention;
FIG. 3 is a flow chart of a method for monitoring the voltage at the output end of a voltage output circuit in real time according to the present invention;
FIG. 4 is a flow chart of a method of comparing a real-time digital output voltage with a digital output value of the target voltage according to the present invention;
FIG. 5 is a flow chart of a method of switch control according to the present invention;
FIG. 6 is a flow chart of a method for setting a threshold region and assigning different operation regions according to the threshold region according to the present invention;
FIG. 7 is a flow chart of a method for controlling multiple sets of unidirectional charge-discharge switches of a charge-discharge switch set by a nested accumulation mode according to the present invention;
FIG. 8 is a flow chart of a method for quickly determining the charge-discharge switch states corresponding to the charge-discharge switch groups by using the matching attribute of the digital logic circuit;
FIG. 9 is a flow chart of a method for dynamically adjusting voltage according to requirements in accordance with the present invention;
FIG. 10 is a schematic diagram of the basic circuit structure of an embodiment of the present invention;
fig. 11 is a schematic diagram of a computer device according to an embodiment of the invention.
Detailed Description
Reference will now be made in detail to exemplary embodiments, examples of which are illustrated in the accompanying drawings. When the following description refers to the accompanying drawings, the same numbers in different drawings refer to the same or similar elements, unless otherwise indicated. The implementations described in the following exemplary examples are not representative of all implementations consistent with the present disclosure. Rather, they are merely examples of apparatus and products consistent with some aspects of the disclosure as detailed in the appended claims.
The terminology used in the present disclosure is for the purpose of describing particular embodiments only and is not intended to be limiting of the disclosure. As used in this disclosure and the appended claims, the singular forms "a," "an," and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise. It should also be understood that the term "and/or" as used herein refers to and encompasses any or all possible combinations of one or more of the associated listed items.
It should be understood that although the terms first, second, third, etc. may be used in this disclosure to describe various information, these information should not be limited to these terms. These terms are only used to distinguish one type of information from another. For example, first information may also be referred to as second information, and similarly, second information may also be referred to as first information, without departing from the scope of the present disclosure. The word "if" as used herein may be interpreted as "at … …" or "at … …" or "in response to a determination" depending on the context.
Embodiments of the present invention are described in further detail below.
The embodiment of the invention provides a charge-discharge digital-analog mixed voltage compensation method, which is suitable for a DCDC power supply chip, and is shown in FIG. 1, and comprises the following steps:
S1, a storage unit is arranged in a chip, a digital output value of a preset target voltage is stored in the storage unit, and the digital output value of the target voltage is used as an ideal voltage level maintained by a voltage output circuit;
The method for storing the digital output value of the preset target voltage in the memory cell, as shown in fig. 2, comprises the following steps:
S11, determining an ideal output voltage value for ensuring normal operation of a chip and a system circuit according to circuit design requirements and application scenes;
S12, converting the determined output voltage value into a digital value of a digitally represented target voltage through a lookup table, an algorithm or a preset conversion mode so as to be compatible with a digital circuit;
S13, storing the digital value of the target voltage in a nonvolatile memory unit in a chip, and loading the digital value of the target voltage into a rapidly accessible register or a memory unit for real-time comparison after power-on or reset.
S2, monitoring the voltage of an output end of the voltage output circuit in real time, and converting the voltage of the output end into a digital signal through an analog-digital converter ADC to obtain a real-time digital output voltage;
the method for monitoring the voltage of the output end of the voltage output circuit in real time is shown in fig. 3, and comprises the following steps:
s21, determining target nodes of which key performances to be monitored of the chip and the system circuit are greatly influenced by voltage variation;
s22, detecting the voltage of the target node by matching an analog voltage sensor with an analog-digital converter ADC;
S23, setting the sampling frequency of an analog-digital converter ADC for the measured voltage;
the sampling frequency should be high enough to capture rapid changes in voltage, but not too high to cause unnecessary power consumption. The resolution of the ADC determines the minimum voltage change that can be detected. The higher the resolution, the finer the monitoring of the voltage by the system circuitry, but this also means higher cost and power consumption.
S24, a filter and an amplifier circuit are arranged in front of the analog-digital converter ADC to regulate the voltage signal, so that the quality of the voltage signal is ensured, and the accuracy of monitoring data is ensured.
Continuous monitoring and triggering monitoring: the real-time monitoring is continuous, and the ADC continuously reads the voltage value; or based on a specific trigger condition, for example, when the voltage fluctuation exceeds a predetermined threshold.
S3, comparing the real-time digital output voltage with the digital output value of the target voltage; judging whether the real-time digital output voltage (actual voltage) is higher than, lower than or within the allowable range of the target voltage according to a preset threshold region;
a method of comparing the real-time digital output voltage with the digital output value of the target voltage, as shown in fig. 4, comprises the steps of:
S31, at a hardware level, voltage comparison is realized by a comparator Commemorator or by an analog-digital converter ADC combined with a software algorithm;
S32, setting a reference voltage value, wherein the reference voltage value is directly used as one of the inputs when the comparator is used; using the reference voltage value for subsequent digital comparisons when using an ADC;
in this embodiment, the reference voltage value is derived from a target voltage setting.
S33, obtaining a real-time voltage value of a current target node of the system circuit through ADC or direct measurement;
s34, automatically executing comparison operation by a comparator, and outputting a logic high signal by the comparator if the real-time voltage is higher than the reference voltage; outputting a logic low signal if the real-time voltage is lower than the reference voltage;
S35, setting a threshold value or a tolerance range of deviation between the real-time digital output voltage and the target voltage, and determining when the voltage deviation exceeds a normal range for natural fluctuation of the voltage caused by load change and temperature fluctuation;
s36, when the deviation between the real-time digital output voltage and the target voltage exceeds a threshold value, the system circuit takes corresponding measures including adjusting the output of the power supply or activating a related protection mechanism;
S37, introducing a hysteresis mechanism, triggering adjustment only after the voltage continuously exceeds a threshold value for a period of time, and preventing frequent switching and jitter phenomenon caused by adjustment;
s38, using the result of the voltage comparison as a voltage or a digital signal of a feedback signal, wherein the feedback signal is used for guiding the action of a voltage adjustment mechanism in a closed-loop control system.
S4, determining a charge-discharge strategy to be adopted according to the voltage comparison result of the step S3, and performing switch control; the charge-discharge strategy comprises the following steps: if the real-time digital output voltage (actual voltage) is lower than the target voltage, starting one or more groups of unidirectional charging switches to boost the voltage to the target voltage;
if the real-time digital output voltage (actual voltage) is higher than the target voltage, one or more groups of unidirectional discharge switches are started to reduce the voltage to the target voltage;
the method for controlling the switch, as shown in fig. 5, comprises the following steps:
S41, determining targets and requirements of switch control, including: switching speed, response time, efficiency and reliability, and designing a control strategy according to the targets and requirements to ensure that the control strategy can rapidly and accurately react when the voltage is abnormal;
s42, selecting an applicable switching device according to the voltage and current levels and the switching frequency to be controlled;
Switching devices include transistors (e.g., BJT, MOSFET, IGBT), relays, solid State Relays (SSRs), and thyristors (SCRs).
S43, controlling the switching device to be turned on and off by the adaptive driving circuit;
for transistors, appropriate gate voltages need to be provided; for a relay, sufficient current is required to activate the coil.
S44, controlling the output voltage of the voltage output circuit by adjusting the on-off time proportion of the switching device by adopting a Pulse Width Modulation (PWM) method;
S45, continuously comparing the digital output voltage value monitored in real time with the digital output of the preset target voltage through a feedback loop to realize a closed-loop control system, and adjusting the switch state according to the comparison result to maintain the required voltage level.
S5, setting a threshold area, distributing an operation range into different operation areas according to the threshold area, determining the threshold area where the real-time digital output voltage (actual voltage) is located, and selecting a corresponding charge-discharge switch group to operate;
The method for setting the threshold area and allocating different operation areas according to the threshold area is shown in fig. 6, and includes the following steps:
S51, setting a plurality of thresholds to define different operation areas;
S52, dividing the whole operation range into a plurality of operation areas according to the plurality of thresholds;
The operation area in this embodiment includes "normal operation area", "warning area", "danger area", and the like.
S53, defining a set of associated control logic for each operation area; in the normal operation area, the system circuit works normally as expected; in the warning area, the system circuit sends out a warning signal and takes precautions; within the hazard zone, the system circuitry enforces a protection action.
S6, controlling a plurality of sets of unidirectional charge-discharge switches of the charge-discharge switch group in a nested accumulation mode, and adjusting the voltage at different levels and precision to control the increase and decrease of the voltage more finely;
The method for controlling the multiple sets of unidirectional charge-discharge switches of the charge-discharge switch group in a nested accumulation mode is shown in fig. 7, and comprises the following steps:
s61, comparing the current output voltage of the voltage output circuit with a preset target voltage, and identifying errors;
S62, accumulating the error of the current period to the previous accumulated error as an integration process to help eliminate steady-state error;
Nested accumulation compensation involves multiple control loops. Within the primary control loop, there may be one or more secondary control loops. Each control loop controls a switch while each secondary control loop adjusts independently based on their error accumulation.
S63, dynamic compensation: the control signal is dynamically adjusted to compensate for these errors based on the accumulated errors.
S7, quickly determining the state of the charge and discharge switch corresponding to the charge and discharge switch group by utilizing the matching attribute of the digital logic circuit, as shown in FIG. 8, comprising the following steps:
S71, generating a digital signal by using a microcontroller and a logic gate digital circuit;
S72, designing a digital logic circuit to execute specific logic operations, wherein the logic operations comprise: basic AND, OR, NOT logic, more complex NAND, NOR, XOR logic, and complex logic;
s73, integrating the digital logic circuit and the switch circuit; the signal generated by the digital logic circuit controls the switching state of the switching circuit;
s74, for the application requiring voltage control, designing a corresponding logic circuit to determine when and how to switch the voltage line or adjust the voltage level, and ensuring that the logic state of the logic circuit is kept synchronous with the actual switching state.
In this embodiment, a logic "1" indicates that the switch is closed, and a logic "0" indicates that the switch is open.
The charge-discharge switch group includes components such as decoders, multiplexers, etc. to simplify the switch control logic. Digital logic operation in combination with switching circuitry generally involves the use of digital signals to control the state of switches in a power supply or other electrical system. This approach can be used in a variety of applications, from basic switching control to more complex voltage regulation and power management systems.
S8, activating an executing element based on a control algorithm, executing charging or discharging operation, and dynamically adjusting voltage according to requirements; after the charge or discharge adjustment, the output voltage is continuously monitored, and if the adjusted voltage still does not reach the target voltage or a new deviation occurs, the comparison and adjustment processes of the steps S3-S8 are repeated until the output voltage is stabilized at the target voltage level.
The method for dynamically adjusting the voltage according to the requirement, as shown in fig. 9, comprises the following steps:
s81, determining a correct regulation action of the output voltage by adopting a strategy such as a proportional-integral-derivative PID control algorithm, and changing the output voltage by using the correct regulation action so as to correct any deviation;
S82, activating an executive component according to the output of the control algorithm, and increasing or reducing the energy output of the voltage output circuit according to the requirement by the executive component so as to adjust the output voltage.
Fig. 10 shows the basic circuit configuration principle of the present embodiment.
Through the flow of steps S1-S8, the chip is able to autonomously adjust its voltage output to remain stable and accurate even in the event of a change in external conditions. The adaptive voltage compensation method can be used for various electronic systems and integrated circuits, and particularly for applications requiring extremely high voltage stability.
The embodiment of the invention also provides a computer device, and fig. 11 is a schematic structural diagram of the computer device provided by the embodiment of the invention; referring to fig. 11 of the drawings, the computer apparatus includes: input means 23, output means 24, memory 22 and processor 21; the memory 22 is configured to store one or more programs; when the one or more programs are executed by the one or more processors 21, the one or more processors 21 implement the charge-discharge digital-analog hybrid voltage compensation method as provided in the above embodiments; wherein the input device 23, the output device 24, the memory 22 and the processor 21 may be connected by a bus or otherwise, for example in fig. 11.
The memory 22 is used as a readable storage medium of a computing device, and can be used for storing a software program and a computer executable program, and is used for storing program instructions corresponding to the charge-discharge digital-analog hybrid voltage compensation method according to the embodiment of the invention; the memory 22 may mainly include a storage program area and a storage data area, wherein the storage program area may store an operating system, at least one application program required for functions; the storage data area may store data created according to the use of the device, etc.; in addition, memory 22 may include high-speed random access memory, and may also include non-volatile memory, such as at least one magnetic disk storage device, flash memory device, or other non-volatile solid-state storage device; in some examples, memory 22 may further comprise memory located remotely from processor 21, which may be connected to the device via a network. Examples of such networks include, but are not limited to, the internet, intranets, local area networks, mobile communication networks, and combinations thereof.
The input means 23 is operable to receive input numeric or character information and to generate key signal inputs relating to user settings and function control of the device; the output device 24 may include a display device such as a display screen.
The processor 21 executes various functional applications of the device and data processing by running software programs, instructions and modules stored in the memory 22, i.e. implements the charge-discharge digital-analog hybrid voltage compensation method described above.
The computer equipment provided by the embodiment can be used for executing the charge-discharge digital-analog hybrid voltage compensation method provided by the embodiment, and has corresponding functions and beneficial effects.
Embodiments of the present invention also provide a storage medium containing computer-executable instructions, which when executed by a computer processor, are for performing the Open Stack Ironic-based dynamic power management method as provided by the above embodiments, the storage medium being any of various types of memory devices or storage devices, the storage medium comprising: mounting media such as CD-ROM, floppy disk or tape devices; computer system memory or random access memory such as DRAM, DDR RAM, SRAM, EDO RAM, lanbas (Rambus) RAM, etc.; nonvolatile memory such as flash memory, magnetic media (e.g., hard disk or optical storage); registers or other similar types of memory elements, etc.; the storage medium may also include other types of memory or combinations thereof; in addition, the storage medium may be located in a first computer system in which the program is executed, or may be located in a second, different computer system, the second computer system being connected to the first computer system through a network (such as the internet); the second computer system may provide program instructions to the first computer for execution. Storage media includes two or more storage media that may reside in different locations (e.g., in different computer systems connected by a network). The storage medium may store program instructions (e.g., embodied as a computer program) executable by one or more processors.
Of course, the storage medium containing the computer executable instructions provided in the embodiments of the present invention is not limited to the charge-discharge digital-analog hybrid voltage compensation method described in the above embodiments, and may also perform the related operations in the charge-discharge digital-analog hybrid voltage compensation method provided in any embodiment of the present invention.
Thus far, the technical solution of the present invention has been described in connection with the preferred embodiments shown in the drawings, but it is easily understood by those skilled in the art that the scope of protection of the present invention is not limited to these specific embodiments. Equivalent modifications and substitutions for related technical features may be made by those skilled in the art without departing from the principles of the present invention, and such modifications and substitutions will be within the scope of the present invention.
The foregoing description is only of the preferred embodiments of the invention and is not intended to limit the invention; various modifications and variations of the present invention will be apparent to those skilled in the art. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present invention should be included in the protection scope of the present invention.
Claims (8)
1. The charge-discharge digital-analog mixed voltage compensation method is suitable for a DCDC power supply chip and is characterized by comprising the following steps of:
S1, a storage unit is arranged in a chip, a digital output value of a preset target voltage is stored in the storage unit, and the digital output value of the target voltage is used as an ideal voltage level maintained by a voltage output circuit;
s2, monitoring the voltage of an output end of the voltage output circuit in real time, and converting the voltage of the output end into a digital signal through an analog-digital converter ADC to obtain a real-time digital output voltage;
S3, comparing the real-time digital output voltage with the digital output value of the target voltage; judging whether the real-time digital output voltage is higher than, lower than or within the allowable range of the target voltage according to a preset threshold region;
The method of comparing the real-time digital output voltage with the digital output value of the target voltage in the step S3 includes the steps of:
S31, at a hardware level, voltage comparison is realized by a comparator Comparer or by an analog-digital converter ADC combined with a software algorithm;
S32, setting a reference voltage value, wherein the reference voltage value is directly used as one of the inputs when the comparator is used; using the reference voltage value for subsequent digital comparisons when using an ADC;
s33, obtaining a real-time voltage value of a current target node of the system circuit through ADC or direct measurement;
s34, automatically executing comparison operation by a comparator, and outputting a logic high signal by the comparator if the real-time voltage is higher than the reference voltage; outputting a logic low signal if the real-time voltage is lower than the reference voltage;
S35, setting a threshold value or a tolerance range of deviation between the real-time digital output voltage and the target voltage, and determining when the voltage deviation exceeds a normal range for natural fluctuation of the voltage caused by load change and temperature fluctuation;
s36, when the deviation between the real-time digital output voltage and the target voltage exceeds a threshold value, the system circuit takes corresponding measures including adjusting the output of the power supply or activating a related protection mechanism;
S37, introducing a hysteresis mechanism, triggering adjustment only after the voltage continuously exceeds a threshold value for a period of time, and preventing frequent switching and jitter phenomenon caused by adjustment;
S38, using the result of the voltage comparison as a voltage or a digital signal of a feedback signal, wherein the feedback signal is used for guiding the action of a voltage adjustment mechanism in a closed-loop control system;
S4, determining a charge-discharge strategy to be adopted according to the voltage comparison result of the step S3, and performing switch control; the charge-discharge strategy comprises the following steps: if the real-time digital output voltage is lower than the target voltage, starting one or more groups of unidirectional charging switches to boost the voltage to the target voltage;
If the real-time digital output voltage is higher than the target voltage, one or more groups of unidirectional discharge switches are started to reduce the voltage to the target voltage;
s5, setting a threshold area, distributing an operation range into different operation areas according to the threshold area, determining the threshold area where the real-time digital output voltage is located, and selecting a corresponding charge-discharge switch group for operation;
s6, controlling a plurality of sets of unidirectional charge-discharge switches of the charge-discharge switch group in a nested accumulation mode, and adjusting the voltage at different levels and precision to control the increase and decrease of the voltage more finely;
The method for controlling the multiple sets of unidirectional charge and discharge switches of the charge and discharge switch group by adopting the nested accumulation mode in the step S6 comprises the following steps:
s61, comparing the current output voltage of the voltage output circuit with a preset target voltage, and identifying errors;
S62, accumulating the error of the current period to the previous accumulated error as an integration process to help eliminate steady-state error;
S63, dynamically adjusting the control signal to compensate the errors according to the accumulated errors;
S7, quickly determining the state of the charge and discharge switch corresponding to the charge and discharge switch group by utilizing the matching attribute of the digital logic circuit, wherein the method comprises the following steps:
S71, generating a digital signal by using a microcontroller and a logic gate digital circuit;
S72, designing a digital logic circuit to execute specific logic operations, wherein the logic operations comprise: basic AND, OR, NOT logic, more complex NAND, NOR, XOR logic, and complex logic;
s73, integrating the digital logic circuit and the switch circuit; the signal generated by the digital logic circuit controls the switching state of the switching circuit;
S74, for the application requiring voltage control, designing a corresponding logic circuit to determine when and how to switch a voltage line or adjust a voltage level, and ensuring that the logic state of the logic circuit is kept synchronous with the actual switching state;
s8, activating an executing element based on a control algorithm, executing charging or discharging operation, and dynamically adjusting voltage according to requirements; after the charge or discharge adjustment, the output voltage is continuously monitored, and if the adjusted voltage still does not reach the target voltage or a new deviation occurs, the comparison and adjustment processes of the steps S3-S8 are repeated until the output voltage is stabilized at the target voltage level.
2. The charge-discharge digital-analog hybrid voltage compensation method according to claim 1, wherein the method of storing the digital output value of the preset target voltage in the memory cell of the S1 step comprises the steps of:
S11, determining an ideal output voltage value for ensuring normal operation of a chip and a system circuit according to circuit design requirements and application scenes;
S12, converting the determined output voltage value into a digital value of a digitally represented target voltage through a lookup table, an algorithm or a preset conversion mode so as to be compatible with a digital circuit;
S13, storing the digital value of the target voltage in a nonvolatile memory unit in a chip, and loading the digital value of the target voltage into a rapidly accessible register or a memory unit for real-time comparison after power-on or reset.
3. The method for compensating for a mixed voltage of charge and discharge digital-analog according to claim 1, wherein the method for monitoring the voltage of the output terminal of the voltage output circuit in real time in step S2 comprises the steps of:
s21, determining target nodes of which key performances to be monitored of the chip and the system circuit are greatly influenced by voltage variation;
s22, detecting the voltage of the target node by matching an analog voltage sensor with an analog-digital converter ADC;
S23, setting the sampling frequency of an analog-digital converter ADC for the measured voltage;
s24, a filter and an amplifier circuit are arranged in front of the analog-digital converter ADC to regulate the voltage signal, so that the quality of the voltage signal is ensured, and the accuracy of monitoring data is ensured.
4. The method for compensating for a mixed voltage of charge and discharge according to claim 1, wherein the method for controlling the switch in the step S4 comprises the steps of:
S41, determining targets and requirements of switch control, including: switching speed, response time, efficiency and reliability, and designing a control strategy according to the targets and requirements to ensure that the control strategy can rapidly and accurately react when the voltage is abnormal;
s42, selecting an applicable switching device according to the voltage and current levels and the switching frequency to be controlled;
S43, controlling the switching device to be turned on and off by the adaptive driving circuit;
s44, controlling the output voltage of the voltage output circuit by adjusting the on-off time proportion of the switching device by adopting a Pulse Width Modulation (PWM) method;
S45, continuously comparing the digital output voltage value monitored in real time with the digital output of the preset target voltage through a feedback loop to realize a closed-loop control system, and adjusting the switch state according to the comparison result to maintain the required voltage level.
5. The method for compensating for a mixed voltage of charge and discharge according to claim 1, wherein the step S5 of setting the threshold region and the method for allocating different operation regions according to the threshold region comprises the steps of:
S51, setting a plurality of thresholds to define different operation areas;
S52, dividing the whole operation range into a plurality of operation areas according to the plurality of thresholds;
s53, defining a set of associated control logic for each operation area; in the normal operation area, the system circuit works normally as expected; in the warning area, the system circuit sends out a warning signal and takes precautions; within the hazard zone, the system circuitry enforces a protection action.
6. The method for compensating for a mixed voltage of charge and discharge digital-analog according to claim 1, wherein the method for dynamically adjusting the voltage according to the requirement in the step S8 comprises the following steps:
s81, determining a correct regulation action of the output voltage by adopting a strategy such as a proportional-integral-derivative PID control algorithm, and changing the output voltage by using the correct regulation action so as to correct any deviation;
S82, activating an executive component according to the output of the control algorithm, and increasing or reducing the energy output of the voltage output circuit according to the requirement by the executive component so as to adjust the output voltage.
7. A computer readable storage medium, on which a computer program is stored, characterized in that the program, when being executed by a processor, implements the steps of the charge-discharge digital-analog hybrid voltage compensation method of any of claims 1-6.
8. A computer device comprising a memory, a processor and a computer program stored on the memory and executable on the processor, characterized in that the processor implements the steps of the charge-discharge digital-analog hybrid voltage compensation method according to any one of claims 1-6 when the program is executed by the processor.
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| TW201103240A (en) * | 2009-07-14 | 2011-01-16 | Novatek Microelectronics Corp | Charge pump circuit |
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