CN118137987A - Simplified undersampled digital predistortion method and system - Google Patents
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Abstract
The invention discloses a simplified undersampled digital predistortion method and a simplified undersampled digital predistortion system, which belong to the technical field of communication, wherein a signal sent by a predistorter enters a DAC circuit through an I path and a Q path, enters a first BPF circuit through a coupling circuit after being processed by an up-conversion circuit and a PA circuit, enters an ADC circuit through a down-conversion circuit, obtains a signal at an nth moment after the first BPF circuit and the ADC circuit, calculates a PA forward full-band model estimation by using feedback parameters of the I path or the Q path, obtains a result at the nth moment after a second BPF circuit, and solves the problems that the ADC sampling rate is required to be too high and 2 paths of ADC sampling are required in the feedback process in the prior art, and the nonlinear elimination outside a band is not facilitated after the BPF circuit is used.
Description
Technical Field
The invention belongs to the technical field of communication, and particularly relates to a simplified undersampled digital predistortion method and system.
Background
As communication technology advances, signal bandwidths become wider and wider. From the previous 5mhz,10mhz, to the present 100mhz,200mhz. As the bandwidth of the signal becomes wider, the signal becomes stronger and stronger after passing through the power amplifier. It is often necessary to use various algorithms or devices to cancel the distortion, and common distortion methods include feedforward methods, feedback methods, analog predistortion methods, digital predistortion methods, and the like. Among them, digital predistortion is widely used because of its low cost and large bandwidth for removing distortion. The digital predistortion method is to add a first-stage predistortion module before the power amplifier, and by superposing the inverse function of the power amplifier, the nonlinearity of the power amplifier is exactly counteracted, so that the linearity of the power amplifier is improved.
In digital predistortion, because the distorted signal after power amplification needs to be acquired, and the frequency spectrum of the distorted signal can be widened to 3-5 times of bandwidth, the ADC with high sampling rate is often required to acquire real part and imaginary part data, and it is generally considered that when the sampling rate is 5 times of the signal bandwidth, full sampling of the distorted signal can be acquired. If the signal bandwidth is 100MHz, then the sampling rate of the real part and the imaginary part of the ADC is 500 MSPS to satisfy the full sampling, which results in high cost of the analog device, and thus the initial aim of DPD low cost is overcome. To address this problem, there is therefore a need to consider a method of reducing the sampling rate of an ADC, herein referred to as an undersampled ADC, in order to reduce the cost of the entire analog portion.
Paper "A New Digital Predistortion for Wideband Power Amplifiers With Constrained Feedback Bandwidth"（2013）, authors YingLiu et al add a band-limiting filter on the analog side for band-limited DPD to avoid spectral aliasing after ADC, then filter out-of-band distortion by band-limited PA modeling, focus on only in-band distortion and construct a nonlinear model of in-band distortion. Since this approach reduces the ADC sampling rate, the overhead of feedback can be significantly reduced. However, the number of feedback channels is not reduced in this technical solution, and two-way feedback of the real part and the imaginary part is still required. In addition, the scheme can only eliminate the distortion in the band of the analog filter, and the distortion outside the band can not be effectively eliminated through DPD, so that the requirement on the out-of-band suppression degree of the analog filter in the feedback path is higher, relatively high cost is often required in analog implementation, and the ADC sampling rate is not favorably further reduced.
Reference to the literature ：Liu Y, Pan W, Shao S, et al. A new digital predistortion for wideband power amplifiers with constrained feedback bandwidth[J]. IEEE Microwave and Wireless Components Letters, 2013, 23(12): 683-685.
Disclosure of Invention
The invention aims to solve the problems that the DPD feedback in the prior art requires the ADC sampling rate to be too high, 2 paths of ADC sampling are required, and the out-of-band nonlinear elimination is not facilitated after a band-limited filter is used, and provides a simplified undersampling digital predistortion method and a simplified undersampling digital predistortion system.
In order to achieve the above purpose, the technical scheme adopted by the invention is as follows:
A simplified undersampled digital predistortion method includes enabling signals sent by a predistorter to enter a DAC circuit through an I path and a Q path, enabling the signals to enter a first BPF circuit through a coupling circuit after being processed by an up-conversion circuit and a PA circuit, enabling the signals to enter an ADC circuit through a down-conversion circuit to obtain signals at the nth time after the first BPF circuit and the ADC circuit, calculating PA forward full-band model estimation by using feedback parameters of the I path or the Q path to obtain results at the nth time after a second BPF circuit, and finally calculating errors of an update part of each digital predistortion coefficient by using a predistorter coefficient training system.
Preferably, the feedback parameters of the I path or the Q path are used for calculating the estimation score of the PA forward full-band model and the estimation score is divided into a full-band nonlinear predistortion polynomial expression part and a part based on nonlinear coefficient solution of a real part or an imaginary part, the full-band nonlinear predistortion polynomial expression part is firstly carried out, and then the part based on nonlinear coefficient solution of the real part or the imaginary part is carried out.
Preferably, the full-band nonlinear predistortion polynomial expression part is firstly carried out, and the process is as follows:
Let the signal at the nth time after predistortion, i.e. the input signal be x (n), ye (n) be the signal output by the PA forward full sampling model calculated by the I-channel feedback parameter, model ye (n) and x (n) by using the MP model, and let the nonlinear order be K,
At this time，
M is the memory depth of the memory device,Represents modulo complex number, where N represents time domain sampling time, N represents the whole signal length, where 1.ltoreq.n,/>Representing a polynomial, k representing the kth signal and m representing the mth term.
Preferably, the full-band nonlinear predistortion polynomial shows that in a scene with strong memory effect, a GMP model is used for representing the relationship between ye (n) and x (n), and the formula is as follows:
Where Ka represents the order of the alignment term in the model, ma represents the memory depth of the alignment term, MMb represents the additional memory depth of the lag term in the model, kb represents the order of the lag term, mb represents the memory depth of the lag term, MMc represents the additional memory depth of the lead term in the model, kc represents the order of the lead term, mc represents the memory depth of the lead term, and mm represents the memory depth between the absolute value term and the non-absolute value term in the base.
Preferably, the relation between ye (n) and x (n) is represented using a matrix:
Let w=
Let y=
Then
Wherein B is represented as
Where T represents the transpose of the matrix,Is a polynomial in which k is 0 and m is 0 corresponding to the polynomial,/>Is a polynomial in which k is 0 and m is 1, which corresponds to the polynomial.
Preferably, the nonlinear coefficient solving process based on the real part or the imaginary part is as follows:
Wherein the method comprises the steps of Representing the real part of W,/>Representing the imaginary part of W,/>Representing the real part of B,/>Representing the imaginary part of B,/>Representative/>Real part of/>Representative/>Imaginary part of/>Represents imaginary units;
thus will be The unfolding can be obtained:
。
preferably, when only the I-path feedback is provided in the feedback path ADC Method for converting into matrix representation is shown, let, Q=/>
ThenUsing LS estimation coefficient Q, first multiplying left and right simultaneously/>Can obtain
Then take advantage ofObtain/>。
Preferably, when only the Q path is fed back, the method causes，Q=/>Can be obtained in the same way
Then get an estimate of Q as。
Preferably, the coefficients of the forward model are solved as follows: when the model coefficient Q of the forward full frequency band of the PA is obtained, the real part and the imaginary part are added to obtain W, and the W is obtained according to
The full sampling distortion model Y of the PA can be obtained, and then the Y is passed through a second BPF circuit to make the filter coefficient L, wherein the firstThe personal coefficient is/>The signal at the nth time after the second BPF is/>，
Then calculate the error of the real part between the estimation and the feedback, the error isThe signal at the nth time after passing through the first BPF and the ADC is/>，
；
Finally, training the predistorter coefficient for calculating the error of the updating part of the digital predistortion coefficient,
The formula is as follows:，
To update partial errors,/> Errors are trained for computing coefficients.
A simplified undersampled digital predistortion system comprises a predistorter, a DAC circuit, a PA circuit, a coupler circuit, an antenna, a BPF circuit, a frequency conversion circuit, a full-band model estimation module, a predistorter coefficient training module, an ADC circuit and a calculation module;
the BPF circuit comprises a first BPF circuit and a second BPF circuit;
The frequency conversion circuit comprises an up-conversion circuit and a down-conversion circuit;
The computing module comprises a first computing module and a second computing module;
The predistorter is connected to the DAC circuit through the I path and the Q path, the DAC circuit is connected with the up-conversion circuit, the up-conversion circuit is connected with the PA circuit, the coupler circuit is connected with the PA circuit, the antenna is connected with the coupler, the other end of the coupler is connected with the first BPF circuit, the first BPF circuit is connected with the down-conversion circuit, the down-conversion circuit is connected with the ADC circuit through the I path or the Q path, the ADC circuit is connected with the first calculation module, one end of the predistorter coefficient training module is connected with the full-band model estimation module, the other end of the predistorter coefficient training module is connected with the second calculation module, the other end of the second calculation module is connected with the predistorter, one end of the full-band model estimation module is connected with the predistorter, the other end of the full-band model estimation module is connected with the second BPF circuit, and the second BPF circuit is also connected with the first calculation module.
The abbreviations used in the invention are all as follows:
DPD，Digital Pre-Distortion
PA，Power Amplifier
BPF，Band Pass Filter
MP，Memory Polynomial
GMP，Generalized Memory Polynomial
MSPS，Mega sample per second
compared with the prior art, the technical scheme of the invention has the following advantages/beneficial effects:
1. The I path and the Q path can independently finish ADC sampling, and 2 paths of ADC sampling are not needed, so that the ADC sampling rate required in digital predistortion feedback is reduced.
2. The nonlinear elimination outside the frequency band can be performed after the band-limited filter is used, the performance outside the frequency band of the filter is ensured, and the critical path rejection ratio is improved.
3. Compared with the traditional band-limited model, the invention can reduce the hardware cost for constructing the band-limited predistortion model by using a new digital predistortion indirect learning architecture.
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In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings that are needed in the embodiments will be briefly described below, it being understood that the following drawings only illustrate some examples of the present invention and therefore should not be considered as limiting the scope, and other related drawings may be obtained according to these drawings without inventive effort for a person skilled in the art.
Fig. 1 is a schematic diagram of a simplified undersampled digital predistortion method of the present invention.
Fig. 2 is a schematic diagram of steps for calculating PA forward estimation model estimation according to the present invention.
Fig. 3 is a simplified undersampled digital predistortion system schematic diagram of the present invention.
Detailed Description
To make the objects, technical solutions and advantages of the present invention more apparent, the technical solutions in the embodiments of the present invention will be clearly and completely described below, and it is apparent that the described embodiments are some embodiments of the present invention, but not all embodiments. All other embodiments, based on the embodiments of the invention, which are apparent to those of ordinary skill in the art without inventive faculty, are intended to be within the scope of the invention. Accordingly, the detailed description of the embodiments of the invention provided below is not intended to limit the scope of the invention as claimed, but is merely representative of selected embodiments of the invention.
It should be noted that: like reference numerals and letters denote like items in the following figures, and thus, once an item is defined in one figure, it may not be further defined and explained in the following figures.
Example 1:
As shown in FIG. 1, a simplified undersampled digital predistortion method is provided, wherein a signal x (n) sent by a predistorter enters a DAC circuit through an I path and a Q path, and is processed by an up-conversion circuit and a PA circuit to obtain a signal y (n), the signal y (n) enters a first BPF circuit through a coupling circuit, and enters an ADC circuit through a down-conversion circuit to obtain the first BPF circuit and a signal at the nth time after the ADC circuit The feedback parameters of the I path or the Q path are used for calculating the forward full-band model estimation of the PA to obtain a signal ye (n), and the signal ye (n) is subjected to the second BPF to obtain a result/>, at the nth moment, after the second BPF circuit is subjected to the second BPFAnd calculates a signal/>, using the first calculation circuitFinally, calculating the error/>, of each digital predistortion coefficient update section using a predistorter coefficient training system and a second calculation circuitThe result obtained by the predistorter coefficient training system can be fed back to the predistorter, wherein the BPF is a band-limited filter.
As shown in fig. 2, the PA forward full-band model estimate is calculated using the feedback parameters of the I-path or Q-path, and is divided into the following two parts: the method comprises the steps of firstly carrying out the full-band nonlinear predistortion polynomial representation part and the part based on the real part or the imaginary part nonlinear coefficient solution, and then carrying out the part based on the real part or the imaginary part nonlinear coefficient solution.
Firstly, performing a full-band nonlinear predistortion polynomial expression part, wherein the process is as follows:
let the signal at n-th moment after predistortion, i.e. the input signal be x (n), ye (n) be the signal that the feedback parameter calculation PA forward full sampling model output of I way, and use MP model to model ye (n) and x (n), and let nonlinear order be K, in general, even order intermodulation generally falls in the place far out of band, so the scene of some simplification calculation can take K as even, of course under the scene that the calculated amount is not as forcing constraint, K also can be positive integer, do not specifically limit here.
At this time，
M is the memory depth of the memory device,Represents modulo complex number, where N represents time domain sampling time, N represents the whole signal length, where 1.ltoreq.n,/>Representing a polynomial, k representing the kth signal and m representing the mth term.
The full-band nonlinear predistortion polynomial shows that in a scene with strong memory effect, a GMP model is used for representing the relationship between ye (n) and x (n), and the formula is as follows:
Where Ka represents the order of the alignment term in the model, ma represents the memory depth of the alignment term, MMb represents the additional memory depth of the lag term in the model, kb represents the order of the lag term, mb represents the memory depth of the lag term, MMc represents the additional memory depth of the lead term in the model, kc represents the order of the lead term, mc represents the memory depth of the lead term, and mm represents the memory depth between the absolute value term and the non-absolute value term in the base.
Using the formula to express the relationship between ye (n) and x (n) is complex, we express the relationship between the two in a matrix manner for convenience, and the relationship between ye (n) and x (n) is:
Let w=
Let y=
Then
Wherein B is represented as
Where T represents the transpose of the matrix,Is a polynomial in which k is 0 and m is 0 corresponding to the polynomial,/>Is a polynomial in which k is 0 and m is 1, which corresponds to the polynomial.
The process of nonlinear coefficient solving based on real or imaginary parts is as follows:
Wherein the method comprises the steps of Representing the real part of W,/>Representing the imaginary part of W,/>Representing the real part of B,/>Representing the imaginary part of B,/>Representative/>Real part of/>Representative/>Imaginary part of/>Represents imaginary units;
thus will be Can be unfolded to obtain
。
When only the I-path feedback is provided in the feedback path ADCMethod for converting into matrix representation is shown, let, Q=/>
ThenUsing LS estimation coefficient Q, first multiplying left and right simultaneously/>Can obtain
Then take advantage ofObtain/>。
When only the Q path is fed back, let，Q=/>Can be obtained in the same way
Then get an estimate of Q as。
The coefficients of the forward model are solved as follows: when the model coefficient Q of the forward full frequency band of the PA is obtained, the real part and the imaginary part are added to obtain W, and the W is obtained according to
The full sampling distortion model Y of the PA can be obtained, and then the Y is passed through a second BPF circuit to make the filter coefficient L, wherein the firstThe personal coefficient is/>The signal at the nth time after the second BPF is/>，
Then calculate the error of the real part between the estimation and the feedback, the error isThe signal at the nth time after passing through the first BPF and the ADC is/>，/>；
The accuracy of the coefficient estimation is optimized by a plurality of iterations.
And finally, training the predistorter coefficient for calculating the error of the updating part by using the digital predistortion coefficient.
Error is，/>，/>Errors are trained for computing coefficients.
The invention requires only one ADC feedback (I or Q).
The invention can reduce the requirement on the analog BPF filter, thereby reducing the cost of the analog device
Compared with the traditional band-limited model, the hardware cost for constructing the band-limited predistortion model can be obviously reduced by using a novel DPD indirect learning architecture.
The calculation and updating of the digital predistortion coefficient are iterative processes, namely, after a plurality of iterations, the EVM index or the ACLR index of the observed signal reaches a threshold value, then the whole flow is finished, and before the EVM index or the ACLR index reaches the threshold value, the whole flow is generally subjected to about 3 times of iterative convergence processes, namely, the whole data flow is circulated for a plurality of times, so that the coefficient of a predistortion real part or an imaginary part is obtained, and the flow is finished.
Example 2: as shown in fig. 3, a simplified undersampled digital predistortion system includes a predistorter, a DAC circuit, a PA circuit, a coupler circuit, an antenna, a BPF circuit, a frequency conversion circuit, a full-band model estimation module, a predistorter coefficient training module, an ADC circuit, and a calculation module;
the BPF circuit comprises a first BPF circuit and a second BPF circuit;
The frequency conversion circuit comprises an up-conversion circuit and a down-conversion circuit;
The computing module comprises a first computing module and a second computing module;
The predistorter is connected to the DAC circuit through the I path and the Q path, the DAC circuit is connected with the up-conversion circuit, the up-conversion circuit is connected with the PA circuit, the coupler circuit is connected with the PA circuit, the antenna is connected with the coupler, the other end of the coupler is connected with the first BPF circuit, the first BPF circuit is connected with the down-conversion circuit, the down-conversion circuit is connected with the ADC circuit through the I path or the Q path, the ADC circuit is connected with the first calculation module, one end of the predistorter coefficient training module is connected with the full-band model estimation module, the other end of the predistorter coefficient training module is connected with the second calculation module, the other end of the second calculation module is connected with the predistorter, one end of the full-band model estimation module is connected with the predistorter, the other end of the full-band model estimation module is connected with the second BPF circuit, and the second BPF circuit is also connected with the first calculation module.
Wherein the signal x (n) at the nth time after predistortion of the predistorter enters a DAC circuit through an I path and a Q path, and then enters a PA circuit after being processed by an up-conversion circuit, so as to obtain a signal after the PA distortion at the nth timeAfter passing through the first BPF circuit and the down-conversion circuit, the signals enter the ADC circuit through the I path or the Q path to obtain the signals/>, at the nth moment, after passing through the first BPF and the ADCThe I-path feedback parameter calculates that the signal ye (n) output by the PA forward full sampling model passes through the second BPF to obtain the signal/>, at the nth momentError of real part between estimation and feedback/>Will/>, by the first computing moduleAnd/>And (5) subtracting to obtain the product. Error after predistortion coefficient estimation/>Training errors of x (n) and calculation coefficients by a second calculation moduleAnd (5) subtracting to obtain the product.
The foregoing is merely a preferred embodiment of the present invention, and it should be noted that the above-mentioned preferred embodiment should not be construed as limiting the invention, and the scope of the invention should be defined by the appended claims. It will be apparent to those skilled in the art that various modifications and adaptations can be made without departing from the spirit and scope of the invention, and such modifications and adaptations are intended to be comprehended within the scope of the invention.
Claims (10)
1. A simplified undersampled digital predistortion method is characterized in that signals sent by a predistorter enter a DAC circuit through an I path and a Q path, enter a first BPF circuit through a coupling circuit after being processed by an up-conversion circuit and a PA circuit, enter an ADC circuit through a down-conversion circuit to obtain signals at the nth moment after the first BPF circuit and the ADC circuit, calculate a PA forward full-band model estimation by using feedback parameters of the I path or the Q path to obtain a result at the nth moment after a second BPF circuit, and finally calculate errors of a digital predistortion coefficient updating part each time by using a predistorter coefficient training system.
2. A simplified undersampled digital predistortion method according to claim 1 wherein the PA forward full band model estimate is calculated using feedback parameters of either the I-path or Q-path is divided into two parts: the method comprises the steps of firstly carrying out the full-band nonlinear predistortion polynomial representation part and the part based on the real part or the imaginary part nonlinear coefficient solution, and then carrying out the part based on the real part or the imaginary part nonlinear coefficient solution.
3. A simplified undersampled digital predistortion method according to claim 2, characterized in that first a full-band nonlinear predistortion polynomial representation is performed as follows:
Let the signal at the nth time after predistortion, i.e. the input signal be x (n), ye (n) be the signal output by the PA forward full sampling model calculated by the I-channel feedback parameter, model ye (n) and x (n) by using the MP model, and let the nonlinear order be K,
At this time，
M is the memory depth of the memory device,Represents modulo complex number, where N represents time domain sampling time, N represents the whole signal length, where 1.ltoreq.n,/>Representing a polynomial, k representing the kth signal and m representing the mth term.
4. A simplified undersampled digital predistortion method according to claim 3 wherein the full band nonlinear predistortion polynomial representation is part of a GMP model representation of the relationship between ye (n) and x (n) in a scene with strong memory effects, the formula:
Where Ka represents the order of the alignment term in the model, ma represents the memory depth of the alignment term, MMb represents the additional memory depth of the lag term in the model, kb represents the order of the lag term, mb represents the memory depth of the lag term, MMc represents the additional memory depth of the advance term in the model, kc represents the order of the advance term, mc represents the memory depth of the advance term, m represents the mth term, and mm represents the memory depth between the absolute value term and the term that does not take absolute value in the base.
5. A simplified undersampled digital predistortion method according to claim 4 wherein the relation between ye (n) and x (n) is represented using a matrix:
Let w=
Let y=
Then
Wherein B is represented as
Where T represents the transpose of the matrix,Is a polynomial in which k is 0 and m is 0 corresponding to the polynomial,/>Is a polynomial in which k is 0 and m is 1, which corresponds to the polynomial.
6. A simplified undersampled digital predistortion method according to claim 5 wherein the process of solving for nonlinear coefficients based on real or imaginary parts is as follows:
Wherein the method comprises the steps of Representing the real part of W,/>Representing the imaginary part of W,/>Representing the real part of B,/>Representing the imaginary part of B,/>Representative/>Real part of/>Representative/>Imaginary part of/>Represents imaginary units;
thus will be Can be unfolded to obtain
。
7. A simplified undersampled digital predistortion method according to claim 6 wherein when there is only I-channel feedback in the feedback channel ADC, thenThe method for converting the matrix representation is shown, and the/>, Q= />
ThenUsing LS estimation coefficient Q, first multiplying left and right simultaneously/>Can obtain
Then take advantage ofObtain/>。
8. A simplified undersampled digital predistortion method according to claim 6 wherein when only the Q-path is fed back, the method is such that， />The same can be obtained:
Then get an estimate of Q as 。
9. A simplified undersampled digital predistortion method according to claim 1 wherein coefficients of the forward model are solved as follows: when the model coefficient Q of the forward full frequency band of the PA is obtained, the real part and the imaginary part are added to obtain W, and the W is obtained according to
The full sampling distortion model Y of the PA can be obtained, and then the Y is passed through a second BPF circuit to make the filter coefficient L, wherein the firstThe personal coefficient is/>The signal at the nth time after the second BPF is/>，
Then calculate the error of the real part between the estimation and the feedback, the error isThe signal at the nth time after passing through the first BPF and the ADC is/>，/>；
Finally, training the predistorter coefficient for calculating the error of the updating part of the digital predistortion coefficient,
The formula is as follows:，
to update partial errors,/> Errors are trained for computing coefficients.
10. The simplified undersampled digital predistortion system is characterized by comprising a predistorter, a DAC circuit, a PA circuit, a coupler circuit, an antenna, a BPF circuit, a frequency conversion circuit, a full-band model estimation module, a predistorter coefficient training module, an ADC circuit and a calculation module;
the BPF circuit comprises a first BPF circuit and a second BPF circuit;
The frequency conversion circuit comprises an up-conversion circuit and a down-conversion circuit;
The computing module comprises a first computing module and a second computing module;
the predistorter is connected to the DAC circuit through the I path and the Q path, the DAC circuit is connected with the up-conversion circuit, the up-conversion circuit is connected with the PA circuit, the coupler circuit is connected with the PA circuit, the antenna is connected with the coupler, the other end of the coupler is connected with the first BPF circuit, the first BPF circuit is connected with the down-conversion circuit, the down-conversion circuit is connected with the ADC circuit through the I path or the Q path, the ADC circuit is connected with the first calculation module, one end of the predistorter coefficient training module is connected with the full-band model estimation module, the other end of the predistorter coefficient training module is connected with the second calculation module, the other end of the second calculation module is connected with the predistorter, one end of the full-band model estimation module is connected with the predistorter, the other end of the full-band model estimation module is connected with the second BPF circuit, and the second BPF circuit is also connected with the first calculation module.
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