CN118118029A - Sensor signal conversion device of prealignment machine - Google Patents
Sensor signal conversion device of prealignment machine Download PDFInfo
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Abstract
The invention discloses a sensor signal conversion device of a prealignment machine. The device comprises: the device comprises a signal output module, a signal conversion module and an analysis module; the signal output module is used for outputting a sensor signal of the prealignment machine to the signal conversion module; the signal conversion module is used for converting the sensor signal into a sensor conversion signal and outputting the sensor conversion signal to the analysis module; the analysis module is used for analyzing the sensor conversion signal. The scheme realizes the high-speed signal conversion of the sensor so as to improve the adaptation degree of the field analysis module and ensure the stable operation of the field analysis module.
Description
Technical Field
The embodiment of the invention relates to a pre-alignment technology of a pre-alignment machine, in particular to a sensor signal conversion device of the pre-alignment machine.
Background
The wafer is a wafer with a single crystal structure, different wafer crystal directions have different chemical, electrical and physical characteristics, the wafer is provided with a notch or a trimming edge as a visual reference of the crystal directions, and the semiconductor analysis module transmits the wafer to the precise moving platform for processing and measurement at a specific angle by identifying the notch or the trimming edge of the wafer. Along with the development of semiconductor technology, before the equipment processes and measures the wafer, the wafer is prealigned by a wafer prealigner so as to realize high-speed automatic production and measurement, and the transmission precision and the production efficiency of the semiconductor equipment are directly affected by the performance of the prealigner.
At present, a pre-alignment machine commonly adopts a sensor to detect the edge of a wafer, and detects the shielding signal change of the wafer to the sensor by rotating the wafer, so as to calculate the circle center coordinate and the notch direction of the wafer. At present, sensor manufacturers for measuring the circle center coordinates and the notch directions of wafers at home and abroad have diversified internal principles, and different types of sensors have certain differences in applicable scenes, namely different types of signals detected by different sensors; because the on-site semiconductor analysis module is fixed, the on-site analysis semiconductor module cannot detect the wafer edges of different types of sensors, and thus the stable operation of the on-site semiconductor analysis module cannot be ensured; it is therefore necessary to study the sensor signal replacement scheme of the prealigner to be able to guarantee a stable operation of the semiconductor analytical module in the field.
Disclosure of Invention
The invention provides a sensor signal conversion device of a prealignment machine, which realizes high-speed signal conversion of a sensor so as to improve the adaptation degree of a semiconductor analysis module on site and ensure the stable operation of the semiconductor analysis module.
To achieve the above object, an embodiment of the present invention provides a sensor signal conversion device of a pre-alignment machine, including: the device comprises a signal output module, a signal conversion module and an analysis module;
The signal output module is used for outputting a sensor signal to the signal conversion module;
The signal conversion module is used for converting the sensor signal into a sensor conversion signal and outputting the sensor conversion signal to the analysis module;
The analysis module is used for analyzing the sensor conversion signal.
Optionally, the signal output module includes a first type of signal output module; the signal conversion module comprises a first conversion module; the parsing module comprises a first parsing module:
the first conversion module is used for converting the voltage signals output by the first type signal output module into pixel photosensitive signals and outputting the pixel photosensitive signals to the first analysis module so that the first analysis module can analyze the pixel photosensitive signals;
Or the signal output module comprises a second type signal output module; the signal conversion module comprises a second conversion module; the analysis module comprises a second analysis module;
the second conversion module is configured to convert the pixel photosensitive signal output by the second type signal output module into a voltage signal, and output the voltage signal to the second analysis module, so that the second analysis module performs analysis processing according to the voltage signal.
Optionally, the first type signal output module includes an analog voltage signal output unit; the first conversion module includes: the device comprises a clock generation unit, a first logic control unit, a first shift counting unit, a first DA conversion unit and a first comparison unit;
The clock generation unit is used for generating a pixel photosensitive signal storage clock and a pixel photosensitive signal shift clock;
the first logic control unit is used for reading and generating a counting clock and a zero clearing clock according to the pixel photosensitive signal storage clock and the pixel photosensitive signal shifting clock; wherein the count clock is synchronized with the pixel photosensitive signal shift clock; the clear clock is synchronous with the pixel photosensitive signal storage clock;
The first shift counting unit is used for counting and accumulating according to the counting clock and outputting accumulated count to the first DA conversion unit; the counting zero clearing device is also used for counting zero clearing according to the zero clearing clock;
The first DA conversion unit is used for converting the accumulated count into a sawtooth analog voltage signal;
The first comparison unit is used for outputting a pixel photosensitive signal according to the sawtooth analog voltage signal and the analog voltage signal output by the analog voltage signal output unit so that the first analysis module analyzes the pixel photosensitive signal; wherein the sawtooth analog voltage signal and the pixel photosensitive signal save clock have the same period; the pixel photosensitive signal is synchronized with the pixel photosensitive signal shift clock.
Optionally, the first type signal output module further includes a digital voltage signal output unit;
The first conversion module further includes: a second DA conversion unit;
The second DA conversion unit is used for converting the digital voltage signal output by the digital voltage signal output unit into an analog voltage signal; the analog voltage signal is also used for being output to a first comparison unit;
the first comparison unit is also used for outputting a pixel photosensitive signal according to the sawtooth analog voltage signal and the analog voltage signal output by the second DA conversion unit.
Optionally, the second conversion module includes: the second logic control unit, the threshold value setting unit, the second comparison unit, the second shift counting unit and the trigger;
the second class signal output module includes: a pixel photosensitive signal output unit;
the second logic control unit is used for generating a pixel photosensitive signal storage clock and a pixel photosensitive signal shift clock, and controlling the pixel photosensitive signal output unit to generate a pixel photosensitive signal according to the pixel photosensitive signal storage clock and the pixel photosensitive signal shift clock;
the threshold setting unit is used for generating a voltage threshold;
The second comparison unit is used for outputting a binarization signal according to the pixel photosensitive signal and the voltage threshold value and outputting the binarization signal to the second logic control unit;
the second logic control unit is further configured to generate a count stop clock according to the pixel photosensitive signal shift clock and the binarization signal when the binarization signal is detected;
The second shift counting unit is used for carrying out count accumulation according to the pixel photosensitive signal shift clock, stopping counting when the count stop clock is detected, and outputting count accumulation;
The second logic control unit is further used for generating a data output trigger clock according to the pixel photosensitive signal storage clock; the rising edge of the pixel photosensitive signal storage clock is synchronous with the rising edge of the data output trigger clock;
The data output trigger clock is also used for generating a clearing clock according to the pixel photosensitive signal storage clock and the data output trigger clock; the rising edge of the clearing clock is synchronous with the falling edge of the data output trigger clock; the falling edge of the clearing clock is synchronous with the falling edge of the pixel photosensitive signal storage clock;
The trigger is used for outputting the count accumulation as a digital voltage signal to the second analysis module when receiving the data output trigger clock so as to enable the second analysis module to analyze the digital voltage signal;
The second shift counting unit is further used for resetting the count accumulation according to the clearing clock.
Optionally, the second conversion module further includes: a third DA conversion unit;
The third DA conversion unit is configured to convert the digital voltage signal into an analog voltage signal, so that the second analysis module analyzes the analog voltage signal.
According to the embodiment of the invention, the signal output module outputs the sensor signal to the signal conversion module; the signal conversion module converts the sensor signal into a sensor conversion signal and outputs the sensor conversion signal to the analysis module; the analysis module analyzes the sensor conversion signal, so that the scheme realizes high-speed conversion of the sensor signal, improves the adaptation degree of the field analysis module, and ensures the stable operation of the field analysis module.
Drawings
Fig. 1 is a schematic structural diagram of a sensor signal conversion device of a pre-alignment machine according to an embodiment of the present invention;
FIG. 2 is a schematic diagram of a voltage signal output measurement of a wafer edge according to an embodiment of the present invention;
FIG. 3 is a schematic diagram of a pixel photosensitive signal output measurement wafer edge according to an embodiment of the present invention;
FIG. 4 is a schematic diagram of a sensor signal conversion device of another pre-alignment machine according to an embodiment of the present invention;
FIG. 5 is a schematic diagram of a sensor signal conversion device of another pre-alignment machine according to an embodiment of the present invention;
FIG. 6 is a schematic diagram of a specific structure of a first conversion module according to an embodiment of the present invention;
fig. 7 is a waveform diagram of a pixel photosensitive signal storage clock Px, a pixel photosensitive signal shift clock Pt, a sawtooth analog voltage signal (0-Vref), an analog voltage signal V, and a pixel photosensitive signal CCDsig according to an embodiment of the present invention;
FIG. 8 is a schematic diagram of another embodiment of a first conversion module;
Fig. 9 is a schematic diagram of a specific structure of a second conversion module according to an embodiment of the present invention;
Fig. 10 is a waveform diagram of a pixel photosensitive signal storing clock Px, a pixel photosensitive signal shifting clock Pt, a pixel photosensitive signal CCDsig, a binarization signal Cmpsig, a count stop clock CLK1, a data output trigger clock CLK2, and a clear clock CLR2 according to an embodiment of the present invention;
fig. 11 is a schematic diagram of a specific structure of another second conversion module according to an embodiment of the present invention.
Detailed Description
The invention is described in further detail below with reference to the drawings and examples. It is to be understood that the specific embodiments described herein are merely illustrative of the invention and are not limiting thereof. It should be further noted that, for convenience of description, only some, but not all of the structures related to the present invention are shown in the drawings.
Fig. 1 is a schematic structural diagram of a sensor signal conversion device of a pre-alignment machine according to an embodiment of the present invention, as shown in fig. 1, the device includes: a signal output module 10, a signal conversion module 20 and an analysis module 30; a signal output module 10 for outputting a sensor signal of the prealigner to a signal conversion module 20; the signal conversion module 20 is configured to convert the sensor signal into a sensor conversion signal, and output the sensor conversion signal to the analysis module 30; the parsing module 30 is configured to parse the sensor conversion signal.
The existing prealignment machine can adopt different types of sensors to detect the edge of a wafer, detect the shielding signal change of the wafer to the sensors by rotating the wafer, calculate the circle center coordinates and the notch direction of the wafer, and the on-site analysis module outputs an adjustment signal according to the calculated circle center coordinates and the notch direction of the wafer and the offset between the circle center coordinates and the notch direction of the preset wafer so as to adjust the wafer;
Different types of sensors may include silicon photocells, phototransistors, and linear CCD sensors; the present embodiment is not particularly limited to different types of sensors; the internal principle of detecting the wafer edge by the sensors of different types is not used, and the output sensor signals are different; because the on-site analysis module can only analyze specific sensor signals, the sensor signals output by different types of sensors are converted by the signal conversion module 20 and are output to the analysis module 30, so that the on-site analysis module can directly analyze the sensor conversion signals, and the circle center coordinates and the notch direction of the wafer can be calculated, thereby ensuring the stable operation of the on-site analysis module.
It will be understood that the actual field analysis module 30 may be other types of analysis modules, and the signal conversion module 20 may convert different sensor signals into other types of analysis modules, so as to meet the analysis of the field analysis modules 30 of different types; the type of field analysis module 30 is not particularly limited in this embodiment.
Considering that the existing prealignment sensor mainly has two output interfaces, one is voltage signal output, fig. 2 is a schematic diagram of the principle of measuring the edge of a wafer by using the voltage signal output provided by the embodiment of the invention, as shown in fig. 2, the principle is that the shielding distance L of the wafer B is converted into a voltage in equal proportion to output (e.g. L1), namely: occlusion distance/detection range=output voltage/reference voltage, and the method has stable signal, simple operation, larger delay and general precision. Fig. 3 is a schematic diagram of a principle of measuring an edge of a wafer by using pixel photosensitive signal output according to an embodiment of the present invention, as shown in fig. 3, an edge of the wafer B is detected by using an array sensor C, a light excitation unit C1 in the array sensor C irradiates the wafer B, each photosensitive unit C2 corresponds to a register, a photosensitive value of each photosensitive unit is stored in the corresponding register during detection, photosensitive information (e.g. l 2) of each photosensitive unit is obtained by reading the register, and then the photosensitive information is processed to obtain edge position information; the method has small signal delay and high edge position recognition precision, but the processing circuit and the algorithm are complex and are easy to be interfered by external environment;
meanwhile, the types of the existing on-site analysis modules are also considered to be different, one is usually an analysis module for analyzing voltage signals, and the other is usually an analysis module for analyzing pixel photosensitive signals;
The following specifically uses the mutual conversion of the two sensor signals, and the two sensor signals are respectively analyzed by different analysis modules after the mutual conversion; optionally, in some embodiments, fig. 4 is a schematic structural diagram of a sensor signal conversion device of another prealignment machine according to an embodiment of the present invention; as shown in fig. 4, the signal output module 10 includes a first type signal output module 11; the signal conversion module 20 includes a first conversion module 21; the parsing module 30 includes a first parsing module 31: the first conversion module 21 is configured to convert the voltage signal output by the first type signal output module 11 into a pixel photosensitive signal, and output the pixel photosensitive signal to the first analysis module 31, so that the first analysis module 31 performs analysis processing according to the pixel photosensitive signal;
The first type signal output module 11 can convert the ratio of the shielding distance of the wafer into voltage for output, so that the edge position of the wafer can be determined; the first analyzing module 31 is a module for analyzing the photosensitive signals of the pixels, that is, determining edge position information according to the photosensitive information of each photosensitive unit; the voltage signal may be converted into a pixel light sensing signal by the first conversion module 21, so that the first type parsing module 31 may parse and determine the edge position according to the pixel light sensing signal.
Or in other embodiments, fig. 5 is a schematic structural diagram of a sensor signal conversion device of another prealignment machine according to an embodiment of the present invention; as shown in fig. 5, the signal output module 10 includes a second type of signal output module 12; the signal conversion module 20 includes a second conversion module 22; the parsing module 30 includes a second parsing module 32; the second conversion module 22 is configured to convert the pixel photosensitive signal output by the second type signal output module 12 into a voltage signal, and output the voltage signal to the second analysis module 32, so that the second analysis module 32 performs analysis processing according to the voltage signal.
Wherein the second type signal output module 12 may be a linear CCD sensor; the linear CCD sensor uses the photosensitive information pixel photosensitive signals of each photosensitive unit to obtain edge position information; the second type of analysis module 32 is a module for analyzing the voltage signal, that is, determining edge position information according to the voltage signal; the pixel photosensitive signals can be converted into voltage signals by the second conversion module 22, so that the second type analysis module can analyze and determine the edge position according to the voltage signals.
Optionally, based on the foregoing embodiment, the first conversion module 21 and the second conversion module 22 are further refined, and fig. 6 is a schematic diagram of a specific structure of the first conversion module according to the embodiment of the present invention;
Fig. 7 is a waveform diagram of a pixel photosensitive signal storage clock Px, a pixel photosensitive signal shift clock Pt, a sawtooth analog voltage signal (0-Vref), an analog voltage signal V, and a pixel photosensitive signal CCDsig according to an embodiment of the present invention; as shown in fig. 6 to 7, the first-type signal output module 11 includes an analog voltage signal output unit 111; the first conversion module 21 includes: a clock generation unit 211, a first logic control unit 212, a first shift count unit 213, a first DA conversion unit 214, and a first comparison unit 215;
A clock generation unit 211 for generating a pixel photosensitive signal holding clock Px and a pixel photosensitive signal shift clock Pt;
The first logic control unit 212 is configured to read and generate a count clock CLK and a clear clock CLR according to the pixel photosensitive signal storage clock Px and the pixel photosensitive signal shift clock Pt; wherein the counting clock CLK is synchronous with the pixel photosensitive signal shift clock Pt; the clear clock CLR is synchronous with the pixel photosensitive signal storage clock Px;
A first shift count unit 213 for performing count accumulation according to the count clock CLK, and outputting the accumulated count to a first DA conversion unit 214; the counting zero clearing device is also used for counting zero clearing according to the zero clearing clock CLR;
a first DA conversion unit 214 for converting the accumulated count into a sawtooth analog voltage signal (0-Vref);
The first comparing unit 215 is configured to output a pixel photosensitive signal CCDsig according to the sawtooth analog voltage signal (0-Vref) and the analog voltage signal V output by the analog voltage signal output unit, so that the first analyzing module 31 analyzes the pixel photosensitive signal; wherein, the sawtooth analog voltage signal (0-Vref) is the same as the period of the pixel photosensitive signal preservation clock Px; the pixel photosensitive signal CCDsig is synchronized with the pixel photosensitive signal shift clock Pt.
The model number of the first logic control unit 211 may be: GAL22V10D; the first shift count unit 213 has the model number: SN74LV4040A; the first DA conversion unit 214 may be formed of the model number: DAC902, model: OPA2680 two chips; the model of the first comparing unit 215 is: TLV3201;
the conversion principle of converting analog voltage signals into pixel photosensitive signals is described below with reference to a specific clock; specifically, with continued reference to fig. 7, the first comparing unit 215 outputs a square wave signal V 'according to the sawtooth analog voltage signal (0-Vref) and the analog voltage signal V, wherein the period of the square wave signal V' is the same as the period of the pixel photosensitive signal storing clock Px; the position of the square wave signal V 'with the high and low level turned over is the position of the pixel photosensitive signal shift clock Pt corresponding to the ith photosensitive unit (the square wave signal V' and the pixel photosensitive signal are basically the same type of signal); the first analyzing module 31 can directly analyze the position of the edge of the wafer through the position of the pixel photosensitive signal shift clock Pt corresponding to the ith photosensitive unit, so that the position of the edge of the wafer can be analyzed by analyzing the position of the high-low level inversion of the square wave signal V', i.e. determining the position of the pixel photosensitive signal shift clock Pt corresponding to the ith photosensitive unit.
Optionally, fig. 8 is a schematic structural diagram of another first conversion module according to an embodiment of the present invention; as shown in fig. 8, the first type signal output module 11 further includes a digital voltage signal output unit 112;
The first conversion module 21 further includes: a second DA conversion unit 216; a second DA conversion unit 216 for converting the digital voltage signal output by the digital voltage signal output unit 112 into an analog voltage signal; and is further configured to output an analog voltage signal to the first comparing unit 215; the first comparing unit 215 also outputs a pixel photosensitive signal according to the sawtooth analog voltage signal and the analog voltage signal output by the second DA converting unit 216. Wherein, when the digital voltage signal output unit 112 outputs the digital voltage signal, the second DA conversion unit 216 may be added to convert the digital voltage signal into an analog voltage signal; the first comparing unit 215 outputs the pixel photosensitive signal according to the sawtooth analog voltage signal and the analog voltage signal, so as to meet the conversion requirement of other scenes.
Optionally, fig. 9 is a schematic diagram of a specific structure of a second conversion module according to an embodiment of the present invention; fig. 10 is a waveform diagram of a pixel photosensitive signal storing clock Px, a pixel photosensitive signal shifting clock Pt, a pixel photosensitive signal CCDsig, a binary signal Cmpsig, a count stop clock CLK1, a data output trigger clock CLK2, and a clear clock CLR2 according to an embodiment of the present invention; as shown in fig. 9-10, the second conversion module 22 includes: a second logic control unit 221, a threshold setting unit 222, a second comparing unit 223, a second shift count unit 224, and a flip-flop 225;
The second type signal output module 12 includes: a pixel photosensitive signal output unit 121;
the second logic control unit 221 is configured to generate a pixel photosensitive signal storage clock Px and a pixel photosensitive signal shift clock Pt, and control the pixel photosensitive signal output unit 121 to generate a pixel photosensitive signal CCDsig according to the pixel photosensitive signal storage clock Px and the pixel photosensitive signal shift clock Pt;
a threshold setting unit 222 for generating a voltage threshold V Threshold value ;
The second comparing unit 223 is configured to output a binarized signal Cmpsig according to the pixel photosensitive signal CCDsig and the voltage threshold V Threshold value , and output a binarized signal Cmpsig to the second logic control unit 221;
the second logic control unit 221 is further configured to generate a count stop clock CLK1 according to the pixel photosensitive signal shift clock Pt and the binarization signal Cmpsig when the binarization signal Cmpsig is detected;
A second shift counting unit 224 for performing count accumulation according to the pixel photosensitive signal shift clock Pt, stopping counting when the count stop clock CLK1 is detected, and outputting the count accumulation;
The second logic control unit 221 is further configured to generate a data output trigger clock CLK2 according to the pixel photosensitive signal storage clock Px; wherein, the rising edge of the pixel photosensitive signal storage clock Px is synchronous with the rising edge of the data output trigger clock CLK2;
The device is also used for generating a clearing clock CLR2 according to the pixel photosensitive signal storage clock Px and the data output trigger clock CLK 2; wherein the rising edge of the clear clock CLR2 is synchronized with the falling edge of the data output trigger clock CLK 2; the falling edge of the clearing clock CLR2 is synchronous with the falling edge of the pixel photosensitive signal storage clock Px;
A flip-flop 225 for outputting the count accumulation as the digital voltage signal Q to the second parsing module 32 to cause the second parsing module 32 to parse the digital voltage signal Q when receiving the data output trigger clock CLK 2;
the second shift count unit 224 is further configured to zero the count accumulation according to the clear clock CLR 2.
The model number of the second logic control unit 221 may be: GAL22V10D; the model of the second comparing unit 223 may be: the type of TLV3201 second shift count unit 224 may be: SN74LV4040A; the type of trigger 225 may be: sn74hc374;
The conversion principle of converting the pixel photosensitive signals into analog voltage signals is described below with reference to a specific clock; with continued reference to fig. 10, specifically, since the level inversion time of the pixel photosensitive signal CCDsig is the edge position of the wafer, that is, the position corresponding to the i-th photosensitive unit of the pixel photosensitive signal shift clock Pt analyzes the position of the edge of the wafer; in this embodiment, the second comparing unit 223 outputs a binarized signal Cmpsig according to the pixel photosensitive signal CCDsig and the voltage threshold V Threshold value , the level-inverted position of the binarized signal Cmpsig corresponds to the level-inverted time of the pixel photosensitive signal CCDsig, that is, corresponds to the position of the i-th photosensitive unit corresponding to the pixel photosensitive signal shift clock Pt, that is, the detection time of the wafer edge position can be determined by the level-inverted time on the binarized signal Cmpsig;
When the binarization signal Cmpsig is detected, the second logic control unit 221 generates a count stop clock CLK1 according to the pixel photosensitive signal shift clock Pt and the binarization signal Cmpsig; the second shift counting unit 224 performs count accumulation according to the pixel photosensitive signal shift clock Pt, stops counting when the count stop clock CLK1 is detected, and outputs the count accumulation;
The second logic control unit 221 simultaneously generates a data output trigger clock CLK2 according to the pixel photosensitive signal save clock Px; the flip-flop 225 outputs the count accumulation as the digital voltage signal Q to the second analyzing module 32 when receiving the data output trigger clock CLK2, so that the second analyzing module 32 analyzes the digital voltage signal Q, thereby determining the wafer edge position.
And after the data output trigger clock CLK2 ends, the second logic control unit 221 generates the clear clock CLR2; the second shift count unit 224 clears the count accumulation according to the clear clock CLR2, and prepares for the next cycle count.
Optionally, fig. 11 is a schematic diagram of a specific structure of another second conversion module according to an embodiment of the present invention; as shown in fig. 11, the second conversion module 22 further includes: a third DA conversion unit 226; the third DA conversion unit 226 is configured to convert the digital voltage signal (Dn) into an analog voltage signal (exemplarily, dn/1024×vmax) so that the second analysis module 32 analyzes the analog voltage signal. The third DA conversion unit 226 may be added to meet the conversion requirement of the second parsing module 32 for parsing the output analog voltage signal.
Note that the above is only a preferred embodiment of the present invention and the technical principle applied. It will be understood by those skilled in the art that the present invention is not limited to the particular embodiments described herein, but is capable of various obvious changes, rearrangements and substitutions as will now become apparent to those skilled in the art without departing from the scope of the invention. Therefore, while the invention has been described in connection with the above embodiments, the invention is not limited to the embodiments, but may be embodied in many other equivalent forms without departing from the spirit or scope of the invention, which is set forth in the following claims.
Claims (6)
1. A sensor signal conversion device of a prealignment machine, comprising: the device comprises a signal output module, a signal conversion module and an analysis module;
The signal output module is used for outputting a sensor signal to the signal conversion module;
The signal conversion module is used for converting the sensor signal into a sensor conversion signal and outputting the sensor conversion signal to the analysis module;
The analysis module is used for analyzing the sensor conversion signal.
2. The sensor signal conversion device of the pre-alignment machine according to claim 1, wherein the signal output module comprises a first type of signal output module; the signal conversion module comprises a first conversion module; the parsing module comprises a first parsing module:
the first conversion module is used for converting the voltage signals output by the first type signal output module into pixel photosensitive signals and outputting the pixel photosensitive signals to the first analysis module so that the first analysis module can analyze the pixel photosensitive signals;
Or the signal output module comprises a second type signal output module; the signal conversion module comprises a second conversion module; the analysis module comprises a second analysis module;
the second conversion module is configured to convert the pixel photosensitive signal output by the second type signal output module into a voltage signal, and output the voltage signal to the second analysis module, so that the second analysis module performs analysis processing according to the voltage signal.
3. The sensor signal conversion device of the pre-alignment machine according to claim 2, wherein the first type of signal output module comprises an analog voltage signal output unit; the first conversion module includes: the device comprises a clock generation unit, a first logic control unit, a first shift counting unit, a first DA conversion unit and a first comparison unit;
The clock generation unit is used for generating a pixel photosensitive signal storage clock and a pixel photosensitive signal shift clock;
the first logic control unit is used for reading and generating a counting clock and a zero clearing clock according to the pixel photosensitive signal storage clock and the pixel photosensitive signal shifting clock; wherein the count clock is synchronized with the pixel photosensitive signal shift clock; the clear clock is synchronous with the pixel photosensitive signal storage clock;
The first shift counting unit is used for counting and accumulating according to the counting clock and outputting accumulated count to the first DA conversion unit; the counting zero clearing device is also used for counting zero clearing according to the zero clearing clock;
The first DA conversion unit is used for converting the accumulated count into a sawtooth analog voltage signal;
The first comparison unit is used for outputting a pixel photosensitive signal according to the sawtooth analog voltage signal and the analog voltage signal output by the analog voltage signal output unit so that the first analysis module analyzes the pixel photosensitive signal; wherein the sawtooth analog voltage signal and the pixel photosensitive signal save clock have the same period; the pixel photosensitive signal is synchronized with the pixel photosensitive signal shift clock.
4. A sensor signal conversion device of a prealignment machine according to claim 3, wherein said first type signal output module further comprises a digital voltage signal output unit;
The first conversion module further includes: a second DA conversion unit;
The second DA conversion unit is used for converting the digital voltage signal output by the digital voltage signal output unit into an analog voltage signal; the analog voltage signal is also used for being output to a first comparison unit;
the first comparison unit is also used for outputting a pixel photosensitive signal according to the sawtooth analog voltage signal and the analog voltage signal output by the second DA conversion unit.
5. The sensor signal conversion device of the pre-alignment machine according to claim 2, wherein the second conversion module comprises: the second logic control unit, the threshold value setting unit, the second comparison unit, the second shift counting unit and the trigger;
the second class signal output module includes: a pixel photosensitive signal output unit;
the second logic control unit is used for generating a pixel photosensitive signal storage clock and a pixel photosensitive signal shift clock, and controlling the pixel photosensitive signal output unit to generate a pixel photosensitive signal according to the pixel photosensitive signal storage clock and the pixel photosensitive signal shift clock;
the threshold setting unit is used for generating a voltage threshold;
The second comparison unit is used for outputting a binarization signal according to the pixel photosensitive signal and the voltage threshold value and outputting the binarization signal to the second logic control unit;
the second logic control unit is further configured to generate a count stop clock according to the pixel photosensitive signal shift clock and the binarization signal when the binarization signal is detected;
The second shift counting unit is used for carrying out count accumulation according to the pixel photosensitive signal shift clock, stopping counting when the count stop clock is detected, and outputting count accumulation;
The second logic control unit is further used for generating a data output trigger clock according to the pixel photosensitive signal storage clock; the rising edge of the pixel photosensitive signal storage clock is synchronous with the rising edge of the data output trigger clock;
The data output trigger clock is also used for generating a clearing clock according to the pixel photosensitive signal storage clock and the data output trigger clock; the rising edge of the clearing clock is synchronous with the falling edge of the data output trigger clock; the falling edge of the clearing clock is synchronous with the falling edge of the pixel photosensitive signal storage clock;
The trigger is used for outputting the count accumulation as a digital voltage signal to the second analysis module when receiving the data output trigger clock so as to enable the second analysis module to analyze the digital voltage signal;
The second shift counting unit is further used for resetting the count accumulation according to the clearing clock.
6. The sensor signal conversion device of a prealignment machine according to claim 5, wherein the second conversion module further comprises: a third DA conversion unit;
The third DA conversion unit is configured to convert the digital voltage signal into an analog voltage signal, so that the second analysis module analyzes the analog voltage signal.
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Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20020126215A1 (en) * | 2001-01-30 | 2002-09-12 | Satoshi Shigematsu | Data conversion/output apparatus |
| CN103051848A (en) * | 2013-01-21 | 2013-04-17 | 长春长光辰芯光电技术有限公司 | Image data analogue-digital conversion method and image sensor |
| JP2022091245A (en) * | 2020-12-09 | 2022-06-21 | セイコーエプソン株式会社 | Image processing apparatus |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20020126215A1 (en) * | 2001-01-30 | 2002-09-12 | Satoshi Shigematsu | Data conversion/output apparatus |
| CN103051848A (en) * | 2013-01-21 | 2013-04-17 | 长春长光辰芯光电技术有限公司 | Image data analogue-digital conversion method and image sensor |
| JP2022091245A (en) * | 2020-12-09 | 2022-06-21 | セイコーエプソン株式会社 | Image processing apparatus |
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