CN118075974A - Printed circuit board with symmetrical lamination structure and manufacturing method thereof - Google Patents

Printed circuit board with symmetrical lamination structure and manufacturing method thereof Download PDF

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Publication number
CN118075974A
CN118075974A CN202211471343.7A CN202211471343A CN118075974A CN 118075974 A CN118075974 A CN 118075974A CN 202211471343 A CN202211471343 A CN 202211471343A CN 118075974 A CN118075974 A CN 118075974A
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CN
China
Prior art keywords
printed circuit
circuit board
conductive layer
layer
hole
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN202211471343.7A
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Chinese (zh)
Inventor
吕政明
石汉青
杜旭
马无疆
黄发波
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Jianding Hubei Electronics Co ltd
Original Assignee
Jianding Hubei Electronics Co ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Jianding Hubei Electronics Co ltd filed Critical Jianding Hubei Electronics Co ltd
Priority to CN202211471343.7A priority Critical patent/CN118075974A/en
Publication of CN118075974A publication Critical patent/CN118075974A/en
Pending legal-status Critical Current

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Abstract

The invention discloses a printed circuit board with a symmetrical lamination structure and a manufacturing method thereof. The printed circuit board comprises an inner circuit structure and two outer circuit structures. The inner layer circuit structure is formed by one-time pressing and is provided with a first drilling hole penetrating through the first joint surface and the second joint surface. The first drill hole has a first aperture, and a first electroplated conductive layer is formed on an inner side wall of the first drill hole. The two outer layer circuit structures are respectively pressed to the first joint surface and the second joint surface of the inner layer circuit structure through secondary pressing. One of the two outer line structures has a second bore. The second bore corresponds in position to the first bore. The second bore has a second aperture larger than the first aperture, and an inner sidewall of the second bore is formed with a second plated conductive layer connected to the first plated conductive layer.

Description

Printed circuit board with symmetrical lamination structure and manufacturing method thereof
Technical Field
The present invention relates to a printed circuit board and a method for manufacturing the same, and more particularly, to a printed circuit board with a symmetrical lamination structure and a method for manufacturing the same.
Background
In the prior art, as shown in fig. 4, a printed circuit board including a high frequency material can be applied to an end application product having a high frequency requirement.
Under the design requirement of some products (such as high-frequency and high-speed products) containing mixed-pressure materials and having asymmetrically stacked printed circuit boards, the printed circuit boards are required to be designed with blind hole structures. However, the printed circuit board includes the primary bonding wire structure 200A and the secondary bonding wire structure 200B formed by secondary bonding, which have asymmetric plate structures. The thickness of the primary bonding wire structure 200A is significantly greater than the thickness of the secondary bonding wire structure 200B. Wherein, the secondary compression circuit structure is high-frequency material. After the press-fit operation, the printed circuit board with the mixed-pressure material has a serious board warping problem, and the board warping height can reach 40 mm, so that the application end of the product is plagued.
Disclosure of Invention
The invention aims to solve the technical problem of providing a printed circuit board with a symmetrical lamination structure and a manufacturing method thereof, which can meet the requirement of having a blind hole structure and further solve the problem of plate warping under the condition of not increasing the thickness of a plate.
In order to solve the above technical problems, one of the technical solutions adopted in the present invention is to provide a printed circuit board with a symmetrical lamination structure, which includes: an inner layer circuit structure; the inner layer circuit structure is formed by one-time pressing, and is provided with a first drilling hole penetrating through a first joint surface and a second joint surface of the inner layer circuit structure, wherein the first drilling hole is provided with a first aperture, and a first electroplating conductive layer is formed on the inner side wall of the first drilling hole; the two outer layer circuit structures are respectively and symmetrically pressed on the first joint surface and the second joint surface of the inner layer circuit structure through secondary pressing; one of the two outer circuit structures is provided with a second drilling hole, the second drilling hole corresponds to the first drilling hole in position, the second drilling hole is provided with a second aperture larger than the first aperture, and a second electroplating conductive layer connected with the first electroplating conductive layer is formed on the inner side wall of the second drilling hole.
In order to solve the above technical problems, another technical solution adopted by the present invention is to provide a method for manufacturing a printed circuit board with a symmetrical lamination structure, which includes: performing a first bonding operation to form an inner layer circuit structure with a first bonding surface and a second bonding surface on opposite sides; performing a first drilling operation to form a first drilling hole penetrating through the first joint surface and the second joint surface on the inner layer circuit structure, wherein the first drilling hole is provided with a first aperture; performing a first electroplating operation to form a first electroplated conductive layer on an inner side wall of the first drilling hole; performing a second lamination operation to symmetrically laminate the two outer layer circuit structures to the first joint surface and the second joint surface of the inner layer circuit structure through secondary lamination respectively; performing a second drilling operation to form a second drilling hole on one of the two outer circuit structures; wherein the second bore corresponds in position to the first bore and has a second aperture larger than the first aperture; and performing a second electroplating operation to form a second electroplating conductive layer directly connected with the first electroplating conductive layer on an inner side wall of the second drilling hole so as to realize electric connection.
The printed circuit board with the symmetrical lamination structure and the manufacturing method thereof can meet the requirement of customers on products on having a blind hole structure, and can further solve the problem of plate warping under the condition of not increasing the thickness of the original lamination design plate. The blind hole structure is formed by the first drilling hole and the second drilling hole which are specially designed, so that the printed circuit board can have a symmetrical pressing structure, and the problem of warping of the board is effectively solved.
For a further understanding of the nature and the technical aspects of the present invention, reference should be made to the following detailed description of the invention and the accompanying drawings, which are provided for purposes of reference only and are not intended to limit the invention.
Drawings
FIG. 1 is a schematic cross-sectional view of a printed circuit board according to an embodiment of the invention;
fig. 2A is a schematic diagram of a step S101 of a method for manufacturing a printed circuit board according to an embodiment of the invention;
Fig. 2B is a schematic diagram of a step S102 of a method for manufacturing a printed circuit board according to an embodiment of the invention;
fig. 2C is a schematic diagram of step S103 of a method for manufacturing a printed circuit board according to an embodiment of the invention;
fig. 2D is a schematic diagram of step S104 of a method for manufacturing a printed circuit board according to an embodiment of the invention;
fig. 2E is a schematic diagram of step S105 of a method for manufacturing a printed circuit board according to an embodiment of the invention;
fig. 2F is a schematic diagram of step S106 of a method for manufacturing a printed circuit board according to an embodiment of the invention;
Fig. 2G is a schematic diagram of step S107 of a method for manufacturing a printed circuit board according to an embodiment of the invention;
FIG. 2H is a schematic diagram of a step S108 of a method for manufacturing a printed circuit board according to an embodiment of the invention;
fig. 2I is a schematic diagram of step S109 of a method for manufacturing a printed circuit board according to an embodiment of the invention;
fig. 2J is a schematic diagram of step S110 of a method for manufacturing a printed circuit board according to an embodiment of the invention;
FIG. 2K is a schematic diagram of a step S111 of a method for manufacturing a printed circuit board according to an embodiment of the invention;
FIG. 3 is a schematic view of a projection area of a printed circuit board according to an embodiment of the invention;
fig. 4 is a schematic cross-sectional view of a printed circuit board of the prior art.
Symbol description
100: Printed circuit board with improved heat dissipation
110: Inner layer circuit structure
110A: a first joint surface
110B: second joint surface
111: First borehole
112: First electroplated conductive layer
113: Resin material
114: Inner core substrate
115: Inner layer adhesive layer
116: Inner layer circuit pattern
D1: first aperture
120: Outer layer circuit structure
121: Second borehole
122: Second electroplated conductive layer
123: Solder resist ink
124: Outer layer dielectric substrate
125: Outer layer adhesive layer
126: Outer layer circuit pattern
D2: second aperture
H: electroplating via hole
V: laser blind hole
S: browning treated surfaces
P: projection area
200A: one-time press-fit circuit structure
200B: secondary press-bonding circuit structure
Detailed Description
The following embodiments of the present invention are described in terms of specific examples, and those skilled in the art will appreciate the advantages and effects of the present invention from the disclosure herein. The invention is capable of other and different embodiments and its several details are capable of modifications and various other uses and applications, all of which are obvious from the description, without departing from the spirit of the invention. The drawings of the present invention are merely schematic illustrations, and are not intended to be drawn to actual dimensions. The following embodiments will further illustrate the related art content of the present invention in detail, but the disclosure is not intended to limit the scope of the present invention.
It will be understood that, although the terms "first," "second," "third," etc. may be used herein to describe various elements or signals, these elements or signals should not be limited by these terms. These terms are used primarily to distinguish one element from another element or signal from another signal. In addition, the term "or" as used herein shall include any one or combination of more of the associated listed items as the case may be.
Referring to fig. 1, an embodiment of the present invention provides a printed circuit board 100 with a symmetrical lamination structure. The printed circuit board 100 includes: an inner circuit structure 110 and two outer circuit structures 120 formed on two opposite surfaces of the inner circuit structure 110, respectively.
The printed circuit board provided by the embodiment of the invention can meet the requirement of customers on products for having a blind hole structure, and can further solve the problem of board warping under the condition of not increasing the thickness of the board of the original stacking design. The specific structural features of the inner circuit structure 110 and the outer circuit structure 120 and the connection relationship therebetween will be described in detail below.
The inner circuit structure 110 is formed by a single lamination, and defines a first bonding surface 110a (e.g., upper surface) and a second bonding surface 110b (e.g., lower surface) on opposite sides. The inner circuit structure 110 further has a first bore 111, and the first bore 111 is formed through the first bonding surface 110a and the second bonding surface 110b of the inner circuit structure 110. The first bore 111 has a first aperture D1. The first borehole 111 may be formed by, for example, mechanical drilling, but the present invention is not limited thereto.
In some embodiments of the present invention, the first aperture D1 of the first bore 111 is not less than 2 mils (mils), and preferably not less than 4 mils, although the present invention is not limited thereto.
Further, a first electroplated conductive layer 112 is formed on an inner sidewall of the first borehole 111. The material of the first electroplated conductive layer 112 may be, for example, metallic copper, and the first electroplated conductive layer 112 may be formed by electroplating, for example, but the invention is not limited thereto.
In addition, the first electroplated conductive layer 112 is formed on the inner sidewall of the first drilled hole 111, and also extends to form the first bonding surface 110a and the second bonding surface 110b of the inner circuit structure 110 to form a circuit pattern on the surface.
In the present embodiment, the first plated conductive layer 112 is used to electrically connect the multi-layer circuit (such as the multi-layer inner layer circuit pattern 116 shown in fig. 1) of the inner layer circuit structure 110, and an inner space surrounded by the first plated conductive layer 112 is filled with a resin material 113. The resin material 113 may be, for example, epoxy resin (epoxy resin), but the present invention is not limited thereto.
In addition, in the present embodiment, the inner circuit structure 110 includes a plurality of inner core substrates 114 and an inner adhesive layer 115 formed between the plurality of inner core substrates 114 for adhesion. In addition, two inner layer circuit patterns 116 are respectively formed on two side surfaces of each inner layer core substrate 114.
Wherein the inner core substrate 114 may also be referred to as a core. The material of the inner core substrate 114 may be, for example, a glass fiber cloth (e.g., FR-4), which is a non-high frequency material, but the invention is not limited thereto.
The inner adhesive layer 115 is used for adhering two adjacent inner core substrates 114, and the inner adhesive layer 115 may be, for example, a semi-cured adhesive sheet (e.g., prepreg, PP adhesive).
The two inner circuit patterns 116 respectively formed on both side surfaces of the inner core substrate 114 may be formed of, for example, a metal copper foil by means of circuit etching, but is not limited thereto.
The inner circuit structure 110 is formed by laminating the plurality of inner core substrates 114 having the inner circuit patterns 116 through the inner adhesive layer 115 once. In addition, the number of layers of the inner circuit patterns 116 of the inner circuit structure 110 is generally twice the number of inner core substrates 114. For example, the number of the inner core substrates 114 in the present embodiment is two, and the number of the inner circuit patterns 116 is four, but the present invention is not limited thereto.
Referring to fig. 1 again, the two outer circuit structures 120 are pressed onto the first bonding surface 110a and the second bonding surface 110b of the inner circuit structure 110 respectively through the secondary pressing, so as to form a symmetrical printed circuit board stacking structure.
More specifically, the two outer circuit structures 120 are symmetrically pressed onto the first bonding surface 110a and the second bonding surface 110b of the inner circuit structure 100, respectively, for balancing the stress on the first bonding surface 110a and the second bonding surface 110b of the printed circuit board 100 formed after the second pressing, so as to reduce the warpage of the printed circuit board.
Further, one of the outer circuit structures 120 (the upper outer circuit structure 120 shown in fig. 1) of the two outer circuit structures 120 has a second bore 121, and the second bore 121 corresponds in position to the first bore 111.
The second bore 121 has a second aperture D2, and the second aperture D2 of the second bore 121 is larger than the first aperture D1 of the first bore 111. The second borehole 121 may be formed by, for example, mechanical drilling, but the present invention is not limited thereto.
In some embodiments of the present invention, the second aperture D2 of the second bore 121 is not greater than 12 mils, and preferably not greater than 8 mils, although the present invention is not limited thereto.
In addition, a difference between the second aperture D2 and the first aperture D1 is not less than 1 mil, and preferably not less than 2 mil, but the present invention is not limited thereto.
It is noted that the above-mentioned mils (mils) are also known as english filaments or strips, which are the length units commonly used in the art of printed circuit boards to describe pore size. As known to those skilled in the art, 1 mil (mil) is equal to 25.4 microns.
Further, a second plating conductive layer 122 is formed on an inner sidewall of the second hole 121, and the second plating conductive layer 122 is directly abutted against the first plating conductive layer 112 to be electrically connected with each other. In the present embodiment, as shown in fig. 1, the portion of the bottom of the second plating conductive layer 122, which is in contact with the first plating conductive layer 112, has a substantially V-shape or a U-shape, but the present invention is not limited thereto.
The material of the second electroplated conductive layer 122 may be, for example, metallic copper, and the second electroplated conductive layer 122 may be, for example, formed by electroplating, but the invention is not limited thereto. In addition, the second electroplated conductive layer 122 is formed on the inner side walls of the second holes 121 and also extends to the outer surfaces of the two outer circuit structures 120 to form an outer circuit pattern.
In this embodiment, the second electroplated conductive layer 122 is configured to electrically connect different layer wires (e.g., the outer layer wire pattern 126 of fig. 1) of the corresponding outer layer wire structure 120 (e.g., the upper outer layer wire structure 120 of fig. 1), and further electrically connect to the first electroplated conductive layer 112. Wherein an inner space surrounded by the second plated conductive layer 122 is filled with a solder resist ink 123 (e.g., a solder mask).
In addition, in the present embodiment, each of the outer circuit structures 120 includes an outer dielectric substrate 124, an outer adhesive layer 125, and two outer circuit patterns 126. The two outer circuit patterns 126 are formed on two side surfaces of the outer dielectric substrate 124, respectively, and the outer dielectric substrate 124 with the outer circuit patterns 126 is adhered to the first bonding surface 110a or the second bonding surface 110b of the inner circuit structure 110 by the outer adhesive layer 125, but the invention is not limited thereto, and the number of layers of the outer dielectric substrate 124 and the outer circuit patterns 126 of each outer circuit structure 120 is not limited to fig. 1, and can be adjusted according to the design requirement of the product.
Further, of the two outer line structures 120, the outer line structure 120 provided on the first joint surface 110a of the inner line structure 110 has the second hole 121. In addition, an outer dielectric substrate 124 of the outer circuit structure 120 disposed on the second bonding surface 110b of the inner circuit structure 110 is formed of a high frequency material.
It is worth mentioning that the high-frequency material mainly uses teflon (PTFE) and polyphenylene oxide (PPO), and the two resins have good material stability and reliability in high-frequency environment, but the invention is not limited thereto. Furthermore, the outer dielectric substrate 124 of the other outer circuit structure 120 may be, for example, glass fiber cloth (e.g., FR-4), but the invention is not limited thereto.
The material of the outer adhesive layer 125 may be, for example, a semi-cured adhesive sheet (e.g., prepreg), and the two outer circuit patterns 126 respectively formed on the two side surfaces of the outer dielectric substrate 124 may be, for example, formed by etching a metal copper foil, but the invention is not limited thereto.
In a variation of the present invention, in the two outer circuit structures 120, the outer circuit structure 120 disposed on the first bonding surface 110a of the inner circuit structure 110 has the second hole 121, and the outer dielectric substrate 124 of the outer circuit structure 120 having the second hole 121 is formed of a high frequency material.
It should be noted that, the "first bonding surface 110 a" and the "second bonding surface 110 b" of the inner circuit structure 110 are only for convenience of distinguishing one surface from the other, however, in practical application, the "first bonding surface 110 a" of the inner circuit structure 110 is not limited to be disposed all the way up, and the "second bonding surface 110 b" is not limited to be disposed all the way down. In addition, the number of the first holes 111 and the second holes 121 is not limited to two as shown in fig. 1, and may be changed according to design requirements, and the present invention is not limited thereto.
As shown in fig. 1, from another angle, the first hole 111 of the inner circuit structure 110 and the first electroplated conductive layer 112 formed on the inner side wall of the first hole 111 are buried between the two outer circuit structures 120, and the second hole 121 is a blind hole butt-jointed with the first hole 111.
Further, in the present embodiment, the printed circuit board 100 has a plated through hole H (Plated through hole, PTH) vertically penetrating the inner circuit structure 110 and the two outer circuit structures 120. In addition, at least one of the outer circuit structures 120 of the two outer circuit structures 120 has a blind laser hole V. In this embodiment, both of the outer circuit structures 120 have the laser blind holes V.
Further, as shown in fig. 3, in a projection area P projected along a normal vector of the printed circuit board 100, a first peripheral contour of the first borehole 111 falls inside a second peripheral contour of the second borehole 121.
According to the design (D1 and D2) of the hole diameter relationship between the two holes, the difficulty in aligning the second hole 121 and the first hole 111 can be effectively reduced, and the second plated conductive layer 122 can be easily abutted against the first plated conductive layer 112 to maintain electrical connection.
In addition, the printed circuit board provided by the embodiment of the invention can meet the requirement of customers on products for having a blind hole structure, and the problem of warping of the printed circuit board can be further solved under the condition that the thickness of the board of the original stacking design is not increased.
In some embodiments of the present invention, the thickness of the two outer layer wire structures 120 is substantially the same. The thickness of each outer circuit structure 120 is smaller than the thickness of the inner circuit structure 110. In addition, the stress (stress) of one of the outer layer wiring structures 120 to the inner layer wiring structure 110 is approximately equal to the stress of the other of the outer layer wiring structures 120 to the inner layer wiring structure 110.
The structural features and material features of the printed circuit board with the symmetrical press-fit structure according to the embodiment of the present invention are described above, and the manufacturing method of the printed circuit board with the symmetrical press-fit structure according to the embodiment of the present invention will be described below.
Referring to fig. 2A to fig. 2K, an embodiment of the invention provides a method for manufacturing a printed circuit board with a symmetrical lamination structure, which includes steps S101 to S111. It should be noted that the order and the actual operation mode of the steps carried by the present embodiment may be adjusted according to the requirements, and are not limited to the steps carried by the present embodiment.
As shown in fig. 2A, the step S101 includes: a first bonding operation is performed to form an inner circuit structure 110 that is bonded at a time. The inner circuit structure 110 is formed by etching two sides of a plurality of inner core substrates 114 (FR 4 substrates) coated with copper foil to form inner circuit patterns 116, and laminating the inner core substrates with each other through at least one inner adhesive layer 115. The inner circuit structure 110 has a first bonding surface 110a and a second bonding surface 110b on opposite sides.
As shown in fig. 2B, the step S102 includes: a first drilling operation is performed to form a first drilling hole 111 penetrating the first bonding surface 110a and the second bonding surface 110b in the inner circuit structure 110, and the first drilling hole has a first aperture D1.
As shown in fig. 2C, the step S103 includes: a first electroplating operation is performed to form a first electroplated conductive layer 112 on an inner sidewall of the first borehole 111. The first electroplated conductive layer 112 is formed on the inner sidewall of the first drilled hole 111 and also extends on the first bonding surface 110a and the second bonding surface 110b of the inner circuit structure 110. The first plated conductive layer 112 electrically connects the multi-layered inner circuit patterns 116 of the inner circuit structure 110 to each other.
As shown in fig. 2D, the step S104 includes: a first hole plugging operation is performed to fill an inner space surrounded by the first electroplated conductive layer 112 on the inner side wall of the first drill hole 111 with a resin material 113 for preventing the line from being lack of glue caused by Prepreg glue flowing during the secondary lamination.
As shown in fig. 2E, the step S105 includes: a resin grinding operation is performed to grind the resin material 113 overflowing the first drilling hole 111 flat, so that the top surface of the resin material 113 is coplanar with the first electroplated conductive layer 112 on the first bonding surface 110a of the inner circuit structure 110. And the bottom surface of the resin material 113 is also made coplanar with the first plated conductive layer 112 on the second bonding surface 110b of the inner circuit structure 110. Wherein the resin grinding operation is an eight-axis grinder, but the present invention is not limited thereto.
As shown in fig. 2F, the step S106 includes: a circuit forming operation is performed to etch the first plated conductive layer 112 formed on the first bonding surface 110a and the first plated conductive layer 112 formed on the second bonding surface 110b of the inner circuit structure 110 respectively into a circuit pattern by a photolithography process, but the present invention is not limited thereto.
As shown in fig. 2G, the step S107 includes: a browning process is performed to form a browning surface S on the first electroplated conductive layer 112 on the first bonding surface 110a and the first electroplated conductive layer 112 on the second bonding surface 110b of the inner circuit structure 110. The brown-treated surface S may be used to enhance the bonding force between the two outer circuit structures and the inner circuit structure 110 during the secondary lamination operation.
As shown in fig. 2H, the step S108 includes: a second bonding operation is performed to symmetrically bond the two outer circuit structures 120 to the first bonding surface 110a and the second bonding surface 110b of the inner circuit structure 110 through the second bonding.
As shown in fig. 2I, the step S109 includes: a second drilling operation is performed to form a second hole 121 drilled toward the inner circuit structure 110 on one of the two outer circuit structures 120 (e.g., the upper outer circuit structure 120 of fig. 2I). Wherein the second bore 121 corresponds in position to the first bore 111, and the second bore 121 has a second bore diameter D2 that is larger than the first bore diameter D1.
As shown in fig. 2J, the step S110 includes: a second plating operation is performed to form a second plated conductive layer 122 on an inner sidewall of the second hole 121, and the second plated conductive layer 122 is directly connected to the first plated conductive layer 112 to be electrically connected to each other.
As shown in fig. 2K, the step S111 includes: a second hole plugging operation is performed to fill an inner space surrounded by the second electroplated conductive layer 122 with a solder mask ink 123.
The printed circuit board with the symmetrical lamination structure and the manufacturing method thereof can meet the requirement of customers on products on having a blind hole structure, and can further solve the problem of plate warping under the condition of not increasing the thickness of the original lamination design plate.
The above disclosure is only a preferred embodiment of the present invention and is not intended to limit the claims of the present invention, so that all equivalent technical changes made by the application of the specification and the drawings of the present invention are included in the claims of the present invention.

Claims (11)

1. A printed circuit board with a symmetrical press-fit structure, comprising:
An inner layer circuit structure; the inner layer circuit structure is formed by one-time pressing, and is provided with a first drilling hole penetrating through a first joint surface and a second joint surface of the inner layer circuit structure, wherein the first drilling hole is provided with a first aperture, and a first electroplating conductive layer is formed on the inner side wall of the first drilling hole; and
The two outer layer circuit structures are respectively pressed onto the first joint surface and the second joint surface of the inner layer circuit structure through secondary pressing; wherein one of the two outer circuit structures is provided with a second drilling hole, the second drilling hole corresponds to the first drilling hole in position, the second drilling hole is provided with a second aperture larger than the first aperture, and the inner side wall of the second drilling hole is provided with a second electroplating conductive layer connected with the first electroplating conductive layer.
2. The printed circuit board with symmetrical press-fit structure as claimed in claim 1, wherein two of the outer layer wire structures are respectively and symmetrically press-fit onto the first and second joint surfaces of the inner layer wire structure in structure, thereby reducing the degree of board warpage of the printed circuit board.
3. The printed circuit board with symmetrical press-fit structure as claimed in claim 1, wherein, in the two outer layer wire structures, the outer layer wire structure provided at the first bonding surface of the inner layer wire structure has the second drilled hole, and an outer layer dielectric substrate of the outer layer wire structure provided at the second bonding surface of the inner layer wire structure is formed of a high frequency material.
4. The printed circuit board with symmetrical press-fit structure as claimed in claim 1, wherein, of the two outer layer wire structures, the outer layer wire structure provided at the first bonding face of the inner layer wire structure has the second drilled hole, and an outer layer dielectric substrate of the outer layer wire structure having the second drilled hole is formed of a high frequency material.
5. The printed circuit board with symmetrical press-fit structure as claimed in claim 1, wherein the first plated conductive layer is used for electrically connecting the multi-layer circuit of the inner layer circuit structure, and an inner space surrounded by the first plated conductive layer is filled with a resin material.
6. The printed circuit board with symmetrical press-fit structure as claimed in claim 5, wherein said first drilled holes of said inner circuit structure and said first plated conductive layer formed on said inner side wall of said first drilled holes are buried between two of said outer circuit structures, and said second drilled holes are blind hole butt-joint holes butt-jointed with said first drilled holes.
7. The printed circuit board with symmetrical press-fit structure of claim 1, wherein the printed circuit board has plated through holes (Plated through hole) vertically penetrating the inner layer wiring structure and the two outer layer wiring structures; at least one of the two outer layer circuit structures is provided with a laser blind hole.
8. The printed circuit board with symmetrical press-fit structure as claimed in claim 1, wherein the second electroplated conductive layer is used for electrically connecting different layers of wires of the corresponding outer layer wire structure and is further electrically connected to the first electroplated conductive layer; wherein the inner space surrounded by the second electroplated conductive layer is filled with solder resist ink.
9. The printed circuit board with symmetrical press-fit structure as claimed in claim 1, wherein in a projection area projected along a normal vector of the printed circuit board, a first peripheral contour of the first borehole is inside a second peripheral contour of the second borehole.
10. A manufacturing method of a printed circuit board with a symmetrical lamination structure comprises the following steps:
performing a first bonding operation to form a primary bonded inner circuit structure having a first bonding surface and a second bonding surface on opposite sides;
performing a first drilling operation to form a first drilling hole penetrating through the first joint surface and the second joint surface on the inner layer circuit structure, wherein the first drilling hole is provided with a first aperture;
Performing a first electroplating operation to form a first electroplating conductive layer on the inner side wall of the first drilling hole;
performing a second lamination operation to symmetrically laminate the two outer layer circuit structures to the first joint surface and the second joint surface of the inner layer circuit structure through secondary lamination respectively;
Performing a second drilling operation to form a second drilling hole on one of the two outer line structures; wherein the second bore corresponds in position to the first bore and the second bore has a second aperture that is larger than the first aperture; and
And performing a second electroplating operation to form a second electroplating conductive layer on the inner side wall of the second drilling hole, wherein the second electroplating conductive layer is directly connected with the first electroplating conductive layer so as to be electrically connected with each other.
11. The method of manufacturing a printed circuit board of claim 10, further comprising:
Performing a first plugging operation between the first plating operation and the second pressing operation to plug the resin material into an inner space surrounded by the first plated conductive layer on the inner side wall of the first borehole; and
And after the second electroplating operation, performing a second hole plugging operation to fill the inner space surrounded by the second electroplating conductive layer on the inner side wall of the second drilling hole with solder resist ink.
CN202211471343.7A 2022-11-23 2022-11-23 Printed circuit board with symmetrical lamination structure and manufacturing method thereof Pending CN118075974A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202211471343.7A CN118075974A (en) 2022-11-23 2022-11-23 Printed circuit board with symmetrical lamination structure and manufacturing method thereof

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202211471343.7A CN118075974A (en) 2022-11-23 2022-11-23 Printed circuit board with symmetrical lamination structure and manufacturing method thereof

Publications (1)

Publication Number Publication Date
CN118075974A true CN118075974A (en) 2024-05-24

Family

ID=91100893

Family Applications (1)

Application Number Title Priority Date Filing Date
CN202211471343.7A Pending CN118075974A (en) 2022-11-23 2022-11-23 Printed circuit board with symmetrical lamination structure and manufacturing method thereof

Country Status (1)

Country Link
CN (1) CN118075974A (en)

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