CN118053861A

CN118053861A - Radio frequency module and manufacturing method thereof

Info

Publication number: CN118053861A
Application number: CN202410194416.5A
Authority: CN
Inventors: 张磊; 林红宽; 蒋品方; 刘增涛
Original assignee: Vanchip Tianjin Electronic Technology Co Ltd
Current assignee: Vanchip Tianjin Electronic Technology Co Ltd
Priority date: 2024-02-21
Filing date: 2024-02-21
Publication date: 2024-05-17

Abstract

The invention provides a radio frequency module and a manufacturing method thereof, wherein the manufacturing method comprises the following steps: providing a middle plastic package structure, the middle plastic package structure comprising: a first electronic component comprising a filter chip, a non-filter chip or/and a passive component; a first plastic layer covering at least the back surface and the side wall of the first electronic element; retaining walls positioned on two sides of the front surface of the filter chip; the isolation layer covers the retaining wall and forms a cavity with the retaining wall and the front surface of the filter chip, and the isolation layer also covers at least part of the front surface of the non-filter chip or/and the passive element; forming at least one rewiring layer, wherein the rewiring layer is electrically connected with the front surface of the first electronic element; a first pad is formed, the first pad being electrically connected to the redistribution layer. The invention combines the WLP filter manufacture and fan-out encapsulation to realize the radio frequency module, and the filter cavity and the module encapsulation are completed simultaneously, thereby effectively reducing the manufacture complexity of the radio frequency front end module.

Description

Radio frequency module and manufacturing method thereof

Technical Field

The invention relates to the technical field of semiconductors, in particular to a radio frequency module and a manufacturing method thereof.

Background

The radio frequency front end is a core module of the mobile terminal communication system, is an intermediate module positioned between the radio frequency transceiver and the antenna, has the functions of performing signal processing such as power amplification, filtering, switching and the like of radio frequency signals, and is a module necessary for the mobile terminal equipment to realize wireless communication functions such as cellular network connection, wi-Fi, bluetooth, GPS and the like.

The rf front-end functional devices mainly include a Power Amplifier (PA), a Low Noise Amplifier (LNA), a radio frequency Switch (Switch), a Filter (Filter), a Duplexer (duplex), an antenna tuner, and the like. Depending on the application scenario and the requirement of the integration level of the terminal equipment, the devices are generally integrated to form a module to a certain extent according to the requirement of the receiving and transmitting functions and the supported frequency band range. The radio frequency front end module is beneficial to reducing the volume and improving the integration level. With the development of communication technology, the ratio of radio frequency front end module products is in an overall rising trend, and the radio frequency front end module products can gradually replace traditional discrete devices.

The traditional radio frequency front end module is realized by welding or wire bonding a plurality of devices on one side or two sides of a prefabricated substrate and then cutting the prefabricated substrate by plastic package. With the increase of integration level, feature sizes gradually decrease, defects generated in the processes of welding, bonding, plastic packaging and filling become more and more difficult to overcome, and the sizes further encounter bottlenecks.

In addition, the frequency bands supported by the mobile phone radio frequency front end are continuously increased, and the frequency bands are gradually increased from up to 5 to be supported by 50+. This evolution has led to a multiple increase in the number of rf front-end link devices, and in particular to a substantial increase in the number of rf filters. Radio frequency filters often employ acoustic filters that require a cavity to be formed in the device to ensure proper operation of the filter.

A WLP (WAFER LEVEL PACKAGING _, wafer level package) filter with a cavity built in advance is often adopted in the radio frequency front-end module, and the main defects of the filter are as follows: 1. the manufacturing process is complex and the cost is high; 2. the wafer of the filter is thinner, and the wafer is easy to break in the WLP packaging process, so that yield loss is caused; 3. is sensitive to mould pressing in the plastic packaging process, and is easy to generate cavity collapse to cause device failure.

Disclosure of Invention

The invention aims to provide a radio frequency module and a manufacturing method thereof, which combine WLP filter manufacturing with fan-out packaging, and complete filter cavity and module packaging simultaneously, so that the manufacturing complexity of a radio frequency front-end module can be effectively reduced, and the wafer fragment rate of a filter can be reduced.

In order to solve the above technical problems, according to a first aspect of the present invention, a method for manufacturing a radio frequency module is provided, including the following steps:

Providing a middle plastic package structure, the middle plastic package structure comprising: a first electronic component comprising a filter chip, a non-filter chip or/and a passive component; a first plastic layer at least covering the back surface and the side wall of the first electronic element; retaining walls positioned on two sides of the front surface of the filter chip; an isolation layer covering the retaining wall and forming a cavity with the retaining wall and the front surface of the filter chip, wherein the isolation layer also covers at least part of the front surfaces of the non-filter chip or/and the passive element;

forming at least one rewiring layer on the middle plastic packaging structure, wherein the rewiring layer is electrically connected with the front surface of the first electronic element; and

And forming a first bonding pad on the rewiring layer, wherein the first bonding pad is electrically connected with the rewiring layer.

Optionally, the method for providing the intermediate plastic package structure includes:

manufacturing a first electronic element wafer, wherein the first electronic element wafer comprises a filter wafer and a non-filter wafer or/and a passive element, a retaining wall is formed on the filter wafer, and the first electronic element wafer is divided into single first electronic elements;

Providing a temporary bonding structure, and attaching the first electronic element on the temporary bonding structure with the front surface facing downwards;

Forming a first plastic sealing layer on the temporary bonding structure, wherein the first plastic sealing layer covers the back surface and the side wall of the first electronic element, the outer side wall of the retaining wall and part of the temporary bonding structure;

removing the temporary bonding structure to expose the front surface of the first electronic element; and

And forming an isolation layer on the front surface of the first electronic element, wherein the isolation layer, the retaining wall and the front surface of the filter chip form a cavity.

Providing a temporary bonding structure, and forming an isolation layer corresponding to the retaining wall on the temporary bonding structure;

attaching the front surface of the first electronic element to the temporary bonding structure downwards, wherein the isolating layer, the retaining wall and the front surface of the filter chip form a cavity;

forming a first plastic sealing layer on the temporary bonding structure, wherein the first plastic sealing layer covers the back surface and the side wall of the first electronic element, the outer side wall of the retaining wall and part of the temporary bonding structure; and

And removing the temporary bonding structure to expose the front surface of the first electronic element.

Optionally, when the first electronic component includes a filter chip and a non-filter chip, or when the first electronic component includes a filter chip, a non-filter chip and a passive component, and a passive component pad is located on a front surface of the passive component, after the front surface of the first electronic component is attached to the temporary bonding structure downward, before the forming of the first plastic sealing layer, the method further includes: forming a shielding layer, wherein the shielding layer at least covers the back surface, the side wall and part of the temporary bonding structure of the first electronic element;

After removing the temporary bonding structure, the method further comprises: and removing part of the shielding layer to expose part of the first plastic sealing layer.

Optionally, after the first bonding pad is formed, the manufacturing method further includes:

Forming a second electronic element with a second bump and the first bump on the first bonding pad respectively;

Forming a second plastic layer, wherein the second plastic layer covers the second electronic element, the first salient points and part of the rewiring layer; and

And removing part of the second plastic sealing layer until the second electronic element and the first salient point are exposed.

Optionally, the second electronic component includes a non-filter chip or/and a passive component.

Optionally, the first bump is a solder ball; the method further comprises the following steps of:

Removing part of the second plastic sealing layer around the first salient point; and

And reflowing the first bump so that the surface of the first bump is higher than the surface of the second plastic layer.

Optionally, the first bump is a column; the method further comprises the following steps of: and forming a second bonding pad on the upper surface of the first bump.

In order to solve the above technical problem, according to a second aspect of the present invention, there is further provided a radio frequency module, including:

Middle plastic envelope structure, middle plastic envelope structure includes: a first electronic component comprising a filter chip, a non-filter chip or/and a passive component; a first plastic layer at least covering the back surface and the side wall of the first electronic element; retaining walls positioned on two sides of the front surface of the filter chip; an isolation layer covering the retaining wall and forming a cavity with the retaining wall and the front surface of the filter chip, wherein the isolation layer also covers at least part of the front surfaces of the non-filter chip or/and the passive element;

At least one rewiring layer positioned on the middle plastic packaging structure, wherein the rewiring layer is electrically connected with the front surface of the first electronic element; and

And the first bonding pad is positioned on the rerouting layer and is electrically connected with the rerouting layer.

Optionally, when the first electronic element includes a filter chip and a non-filter chip, or when the first electronic element includes a filter chip, a non-filter chip and a passive element, and the passive element pad is located on the front surface of the passive element, the radio frequency module further includes a shielding layer, and the shielding layer at least covers the back surface and the side wall of the first electronic element.

Optionally, the radio frequency module further includes:

a first bump and a second electronic component with a second bump on the first pad; and

And the second plastic sealing layer covers the side walls of the second electronic element and the first salient points.

Optionally, the first bump is a solder ball, and a surface of the first bump is higher than a surface of the second plastic layer.

Optionally, the first bump is a column; a second pad is formed on a top surface of the first bump.

Optionally, an interdigital transducer and a filter chip bonding pad positioned at two sides of the interdigital transducer are formed on the front surface of the filter chip; the interdigital transducer is positioned in the cavity, the retaining wall and the isolation layer are provided with openings so as to at least expose part of the filter chip bonding pad, and the rewiring layer is electrically connected with the filter chip bonding pad.

Optionally, the thickness of the retaining wall is greater than the sum of the thickness of the interdigital transducer and the thickness of the filter chip pad.

Optionally, the cross-sectional area of the opening of the retaining wall at the side close to the filter chip is smaller than or equal to the cross-sectional area at the side far away from the filter chip; the cross-sectional area of the opening of the isolation layer on the side close to the filter chip is smaller than or equal to the cross-sectional area on the side far away from the filter chip.

Optionally, the cross-sectional area of the opening of the isolation layer at the side close to the filter chip is greater than or equal to the cross-sectional area of the opening of the retaining wall at the corresponding position at the side far away from the filter chip.

Optionally, the front surface of the non-filter chip is formed with a non-filter chip pad, and the isolation layer has an opening to expose at least a part of the non-filter chip pad; the front surface of the passive element is provided with a passive element bonding pad, and the isolation layer is provided with an opening to expose at least part of the passive element bonding pad.

Optionally, a cross-sectional area of the opening of the isolation layer on a side close to the non-filter chip is smaller than or equal to a cross-sectional area on a side far from the non-filter chip; the cross-sectional area of the opening of the isolation layer on the side close to the passive element is smaller than or equal to the cross-sectional area on the side far away from the passive element.

In summary, in the radio frequency module and the manufacturing method thereof provided by the present invention, an intermediate plastic package structure is provided, and the intermediate plastic package structure includes: a first electronic component comprising a filter chip, a non-filter chip or/and a passive component; a first plastic layer at least covering the back surface and the side wall of the first electronic element; retaining walls positioned on two sides of the front surface of the filter chip; an isolation layer covering the retaining wall and forming a cavity with the retaining wall and the front surface of the filter chip, wherein the isolation layer also covers at least part of the front surfaces of the non-filter chip or/and the passive element; then forming at least one rewiring layer, wherein the rewiring layer is electrically connected with the front surface of the first electronic element; a first pad is then formed, the first pad being electrically connected with the redistribution layer. The invention combines the WLP filter manufacture and fan-out encapsulation to realize the radio frequency module, and the filter cavity and the module encapsulation are completed simultaneously, thereby effectively reducing the manufacture complexity of the radio frequency front end module; meanwhile, the filter chip completes the whole packaging process by a single chip method, so that the high fragment rate of the filter wafer packaging is greatly reduced; secondly, at least one rewiring layer is adopted to replace a traditional substrate to provide interconnection, so that the thickness is reduced, and meanwhile, the interconnection density is greatly improved; in addition, the cavity of the filter can not be subjected to injection molding pressure in the whole packaging process, and cavity collapse generated in the secondary plastic packaging process is eliminated. Meanwhile, the manufacturing method can realize a radio frequency front end module with smaller three-dimensional size, and can obtain wider application fields.

Drawings

Fig. 1 is a flowchart of a method for manufacturing a radio frequency module according to an embodiment of the invention.

Fig. 2 to 10 are schematic views illustrating steps of a method for manufacturing a radio frequency module according to an embodiment of the invention.

Fig. 11 to 19 are schematic views illustrating the steps of a method for manufacturing a radio frequency module according to a second embodiment of the invention.

Fig. 20 to 23 are schematic views illustrating the structure of each step of the method for manufacturing a radio frequency module according to the third embodiment of the present invention.

Fig. 24 to 26 are schematic views illustrating the steps of a method for manufacturing a radio frequency module according to a fourth embodiment of the invention.

Fig. 27 to 30 are schematic views illustrating the steps of a method for manufacturing a radio frequency module according to a fifth embodiment of the present invention.

Fig. 31 to 34 are schematic views illustrating the steps of a method for manufacturing a radio frequency module according to a sixth embodiment of the invention.

Fig. 35 to 39 are schematic views illustrating the structure of each step of the method for manufacturing a radio frequency module according to the seventh embodiment of the invention.

Fig. 40 to 44 are schematic views illustrating steps of a method for manufacturing a radio frequency module according to an eighth embodiment of the invention.

Fig. 45 is a schematic cross-sectional view of a retaining wall opening according to an embodiment of the present invention.

FIG. 46 is a schematic cross-sectional view of an opening of a spacer layer according to one embodiment of the present invention.

Reference numerals illustrate:

1-a temporary bonding structure; 11-carrier plate; 12-a bonding layer; a 2-filter chip; 21-a filter chip substrate; a 22-interdigital transducer; 23-filter chip pads; 24-side walls; 25-cavity; 3-a non-filter chip; 31-a non-filter chip substrate; 32-non-filter chip pads; 4-a passive element; 41-a passive element body; 42-passive element pads; 51-a first plastic sealing layer; 52-a second plastic sealing layer; 6-isolating layer; 7-a rewiring layer; 71-a metal line layer; 72-a dielectric layer; 8-a first bonding pad; 9-a first bump; 10-a solder mask layer; 13-a shielding layer; 14-a second electronic component; 141-a second electronic component substrate; 142-second bump; 15-second pads.

Detailed Description

The invention will be described in further detail with reference to the drawings and the specific embodiments thereof in order to make the objects, advantages and features of the invention more apparent. It should be noted that the drawings are in a very simplified form and are not drawn to scale, merely for convenience and clarity in aiding in the description of embodiments of the invention. Furthermore, the structures shown in the drawings are often part of actual structures. In particular, the drawings are shown with different emphasis instead being placed upon illustrating the various embodiments.

As used in this disclosure, the singular forms "a," "an," and "the" include plural referents unless the content clearly dictates otherwise. As used in this disclosure, the term "or" is generally employed in its sense including "and/or" unless the content clearly dictates otherwise. As used in this disclosure, the term "plurality" is generally employed in its sense including "at least one" unless the content clearly dictates otherwise. As used in this disclosure, the term "at least two" is generally employed in its sense including "two or more", unless the content clearly dictates otherwise. Furthermore, the terms "first," "second," and "third" are used for descriptive purposes only and are not to be construed as indicating or implying a relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defining "a first", "a second", and "a third" may include one or at least two of the feature, either explicitly or implicitly, unless the context clearly dictates otherwise.

Fig. 1 is a flowchart of a method for manufacturing a radio frequency module according to an embodiment of the invention. As shown in fig. 1, the method for manufacturing the radio frequency module includes the following steps:

S1: providing a middle plastic package structure, the middle plastic package structure comprising: a first electronic component comprising a filter chip, a non-filter chip or/and a passive component; a first plastic layer at least covering the back surface and the side wall of the first electronic element; retaining walls positioned on two sides of the front surface of the filter chip; an isolation layer covering the retaining wall and forming a cavity with the retaining wall and the front surface of the filter chip, wherein the isolation layer also covers at least part of the front surfaces of the non-filter chip or/and the passive element;

s2: forming at least one rewiring layer on the middle plastic packaging structure, wherein the rewiring layer is electrically connected with the front surface of the first electronic element; and

S3: and forming a first bonding pad on the rewiring layer, wherein the first bonding pad is electrically connected with the rewiring layer.

The invention combines the WLP filter manufacture and fan-out encapsulation to realize the radio frequency module, and the filter cavity and the module encapsulation are completed simultaneously, thereby effectively reducing the manufacture complexity of the radio frequency front end module; meanwhile, the filter chip completes the whole packaging process by a single chip method, so that the high fragment rate of the filter wafer packaging is greatly reduced; secondly, at least one rewiring layer is adopted to replace a traditional substrate to provide interconnection, so that the thickness is reduced, and meanwhile, the interconnection density is greatly improved; in addition, the cavity of the filter can not be subjected to injection molding pressure in the whole packaging process, and cavity collapse generated in the secondary plastic packaging process is eliminated. Meanwhile, the manufacturing method can realize a radio frequency front end module with smaller three-dimensional size, and can obtain wider application fields.

The following describes the method for manufacturing the radio frequency module according to the present invention in detail through specific embodiments.

[ Embodiment one ]

Fig. 2 to 10 are schematic views illustrating steps of a method for manufacturing a radio frequency module according to an embodiment of the invention. Next, a method for manufacturing a radio frequency module according to an embodiment of the invention will be described in detail with reference to fig. 1 and fig. 2 to fig. 10.

In step S1, please refer to fig. 8, an intermediate plastic package structure is provided, wherein the intermediate plastic package structure includes: a first electronic component comprising a filter chip 2 and a non-filter chip 3 or/and a passive component 4; and a first plastic sealing layer 51 at least covering the back surface and the side wall of the first electronic component, a retaining wall 24 at two sides of the front surface of the filter chip 2, and an isolation layer 6 covering the retaining wall 24 and forming a cavity 25 with the retaining wall 24 and the front surface of the filter chip 2, wherein the isolation layer 6 also covers at least part of the front surface of the non-filter chip 3 or/and the passive component 4.

The intermediate molding structure may be formed by the following substeps S11 to S16, for example. In this embodiment, the first electronic component includes the filter chip 2, the non-filter chip 3, and the passive component 4.

In step S11, referring to fig. 2 to 4, a first electronic device wafer is manufactured, wherein the first electronic device wafer includes a filter wafer, a non-filter wafer and a passive device, a retaining wall 24 is formed on the filter wafer, and the first electronic device wafer is divided into individual first electronic devices.

In the embodiment, a filter wafer is manufactured, a retaining wall is formed on the filter wafer, and then the filter wafer is thinned and divided into single filter chips; simultaneously manufacturing a non-filter wafer, thinning the non-filter wafer, and then dividing the thinned non-filter wafer into single non-filter chips; and simultaneously manufacturing the passive elements and dividing the passive elements into single passive elements.

Referring to fig. 2, the filter chip 2 includes a filter chip substrate 21, an interdigital transducer 22 formed on the front surface of the filter chip substrate 21, and filter chip pads 23 located on both sides of the interdigital transducer 22. One surface on which the interdigital transducer 22 and the filter chip pad 23 are formed is a front surface of the filter chip 2, and the other surface opposite to the front surface is a back surface of the filter chip 2, and the front surface of the filter chip 2 and the front surface of the filter chip substrate 21 are the same surface.

Illustratively, the material of the filter chip substrate 21 includes, but is not limited to, lithium niobate, lithium tantalate, silicon, or a multi-layer material with layers of piezoelectric material. The interdigital transducer 22 is a single-layer film or a multi-layer film composed of metal materials such as Ti (titanium), al (aluminum), alCu (aluminum copper), etc., and the surface of the interdigital transducer 22 may be covered with a passivation layer of silicon oxide or silicon nitride to protect the interdigital transducer 22. The filter chip pad 23 is made of Ti, al, alCu metal materials or the like to form a single-layer film or a multi-layer film, the surface of the filter chip pad 23 can also be covered with a silicon oxide or silicon nitride passivation layer, and the passivation layer is provided with an opening for exposing part of the filter chip pad 23.

Side walls 24 are formed on two sides of the front surface of the filter chip 2, the side walls 24 are located on two sides of the filter chip substrate 21, and the side walls 24 are provided with openings to expose at least part of the filter chip bonding pads 23. In an embodiment of the present invention, as shown in fig. 45, the cross-sectional area of the opening of the retaining wall 24 on the side close to the filter chip 2 (only the filter chip substrate 21 and the filter chip pad 23 are shown in the figure) is smaller than the cross-sectional area on the side far from the filter chip 2, i.e. in the direction perpendicular to the filter chip substrate 21, and the opening is in a structure with a wide top and a narrow bottom, so as to facilitate the formation of a subsequent re-wiring layer. In another embodiment of the present invention, referring to fig. 2, the cross-sectional area of the opening of the retaining wall 24 on the side close to the filter chip 2 is equal to the cross-sectional area on the side far from the filter chip 2.

In one embodiment of the present invention, the thickness of the retaining wall 24 is greater than the sum of the thickness of the interdigital transducer 22 and the thickness of the filter chip pad 23, so as to ensure the height of the cavity to be formed later.

Illustratively, a layer of retaining wall material is first formed on the front surface of the filter chip 2, the retaining wall material layer covering the interdigital transducer 22, the filter chip pad 23, and the filter chip substrate 21; and then, carrying out patterning treatment on the retaining wall material layer, and reserving the retaining wall material layers on two sides of the filter chip 2 to form retaining walls 24. The material of the retaining wall 24 may be a dry film material or a photoresist having an exposure property, but is not limited thereto.

Referring to fig. 3, the non-filter chip 3 includes a non-filter chip substrate 31, and a non-filter chip pad 32 formed on the front surface of the non-filter chip substrate 31. One surface on which the non-filter chip pad 32 is formed is a front surface of the non-filter chip 3, and the other surface opposite to the front surface is a back surface of the non-filter chip 3, and the front surface of the non-filter chip 3 and the front surface of the non-filter chip substrate 31 are the same surface. The material of the non-filter chip substrate 31 may be selected from Si, SOI (silicon on insulator), gaAs (gallium arsenide), gaN (gallium nitride), glass, or the like according to the device type, and the non-filter chip pad 32 may be a multilayer film composed of Cu/Al/Cu.

Referring to fig. 4, the passive element 4 includes a passive element body 41 and a passive element pad 42 formed on the passive element body 41. In this embodiment, the passive element pad 42 is formed on the front surface of the passive element body 41; in other embodiments, the passive element pads 42 may also be formed on the remaining surface, such as a side surface, of the passive element body 41. The front surface of the passive element 4 is the same as the front surface of the passive element body 41.

The passive elements 4 include, but are not limited to, capacitive, inductive, resistive or LTCC filters. The passive element pad 42 is a multilayer film made of a metal material such as Cu, ni, ag, au, and has no Sn layer on the surface.

In step S12, referring to fig. 5, a temporary bonding structure 1 is provided, and the first electronic component is mounted on the temporary bonding structure 1 with its front side facing downward. In this embodiment, the filter chip 2, the non-filter chip 3 and the passive component 4 are mounted on the temporary bonding structure 1 with their front faces facing downward. In fig. 5, two filter chips 2, one non-filter chip 3 and one passive element 4 are shown, and the number of the filter chips 2, the non-filter chips 3 and the passive elements 4 is not limited in the embodiment.

Illustratively, the temporary bonding structure 1 includes a carrier 11 and a bonding layer 12. The carrier 11 may be a hard carrier, such as a silicon wafer, a glass plate, or a metal panel. When the carrier plate 11 is a hard carrier plate, the supporting effect is better. The bonding layer 12 may be a bond-releasable adhesive layer, and may be attached to the carrier 11 and may adhere to a chip or a device placed above the carrier, and after the plastic packaging is finished, the carrier 11 may be conveniently peeled off. Of course, the bonding layer 12 may also be other material layers known in the art.

In step S13, referring to fig. 6, a first molding layer 51 is formed on the temporary bonding structure 1, and the first molding layer 51 covers the back surface and the side wall of the first electronic component, the outer side wall of the retaining wall 24, and a part of the temporary bonding structure 1. The outer side wall of the retaining wall 24 refers to the side wall of the retaining wall 24 facing the outer side of the filter chip 2, or refers to the side wall of the retaining wall 24 away from the interdigital transducer 22.

The first plastic layer 51 may be formed by a transfer film, a compression film, or a lamination method, for example. The first plastic layer 51 is a thermosetting resin material having an inorganic filler.

In step S14, please refer to fig. 6 and 7, the temporary bonding structure 1 is removed to expose the front surface of the first electronic component. In this embodiment, the interdigital transducer 22 and a portion of the filter chip pad 23 on the front surface of the filter chip 2 are exposed, and the non-filter chip pad 32 on the front surface of the non-filter chip 3 and the passive element pad 42 on the front surface of the passive element 4 are exposed.

In step S15, referring to fig. 8, an isolation layer 6 is formed on the front surface of the first electronic component, and the isolation layer 6, the retaining wall 24 and the front surface of the filter chip 2 form a cavity 25.

In this embodiment, the material of the isolation layer 6 may be a dry film material or a photoresist with exposure characteristics, or may be a thinned glass or silicon material with openings in specific areas. The thickness of the spacer layer 6 is not less than 3 μm, for example, but not limited thereto.

The isolation layer 6 has an opening corresponding to the opening of the retaining wall 24 to expose a portion of the filter chip pad 23. In an embodiment of the present invention, as shown in fig. 46, the cross-sectional area of the opening of the isolation layer 6 at the side close to the filter chip 2 (only the filter chip substrate 21 and the filter chip pad 23 are shown in the figure) is smaller than the cross-sectional area at the side far from the filter chip 2, i.e. the opening of the isolation layer 6 has a structure with a wide top and a narrow bottom, so as to facilitate the formation of a subsequent re-wiring layer. In another embodiment of the present invention, as shown in fig. 8, the cross-sectional area of the opening of the isolation layer 6 on the side close to the filter chip 2 is equal to the cross-sectional area on the side far from the filter chip 2.

In an embodiment of the present invention, the cross-sectional area of the opening of the isolation layer 6 at the side close to the filter chip 2 is greater than or equal to the cross-sectional area of the opening of the retaining wall 24 at the side far from the filter chip 2, so as to completely expose the filter chip bonding pad 23 exposed by the retaining wall 24.

With continued reference to fig. 8, the isolation layer 6 has an opening to expose at least a portion of the non-filter die pad 32. In an embodiment of the present invention, the cross-sectional area of the opening of the isolation layer 6 on the side close to the non-filter chip 3 is smaller than the cross-sectional area on the side far from the non-filter chip 3, i.e. the opening of the isolation layer 6 has a structure with a wide top and a narrow bottom, so as to facilitate the formation of a subsequent re-wiring layer. In another embodiment of the present invention, the cross-sectional area of the opening of the isolation layer 6 on the side close to the non-filter chip 3 may be equal to the cross-sectional area on the side away from the non-filter chip 3.

With continued reference to fig. 8, the isolation layer 6 has an opening to expose at least a portion of the passive element pad 42. In an embodiment of the present invention, the cross-sectional area of the opening of the isolation layer 6 on the side close to the passive element 4 is smaller than the cross-sectional area on the side far from the passive element 4, i.e. the opening of the isolation layer 6 has a structure with a wide top and a narrow bottom, so as to facilitate the formation of a subsequent re-wiring layer. In another embodiment of the invention, the cross-sectional area of the opening of the isolating layer 6 on the side close to the passive element 4 may also be equal to the cross-sectional area on the side remote from the passive element 4.

In step S2, referring to fig. 9, at least one redistribution layer 7 is formed on the intermediate plastic package structure, and the redistribution layer 7 is electrically connected to the front surface of the first electronic component.

The redistribution layer 7 may include a plurality of metal wiring layers 71 and a dielectric layer 72 isolating a plurality of the metal wiring layers 71. The metal line layer 71 covers the opening of the isolation layer 6 and the filter chip pad 23 exposed by the opening of the retaining wall 24 so as to be electrically connected to the filter chip pad 23, and the metal line layer 71 covers the non-filter chip pad 32 and the passive element pad 42 exposed by the opening of the isolation layer 6 so as to be electrically connected to the non-filter chip pad 32 and the passive element pad 42, respectively. The material of the metal circuit layer 71 may be a metal such as copper or aluminum, and a Ti/Cu (titanium/copper) or TiW/Cu (titanium tungsten/copper) seed layer may be provided on the bottom of the metal such as copper or aluminum, and the metal circuit layer 71 may be formed by electroplating and etching. The metal wiring layer 71 includes a matching circuit pattern for securing the electrical performance of the module, in addition to pads for connecting the respective chips for signal extraction and grounding. The dielectric layer 72 may be a dry film material having an exposure property or a photoresist, but is not limited thereto.

In the present embodiment, a plurality of rewiring layers 7 may be formed, the metal wiring layers 71 in the plurality of rewiring layers 7 being electrically connected, only two of the rewiring layers 7 being shown in fig. 9, but not limited thereto. The thickness of the metal line layer 71 may be the same or different for each of the plurality of rewiring layers 7, and the thickness of the dielectric layer 72 may be the same or different for each of the plurality of rewiring layers 7.

In step S3, referring to fig. 10, a first pad 8 is formed on the redistribution layer 7, and the first pad 8 is electrically connected to the redistribution layer 7.

The material of the first pads 8 includes, but is not limited to, copper, and the surface of the first pads 8 may be subjected to an oxidation-preventing treatment to prevent oxidation. The first pads 8 may be formed by electroplating and etching, and the first pads 8 may be in contact with the metal wiring layer 71 in the re-wiring layer 7 to achieve electrical connection.

In an embodiment of the present invention, a first bump 9 may also be formed on the first pad 8. The first bump 9 may be a copper pillar or a solder ball.

In an embodiment of the present invention, in order to prevent a short circuit during subsequent soldering, a solder mask layer 10 may be further formed on the redistribution layer 7, where the solder mask layer 10 is a material that is not wetted with tin, and the solder mask layer 10 has an opening at the first pad 8 or the first bump 9 to expose the first pad 8 or the first bump 9.

Then, cutting can be carried out to form a single module, and packaging is carried out to form the single-sided radio frequency module.

The manufacturing method of the radio frequency module provided by the embodiment combines the manufacture of the WLP filter and the fan-out encapsulation to realize the radio frequency module, and the filter cavity and the module encapsulation are completed simultaneously, so that the manufacturing complexity of the radio frequency front-end module can be effectively reduced; meanwhile, the filter chip completes the whole packaging process by a single chip method, so that the high fragment rate of the filter wafer packaging is greatly reduced; secondly, at least one rewiring layer is adopted to replace a traditional substrate to provide interconnection, so that the thickness is reduced, and meanwhile, the interconnection density is greatly improved; in addition, the cavity of the filter can not be subjected to injection molding pressure in the whole packaging process, and cavity collapse generated in the secondary plastic packaging process is eliminated. Meanwhile, the manufacturing method can realize a radio frequency front end module with smaller three-dimensional size, and can obtain wider application fields.

[ Example two ]

Compared with the implementation one, the embodiment is different in that: when the first electronic component includes the filter chip 2, the non-filter chip 3 and the passive component 4, and the passive component pad 42 is located on the front surface of the passive component 4, or when the first electronic component includes the filter chip 2 and the non-filter chip 3, after the front surface of the first electronic component is mounted on the temporary bonding structure 1 in a downward direction, before the first plastic sealing layer 51 is formed, the method further includes: a shielding layer 13 is formed, the shielding layer 13 covering at least the back side, the side walls and part of the temporary bonding structure 1 of the first electronic component to increase electromagnetic shielding.

In this embodiment, the first electronic component includes the filter chip 2 and the non-filter chip 3 as an example.

Fig. 11 to 19 are schematic views illustrating the steps of a method for manufacturing a radio frequency module according to a second embodiment of the invention. Referring to fig. 11, after the filter chip 2 and the non-filter chip 3 are mounted on the temporary bonding structure 1 with their front faces facing downward, a shielding layer 13 is formed, and the shielding layer 13 covers the back face and the sidewall of the filter chip 2, the outer sidewall of the sidewall 24, the back face and the sidewall of the passive component 4, and a part of the temporary bonding structure 1 (specifically, the bonding layer 12 in this embodiment). The outer side wall of the retaining wall 24 refers to the side wall of the retaining wall 24 facing the outer side of the filter chip 2, or refers to the side wall of the retaining wall 24 away from the interdigital transducer 22.

The shielding layer 13 is a single-layer metal or a multi-layer metal composite layer made of a metal material such as copper, nickel, etc. The shielding layer 13 may be formed by electroplating or sputtering. The thickness of the shielding layer 13 may be 1 μm or more, but is not limited thereto.

Then, referring to fig. 12, a first plastic layer 51 is formed on the temporary bonding structure 1, and the first plastic layer 51 covers the shielding layer 13.

Next, the temporary bonding structure 1 is removed, exposing the front surface of the first electronic component. Fig. 13 is a schematic structural view after removing the temporary bonding structure 1, fig. 14 is a cross-sectional view of fig. 13 at AB, and please refer to fig. 13 and 14, wherein the shielding layer 13 surrounds the back surface and the side wall of the filter chip 2, the outer side wall of the barrier layer 24, the back surface and the side wall of the non-filter chip 3, and covers the first molding layer 51 between the adjacent chips.

In an embodiment of the present invention, after removing the temporary bonding structure 1, a portion of the shielding layer 13 may be further removed to expose a portion of the first molding layer 51. Fig. 15 is a schematic structural view after removing a portion of the shielding layer, and fig. 16 is a cross-sectional view of fig. 15 at AB, please refer to fig. 15 and 16, in which a portion of the shielding layer 13 is removed to expose the first molding layer 51, so as to facilitate improving a bonding force between a subsequently formed re-wiring layer and the intermediate molding structure, thereby increasing the reliability of the module.

Next, referring to fig. 17, an isolation layer 6 is formed on the front surface of the filter chip 2 and the front surface of the non-filter 3, the isolation layer 6, the retaining wall 24 and the front surface of the filter chip 2 form a cavity 25, and the isolation layer 6 covers a portion of the front surface of the non-filter chip 3 and exposes at least a portion of the non-filter chip bonding pad 32, thereby forming an intermediate plastic package structure.

Then, referring to fig. 18, at least one redistribution layer 7 is formed on the intermediate plastic package structure, the metal circuit layer 71 in the redistribution layer 7 is electrically connected to the filter chip pad 23 and the non-filter chip pad 32, and a dielectric layer 72 is used to isolate the metal circuit layer 71. Thereafter, as shown in fig. 19, a first pad 8 is formed on the redistribution layer 7, and the first pad 8 is electrically connected to the redistribution layer 7. After that, a first bump 9 may be formed on the first pad 8, and a solder resist layer 10 exposing the first pad 8 and the first bump 9 may be formed on the rewiring layer 7.

[ Example III ]

Compared with the first embodiment, the present embodiment is different in that: the method for forming the intermediate plastic package structure is different.

Fig. 20 to 23 are schematic views illustrating the structure of each step of the method for manufacturing a radio frequency module according to the third embodiment of the present invention. First, similar to the embodiment, a first electronic device wafer is manufactured, where the first electronic device wafer includes a filter wafer and a non-filter wafer or/and a passive device, a retaining wall is formed on the filter wafer, and the first electronic device wafer is divided into single first electronic devices.

In this embodiment, the first electronic component including the filter chip 2, the non-filter chip 3, and the passive component 4 will be described as an example. Manufacturing a filter wafer, forming a retaining wall on the filter wafer, thinning the filter wafer, and dividing the filter wafer into single filter chips to form a structure shown in fig. 2; simultaneously manufacturing a non-filter wafer, thinning the non-filter wafer, and then dividing the non-filter wafer into single non-filter chips to form a structure shown in fig. 3; the passive elements are simultaneously fabricated and separated into individual passive elements to form the structure shown in fig. 4.

Then, referring to fig. 20, a temporary bonding structure 1 is provided, and an isolation layer 6 corresponding to the retaining wall 24 is formed on the temporary bonding structure 1, which may be performed simultaneously with the previous step. The temporary bonding structure 1 comprises a carrier plate 11 and a bonding layer 12 formed on the carrier plate 11, wherein the isolation layer 6 is formed on the bonding layer 12.

Referring to fig. 21, the first electronic component is mounted on the temporary bonding structure 1 with its front surface facing downward, and the isolation layer 6, the retaining wall 24, and the front surface of the filter chip 2 form a cavity 25. In this embodiment, the filter chip 2, the non-filter chip 3 and the passive component 4 are mounted on the temporary bonding structure 1 with their front faces facing downward. The isolation layer 6, the retaining wall 24 and the filter chip substrate 21 constitute a cavity 25.

Next, referring to fig. 22, a first molding layer 51 is formed on the temporary bonding structure 1, and the first molding layer 51 covers the back surface and the side wall of the first electronic component, the outer side wall of the retaining wall 24, and a portion of the temporary bonding structure 1 (specifically, the bonding layer 12).

Referring to fig. 22 and 23, the temporary bonding structure 1 is removed to expose the front surface of the first electronic component, and finally an intermediate plastic package structure is formed.

In this embodiment, the retaining wall 24 is formed on the filter wafer, and then the filter wafer is divided into the individual filter chips 2, and the isolation layer 6 is formed on the temporary bonding structure 1. Compared with the first embodiment, the retaining wall 24 and the isolation layer 6 can be manufactured simultaneously, thereby saving the process time.

[ Example IV ]

Compared with the three phases of the embodiment, the embodiment is different in that: when the first electronic component includes the filter chip 2, the non-filter chip 3 and the passive component 4, and the passive component pad 42 is located on the front surface of the passive component 4, or when the first electronic component includes the filter chip 2 and the non-filter chip 3, after the front surface of the first electronic component is mounted on the temporary bonding structure 1 in a downward direction, before the first plastic sealing layer 51 is formed, the method further includes: a shielding layer 13 is formed, the shielding layer 13 covering at least the back side, the side walls and part of the temporary bonding structure 1 of the first electronic component to increase electromagnetic shielding.

Fig. 24 to 26 are schematic views illustrating the steps of a method for manufacturing a radio frequency module according to a fourth embodiment of the invention. Referring to fig. 24, after the filter chip 2 and the non-filter chip 3 are mounted on the temporary bonding structure 1 with their front faces facing downward, a shielding layer 13 is formed, and the shielding layer 13 covers the back face and the sidewall of the filter chip 2, the outer sidewall of the sidewall 24, the back face and the sidewall of the passive component 4, and a part of the temporary bonding structure 1 (specifically, the bonding layer 12 in this embodiment). In this embodiment, the shielding layer 13 further covers an outer sidewall of the isolation layer 6, where the outer sidewall of the isolation layer 6 refers to a sidewall of the isolation layer 6 corresponding to the filter chip 2 facing the outside of the filter chip 2, or refers to a sidewall of a side of the isolation layer 6 away from the interdigital transducer 22.

Then, referring to fig. 25, a first plastic layer 51 is formed on the temporary bonding structure 1, and the first plastic layer 51 covers the shielding layer 13.

Next, referring to fig. 25 and 26, the temporary bonding structure 1 is removed to expose the front surface of the first electronic component, that is, the front surface of the filter chip 2 and the front surface of the non-filter bank 3, so as to form the intermediate plastic package structure.

In an embodiment of the present invention, after removing the temporary bonding structure 1, a portion of the shielding layer 13 may be removed to expose a portion of the first plastic sealing layer 51, so as to facilitate improving a bonding force between a subsequently formed redistribution layer and the intermediate plastic sealing structure, thereby increasing a reliability of a module.

[ Example five ]

Compared with the above-described embodiments, the present embodiment is different in that: on the basis of any of the above embodiments, this embodiment may be configured such that, after the first pad 8 is formed, a second electronic component with a second bump and a first bump are formed on the first pad; forming a second plastic sealing layer, wherein the second plastic sealing layer covers the second electronic element, the first salient points and part of the rewiring layer; and then removing part of the second plastic sealing layer until the second electronic component and the first salient point are exposed.

This embodiment will be described based on the structure shown in fig. 9 formed in the first embodiment.

Fig. 27 to 30 are schematic views illustrating the steps of a method for manufacturing a radio frequency module according to a fifth embodiment of the present invention. Referring to fig. 27, a second electronic component 14 with a second bump 142 and a first bump 9 are formed on the first pad 8, respectively. The second electronic component 14 includes a non-filter chip and/or a passive component, and the second electronic component 14 includes a second electronic component substrate 141 and a second bump 142 formed on the front surface of the second electronic component substrate 141. In this embodiment, the second electronic component 14 is a non-filter chip, and the non-filter chip includes a non-filter chip substrate and a second bump formed on a front surface of the non-filter chip. In this embodiment, the first bump 9 is a solder ball, for example, a solder ball.

For example, the first bump 9 and the second bump 142 may be soldered to the first pad 8 by soldering. For example: the first bump 9 is first soldered to the first pad 8, and then the second bump 142 on the second electronic component 14 is soldered to the first pad 8, and of course, the first bump 9 and the second bump 142 are soldered to different first pads 8. Then, high-temperature reflow is performed so that the first bump 9 and the second bump 142 are fixed on the first pad 8.

In an embodiment of the present invention, a filling glue (not shown) is disposed between the front surface of the second electronic component 14 (i.e. the surface close to the second bump 142) and the corresponding redistribution layer 7, and the filling glue surrounds the second bump 142, so as to avoid that the area cannot be filled by the subsequent second plastic layer.

Next, referring to fig. 28, a second molding layer 52 is formed, and the second molding layer 52 covers the second electronic component 14, the first bump 9 and a portion of the redistribution layer 7. The second plastic layer 52 is a thermosetting resin material having an inorganic filler.

Next, referring to fig. 29, a portion of the second molding layer 52 is removed to expose the second electronic component 14 and the first bump 9. In this embodiment, the first bump 9 may be exposed to the surface of the second molding layer 52 by grinding. And, after removing part of the second plastic layer 52, the upper part of the first bump 9 is polished and removed, the first bump 9 is no longer in the shape of a solder ball, and its surface is a plane.

Then, referring to fig. 30, a portion of the second molding layer 52 around the first bump 9 is removed; the first bump 9 is reflowed such that the surface of the first bump 9 is higher than the surface of the second molding layer 52. I.e. the top of the first bump 9 forms a convex arc shape and is higher than the surface of the second molding layer 52 by reflow.

And then cutting to form a single module, and packaging to form the double-sided radio frequency module.

[ Example six ]

Compared with the fifth embodiment, the present embodiment is different in that: subsequent fabrication is performed based on the structure shown in fig. 18 formed in the second embodiment.

Fig. 31 to 34 are schematic views illustrating the steps of a method for manufacturing a radio frequency module according to a sixth embodiment of the invention. Referring to fig. 31, the second electronic component 14 with the second bump 142 and the first bump 9 are formed on the first pad 8, respectively. In this embodiment, the second electronic component 14 is a non-filter chip, and the non-filter chip includes a non-filter chip substrate and a second bump formed on a front surface of the non-filter chip. In this embodiment, the first bump 9 is a solder ball, for example, a solder ball.

Then, referring to fig. 32, a second molding layer 52 is formed, and the second molding layer 52 covers the second electronic component 14, the first bump 9, and a portion of the redistribution layer 7.

Next, referring to fig. 33, a portion of the second molding layer 52 is removed to expose the second electronic component 14 and the first bump 9.

Then, referring to fig. 34, a portion of the second molding layer 52 around the first bump 9 is removed; the first bump 9 is reflowed such that the surface of the first bump 9 is higher than the surface of the second molding layer 52. I.e. the top of the first bump 9 forms a convex arc shape and is higher than the surface of the second molding layer 52 by reflow.

[ Embodiment seven ]

Compared with the fifth embodiment, the present embodiment is different in that: the first bump 9 is a cylinder.

The present embodiment may be the one in which, on the basis of any of the above-described first to fourth embodiments, after the first pads 8 are formed, second electronic components with second bumps and first bumps are formed on the first pads; forming a second plastic sealing layer, wherein the second plastic sealing layer covers the second electronic element, the first salient points and part of the rewiring layer; and then removing part of the second plastic sealing layer until the second electronic component and the first salient point are exposed.

Fig. 35 to 39 are schematic views illustrating the structure of each step of the method for manufacturing a radio frequency module according to the seventh embodiment of the invention. Referring to fig. 35, a first bump 9 is formed on a portion of the first pad 8. In this embodiment, the first bump 9 is a pillar, such as a tin pillar, a copper pillar, or a nickel pillar. Illustratively, tin, copper or nickel pillars may be formed by electroplating, or copper pillars may be formed by soldering.

Referring to fig. 36, a second electronic component 14 with a second bump 142 is formed on another part of the first pads 8. The second electronic component 14 includes a non-filter chip and/or a passive component, and the second electronic component 14 includes a second electronic component substrate 141 and a second bump 142 formed on the front surface of the second electronic component substrate 141. In this embodiment, the second electronic component 14 is a non-filter chip, and the non-filter chip includes a non-filter chip substrate and a second bump formed on a front surface of the non-filter chip.

A second electronic component 14 with a second bump 142 is formed on another part of the first pads 8 by electroplating. When the first bump 9 is formed by electroplating, the first bump 9 and the second bump 142 may be reflow soldered at the same time.

Next, referring to fig. 37, a second molding layer 52 is formed, and the second molding layer 52 covers the second electronic component 14, the first bump 9 and a portion of the redistribution layer 7. The second plastic layer 52 is a thermosetting resin material having an inorganic filler.

Next, referring to fig. 38, a portion of the second molding layer 52 is removed to expose the second electronic component 14 and the first bump 9. In this embodiment, the first bump 9 may be exposed to the surface of the second molding layer 52 by grinding.

Then, as shown in fig. 39, a second pad 15 is formed on the upper surface of the first bump 9, and the second pad 15 is electrically connected to the first bump 9.

[ Example eight ]

Compared with embodiment seven, this embodiment is different in that: subsequent fabrication is performed based on the structure shown in fig. 18 formed in the second embodiment.

Fig. 40 to 44 are schematic views illustrating steps of a method for manufacturing a radio frequency module according to an eighth embodiment of the invention. Referring to fig. 40, a first bump 9 is formed on the first pad 8. In this embodiment, the first bump 9 is a pillar, such as a tin pillar, a copper pillar, or a nickel pillar. Illustratively, tin, copper or nickel pillars may be formed by electroplating, or copper pillars may be formed by soldering.

Referring to fig. 41, a second electronic component 14 with a second bump 142 is formed on another part of the first pads 8. The second electronic component 14 and the first bump 9 are formed on different first pads 8.

Then, referring to fig. 42, a second molding layer 52 is formed, and the second molding layer 52 covers the second electronic component 14, the first bump 9, and a portion of the redistribution layer 7.

Next, referring to fig. 43, a portion of the second molding layer 52 is removed to expose the second electronic component 14 and the first bump 9.

Then, as shown in fig. 44, a second pad 15 is formed on the upper surface of the first bump 9, and the second pad 15 is electrically connected to the first bump 9.

It should be noted that, in the embodiments described in the present specification in a progressive manner, the manufacturing methods described later mainly describe differences from the methods described earlier, and the same and similar features between the embodiments are all referred to each other.

Correspondingly, the invention also provides a radio frequency module which can be manufactured by adopting the manufacturing method of the radio frequency module according to any one of the embodiments.

Referring to fig. 10, a radio frequency module manufactured by the method for manufacturing a radio frequency module according to the first embodiment is described below, where the radio frequency module includes:

Middle plastic envelope structure, middle plastic envelope structure includes: a first electronic component comprising a filter chip 2, a non-filter chip 3 and a passive component 4; a first plastic layer 51 covering at least the back surface and the side walls of the first electronic component; retaining walls 24 located on both sides of the front surface of the filter chip 2; an isolation layer 6 covering the retaining wall 24 and forming a cavity 25 with the retaining wall 24 and the front face of the filter chip 2, the isolation layer 6 also covering at least part of the front faces of the non-filter chip 3 and the passive element 4;

At least one rewiring layer 7 positioned on the middle plastic packaging structure, wherein the rewiring layer 7 is electrically connected with the front surface of the first electronic element; and

A first pad 8 on the rewiring layer 7, the first pad 8 being electrically connected to the rewiring layer 7.

In this embodiment, the front surface of the filter chip 2 is formed with an interdigital transducer 22 and filter chip pads 23 located at two sides of the interdigital transducer 22; the interdigital transducer 22 is located in the cavity 25, the retaining wall 24 and the isolation layer 6 each have an opening to expose at least a part of the filter chip pad 23, and the rewiring layer 7 is electrically connected to the filter chip pad 23.

In one embodiment of the present invention, the thickness of the retaining wall 24 is greater than the sum of the thickness of the interdigital transducer 22 and the thickness of the filter chip pad 23, so as to ensure the height of the cavity 25.

In an embodiment of the present invention, as shown in fig. 45, the cross-sectional area of the opening of the retaining wall 24 on the side close to the filter chip 2 (only the filter chip substrate 21 and the filter chip pad 23 are shown in the figure) is smaller than the cross-sectional area on the side far from the filter chip 2, i.e. the opening is in a structure with a wide upper part and a narrow lower part, so as to facilitate the electrical connection between the redistribution layer 7 and the filter chip pad 23. In another embodiment of the present invention, referring to fig. 10, the cross-sectional area of the opening of the retaining wall 24 on the side close to the filter chip 2 is equal to the cross-sectional area on the side far from the filter chip 2.

In an embodiment of the present invention, as shown in fig. 46, the cross-sectional area of the opening of the isolation layer 6 on the side close to the filter chip 2 (only the filter chip substrate 21 and the filter chip pad 23 are shown in the figure) is smaller than the cross-sectional area on the side far from the filter chip 2, i.e. the opening of the isolation layer 6 has a structure with a wide upper part and a narrow lower part, so as to facilitate the electrical connection between the redistribution layer 7 and the filter chip pad 23. In another embodiment of the present invention, as shown in fig. 10, the cross-sectional area of the opening of the isolation layer 6 on the side close to the filter chip 2 is equal to the cross-sectional area on the side far from the filter chip 2.

The front surface of the non-filter chip 3 is formed with a non-filter chip pad 32, and the isolation layer 6 has an opening to expose at least a part of the non-filter chip pad 32; the front surface of the passive element 4 is formed with a passive element pad 42, and the isolation layer 6 has an opening to expose at least a part of the passive element pad 42.

In an embodiment of the present invention, a cross-sectional area of the opening of the isolation layer 6 on a side close to the non-filter chip 3 is smaller than or equal to a cross-sectional area on a side far from the non-filter chip 3; the cross-sectional area of the opening of the isolating layer 6 on the side close to the passive element 4 is smaller than or equal to the cross-sectional area on the side remote from the passive element 4.

In addition, in an embodiment of the present invention, when the first electronic component includes the filter chip 2 and the non-filter chip 3 (please refer to fig. 19), or when the first electronic component includes the filter chip 2, the non-filter chip 3 and the passive component 4, and the passive component pad 42 is located on the front surface of the passive component 4 (not shown), the rf module further includes a shielding layer 13, and the shielding layer 13 covers at least the back surface and the side wall of the filter chip 2, and the back surface and the side wall of the non-filter chip 3, so as to increase electromagnetic shielding. In this embodiment, a portion of the first molding layer 51 may be further exposed out of the shielding layer 13, so as to ensure the bonding force between the intermediate molding structure and the redistribution layer 7, thereby increasing the reliability of the module.

In addition, referring to fig. 30 or fig. 44, in an embodiment of the present invention, the rf module further includes: a first bump 9 and a second electronic component 14 with a second bump 142 on the first pad 8; and a second plastic layer 52, wherein the second plastic layer 52 covers the second electronic component 14 and the side wall of the first bump 9. Referring to fig. 30, the first bump 9 is a solder ball, and the surface of the first bump 9 is higher than the surface of the second plastic layer 52. Referring to fig. 44, the first bump 9 is in the form of a column, and the second pad 15 is formed on the top surface of the first bump 9.

The above description is only illustrative of the preferred embodiments of the present invention and is not intended to limit the scope of the present invention, and any alterations and modifications made by those skilled in the art based on the above disclosure shall fall within the scope of the appended claims.

Claims

1. The manufacturing method of the radio frequency module is characterized by comprising the following steps of:

2. The method for manufacturing a radio frequency module according to claim 1, wherein the method for providing the intermediate plastic package structure comprises:

3. The method for manufacturing a radio frequency module according to claim 1, wherein the method for providing the intermediate plastic package structure comprises:

4. The method for manufacturing a radio frequency module according to claim 2 or 3, wherein when the first electronic component includes a filter chip and a non-filter chip, or when the first electronic component includes a filter chip, a non-filter chip and a passive component, and a passive component pad is located on a front surface of the passive component, after the front surface of the first electronic component is attached to the temporary bonding structure in a downward direction, before the forming of the first plastic sealing layer, the method further includes: forming a shielding layer, wherein the shielding layer at least covers the back surface, the side wall and part of the temporary bonding structure of the first electronic element;

5. The method of manufacturing a radio frequency module according to claim 1, wherein after forming the first bonding pad, the method further comprises:

6. The method of claim 5, wherein the second electronic component comprises a non-filter chip or/and a passive component.

7. The method of claim 5, wherein the first bump is a solder ball; the method further comprises the following steps of:

8. The method of claim 5, wherein the first bump is a column; the method further comprises the following steps of: and forming a second bonding pad on the upper surface of the first bump.

9. A radio frequency module, comprising:

10. The rf module of claim 9 wherein when the first electronic component includes a filter chip and a non-filter chip or when the first electronic component includes a filter chip, a non-filter chip and a passive component and the passive component pad is located on the front side of the passive component, the rf module further includes a shielding layer, the shielding layer at least covers the back side and the side wall of the first electronic component.

11. The radio frequency module of claim 9, further comprising:

12. The radio frequency module according to claim 11, wherein the second electronic component comprises a non-filter chip or/and a passive component.

13. The radio frequency module according to claim 11, wherein the first bump is a solder ball, and a surface of the first bump is higher than a surface of the second molding layer.

14. The rf module of claim 11 wherein the first bump is cylindrical; a second pad is formed on a top surface of the first bump.

15. The radio frequency module according to claim 9, wherein the front surface of the filter chip is formed with interdigital transducers and filter chip bonding pads positioned at two sides of the interdigital transducers; the interdigital transducer is positioned in the cavity, the retaining wall and the isolation layer are provided with openings so as to at least expose part of the filter chip bonding pad, and the rewiring layer is electrically connected with the filter chip bonding pad.

16. The rf module of claim 15 wherein the thickness of the dam is greater than the sum of the thickness of the interdigital transducer and the thickness of the filter die pad.

17. The rf module of claim 15 wherein the cross-sectional area of the opening of the retaining wall on a side proximate to the filter chip is less than or equal to the cross-sectional area on a side distal to the filter chip; the cross-sectional area of the opening of the isolation layer on the side close to the filter chip is smaller than or equal to the cross-sectional area on the side far away from the filter chip.

18. The rf module of claim 15 wherein the cross-sectional area of the opening of the isolation layer on a side closer to the filter chip is greater than or equal to the cross-sectional area of the opening of the retaining wall at a corresponding location on a side farther from the filter chip.

19. The rf module of claim 9 wherein the front side of the non-filter chip is formed with a non-filter chip pad and the isolation layer has an opening to expose at least a portion of the non-filter chip pad; the front surface of the passive element is provided with a passive element bonding pad, and the isolation layer is provided with an opening to expose at least part of the passive element bonding pad.

20. The rf module of claim 19 wherein the isolation layer has an opening with a cross-sectional area on a side closer to the non-filter chip that is less than or equal to a cross-sectional area on a side farther from the non-filter chip; the cross-sectional area of the opening of the isolation layer on the side close to the passive element is smaller than or equal to the cross-sectional area on the side far away from the passive element.