CN118040467A - Low divergence angle VCSEL laser, manufacturing method thereof and VCSEL array - Google Patents

Low divergence angle VCSEL laser, manufacturing method thereof and VCSEL array Download PDF

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Publication number
CN118040467A
CN118040467A CN202311855159.7A CN202311855159A CN118040467A CN 118040467 A CN118040467 A CN 118040467A CN 202311855159 A CN202311855159 A CN 202311855159A CN 118040467 A CN118040467 A CN 118040467A
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layer
low
vcsel
aluminum
dbr
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赖威廷
李念宜
郭铭浩
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Zhejiang Ruixi Technology Co ltd
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Zhejiang Ruixi Technology Co ltd
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Abstract

A low divergence angle type VCSEL laser, a method of manufacturing the same, and a VCSEL array are disclosed. The low divergence angle VCSEL laser includes: a VCSEL body, a VCSEL anode, and a VCSEL cathode; the VCSEL body includes: a substrate layer, a bottom mirror portion, a top mirror portion, an active region, a main confinement layer, and an electrode contact layer; the bottom mirror portion includes a bottom N-DBR layer, a bottom confinement layer, a bottom tunnel junction, and a bottom P-DBR layer; wherein the bottom N-DBR layer includes at least one low aluminum layer and one high aluminum layer, the high aluminum layer having an aluminum content higher than the low aluminum layer; the active region comprises a quantum well region, at least one low-aluminum layer and one high-aluminum layer, wherein at least one low-aluminum layer in the active region is positioned below the quantum well region and is a P-type low-aluminum layer; the thickness of the low aluminum layer of at least one N type below the quantum well region in the VCSEL body is larger than lambda/4, wherein lambda is the working wavelength of the low divergence angle type VCSEL laser.

Description

Low divergence angle VCSEL laser, manufacturing method thereof and VCSEL array
Technical Field
The present application relates to the field of semiconductor lasers, and more particularly to low divergence angle VCSEL lasers, methods of fabricating the same, and VCSEL arrays.
Background
A VCSEL (Vertical-Cavity Surface-emitting laser) is a semiconductor laser that emits laser light in a direction perpendicular to its substrate. VCSEL has the characteristics of small divergence angle, symmetrical light beams, high wavelength thermal stability, stable light beam quality and the like, and has huge application potential in the fields of communication, consumption and vehicle-mounted. Currently, VCSEL products are widely applied to industries such as close-range optical fiber communication, face recognition, 3D sensing and the like.
In a typical VCSEL structure, the VCSEL includes, from bottom to top, an N-type metal electrode layer, an N-type substrate layer, an N-DBR layer, an active region, a confinement layer, a P-DBR layer, a P-type contact layer, and a P-type metal electrode layer, as shown in fig. 1. The N-type substrate layer and the N-DBR layer are located in an N-type region, and the P-DBR layer is located in a P-type region. In the N-type region, free electrons are multi-electrons, holes are almost zero and few electrons; in the P-type region, holes are multiple electrons and free electrons are fewer. Further, in a typical VCSEL mechanism, the P-type metal electrode layer forms the anode of the VCSEL and the N-type metal electrode layer forms the cathode of the VCSEL.
The light-emitting performance of the VCSEL will affect its application effect, for example, when the laser light source as a lidar is applied in three-dimensional imaging, the divergence angle of the outgoing light beam (i.e., the divergence angle of the VCSEL) will affect the imaging resolution of the lidar. Specifically, in three-dimensional imaging, the divergence angle of the VCSEL is inversely related to the imaging resolution, i.e., the smaller the divergence angle of the VCSEL, the higher the imaging resolution. For another example, VCSELs are used as laser light sources for laser radars, and the divergence angle thereof affects the detection distance and the detection accuracy, and the smaller the divergence angle of the VCSELs, the farther the irradiation distance, the wider the detection range and the higher the detection accuracy.
In the study of the influence factor of the divergence angle of the VCSEL, it was found that the transverse mode of the beam emitted from the VCSEL affects the divergence angle of the VCSEL. The transverse mode may reflect the energy distribution mode of the spot projected by the VCSEL over a cross section perpendicular to the cavity axis of the VCSEL's resonant cavity, the transverse mode being divided into a fundamental film and a higher order mode. The energy distribution of the higher-order transverse mode is complex, and the divergence angle of the corresponding light beam is large.
Accordingly, the divergence angle of the VCSEL can be reduced by effectively selecting, controlling, or suppressing the transverse mode technique. In the prior art, the high-order transverse mode of the VCSEL is restrained by a bas-surface relief method, a proton implantation technology, a photonic crystal technology and the like, so that the divergence angle of the VCSEL is reduced. However, various approaches proposed in the prior art to reduce the divergence angle of VCSELs have a number of problems.
Specifically, the dielectric layer arranged on the exposed surface of the P-DBR layer or the N-DBR layer is etched by using a shallow relief method to form an inversion layer, so that the end surface loss of the high-order mode can be increased, the threshold value of the high-order mode is further increased, and the suppression of the high-order transverse mode is realized. However, the bas-relief method requires a special design of the epitaxial structure and precise control of the depth of view. Proton implantation technology is used for injecting protons into the P-DBR layer or the N-DBR layer, no obvious refractive index guiding structure is formed, the mode characteristic and the beam characteristic of the proton implantation VCSEL are seriously dependent on a thermal lens effect, carrier reverse guiding and a space hole burning effect, instability exists, and the dependence of the beam quality on current is great. The photonic crystal structure is etched in the P-DBR layer or the N-DBR layer by the photonic crystal technology, so that the transverse mode of the resonant cavity can be changed, and the high-order transverse mode is restrained, however, the photonic crystal technology introduces larger optical loss and resistance, the preparation process is complex, the transverse etching size and the deep etching size need to be accurately controlled, and the requirement on equipment is higher.
Furthermore, in typical VCSEL applications, multiple VCSELs form a VCSEL array, and typically, the multiple VCSELs share an N-type substrate and an N-type metal electrode layer, i.e., the multiple VCSELs share a cathode. However, in some application scenarios of VCSELs, it is desirable to share an anode in a VCSEL array formed of multiple VCSELs, and to share a substrate layer.
In theory, the N-type substrate layer may be replaced with a P-type substrate layer, the positions of the N-DBR layer and the P-DBR layer may be exchanged, the positions of the N-type metal electrode layer and the P-type metal electrode layer may be exchanged, and the P-type contact layer may be adjusted to be an N-type contact layer. That is, the structure of the VCSEL is adjusted to include a P-type metal electrode layer, a P-type substrate layer, a P-DBR layer, an active region, a confinement layer, an N-DBR layer, an N-type contact layer, and an N-type metal electrode layer from bottom to top.
However, the defect density of the P-type substrate layer is higher, the resistivity is higher, and the yield is lower.
Therefore, a new VCSEL structure design is required.
Disclosure of Invention
An advantage of the present application is to provide a low divergence angle type VCSEL laser capable of suppressing a high order transverse mode and reducing a divergence angle of the VCSEL laser, a method of manufacturing the same, and a VCSEL array.
Another advantage of the present application is to provide a low divergence angle type VCSEL laser in which a plurality of low aluminum layers are provided, which can lengthen a resonant cavity by increasing the thickness of the low aluminum layers at a specific position, strengthen diffraction loss and absorption loss, and thus suppress a high-order transverse mode, thereby not only reducing the divergence angle of the VCSEL laser, but also being easily implemented, and a method of manufacturing the same, and a VCSEL array.
Still another advantage of the present application is to provide a low divergence angle type VCSEL laser, a method of manufacturing the same, and a VCSEL array, in which the low divergence angle type VCSEL laser forms a DBR layer using a well-established epitaxial growth process, and the thickness of the DBR layer can be controlled more precisely, improving structural stability and reliability of the low divergence angle type VCSEL laser.
It is yet another advantage of the present application to provide a low divergence angle type VCSEL laser, a method of manufacturing the same, and a VCSEL array, wherein the structure of the low divergence angle type VCSEL laser is adapted for a common anode type VCSEL array and the substrate layer is kept as an N type substrate layer.
Still another advantage of the present application is to provide a low divergence angle type VCSEL laser, which is mainly adapted to the arrangement order, number, thickness of specific structural layers as compared to conventional VCSEL lasers, and thus, the fabrication process and equipment of conventional VCSELs can be used in the fabrication process of the low divergence angle type VCSEL laser, and a fabrication method and a VCSEL array thereof. Therefore, the original VCSEL production line and production equipment can be reserved for preparing the low-divergence-angle VCSEL laser, the production line modification cost of the low-divergence-angle VCSEL laser is effectively reduced, and the preparation cost of the low-divergence-angle VCSEL laser is further reduced.
To achieve at least one of the above or other advantages and objects, according to one aspect of the present application, there is provided a low divergence angle VCSEL laser including:
a VCSEL body, the VCSEL body comprising:
A substrate layer;
A bottom mirror portion formed on the substrate layer, the bottom mirror portion including a bottom N-DBR layer, a bottom confinement layer, a bottom tunnel junction, a bottom P-DBR layer; wherein the bottom N-DBR layer is formed on the substrate layer, the bottom confinement layer, the bottom tunnel junction, and the bottom P-DBR layer being stacked on the bottom N-DBR layer; the bottom N-DBR layer includes at least one low aluminum layer and one high aluminum layer, the high aluminum layer having an aluminum content higher than the low aluminum layer;
a top mirror portion comprising at least one top DBR layer;
An active region between the bottom mirror portion and the top mirror portion, the active region comprising a quantum well region, the active region further comprising at least one of the low aluminum layers and one of the high aluminum layers, at least one of the low aluminum layers in the active region being located below the quantum well region and being a P-type low aluminum layer;
a primary confinement layer between the bottom mirror portion and the top mirror portion; and
An electrode contact layer formed on the top mirror portion;
A VCSEL anode comprising a first N-type metal layer formed on the substrate layer;
A VCSEL cathode comprising a cathode metal layer formed on the electrode contact layer;
The thickness of the low-aluminum layer of at least one P type below the quantum well region in the VCSEL main body is larger than lambda/4, wherein lambda is the working wavelength of the low-divergence angle type VCSEL laser.
In an embodiment of the low divergence angle VCSEL laser according to the present application, at least one of the bottom N-DBR layers has a thickness of the layer low aluminum layer greater than λ/4, where λ is an operating wavelength of the low divergence angle VCSEL laser, and the low aluminum layer having a thickness greater than λ/4 forms a bottom N-DBR layer elongated low aluminum layer.
In an embodiment of the low divergence angle type VCSEL laser according to the present application, the plurality of the low aluminum layers in the bottom N-DBR layer are the bottom N-DBR layer elongated low aluminum layers, and thicknesses of all the bottom N-DBR layer elongated low aluminum layers in the bottom N-DBR layer are equal.
In an embodiment of the low divergence angle VCSEL laser according to the present application, a plurality of the low aluminum layers of the bottom N-DBR layer are the bottom N-DBR layer elongated low aluminum layers, and thicknesses of the plurality of the bottom N-DBR layer elongated low aluminum layers of the bottom N-DBR layer are tapered in a direction away from the quantum well region.
In one embodiment of the low divergence angle VCSEL laser according to the present application, the bottom N-DBR layer elongated low aluminum layer has a thickness nλ/4, where N is an odd number greater than 1.
In an embodiment of the low divergence angle VCSEL laser according to the present application, the thickness of the at least one P-type low aluminum layer below the quantum well region in the active region is greater than λ/4, where λ is the low aluminum layer with an operating wavelength thickness of the low divergence angle VCSEL laser greater than λ/4, and the P-type low aluminum layer below the quantum well region in the active region with a thickness greater than λ/4 forms an extended low aluminum layer below the active region.
In an embodiment of the low divergence angle VCSEL laser according to the present application, the plurality of low aluminum layers in the active region below the quantum well region are elongated low aluminum layers under the active region, and the thicknesses of all the elongated low aluminum layers under the active region below the quantum well region in the active region are equal.
In an embodiment of the low divergence angle VCSEL laser according to the present application, the plurality of low aluminum layers in the active region below the quantum well region are elongated low aluminum layers under the active region, and the thicknesses of the plurality of elongated low aluminum layers in the active region below the quantum well region are tapered in a direction away from the quantum well region.
In one embodiment of the low divergence angle VCSEL laser according to the present application, the thickness of the elongated low aluminum layer under the active region is nλ/4, where n is an odd number greater than 1.
In one embodiment of the low divergence angle VCSEL laser according to the present application, the low aluminum layer has an aluminum content of less than 0.4 and the high aluminum layer has an aluminum content of greater than 0.4.
In one embodiment of the low divergence angle VCSEL laser according to the present application, the top DBR layer is a top N-DBR layer.
In an embodiment of the low divergence angle VCSEL laser according to the present application, the electrode contact layer of the VCSEL cathode is an N-type electrode contact layer and the cathode metal layer is a second N-type metal layer.
According to another aspect of the present application, there is provided a VCSEL array comprising: two or more low divergence angle VCSEL lasers, the low divergence angle VCSEL lasers comprising:
a VCSEL body, the VCSEL body comprising:
A substrate layer;
A bottom mirror portion formed on the substrate layer, the bottom mirror portion including a bottom N-DBR layer, a bottom confinement layer, a bottom tunnel junction, a bottom P-DBR layer; wherein the bottom N-DBR layer is formed on the substrate layer, the bottom confinement layer, the bottom tunnel junction, and the bottom P-DBR layer being stacked on the bottom N-DBR layer; the bottom N-DBR layer includes at least one low aluminum layer and one high aluminum layer, the high aluminum layer having an aluminum content higher than the low aluminum layer;
a top mirror portion comprising at least one top DBR layer;
An active region between the bottom mirror portion and the top mirror portion, the active region comprising a quantum well region, the active region further comprising at least one of the low aluminum layers and one of the high aluminum layers, at least one of the low aluminum layers in the active region being located below the quantum well region and being a P-type low aluminum layer;
a primary confinement layer between the bottom mirror portion and the top mirror portion; and
An electrode contact layer formed on the top mirror portion;
A VCSEL anode comprising a first N-type metal layer formed on the substrate layer;
A VCSEL cathode comprising a cathode metal layer formed on the electrode contact layer;
the thickness of the low-aluminum layer of at least one P type positioned below the quantum well region in the VCSEL main body is larger than lambda/4, wherein lambda is the working wavelength of the low-divergence angle type VCSEL laser;
The VCSEL anode of two or more of the low divergence angle VCSEL lasers is common.
According to still another aspect of the present application, there is provided a method of manufacturing a low divergence angle VCSEL laser, comprising:
Forming a VCSEL body, the VCSEL body comprising: a substrate layer, a bottom mirror portion, an active region, a main confinement layer, a top mirror portion, and an electrode contact layer; wherein the bottom mirror portion is formed on the substrate layer, the bottom mirror portion comprising a bottom N-DBR layer, a bottom confinement layer, a bottom tunnel junction, and a bottom P-DBR layer; the bottom N-DBR layer is formed on the substrate layer, and comprises at least one low aluminum layer and one high aluminum layer, wherein the aluminum content of the high aluminum layer is higher than that of the low aluminum layer; the bottom confinement layer, the bottom tunnel junction, and the bottom P-DBR layer stack are disposed on the bottom N-DBR layer; the top mirror portion includes at least one top DBR layer; the active region is positioned between the bottom mirror part and the top mirror part, the active region comprises a quantum well region, the active region further comprises at least one low-aluminum layer and one high-aluminum layer, and at least one low-aluminum layer in the active region is positioned below the quantum well region and is a P-type low-aluminum layer; the primary confinement layer is located between the bottom mirror portion and the top mirror portion; the electrode contact layer is formed on the top mirror portion; the thickness of at least one low-aluminum layer below the quantum well region in the VCSEL main body is larger than lambda/4, wherein lambda is the working wavelength of the low-divergence angle VCSEL laser;
Forming a VCSEL cathode, wherein the VCSEL cathode comprises a cathode metal layer, and the cathode metal layer is formed on the electrode contact layer; and
A VCSEL anode is formed, the VCSEL anode comprising a first N-type metal layer formed on the substrate layer.
Further objects and advantages of the present application will become fully apparent from the following description and the accompanying drawings.
These and other objects, features and advantages of the present application will become more fully apparent from the following detailed description, the accompanying drawings and the appended claims.
Drawings
These and/or other aspects and advantages of the present application will become more apparent and more readily appreciated from the following detailed description of the embodiments of the application, taken in conjunction with the accompanying drawings, wherein:
Fig. 1 illustrates a schematic diagram of a typical VCSEL structure.
Fig. 2 illustrates a schematic layout of structural layers of an implementation of a low divergence angle VCSEL laser in accordance with an embodiment of the present application.
Figure 3 illustrates a schematic cross-sectional view of one implementation of a low divergence angle VCSEL laser in accordance with an embodiment of the present application.
Fig. 4 illustrates a schematic cross-sectional view of another implementation of a low divergence angle VCSEL laser in accordance with an embodiment of the present application.
Fig. 5 illustrates a schematic cross-sectional view of yet another implementation of a low divergence angle VCSEL laser in accordance with an embodiment of the present application.
Fig. 6 illustrates a schematic cross-sectional view of yet another implementation of a low divergence angle VCSEL laser in accordance with an embodiment of the present application.
Fig. 7 illustrates a schematic cross-sectional view of yet another implementation of a low divergence angle VCSEL laser in accordance with an embodiment of the present application.
Fig. 8 illustrates a schematic cross-sectional view of yet another implementation of a low divergence angle VCSEL laser in accordance with an embodiment of the present application.
Fig. 9 illustrates a schematic cross-sectional view of yet another implementation of a low divergence angle VCSEL laser in accordance with an embodiment of the present application.
Fig. 10 illustrates a schematic cross-sectional view of yet another implementation of a low divergence angle VCSEL laser in accordance with an embodiment of the present application.
Fig. 11 illustrates a schematic cross-sectional view of yet another implementation of a low divergence angle VCSEL laser in accordance with an embodiment of the present application.
Figure 12 illustrates a schematic diagram of a VCSEL array according to an embodiment of the present application.
Figure 13 illustrates a partial schematic diagram of a VCSEL array according to an embodiment of the present application.
Fig. 14 illustrates a flow diagram of a process for manufacturing a low divergence angle VCSEL laser in accordance with an embodiment of the present application.
Fig. 15 illustrates one of the schematic diagrams of the fabrication process of the VCSEL integrated wafer according to an embodiment of the present application.
Figure 16 illustrates a second schematic diagram of a fabrication process of a VCSEL integrated wafer in accordance with an embodiment of the present application.
Detailed Description
The terms and words used in the following description and claims are not limited to literal meanings, but are used only by the inventors to enable a clear and consistent understanding of the application. It will be apparent to those skilled in the art, therefore, that the following description of the various embodiments of the application is provided for illustration only and not for the purpose of limiting the application as defined by the appended claims and their equivalents.
It will be understood that the terms "a" and "an" should be interpreted as referring to "at least one" or "one or more," i.e., in one embodiment, the number of elements may be one, while in another embodiment, the number of elements may be plural, and the term "a" should not be interpreted as limiting the number.
Although ordinal numbers such as "first," "second," etc., will be used to describe various components, those components are not limited herein. The term is used merely to distinguish one component from another. For example, a first component may be referred to as a second component, and likewise, a second component may be referred to as a first component, without departing from the teachings of the present inventive concept. The term "and/or" as used herein includes any and all combinations of one or more of the associated listed items.
The terminology used herein is for the purpose of describing various embodiments only and is not intended to be limiting. As used herein, the singular is intended to include the plural as well, unless the context clearly indicates otherwise. It will be further understood that the terms "comprises" and/or "comprising," when used in this specification, specify the presence of stated features, integers, steps, operations, elements, or groups thereof, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, or groups thereof.
Summary of the application: as described above, in the related art, the high-order transverse mode of the VCSEL is suppressed by the bas-surface relief method, the proton implantation technique, the photonic crystal technique, or the like, and the divergence angle of the VCSEL is further reduced. However, various approaches proposed in the prior art to reduce the divergence angle of VCSELs have a number of problems.
Specifically, the dielectric layer arranged on the exposed surface of the P-DBR layer or the N-DBR layer is etched by using a shallow relief method to form an inversion layer, so that the end surface loss of the high-order mode can be increased, the threshold value of the high-order mode is further increased, and the suppression of the high-order transverse mode is realized. However, the bas-relief method requires a special design of the epitaxial structure and precise control of the depth of view. Proton implantation technology is used for injecting protons into the P-DBR layer or the N-DBR layer, no obvious refractive index guiding structure is formed, the mode characteristic and the beam characteristic of the proton implantation VCSEL are seriously dependent on a thermal lens effect, carrier reverse guiding and a space hole burning effect, instability exists, and the dependence of the beam quality on current is great. The photonic crystal structure is etched in the P-DBR layer or the N-DBR layer by the photonic crystal technology, so that the transverse mode of the resonant cavity can be changed, and the high-order transverse mode is restrained, however, the photonic crystal technology introduces larger optical loss and resistance, the preparation process is complex, the transverse etching size and the deep etching size need to be accurately controlled, and the requirement on equipment is higher.
In this regard, the present application proposes that diffraction loss and absorption loss can be enhanced by extending the resonant cavity, thereby suppressing the higher-order transverse mode and reducing the divergence angle of the VCSEL. Specifically, the resonant cavity is elongated by increasing the thickness of the low aluminum layer under the quantum well of the active region.
Furthermore, as previously described, in typical VCSEL applications, multiple VCSELs form a VCSEL array, and typically, the multiple VCSELs share an N-type substrate and an N-type metal electrode layer, i.e., the multiple VCSELs share a cathode. However, in some application scenarios of VCSELs, it is desirable to share an anode in a VCSEL array formed of multiple VCSELs, and to share a substrate layer.
In theory, the N-type substrate layer may be replaced with a P-type substrate layer, the positions of the N-DBR layer and the P-DBR layer may be exchanged, the positions of the N-type metal electrode layer and the P-type metal electrode layer may be exchanged, and the P-type contact layer may be adjusted to be an N-type contact layer. That is, the structure of the VCSEL is adjusted to include a P-type metal electrode layer, a P-type substrate layer, a P-DBR layer, an active region, a confinement layer, an N-DBR layer, an N-type contact layer, and an N-type metal electrode layer from bottom to top.
However, the defect density of the P-type substrate layer is higher, the resistivity is higher, and the yield is lower.
In this regard, the present application proposes that the DBR layer formed on the upper surface of the N-type substrate layer also maintains the N-DBR layer on the premise that the N-type substrate layer is maintained, and the metal electrode layer stacked on the N-type substrate layer is also an N-type metal electrode layer. However, as previously described, in the N-type region, free electrons are multi-electrons, holes are almost zero, and are minority electrons. If an attempt is made to use an N-type metal electrode layer stacked on the N-type substrate layer as an anode, a tunnel junction may be provided in the original N-type region to reverse the carrier type in the N-type region.
Accordingly, according to one aspect of the present application, there is provided a low divergence angle VCSEL laser comprising: a VCSEL body, a VCSEL anode, and a VCSEL cathode; the VCSEL body includes: a substrate layer, a bottom mirror portion, a top mirror portion, an active region, a main confinement layer, and an electrode contact layer; the bottom mirror portion is formed on the substrate layer, and comprises a bottom N-DBR layer, a bottom confinement layer, a bottom tunnel junction, and a bottom P-DBR layer; wherein the bottom N-DBR layer is formed on the substrate layer, the bottom confinement layer, the bottom tunnel junction, and the bottom P-DBR layer being stacked on the bottom N-DBR layer; the bottom N-DBR layer includes at least one low aluminum layer and one high aluminum layer, the high aluminum layer having an aluminum content higher than the low aluminum layer; the top mirror portion includes at least one top DBR layer; the active region is positioned between the bottom mirror part and the top mirror part, the active region comprises a quantum well region, the active region further comprises at least one low-aluminum layer and one high-aluminum layer, and at least one low-aluminum layer in the active region is positioned below the quantum well region and is a P-type low-aluminum layer; the primary confinement layer is located between the bottom mirror portion and the top mirror portion; the electrode contact layer is formed on the top mirror portion; the VCSEL anode comprises a first N-type metal layer, wherein the first N-type metal layer is formed on the substrate layer; the VCSEL cathode comprises a cathode metal layer, wherein the cathode metal layer is formed on the electrode contact layer; the thickness of the low-aluminum layer of at least one P type below the quantum well region in the VCSEL main body is larger than lambda/4, wherein lambda is the working wavelength of the low-divergence angle type VCSEL laser.
Having described the basic principles of the present application, various non-limiting embodiments of the present application will now be described in detail with reference to the accompanying drawings.
Illustrative low divergence VCSEL lasers: as shown in fig. 2 to 11, a low divergence angle type VCSEL laser 1 according to an embodiment of the present application is illustrated, wherein the low divergence angle type VCSEL laser 1 includes a VCSEL body 10, a VCSEL anode 20, and a VCSEL cathode 30 as shown in fig. 2 and 3. The VCSEL body 10 includes a plurality of structural layers stacked one above the other.
As previously mentioned, in some applications of VCSELs, it is desirable to share an anode in a VCSEL array formed of multiple VCSELs, and to share a substrate layer. The application provides that on the premise of keeping the substrate layer to be an N-type substrate layer, the DBR layer formed on the upper surface of the N-type substrate layer also keeps an N-DBR layer, and the metal electrode layer overlapped on the N-type substrate layer is also an N-type metal electrode layer. However, as previously described, in the N-type region, free electrons are multi-electrons, holes are almost zero, and are minority electrons. If an attempt is made to use an N-type metal electrode layer stacked on the N-type substrate layer as an anode, a tunnel junction may be provided in the original N-type region to reverse the carrier type in the N-type region.
Accordingly, in an embodiment of the present application, the VCSEL body 10 includes: a substrate layer 11, a bottom mirror portion 12, an active region 13, a main confinement layer 14, a top mirror portion 15 and an electrode contact layer 16. The bottom mirror portion 12 is formed on the substrate layer 11. The active region 13 is located between the bottom mirror portion 12 and the top mirror portion 15. The primary confinement layer 14 is located between the bottom mirror portion 12 and the top mirror portion 15. The electrode contact layer 16 is formed on the top mirror portion 15. The VCSEL anode 20 is stacked on the substrate layer 11, and the VCSEL cathode 30 is formed on the electrode contact layer 16. In practice, the VCSEL anode 20 is connected to a positive power supply and the VCSEL cathode 30 is connected to a negative power supply.
In some embodiments of the present application, the substrate layer 11 is an N-type substrate layer 11, and the material of the N-type substrate layer 11 may be InP, gaN, gaAs or other doped materials.
The bottom mirror portion 12 includes a bottom N-DBR layer 121, a bottom confinement layer 122, a bottom tunnel junction 123, and a bottom P-DBR layer 124, the bottom N-DBR layer 121 being formed on the N-type substrate layer 11, the bottom confinement layer 122, the bottom tunnel junction 123, and the bottom P-DBR layer 124 being stacked on the bottom N-DBR layer 121.
The N-DBR layer is formed of alternating layers of N-doped high aluminum content Al xGa1-x As (x= 1~0) and N-doped low aluminum content Al xGa1-x As (x= 1~0). The P-DBR layer is formed of alternating layers of P-doped high aluminum content Al xGa1-x As (x= 1~0) and P-doped low aluminum content Al xGa1-x As (x= 1~0). The bottom N-DBR layer 121 refers to the N-DBR layer in the bottom mirror portion 12. The bottom P-DBR layer 124 is referred to as the P-DBR layer in the bottom mirror portion 12.
Accordingly, the bottom N-DBR layer 121 includes at least one N-type high aluminum layer 110 and at least one N-type low aluminum layer 120, wherein the high aluminum layer 110 has an aluminum content higher than that of the low aluminum layer 120. In some embodiments of the present application, the aluminum content of the low aluminum layer 120 is less than 0.4, and the aluminum content of the high aluminum layer 110 is greater than 0.4. It should be understood that in other embodiments of the present application, the aluminum content of the low aluminum layer 120 and the aluminum content of the high aluminum layer 110 may have other values, and the aluminum content of the high aluminum layer 110 may be greater than the aluminum content of the low aluminum layer 120.
In one embodiment of the present application, the bottom confinement layer 122 and the bottom tunnel junction 123 are located above the bottom N-DBR layer 121. The bottom confinement layer 122 is located between the bottom tunnel junction 123 and the bottom N-DBR layer 121. That is, the bottom confinement layer 122 is located above the bottom N-DBR layer 121, and the bottom tunnel junction 123 is located above the bottom confinement layer 122. The bottom P-DBR layer 124 is located above the tunnel junction 123.
In other embodiments of the present application, the bottom confinement layer 122 and the bottom tunnel junction 123 may be disposed at other locations. For example, the bottom confinement layer 122 and the bottom tunnel junction 123 are located above the bottom N-DBR layer 121, and the bottom tunnel junction 123 is located between the bottom confinement layer 122 and the bottom N-DBR layer 121. That is, the bottom tunnel junction 123 is located above the bottom N-DBR layer 121, and the bottom confinement layer 122 is located above the bottom tunnel junction 123.
The bottom tunnel junction 123 is used to reverse the carrier type of the bottom mirror portion 12. For example, the bottom tunnel junction 123 may convert carriers from the bottom N-DBR layer 121 to the bottom P-DBR layer 124. The tunnel junction is formed by combining at least one P-type semiconductor layer 140 and at least one N-type semiconductor layer 130, the tunnel junction may be Al xGa1-x As (x= 1~0), and the P-type semiconductor layer 140 and the N-type semiconductor layer 130 of the tunnel junction are both high-doped (> 1e 18 cm-3).
The top mirror portion 15 includes at least one top DBR layer 151. In one embodiment of the present application, the top DBR layer 151 may be a top N-DBR layer. The top N-DBR layer refers to the N-DBR layer in the top mirror portion 15. In another embodiment of the present application, the top DBR layer 151 may also be a top P-DBR layer. The top P-DBR layer is referred to as the P-DBR layer in the top mirror portion 15. When the top mirror is a top P-DBR layer, the top mirror portion 15 can further provide a top tunnel junction. The top tunnel junction of the top mirror portion 15 may be disposed below the top P-DBR layer.
The active region 13 is sandwiched between the bottom mirror portion 12 and the top mirror portion 15 to form a resonant cavity in which photons are repeatedly amplified back and forth after being excited to form laser oscillations, thereby forming a laser. It will be appreciated by those of ordinary skill in the art that the direction of the laser light exiting, for example, from the bottom mirror portion 12 or from the top mirror portion 15 can be selectively controlled by the configuration and design of the bottom mirror portion 12 and the top mirror portion 15. Accordingly, the bottom mirror portion 12 and the top mirror portion 15 are configured such that, after the low divergence angle VCSEL laser 1 is turned on, the laser light generated by the active region 13 is reflected multiple times in a resonant cavity formed between the bottom mirror portion 12 and the top mirror portion 15 and then exits from the top mirror portion 15 or the bottom mirror portion 12.
In the embodiment of the present application, the active region 13 includes at least one PN junction. Specifically, the PN junction includes at least one P-type semiconductor layer 140 and at least one N-type semiconductor layer 130. A quantum well region 150 is formed between the P-type semiconductor layer 140 and the N-type semiconductor layer 130 of the active region 13. The P-type semiconductor layer 140 of the active region 13 is formed of alternating layers of P-doped high aluminum content AlxGa1-xAs (x= 1~0) and P-doped low aluminum content AlxGa1-xAs (x= 1~0). The N-type semiconductor layer 130 of the active region 13 is formed of alternating layers of N-doped high aluminum content AlxGa1-xAs (x= 1~0) and N-doped low aluminum content AlxGa1-xAs (x= 1~0).
In some embodiments, the N-type semiconductor layer 130 of the active region 13 is located above the quantum well region 150. Accordingly, the active region 13 includes at least one low-aluminum layer 120 and one high-aluminum layer 110, and at least one low-aluminum layer 120 in the active region 13 is located below the quantum well region 150 and is a P-type low-aluminum layer 120.
The bottom restraint layer 122 has a central region at the center thereof and a peripheral region surrounding the central region, wherein the central region of the bottom restraint layer 122 forms a bottom restraint aperture 101 and the peripheral region forms a bottom restraint region. The primary confinement layer 14 has a central region at the center thereof and a peripheral region surrounding the central region, wherein the central region of the primary confinement layer 14 forms a primary confinement aperture 102 and the peripheral region forms a primary confinement region.
After the low divergence VCSEL laser 1 is turned on, the current is limited in flow direction by the main confinement layer 14 and the bottom confinement layer 122, which is finally directed into the middle region of the low divergence VCSEL laser 1, so that the middle region of the active region 13 generates laser light. Specifically, the confinement region has a higher resistivity to confine carriers flowing into the middle region of the low divergence angle VCSEL laser 1, and a lower refractive index to laterally confine photons, the carriers and optical lateral confinement increasing the density of carriers and photons within the active region 13, improving the efficiency of light generation within the active region 13.
In an embodiment of the present application, the main confinement layer 14 and the bottom confinement layer 122 may be implemented as oxidation confinement layers, which are formed by an oxidation process. The main confinement layer 14 and the bottom confinement layer 122 may also be implemented as other types of confinement layers, for example as ion confinement layers, which are formed by an ion implantation process. The main confinement layer 14 is formed above and/or below the active region 13.
In an embodiment of the present application, the VCSEL anode 20 includes a first N-type metal layer 21, where the first N-type metal layer 21 is formed on the N-type substrate layer 11. In one embodiment of the present application, the substrate layer 11 is an N-type substrate layer 11, and the first N-type metal layer 21 is formed below the substrate layer 11. In another embodiment of the present application, the first N-type metal layer 21 is partially located above the substrate layer 11, and another portion extends through the substrate layer to below the substrate layer 11. In this embodiment, the substrate layer 11 may be an N-type substrate. The substrate layer 11 may also be a less conductive, almost insulating substrate.
The VCSEL cathode 30 includes a cathode metal layer 31, wherein the cathode metal layer 31 is formed on the electrode contact layer 16. In one embodiment of the present application, the top DBR layer 151 may be a top N-DBR layer; the electrode contact layer 16 of the VCSEL cathode 30 is an N-type electrode contact layer 16, and the cathode metal layer 31 is a second N-type metal layer.
In another embodiment of the present application, the top DBR layer 151 may be a top N-DBR layer; the top mirror portion 15 further includes a top tunnel junction, the electrode contact layer 16 of the VCSEL cathode 30 is a P-type electrode contact layer 16, the cathode metal layer 31 is a P-type metal layer, the top tunnel junction of the top mirror portion 15 is located above the top N-DBR layer, and is formed between the top N-DBR layer and the P-type electrode contact layer 16.
In yet another embodiment of the present application, the top DBR layer 151 may also be a top P-DBR layer; the top mirror portion 15 further comprises a top tunnel junction. The top tunnel junction of the top mirror portion 15 may be disposed below the top P-DBR layer. The electrode contact layer 16 of the VCSEL cathode 30 is a P-type electrode contact layer 16, and the cathode metal layer 31 is a P-type metal layer. The P-type electrode contact layer 16 is formed over the top P-DBR layer.
As described above, in the prior art, the high-order transverse mode of the VCSEL is suppressed by the bas-surface relief method, the proton implantation technique, the photonic crystal technique, or the like, and the divergence angle of the VCSEL is reduced. However, various approaches proposed in the prior art to reduce the divergence angle of VCSELs have a number of problems.
The application can strengthen diffraction loss and absorption loss by prolonging the resonant cavity, thereby inhibiting the high-order transverse mode and reducing the divergence angle of the VCSEL. Specifically, the resonant cavity is extended by increasing the thickness of the low aluminum layer 120 under the quantum well region 150 of the active region 13. In the embodiment of the present application, the thickness of the at least one P-type low-aluminum layer 120 located below the quantum well region 150 in the VCSEL body 10 is greater than λ/4, where λ is the operating wavelength of the low divergence angle VCSEL laser 1.
Specifically, in some embodiments of the present application, the thickness of the low-aluminum layer 120 of at least one P-type layer located under the quantum well region 150 in the active region 13 is greater than λ/4, as shown in fig. 3 to 6 and 11. The P-type low aluminum layer 120 having a thickness greater than lambda/4 under the quantum well region 150 in the active region 13 may be referred to as an under-active extension low aluminum layer 1301. The thickness of the extended low-aluminum layer 1301 under the active region is nλ/4, where n is an odd number greater than 1.
In some examples of the application, only one of the low-aluminum layers 120 of the active region 13 located below the quantum well region 150 is the active region lower extension low-aluminum layer 1301. In other examples of the present application, a plurality of the low aluminum layers 120 in the low aluminum layer 120 under the quantum well region 150 in the active region 13 is an extended low aluminum layer 1301 under the active region.
Optionally, the thickness of the extended low-aluminum layer 1301 is equal under all the active regions located under the quantum well region 150 in the active region 13; or the thickness of at least a portion of the active region under-active extension low-aluminum layer 1301 in the active region 13 under the quantum well region 15 is not equal.
Accordingly, in some examples of the application, the thickness of the lower elongated low-aluminum layer 1301 of the active region 13 below the quantum well region 150 is tapered in a direction away from the quantum well region 150, that is, the farther from the quantum well region 150, the lower the thickness of the lower elongated low-aluminum layer 1301. For example, in one example of the present application, the thickness of the multi-layer under-active-region elongated low-aluminum layer 1301 of the active region 13 located under the quantum well region 150 is 5λ/4, 3λ/4, respectively, in a direction away from the quantum well region 150. In another example of the present application, the thickness of the multi-layer under-active-region elongated low-aluminum layer 1301 of the active region 13 located under the quantum well region 150 is 9λ/4, 7λ/4, 5λ/4, 3λ/4, respectively, in the direction away from the quantum well region 150. It should be appreciated that in other examples, the thickness of the active region under-extension low aluminum layer 1301 may be designed in other ways.
In other embodiments of the present application, at least one of the lower N-DBR layers 121 located below the quantum well region 150 of the active region 13 has a thickness of the layer low aluminum layer 120 greater than λ/4, as shown in fig. 7 to 11. The low aluminum layer 120 having a thickness of the bottom N-DBR layer 121 greater than λ/4 may be referred to as a bottom N-DBR layer elongated low aluminum layer 1201. The bottom N-DBR layer elongated low aluminum layer 1201 has a thickness nλ/4, where N is an odd number greater than 1.
In some examples of the application, only one of the low aluminum layers 120 of the bottom N-DBR layer 121 is the bottom N-DBR layer elongated low aluminum layer 1201. In other examples of the present application, a plurality of the low aluminum layers 120 of the bottom N-DBR layer 121 are the bottom N-DBR layer elongated low aluminum layers 1201.
Alternatively, all of the bottom N-DBR layer elongated low aluminum layers 1201 of the bottom N-DBR layer 121 have equal thickness; or at least a portion of the bottom N-DBR layer 121 has an unequal thickness of the bottom N-DBR layer elongated low aluminum layer 1201.
Accordingly, in some examples of the application, the thicknesses of the plurality of bottom N-DBR layer elongated low aluminum layers 1201 in the bottom N-DBR layer 121 have a decreasing trend in a direction away from the quantum well region 150, that is, the lower the thickness of the lower elongated low aluminum layer 1301 is the farther from the quantum well region 150. For example, in one example of the present application, the bottom N-DBR layer elongated low aluminum layer 1201 is formed in multiple layers of the bottom N-DBR layer 121 and has a thickness of 5λ/4, 3λ/4, respectively, in a direction away from the quantum well region 150. In another example of the present application, the bottom N-DBR layer 121 has a plurality of bottom N-DBR layer elongated low aluminum layers 1201 each having a thickness of 9 λ/4, 7λ/4, 5λ/4, 3λ/4 in a direction away from the quantum well region 150. It should be appreciated that in other examples, the thickness of the bottom N-DBR layer elongated low aluminum layer 1201 may be designed in other ways.
In the embodiment of the present application, the optical field distribution of the low divergence angle type VCSEL laser 1 of the present application is tested, and compared with the conventional VCSEL laser, the result shows that the optical field of the low divergence angle type VCSEL laser of the present application is more concentrated than the optical field distribution of the conventional VCSEL laser, which means that the low divergence angle type VCSEL laser 1 can achieve a smaller divergence angle. The low divergence angle VCSEL laser 1 according to the present application was tested to have a divergence angle of 5 degrees to 45 degrees.
It should be noted that, in the present application, the low divergence angle VCSEL laser 1 extends the resonant cavity by increasing the thickness of the low aluminum layer 120 at a specific position, so as to enhance diffraction loss and absorption loss, thereby suppressing the high-order transverse mode, and not only can reduce the divergence angle of the VCSEL laser, but also is easy to implement.
Schematic VCSEL array: accordingly, in accordance with yet another aspect of the present application, a VCSEL array 100 is also provided. As shown in fig. 12 and 13, the VCSEL array 100 includes: two or more low divergence angle type VCSEL lasers 1 as described above, wherein the VCSEL anodes 20 of two or more of the low divergence angle type VCSEL lasers 1 are common. The VCSEL cathodes 30 of two or more of the low divergence angle VCSEL lasers 1 are electrically isolated. The particular manner in which the VCSEL cathodes 30 of two or more of the low divergence angle VCSEL lasers 1 are electrically isolated is not limiting of the present application. For example, a separation groove may be provided between adjacent two of the low divergence angle VCSEL lasers 1, the separation groove extending downward from the upper surface of the low divergence angle VCSEL laser 1 to the bottom N-DBR layer 121; ions may also be injected between two adjacent low divergence angle type VCSEL lasers 1 to form an ion isolation portion extending downward from the upper surface of the low divergence angle type VCSEL lasers 1 to the bottom N-DBR layer 121. The specific structure and function of the low divergence angle type VCSEL laser 1 have been described in detail in the description of the low divergence angle type VCSEL laser 1 illustrated above with reference to fig. 2 to 4, and thus, repetitive description thereof will be omitted.
A method of manufacturing an illustrative low divergence angle VCSEL laser: accordingly, in an embodiment of the present application, a method for manufacturing a low divergence angle VCSEL laser is provided. As shown in fig. 14 to 16, it includes: s110, forming a VCSEL body 10, the VCSEL body 10 comprising: a substrate layer 11, a bottom mirror portion 12, an active region 13, a main confinement layer 14, a top mirror portion 15, and an electrode contact layer 16; wherein the bottom mirror portion 12 is formed on the substrate layer 11, the bottom mirror portion 12 including a bottom N-DBR layer 121, a bottom confinement layer 122, a bottom tunnel junction 123, and a bottom P-DBR layer 124; the bottom N-DBR layer 121 is formed on the N-type substrate layer 11, the bottom N-DBR layer 121 includes at least one low aluminum layer 120 and one high aluminum layer 110, and the aluminum content of the high aluminum layer 110 is higher than that of the low aluminum layer 120; the bottom confinement layer 122, the bottom tunnel junction 123, and the bottom P-DBR layer 124 are stacked on the bottom N-DBR layer 121; the top mirror portion 15 includes at least one top DBR layer 151; the active region 13 is located between the bottom mirror portion 12 and the top mirror portion 15, the active region 13 includes a quantum well region 150, the active region 13 further includes at least one low-aluminum layer 120 and one high-aluminum layer 110, and at least one low-aluminum layer 120 in the active region 13 is located below the quantum well region 150 and is a P-type low-aluminum layer 120; the primary confinement layer 14 is located between the bottom mirror portion 12 and the top mirror portion 15; the electrode contact layer 16 is formed on the top mirror portion 15; the thickness of at least one low-aluminum layer 120 of the VCSEL body 10 below the quantum well region 150 is greater than λ/4, where λ is the operating wavelength of the low divergence angle VCSEL laser 1; s120, forming a VCSEL cathode 30, wherein the VCSEL cathode 30 includes a cathode metal layer 31, and the cathode metal layer 31 is formed on the electrode contact layer 16; and S130, forming a VCSEL anode 20, wherein the VCSEL anode 20 comprises a first N-type metal layer 21, and the first N-type metal layer 21 is formed on the substrate layer 11.
In step S110, the VCSEL body 10 is formed. In particular, the specific embodiment of forming the VCSEL body 10 is not limiting of the application. In one specific example of the present application, first, a substrate layer 11 is provided.
Next, growing a bottom N-type semiconductor alternating layer, a bottom confinement layer forming layer, a bottom tunnel junction forming layer, a bottom P-type semiconductor alternating layer, an active region forming layer, a main confinement layer forming layer, a top doped semiconductor alternating layer, and a top contact layer forming layer stacked on the substrate layer 11 through an epitaxial growth process on the substrate layer 11 to form an epitaxial body structure; the epitaxial body structure includes a bottom N-type semiconductor alternating layer, a bottom confinement layer forming layer, a bottom tunnel junction forming layer, a bottom P-type semiconductor alternating layer, an active region forming layer, a main confinement layer forming layer, a top doped semiconductor alternating layer, and a top contact layer forming layer stacked on the substrate layer 11. The top doped semiconductor alternating layer is implemented as an N-type semiconductor alternating layer. The active region forming layer includes at least one N-type semiconductor layer, at least one P-type semiconductor layer, and a quantum well region 150 formed between the N-type semiconductor layer 130 and the P-type semiconductor layer 140. The P-type semiconductor layer 140 of the active region forming layer is located under the quantum well region 150. The P-type semiconductor layer 140 of the active region forming layer includes at least one P-type high aluminum layer 110 and at least one P-type low aluminum layer 120. The bottom N-type semiconductor alternating layers include at least one N-type high aluminum layer 110 and at least one N-type low aluminum layer 120. The thickness of the at least one P-type low aluminum layer 120 of the active region forming layer located under the quantum well region 150 is greater than lambda/4 during the forming of the active region forming layer, and/or the thickness of the at least one N-type low aluminum layer 120 of the bottom N-type semiconductor alternating layer is greater than lambda/4 during the forming of the bottom N-type semiconductor alternating layer.
Next, a laser forming region is defined, and a portion other than the low divergence angle VCSEL laser 1 of the epitaxial body is removed by an etching process so that the epitaxial body structure is partitioned into a plurality of cell structures for forming the low divergence angle VCSEL laser 1. Specifically, each layer structure of the epitaxial main body structure (i.e., a bottom N-type semiconductor alternating layer, a bottom confinement layer forming layer, a bottom tunnel junction forming layer, a bottom P-semiconductor alternating layer, an active region forming layer, a main confinement layer forming layer, a top doped semiconductor alternating layer, and a top contact layer forming layer) is divided into a plurality of sub-unit regions, respectively. Each unit structure comprises: a bottom N-type semiconductor alternating layer forming sub-unit region, a bottom confinement layer forming sub-unit region, a bottom tunnel junction forming sub-unit region, a bottom P-type semiconductor alternating layer forming sub-unit region, an active region forming sub-unit region, a main confinement layer forming sub-unit region, a top doped type semiconductor alternating layer forming sub-unit region, and a top contact layer forming sub-unit region.
Subsequently, the unit structure can be subjected to oxidation treatment, so that a part, close to the outer edge of the unit structure, of the bottom limiting layer forming layer sub-unit area and a part, close to the outer edge of the unit structure, of the main limiting layer forming layer sub-unit area in the unit structure are oxidized, and a limiting area is formed; the bottom confinement layer forms a portion of the layer sub-unit region near the center of the unit structure and a portion of the layer main confinement layer near the center of the unit structure without being oxidized, forming a confinement hole in the confinement region. The confinement layer may also be formed by other means, for example by an ion implantation process. In this way, each oxidized cell structure and the substrate layer 11 form the VCSEL body 10, wherein the bottom N-type semiconductor alternating layer sub-cell region forms the bottom N-DBR layer 121, the bottom confinement layer forming layer sub-cell region forms the bottom confinement layer 122 having the bottom confinement hole 101, the bottom tunnel junction forming layer sub-cell region forms the bottom tunnel junction 123, the bottom P-semiconductor alternating layer sub-cell region forms the bottom P-DBR layer 124, the active region forming layer sub-cell region forms the active region 13, the main confinement layer forming layer 14 having the main confinement hole 102, the top doped semiconductor alternating layer sub-cell region forms the top DBR layer 151, and the top contact layer forming layer 16. In the embodiment of the present application, the substrate layer 11 may be thinned.
In step S120, the VCSEL cathode 30 is formed. Specifically, a metal is plated on the electrode contact layer 16 to form a cathode metal layer 31. The cathode metal layer 31 may be an N-type metal layer.
In step S130, the VCSEL anode 20 is formed. Specifically, an N-type metal is plated on the lower surface of the substrate layer 11 to form a first N-type metal layer 21; or first, in the process of forming the VCSEL body 10, after a substrate layer 11, a part of a first N-type metal layer 21 is formed on the substrate layer 11, and then the epitaxial body structure is formed on the first N-type metal layer 21. Then, holes are dug on the substrate layer 11, the holes penetrate through the upper surface and the lower surface of the substrate layer 11, and the holes extend to the first N-type metal layer 21; next, the N-type metal is implanted into the hole of the substrate 11, and the N-type metal implanted into the hole of the substrate 11 extends to the first N-type metal layer 21. When the N-type metal is injected into the hole of the substrate layer 11, the N-type metal may be injected into the hole overflowing the substrate layer 11 such that at least a portion of the N-type metal extends below the substrate layer 11, forming another portion of the first N-type metal layer 21 extending from the first N-type metal layer 21 to below the substrate layer 11.
It should be noted that, in the embodiment of the present application, the low divergence angle VCSEL laser 1 forms the DBR layer by using a mature epitaxial growth process, so that the thickness of the DBR layer can be controlled more precisely, and the structural stability and reliability of the low divergence angle VCSEL laser can be improved. Compared with the traditional VCSEL, the low-divergence-angle VCSEL laser 1 mainly adjusts the arrangement sequence and the number of each structural layer and the thickness of a specific structural layer, so that the traditional VCSEL manufacturing process and equipment can be used in the manufacturing process of the low-divergence-angle VCSEL laser 1. Thus, the original VCSEL production line and production equipment can be reserved for preparing the low-divergence-angle VCSEL laser 1, the production line modification cost of the low-divergence-angle VCSEL laser 1 is effectively reduced, and the preparation cost of the low-divergence-angle VCSEL laser 1 is further reduced.
In summary, a low divergence angle VCSEL laser 1, a method of manufacturing the same, and a VCSEL array 100 according to embodiments of the present application are illustrated. The low divergence angle type VCSEL laser 1 can suppress a high order transverse mode, reduce the divergence angle of the VCSEL laser, and the structure of the low divergence angle type VCSEL laser 1 is suitable for the common anode type VCSEL array 100, and keeps the substrate layer 11 as the N type substrate layer 11.
The basic principles of the present application have been described above in connection with specific embodiments, but it should be noted that the advantages, benefits, effects, etc. mentioned in the present application are merely examples and not intended to be limiting, and these advantages, benefits, effects, etc. are not to be construed as necessarily possessed by the various embodiments of the application. Furthermore, the specific details disclosed herein are for purposes of illustration and understanding only, and are not intended to be limiting, as the application is not necessarily limited to practice with the above described specific details.

Claims (14)

1. A low divergence angle VCSEL laser, comprising:
a VCSEL body, the VCSEL body comprising:
A substrate layer;
A bottom mirror portion formed on the substrate layer, the bottom mirror portion including a bottom N-DBR layer, a bottom confinement layer, a bottom tunnel junction, a bottom P-DBR layer; wherein the bottom N-DBR layer is formed on the substrate layer, the bottom confinement layer, the bottom tunnel junction, and the bottom P-DBR layer being stacked on the bottom N-DBR layer; the bottom N-DBR layer includes at least one low aluminum layer and one high aluminum layer, the high aluminum layer having an aluminum content higher than the low aluminum layer;
a top mirror portion comprising at least one top DBR layer;
An active region between the bottom mirror portion and the top mirror portion, the active region comprising a quantum well region, the active region further comprising at least one of the low aluminum layers and one of the high aluminum layers, at least one of the low aluminum layers in the active region being located below the quantum well region and being an N-type low aluminum layer;
a primary confinement layer between the bottom mirror portion and the top mirror portion; and
An electrode contact layer formed on the top mirror portion;
A VCSEL anode comprising a first N-type metal layer formed on the substrate layer;
A VCSEL cathode comprising a cathode metal layer formed on the electrode contact layer;
The thickness of the low-aluminum layer of at least one P type below the quantum well region in the VCSEL main body is larger than lambda/4, wherein lambda is the working wavelength of the low-divergence angle type VCSEL laser.
2. The low divergence angle VCSEL laser of claim 1 where at least one of the bottom N-DBR layers has a thickness of the layer low aluminum layer greater than λ/4, where λ is the operating wavelength of the low divergence angle VCSEL laser, the low aluminum layer having a thickness greater than λ/4 forming a bottom N-DBR layer elongated low aluminum layer.
3. The low divergence angle VCSEL laser in accordance with claim 2, wherein the plurality of low aluminum layers in the bottom N-DBR layer are the bottom N-DBR layer elongated low aluminum layers, all of the bottom N-DBR layer elongated low aluminum layers having equal thickness.
4. The low divergence angle VCSEL laser of claim 2 wherein the plurality of low aluminum layers in the bottom N-DBR layer are the bottom N-DBR layer elongated low aluminum layers having thicknesses that taper in a direction away from the quantum well region.
5. The low divergence angle VCSEL laser in accordance with claim 2, wherein the bottom N-DBR layer elongated low aluminum layer has a thickness nλ/4, where N is an odd number greater than 1.
6. The low divergence angle VCSEL laser of claim 1 wherein at least one of the P-type low aluminum layers below the quantum well region in the active region has a thickness greater than λ/4, where λ is the low aluminum layer of the low divergence angle VCSEL laser having an operating wavelength thickness greater than λ/4, and the P-type low aluminum layer below the quantum well region has a thickness greater than λ/4 in the active region forms an extended low aluminum layer below the active region.
7. The low divergence angle VCSEL laser in accordance with claim 6, wherein the plurality of low aluminum layers in the active region below the quantum well region are elongated low aluminum layers under the active region, all of the elongated low aluminum layers in the active region below the quantum well region being of equal thickness.
8. The low divergence angle VCSEL laser in accordance with claim 6, wherein the plurality of low aluminum layers in the active region below the quantum well region are elongated low aluminum layers under the active region, the thickness of the plurality of elongated low aluminum layers in the active region below the quantum well region being tapered in a direction away from the quantum well region.
9. The low divergence VCSEL laser in accordance with claim 6, wherein the elongated low aluminum layer under the active region has a thickness nλ/4, where n is an odd number greater than 1.
10. The low divergence VCSEL laser of claim 1 where the low aluminum layer has an aluminum content of less than 0.4 and the high aluminum layer has an aluminum content of greater than 0.4.
11. The low divergence angle VCSEL laser in accordance with claim 1, wherein the top DBR layer is a top N-DBR layer.
12. The low divergence VCSEL laser of claim 1 where the electrode contact layer of the VCSEL cathode is an N-type electrode contact layer and the cathode metal layer is a second N-type metal layer.
13. A VCSEL array, comprising: two or more low divergence angle VCSEL lasers, the low divergence angle VCSEL lasers comprising:
a VCSEL body, the VCSEL body comprising:
A substrate layer;
A bottom mirror portion formed on the substrate layer, the bottom mirror portion including a bottom N-DBR layer, a bottom confinement layer, a bottom tunnel junction, a bottom P-DBR layer; wherein the bottom N-DBR layer is formed on the substrate layer, the bottom confinement layer, the bottom tunnel junction, and the bottom P-DBR layer being stacked on the bottom N-DBR layer; the bottom N-DBR layer includes at least one low aluminum layer and one high aluminum layer, the high aluminum layer having an aluminum content higher than the low aluminum layer;
a top mirror portion comprising at least one top DBR layer;
An active region between the bottom mirror portion and the top mirror portion, the active region comprising a quantum well region, the active region further comprising at least one of the low aluminum layers and one of the high aluminum layers, at least one of the low aluminum layers in the active region being located below the quantum well region and being a P-type low aluminum layer;
a primary confinement layer between the bottom mirror portion and the top mirror portion; and
An electrode contact layer formed on the top mirror portion;
A VCSEL anode comprising a first N-type metal layer formed on the substrate layer;
A VCSEL cathode comprising a cathode metal layer formed on the electrode contact layer;
the thickness of the low-aluminum layer of at least one N type below the quantum well region in the VCSEL main body is larger than lambda/4, wherein lambda is the working wavelength of the low-divergence angle type VCSEL laser;
The VCSEL anode of two or more of the low divergence angle VCSEL lasers is common.
14. A method of manufacturing a low divergence angle VCSEL laser, comprising:
Forming a VCSEL body, the VCSEL body comprising: a substrate layer, a bottom mirror portion, an active region, a main confinement layer, a top mirror portion, and an electrode contact layer; wherein the bottom mirror portion is formed on the substrate layer, the bottom mirror portion comprising a bottom N-DBR layer, a bottom confinement layer, a bottom tunnel junction, and a bottom P-DBR layer; the bottom N-DBR layer is formed on the substrate layer, and comprises at least one low aluminum layer and one high aluminum layer, wherein the aluminum content of the high aluminum layer is higher than that of the low aluminum layer; the bottom confinement layer, the bottom tunnel junction, and the bottom P-DBR layer stack are disposed on the bottom N-DBR layer; the top mirror portion includes at least one top DBR layer; the active region is positioned between the bottom mirror part and the top mirror part, the active region comprises a quantum well region, the active region further comprises at least one low-aluminum layer and one high-aluminum layer, and at least one low-aluminum layer in the active region is positioned below the quantum well region and is a P-type low-aluminum layer; the primary confinement layer is located between the bottom mirror portion and the top mirror portion; the electrode contact layer is formed on the top mirror portion; the thickness of at least one low-aluminum layer below the quantum well region in the VCSEL main body is larger than lambda/4, wherein lambda is the working wavelength of the low-divergence angle VCSEL laser;
Forming a VCSEL cathode, wherein the VCSEL cathode comprises a cathode metal layer, and the cathode metal layer is formed on the electrode contact layer; and
A VCSEL anode is formed, the VCSEL anode comprising a first N-type metal layer formed on the substrate layer.
CN202311855159.7A 2023-12-29 2023-12-29 Low divergence angle VCSEL laser, manufacturing method thereof and VCSEL array Pending CN118040467A (en)

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